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author | Faraz Shahbazker <Faraz.Shahbazker@mips.com> | 2018-06-14 21:34:49 +0100 |
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committer | Maciej W. Rozycki <macro@mips.com> | 2018-06-14 21:34:49 +0100 |
commit | 6f20c942c3dbc08d02f74e4d508e19f8617bc5e3 (patch) | |
tree | 8657870580c22165d940be0b82c63920e75835ea /bfd | |
parent | 8993072900ae3980957f704a1e3e033a22a4dcac (diff) | |
download | gdb-6f20c942c3dbc08d02f74e4d508e19f8617bc5e3.zip gdb-6f20c942c3dbc08d02f74e4d508e19f8617bc5e3.tar.gz gdb-6f20c942c3dbc08d02f74e4d508e19f8617bc5e3.tar.bz2 |
MIPS: Add Global INValidate ASE support
Add support for the Global INValidate Application Specific Extension
for Release 6 of the MIPS Architecture.
[1] "MIPS Architecture for Programmers Volume II-A: The MIPS32
Instruction Set Manual", Imagination Technologies Ltd., Document
Number: MD00086, Revision 6.06, December 15, 2016, Section 3.2
"Alphabetical List of Instructions", pp. 187-191
bfd/
* elfxx-mips.c (print_mips_ases): Add GINV extension.
binutils/
* readelf.c (print_mips_ases): Add GINV extension.
gas/
* NEWS: Mention MIPS Global INValidate ASE support.
* config/tc-mips.c (options): Add OPTION_GINV and OPTION_NO_GINV.
(md_longopts): Likewise.
(mips_ases): Define availability for GINV.
(mips_convert_ase_flags): Map ASE_GINV to AFL_ASE_GINV.
(md_show_usage): Add help for -mginv and -mno-ginv.
* doc/as.texinfo: Document -mginv, -mno-ginv.
* doc/c-mips.texi: Document -mginv, -mno-ginv, .set ginv and
.set noginv.
* testsuite/gas/mips/ase-errors-1.s: Add error checks for GINV
ASE.
* testsuite/gas/mips/ase-errors-2.s: Likewise.
* testsuite/gas/mips/ase-errors-1.l: Likewise.
* testsuite/gas/mips/ase-errors-2.l: Likewise.
* testsuite/gas/mips/ginv.d: New test.
* testsuite/gas/mips/ginv-err.d: New test.
* testsuite/gas/mips/ginv-err.l: New test stderr output.
* testsuite/gas/mips/ginv.s: New test source.
* testsuite/gas/mips/ginv-err.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
include/
* elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
(AFL_ASE_MASK): Update to include AFL_ASE_GINV.
* opcode/mips.h: Document "+\" operand format.
(ASE_GINV): New macro.
opcodes/
* mips-dis.c (mips_arch_choices): Add GINV to mips32r6 and
mips64r6 descriptors.
(parse_mips_ase_option): Handle -Mginv option.
(print_mips_disassembler_options): Document -Mginv.
* mips-opc.c (decode_mips_operand) <+\>: New operand format.
(GINV): New macro.
(mips_opcodes): Define ginvi and ginvt.
Diffstat (limited to 'bfd')
-rw-r--r-- | bfd/ChangeLog | 4 | ||||
-rw-r--r-- | bfd/elfxx-mips.c | 2 |
2 files changed, 6 insertions, 0 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 06498a5..b14eea6 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,7 @@ +2018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com> + + * elfxx-mips.c (print_mips_ases): Add GINV extension. + 2018-06-14 H.J. Lu <hongjiu.lu@intel.com> PR binutils/23267 diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c index 6e2f6fe..f2c7e9e 100644 --- a/bfd/elfxx-mips.c +++ b/bfd/elfxx-mips.c @@ -15644,6 +15644,8 @@ print_mips_ases (FILE *file, unsigned int mask) fputs ("\n\tMIPS16e2 ASE", file); if (mask & AFL_ASE_CRC) fputs ("\n\tCRC ASE", file); + if (mask & AFL_ASE_GINV) + fputs ("\n\tGINV ASE", file); if (mask == 0) fprintf (file, "\n\t%s", _("None")); else if ((mask & ~AFL_ASE_MASK) != 0) |