RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.

* Renamed obsolete UJ/SB types and RVC types, also added CSS/CL(CS) types,

[VALID/EXTRACT/ENCODE macros]
BTYPE_IMM:            Renamed from SBTYPE_IMM.
JTYPE_IMM:            Renamed from UJTYPE_IMM.
CITYPE_IMM:           Renamed from RVC_IMM.
CITYPE_LUI_IMM:       Renamed from RVC_LUI_IMM.
CITYPE_ADDI16SP_IMM:  Renamed from RVC_ADDI16SP_IMM.
CITYPE_LWSP_IMM:      Renamed from RVC_LWSP_IMM.
CITYPE_LDSP_IMM:      Renamed from RVC_LDSP_IMM.
CIWTYPE_IMM:          Renamed from RVC_UIMM8.
CIWTYPE_ADDI4SPN_IMM: Renamed from RVC_ADDI4SPN_IMM.
CSSTYPE_IMM:          Added for .insn without special encoding.
CSSTYPE_SWSP_IMM:     Renamed from RVC_SWSP_IMM.
CSSTYPE_SDSP_IMM:     Renamed from RVC_SDSP_IMM.
CLTYPE_IMM:           Added for .insn without special encoding.
CLTYPE_LW_IMM:        Renamed from RVC_LW_IMM.
CLTYPE_LD_IMM:        Renamed from RVC_LD_IMM.
RVC_SIMM3:            Unused and removed.
CBTYPE_IMM:           Renamed from RVC_B_IMM.
CJTYPE_IMM:           Renamed from RVC_J_IMM.

* Added new operands and removed the unused ones,

C5: Unsigned CL(CS) immediate, added for .insn directive.
C6: Unsigned CSS immediate, added for .insn directive.
Ci: Unused and removed.
C<: Unused and removed.

bfd/
    PR 27158
    * elfnn-riscv.c (perform_relocation): Updated encoding macros.
    (_bfd_riscv_relax_call): Likewise.
    (_bfd_riscv_relax_lui): Likewise.
    * elfxx-riscv.c (howto_table): Likewise.
gas/
    PR 27158
    * config/tc-riscv.c (riscv_ip): Updated encoding macros.
    (md_apply_fix): Likewise.
    (md_convert_frag_branch): Likewise.
    (validate_riscv_insn): Likewise.  Also arranged operands, including
    added C5 and C6 operands, and removed unused Ci and C< operands.
    * doc/c-riscv.texi: Updated and added CSS/CL/CS types.
    * testsuite/gas/riscv/insn.d: Added CSS/CL/CS instructions.
    * testsuite/gas/riscv/insn.s: Likewise.
gdb/
    PR 27158
    * riscv-tdep.c (decode_ci_type_insn): Updated encoding macros.
    (decode_j_type_insn): Likewise.
    (decode_cj_type_insn): Likewise.
    (decode_b_type_insn): Likewise.
    (decode): Likewise.
include/
    PR 27158
    * opcode/riscv.h: Updated encoding macros.
opcodes/
    PR 27158
    * riscv-dis.c (print_insn_args): Updated encoding macros.
    * riscv-opc.c (MASK_RVC_IMM): defined to ENCODE_CITYPE_IMM.
    (match_c_addi16sp): Updated encoding macros.
    (match_c_lui): Likewise.
    (match_c_lui_with_hint): Likewise.
    (match_c_addi4spn): Likewise.
    (match_c_slli): Likewise.
    (match_slli_as_c_slli): Likewise.
    (match_c_slli64): Likewise.
    (match_srxi_as_c_srxi): Likewise.
    (riscv_insn_types): Added .insn css/cl/cs.
sim/
    PR 27158
    * riscv/sim-main.c (execute_i): Updated encoding macros.

3 files changed, 30 insertions, 22 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 0197e7b..7c7afe1 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,11 @@
+2021-02-19  Nelson Chu  <nelson.chu@sifive.com>
+
+	PR 27158
+	* elfnn-riscv.c (perform_relocation): Updated encoding macros.
+	(_bfd_riscv_relax_call): Likewise.
+	(_bfd_riscv_relax_lui): Likewise.
+	* elfxx-riscv.c (howto_table): Likewise.
+
 2021-02-18  Nelson Chu  <nelson.chu@sifive.com>
 
 	* Makefile.am: Added cpu-riscv.h.
diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index 8739673..ec8a3e7 100644
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -1646,27 +1646,27 @@ perform_relocation (const reloc_howto_type *howto,
       break;
 
     case R_RISCV_JAL:
-      if (!VALID_UJTYPE_IMM (value))
+      if (!VALID_JTYPE_IMM (value))
 	return bfd_reloc_overflow;
-      value = ENCODE_UJTYPE_IMM (value);
+      value = ENCODE_JTYPE_IMM (value);
       break;
 
     case R_RISCV_BRANCH:
-      if (!VALID_SBTYPE_IMM (value))
+      if (!VALID_BTYPE_IMM (value))
 	return bfd_reloc_overflow;
-      value = ENCODE_SBTYPE_IMM (value);
+      value = ENCODE_BTYPE_IMM (value);
       break;
 
     case R_RISCV_RVC_BRANCH:
-      if (!VALID_RVC_B_IMM (value))
+      if (!VALID_CBTYPE_IMM (value))
 	return bfd_reloc_overflow;
-      value = ENCODE_RVC_B_IMM (value);
+      value = ENCODE_CBTYPE_IMM (value);
       break;
 
     case R_RISCV_RVC_JUMP:
-      if (!VALID_RVC_J_IMM (value))
+      if (!VALID_CJTYPE_IMM (value))
 	return bfd_reloc_overflow;
-      value = ENCODE_RVC_J_IMM (value);
+      value = ENCODE_CJTYPE_IMM (value);
       break;
 
     case R_RISCV_RVC_LUI:
@@ -1679,12 +1679,12 @@ perform_relocation (const reloc_howto_type *howto,
 					 contents + rel->r_offset);
 	  insn = (insn & ~MATCH_C_LUI) | MATCH_C_LI;
 	  riscv_put_insn (howto->bitsize, insn, contents + rel->r_offset);
-	  value = ENCODE_RVC_IMM (0);
+	  value = ENCODE_CITYPE_IMM (0);
 	}
-      else if (!VALID_RVC_LUI_IMM (RISCV_CONST_HIGH_PART (value)))
+      else if (!VALID_CITYPE_LUI_IMM (RISCV_CONST_HIGH_PART (value)))
 	return bfd_reloc_overflow;
       else
-	value = ENCODE_RVC_LUI_IMM (RISCV_CONST_HIGH_PART (value));
+	value = ENCODE_CITYPE_LUI_IMM (RISCV_CONST_HIGH_PART (value));
       break;
 
     case R_RISCV_32:
@@ -4139,7 +4139,7 @@ _bfd_riscv_relax_call (bfd *abfd, asection *sec, asection *sym_sec,
      cause the PC-relative offset to later increase, so we need to add in the
      max alignment of any section inclusive from the call to the target.
      Otherwise, we only need to use the alignment of the current section.  */
-  if (VALID_UJTYPE_IMM (foff))
+  if (VALID_JTYPE_IMM (foff))
     {
       if (sym_sec->output_section == sec->output_section
 	  && sym_sec->output_section != bfd_abs_section_ptr)
@@ -4148,7 +4148,7 @@ _bfd_riscv_relax_call (bfd *abfd, asection *sec, asection *sym_sec,
     }
 
   /* See if this function call can be shortened.  */
-  if (!VALID_UJTYPE_IMM (foff) && !(!bfd_link_pic (link_info) && near_zero))
+  if (!VALID_JTYPE_IMM (foff) && !(!bfd_link_pic (link_info) && near_zero))
     return TRUE;
 
   /* Shorten the function call.  */
@@ -4157,7 +4157,7 @@ _bfd_riscv_relax_call (bfd *abfd, asection *sec, asection *sym_sec,
   auipc = bfd_getl32 (contents + rel->r_offset);
   jalr = bfd_getl32 (contents + rel->r_offset + 4);
   rd = (jalr >> OP_SH_RD) & OP_MASK_RD;
-  rvc = rvc && VALID_RVC_J_IMM (foff);
+  rvc = rvc && VALID_CJTYPE_IMM (foff);
 
   /* C.J exists on RV32 and RV64, but C.JAL is RV32-only.  */
   rvc = rvc && (rd == 0 || (rd == X_RA && ARCH_SIZE == 32));
@@ -4169,7 +4169,7 @@ _bfd_riscv_relax_call (bfd *abfd, asection *sec, asection *sym_sec,
       auipc = rd == 0 ? MATCH_C_J : MATCH_C_JAL;
       len = 2;
     }
-  else if (VALID_UJTYPE_IMM (foff))
+  else if (VALID_JTYPE_IMM (foff))
     {
       /* Relax to JAL rd, addr.  */
       r_type = R_RISCV_JAL;
@@ -4298,8 +4298,8 @@ _bfd_riscv_relax_lui (bfd *abfd,
 
   if (use_rvc
       && ELFNN_R_TYPE (rel->r_info) == R_RISCV_HI20
-      && VALID_RVC_LUI_IMM (RISCV_CONST_HIGH_PART (symval))
-      && VALID_RVC_LUI_IMM (RISCV_CONST_HIGH_PART (symval)
+      && VALID_CITYPE_LUI_IMM (RISCV_CONST_HIGH_PART (symval))
+      && VALID_CITYPE_LUI_IMM (RISCV_CONST_HIGH_PART (symval)
 			    + (link_info->relro ? 2 * ELF_MAXPAGESIZE
 			       : ELF_MAXPAGESIZE)))
     {
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index d3b882b..fd0fb49 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -235,7 +235,7 @@ static reloc_howto_type howto_table[] =
 	 "R_RISCV_BRANCH",		/* name */
 	 FALSE,				/* partial_inplace */
 	 0,				/* src_mask */
-	 ENCODE_SBTYPE_IMM (-1U),	/* dst_mask */
+	 ENCODE_BTYPE_IMM (-1U),	/* dst_mask */
 	 TRUE),				/* pcrel_offset */
 
   /* 20-bit PC-relative jump offset.  */
@@ -250,7 +250,7 @@ static reloc_howto_type howto_table[] =
 	 "R_RISCV_JAL",			/* name */
 	 FALSE,				/* partial_inplace */
 	 0,				/* src_mask */
-	 ENCODE_UJTYPE_IMM (-1U),	/* dst_mask */
+	 ENCODE_JTYPE_IMM (-1U),	/* dst_mask */
 	 TRUE),				/* pcrel_offset */
 
   /* 32-bit PC-relative function call (AUIPC/JALR).  */
@@ -659,7 +659,7 @@ static reloc_howto_type howto_table[] =
 	 "R_RISCV_RVC_BRANCH",		/* name */
 	 FALSE,				/* partial_inplace */
 	 0,				/* src_mask */
-	 ENCODE_RVC_B_IMM (-1U),	/* dst_mask */
+	 ENCODE_CBTYPE_IMM (-1U),	/* dst_mask */
 	 TRUE),				/* pcrel_offset */
 
   /* 11-bit PC-relative jump offset.  */
@@ -674,7 +674,7 @@ static reloc_howto_type howto_table[] =
 	 "R_RISCV_RVC_JUMP",		/* name */
 	 FALSE,				/* partial_inplace */
 	 0,				/* src_mask */
-	 ENCODE_RVC_J_IMM (-1U),	/* dst_mask */
+	 ENCODE_CJTYPE_IMM (-1U),	/* dst_mask */
 	 TRUE),				/* pcrel_offset */
 
   /* High 6 bits of 18-bit absolute address.  */
@@ -689,7 +689,7 @@ static reloc_howto_type howto_table[] =
 	 "R_RISCV_RVC_LUI",		/* name */
 	 FALSE,				/* partial_inplace */
 	 0,				/* src_mask */
-	 ENCODE_RVC_IMM (-1U),		/* dst_mask */
+	 ENCODE_CITYPE_IMM (-1U),	/* dst_mask */
 	 FALSE),			/* pcrel_offset */
 
   /* GP-relative load.  */