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authorNick Clifton <nickc@redhat.com>2004-07-07 17:28:53 +0000
committerNick Clifton <nickc@redhat.com>2004-07-07 17:28:53 +0000
commit1fe1f39c06f2d04c2058b902feeafe46fd1ff48b (patch)
tree7b86a452584e85765f7fb2facedad588636e177b /bfd
parent5c02dc5924528fb856e17cb5c7e8ea30a1f7111d (diff)
downloadgdb-1fe1f39c06f2d04c2058b902feeafe46fd1ff48b.zip
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Add new port: crx-elf
Diffstat (limited to 'bfd')
-rw-r--r--bfd/ChangeLog61
-rw-r--r--bfd/Makefile.am9
-rw-r--r--bfd/Makefile.in9
-rw-r--r--bfd/archures.c4
-rw-r--r--bfd/bfd-in2.h21
-rw-r--r--bfd/config.bfd6
-rwxr-xr-xbfd/configure43
-rw-r--r--bfd/configure.in1
-rw-r--r--bfd/cpu-crx.c39
-rw-r--r--bfd/elf32-crx.c1233
-rw-r--r--bfd/libbfd.h17
-rw-r--r--bfd/reloc.c37
-rw-r--r--bfd/targets.c2
13 files changed, 1444 insertions, 38 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 15f9fb6..d7c9457 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,30 @@
+2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
+
+ * Makefile.am (ALL_MACHINES): Add cpu-crx.lo.
+ (ALL_MACHINES_CFILES): Add cpu-crx.c.
+ (BFD32_BACKENDS): Add elf32-crx.lo.
+ (BFD32_BACKENDS_CFILES): Add elf32-crx.c.
+ (cpu-crx.lo): New target.
+ (elf32-crx.lo): New target.
+ * Makefile.in: Regenerate.
+ * archures.c (bfd_architecture): Add bfd_{arch,mach}_crx.
+ (bfd_archures_list): Add bfd_crx_arch.
+ * bfd-in2.h: Regenerate.
+ * config.bfd: Handle crx-*-elf*, crx*.
+ * configure.in: Handle bfd_elf32_crx_vec.
+ * configure: Regenerate.
+ * cpu-crx.c: New file.
+ * elf32-crx.c: Likewise.
+ * libbfd.h: Regenerate.
+ * reloc.c: Add BFD_RELOC_CRX_REL4, BFD_RELOC_CRX_REL8,
+ BFD_RELOC_CRX_REL8_CMP, BFD_RELOC_CRX_REL16, BFD_RELOC_CRX_REL24,
+ BFD_RELOC_CRX_REL32, BFD_RELOC_CRX_REGREL12, BFD_RELOC_CRX_REGREL22,
+ BFD_RELOC_CRX_REGREL28, BFD_RELOC_CRX_REGREL32, BFD_RELOC_CRX_ABS16,
+ BFD_RELOC_CRX_ABS32, BFD_RELOC_CRX_NUM8, BFD_RELOC_CRX_NUM16,
+ BFD_RELOC_CRX_NUM32, BFD_RELOC_CRX_IMM16 and BFD_RELOC_CRX_IMM32
+ * targets.c (bfd_elf32_crx_vec): Declare.
+ (bfd_target_vector): Add bfd_elf32_crx_vec.
+
2004-07-06 Nick Clifton <nickc@redhat.com>
* config.bfd: Add sh-symbian-elf target.
@@ -5,28 +32,28 @@
* configure: Regenerate.
* elf-bfd.h (struct elf_backend_data): Add new field
'check_directives'.
- * elflink.c (elf_link_add_object_symbols): Invoke the
+ * elflink.c (elf_link_add_object_symbols): Invoke the
check_directives function, if defined.
- * elfxx-target.h: Provide a default, NULL definition for
+ * elfxx-target.h: Provide a default, NULL definition for
check_directives.
- * targets.c: Add bfd_elf32_shl_symbian_vec.
- * elf32-sh.c (sh_elf_swap_insns): Protect against unnecessary
+ * targets.c: Add bfd_elf32_shl_symbian_vec.
+ * elf32-sh.c (sh_elf_swap_insns): Protect against unnecessary
definition.
- (elf32_shlin_grok_prstatus, elf32_shlib_grok_psinfo,
+ (elf32_shlin_grok_prstatus, elf32_shlib_grok_psinfo,
* sh_elf_get_flags_from_mach, sh_elf_find_flags): Likewise.
- (TARGET_BIG_SYM, TARGET_LITTLE_SYM): Only define if they have
+ (TARGET_BIG_SYM, TARGET_LITTLE_SYM): Only define if they have
not already been defined.
- * elf32-sh64.c: Use SH_TARGET_ALREADY_DEFINED.
- * sh-symbian.c: New file. Provide functions to support the
+ * elf32-sh64.c: Use SH_TARGET_ALREADY_DEFINED.
+ * sh-symbian.c: New file. Provide functions to support the
* sh-symbian-elf target.
* Makefile.am: Add elf32-sh-symbian.c
* Makefile.in: Regenerate.
-
+
2004-07-05 Andrew Stubbs <andrew.stubbs@superh.com>
- * elf32-sh.c: Include ../opcodes/sh-opc.h .
- * Makefile.am: Ran make dep-am .
- * Makefile.in: Ran make dep-in .
+ * elf32-sh.c: Include ../opcodes/sh-opc.h.
+ * Makefile.am: Ran make dep-am.
+ * Makefile.in: Ran make dep-in.
2004-07-03 Aaron W. LaFramboise <aaron98wiridge9@aaronwl.com>
@@ -123,7 +150,7 @@
2004-06-29 Alan Modra <amodra@bigpond.net.au>
* bfd-in.h (bfd_get_section_limit): Define.
- * reloc.c (bfd_perform_relocation, bfd_install_relocation)
+ * reloc.c (bfd_perform_relocation, bfd_install_relocation)
(_bfd_final_link_relocate): Use bfd_get_section_limit.
* aout-tic30.c (tic30_aout_final_link_relocate): Likewise.
* coff-arm.c (coff_arm_relocate_section): Likewise.
@@ -132,9 +159,9 @@
(bfd_ns32k_final_link_relocate): Likewise.
* elf32-d30v.c (bfd_elf_d30v_reloc, bfd_elf_d30v_reloc_21): Likwise.
* elf32-dlx.c (_bfd_dlx_elf_hi16_reloc): Likewise.
- * elf32-i860.c (i860_howto_pc26_reloc, i860_howto_pc16_reloc)
+ * elf32-i860.c (i860_howto_pc26_reloc, i860_howto_pc16_reloc)
(i860_howto_highadj_reloc, i860_howto_splitn_reloc): Likewise.
- * elf32-m32r.c (m32r_elf_do_10_pcrel_reloc, m32r_elf_hi16_reloc)
+ * elf32-m32r.c (m32r_elf_do_10_pcrel_reloc, m32r_elf_hi16_reloc)
(m32r_elf_generic_reloc, m32r_elf_relocate_section): Likewise.
* elf32-m68hc1x.c (m68hc11_elf_special_reloc): Likewise.
* elf32-mips.c (gprel32_with_gp, mips16_gprel_reloc): Likewise.
@@ -154,8 +181,8 @@
* elf64-s390.c (s390_elf_ldisp_reloc): Likewise.
* elf64-sparc.c (init_insn_reloc): Likewise.
* elfn32-mips.c (gprel32_with_gp, mips16_gprel_reloc): Likewise.
- * elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp)
- (_bfd_mips_elf_hi16_reloc, _bfd_mips_elf_lo16_reloc)
+ * elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp)
+ (_bfd_mips_elf_hi16_reloc, _bfd_mips_elf_lo16_reloc)
(_bfd_mips_elf_generic_reloc): Likewise.
* bfd-in2.h: Regenerate.
diff --git a/bfd/Makefile.am b/bfd/Makefile.am
index 0772624..a937cc0 100644
--- a/bfd/Makefile.am
+++ b/bfd/Makefile.am
@@ -60,6 +60,7 @@ ALL_MACHINES = \
cpu-avr.lo \
cpu-cr16c.lo \
cpu-cris.lo \
+ cpu-crx.lo \
cpu-d10v.lo \
cpu-d30v.lo \
cpu-dlx.lo \
@@ -116,6 +117,7 @@ ALL_MACHINES_CFILES = \
cpu-avr.c \
cpu-cris.c \
cpu-cr16c.c \
+ cpu-crx.c \
cpu-d10v.c \
cpu-d30v.c \
cpu-dlx.c \
@@ -220,6 +222,7 @@ BFD32_BACKENDS = \
elf32-avr.lo \
elf32-cr16c.lo \
elf32-cris.lo \
+ elf32-crx.lo \
elf32-d10v.lo \
elf32-d30v.lo \
elf32-dlx.lo \
@@ -388,6 +391,7 @@ BFD32_BACKENDS_CFILES = \
elf32-avr.c \
elf32-cr16c.c \
elf32-cris.c \
+ elf32-crx.c \
elf32-d10v.c \
elf32-d30v.c \
elf32-dlx.c \
@@ -938,6 +942,7 @@ cpu-arm.lo: cpu-arm.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h
cpu-avr.lo: cpu-avr.c $(INCDIR)/filenames.h
cpu-cris.lo: cpu-cris.c $(INCDIR)/filenames.h
cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h
+cpu-crx.lo: cpu-crx.c $(INCDIR)/filenames.h
cpu-d10v.lo: cpu-d10v.c $(INCDIR)/filenames.h
cpu-d30v.lo: cpu-d30v.c $(INCDIR)/filenames.h
cpu-dlx.lo: cpu-dlx.c $(INCDIR)/filenames.h
@@ -1167,6 +1172,10 @@ elf32-cris.lo: elf32-cris.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
+elf32-crx.lo: elf32-crx.c $(INCDIR)/filenames.h elf-bfd.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+ $(INCDIR)/bfdlink.h $(INCDIR)/elf/crx.h $(INCDIR)/elf/reloc-macros.h \
+ elf32-target.h
elf32-d10v.lo: elf32-d10v.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/d10v.h $(INCDIR)/elf/reloc-macros.h \
diff --git a/bfd/Makefile.in b/bfd/Makefile.in
index 6638273..b674ded 100644
--- a/bfd/Makefile.in
+++ b/bfd/Makefile.in
@@ -186,6 +186,7 @@ ALL_MACHINES = \
cpu-avr.lo \
cpu-cr16c.lo \
cpu-cris.lo \
+ cpu-crx.lo \
cpu-d10v.lo \
cpu-d30v.lo \
cpu-dlx.lo \
@@ -243,6 +244,7 @@ ALL_MACHINES_CFILES = \
cpu-avr.c \
cpu-cris.c \
cpu-cr16c.c \
+ cpu-crx.c \
cpu-d10v.c \
cpu-d30v.c \
cpu-dlx.c \
@@ -348,6 +350,7 @@ BFD32_BACKENDS = \
elf32-avr.lo \
elf32-cr16c.lo \
elf32-cris.lo \
+ elf32-crx.lo \
elf32-d10v.lo \
elf32-d30v.lo \
elf32-dlx.lo \
@@ -517,6 +520,7 @@ BFD32_BACKENDS_CFILES = \
elf32-avr.c \
elf32-cr16c.c \
elf32-cris.c \
+ elf32-crx.c \
elf32-d10v.c \
elf32-d30v.c \
elf32-dlx.c \
@@ -1471,6 +1475,7 @@ cpu-arm.lo: cpu-arm.c $(INCDIR)/filenames.h $(INCDIR)/libiberty.h
cpu-avr.lo: cpu-avr.c $(INCDIR)/filenames.h
cpu-cris.lo: cpu-cris.c $(INCDIR)/filenames.h
cpu-cr16c.lo: cpu-cr16c.c $(INCDIR)/filenames.h
+cpu-crx.lo: cpu-crx.c $(INCDIR)/filenames.h
cpu-d10v.lo: cpu-d10v.c $(INCDIR)/filenames.h
cpu-d30v.lo: cpu-d30v.c $(INCDIR)/filenames.h
cpu-dlx.lo: cpu-dlx.c $(INCDIR)/filenames.h
@@ -1700,6 +1705,10 @@ elf32-cris.lo: elf32-cris.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/cris.h $(INCDIR)/elf/reloc-macros.h \
elf32-target.h
+elf32-crx.lo: elf32-crx.c $(INCDIR)/filenames.h elf-bfd.h \
+ $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+ $(INCDIR)/bfdlink.h $(INCDIR)/elf/crx.h $(INCDIR)/elf/reloc-macros.h \
+ elf32-target.h
elf32-d10v.lo: elf32-d10v.c $(INCDIR)/filenames.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/bfdlink.h $(INCDIR)/elf/d10v.h $(INCDIR)/elf/reloc-macros.h \
diff --git a/bfd/archures.c b/bfd/archures.c
index 7302e97..db206a1 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -315,6 +315,8 @@ DESCRIPTION
.#define bfd_mach_avr5 5
. bfd_arch_cr16c, {* National Semiconductor CompactRISC. *}
.#define bfd_mach_cr16c 1
+. bfd_arch_crx, {* National Semiconductor CRX. *}
+.#define bfd_mach_crx 1
. bfd_arch_cris, {* Axis CRIS *}
. bfd_arch_s390, {* IBM s390 *}
.#define bfd_mach_s390_31 31
@@ -385,6 +387,7 @@ extern const bfd_arch_info_type bfd_arm_arch;
extern const bfd_arch_info_type bfd_avr_arch;
extern const bfd_arch_info_type bfd_cr16c_arch;
extern const bfd_arch_info_type bfd_cris_arch;
+extern const bfd_arch_info_type bfd_crx_arch;
extern const bfd_arch_info_type bfd_d10v_arch;
extern const bfd_arch_info_type bfd_d30v_arch;
extern const bfd_arch_info_type bfd_dlx_arch;
@@ -446,6 +449,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_avr_arch,
&bfd_cr16c_arch,
&bfd_cris_arch,
+ &bfd_crx_arch,
&bfd_d10v_arch,
&bfd_d30v_arch,
&bfd_dlx_arch,
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 9072d95..f3b1761 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1756,6 +1756,8 @@ enum bfd_architecture
#define bfd_mach_avr5 5
bfd_arch_cr16c, /* National Semiconductor CompactRISC. */
#define bfd_mach_cr16c 1
+ bfd_arch_crx, /* National Semiconductor CRX. */
+#define bfd_mach_crx 1
bfd_arch_cris, /* Axis CRIS */
bfd_arch_s390, /* IBM s390 */
#define bfd_mach_s390_31 31
@@ -3436,6 +3438,25 @@ This is the 5 bits of a value. */
BFD_RELOC_16C_IMM32,
BFD_RELOC_16C_IMM32_C,
+/* NS CRX Relocations. */
+ BFD_RELOC_CRX_REL4,
+ BFD_RELOC_CRX_REL8,
+ BFD_RELOC_CRX_REL8_CMP,
+ BFD_RELOC_CRX_REL16,
+ BFD_RELOC_CRX_REL24,
+ BFD_RELOC_CRX_REL32,
+ BFD_RELOC_CRX_REGREL12,
+ BFD_RELOC_CRX_REGREL22,
+ BFD_RELOC_CRX_REGREL28,
+ BFD_RELOC_CRX_REGREL32,
+ BFD_RELOC_CRX_ABS16,
+ BFD_RELOC_CRX_ABS32,
+ BFD_RELOC_CRX_NUM8,
+ BFD_RELOC_CRX_NUM16,
+ BFD_RELOC_CRX_NUM32,
+ BFD_RELOC_CRX_IMM16,
+ BFD_RELOC_CRX_IMM32,
+
/* These relocs are only used within the CRIS assembler. They are not
(at present) written to any object files. */
BFD_RELOC_CRIS_BDISP8,
diff --git a/bfd/config.bfd b/bfd/config.bfd
index a8e4161..bc4c78c 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -52,6 +52,7 @@ arm*) targ_archs=bfd_arm_arch ;;
c30*) targ_archs=bfd_tic30_arch ;;
c4x*) targ_archs=bfd_tic4x_arch ;;
c54x*) targ_archs=bfd_tic54x_arch ;;
+crx*) targ_archs=bfd_crx_arch ;;
dlx*) targ_archs=bfd_dlx_arch ;;
hppa*) targ_archs=bfd_hppa_arch ;;
i[3-7]86) targ_archs=bfd_i386_arch ;;
@@ -324,6 +325,11 @@ case "${targ}" in
targ_underscore=yes # Note: not true for bfd_elf32_cris_vec.
;;
+ crx-*-elf*)
+ targ_defvec=bfd_elf32_crx_vec
+ targ_underscore=yes
+ ;;
+
d10v-*-*)
targ_defvec=bfd_elf32_d10v_vec
;;
diff --git a/bfd/configure b/bfd/configure
index 34bf21f..2986607 100755
--- a/bfd/configure
+++ b/bfd/configure
@@ -6280,6 +6280,7 @@ do
bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
+ bfd_elf32_crx_vec) tb="$tb elf32-crx.lo elf32.lo $elf" ;;
bfd_elf32_d10v_vec) tb="$tb elf32-d10v.lo elf32.lo $elf" ;;
bfd_elf32_d30v_vec) tb="$tb elf32-d30v.lo elf32.lo $elf" ;;
bfd_elf32_dlx_big_vec) tb="$tb elf32-dlx.lo elf32.lo $elf" ;;
@@ -6569,10 +6570,10 @@ case ${host64}-${target64}-${want64} in
if test -n "$GCC" ; then
bad_64bit_gcc=no;
echo $ac_n "checking for gcc version with buggy 64-bit support""... $ac_c" 1>&6
-echo "configure:6573: checking for gcc version with buggy 64-bit support" >&5
+echo "configure:6574: checking for gcc version with buggy 64-bit support" >&5
# Add more tests for gcc versions with non-working 64-bit support here.
cat > conftest.$ac_ext <<EOF
-#line 6576 "configure"
+#line 6577 "configure"
#include "confdefs.h"
:__GNUC__:__GNUC_MINOR__:__i386__:
EOF
@@ -6614,12 +6615,12 @@ esac
for ac_func in ftello ftello64 fseeko fseeko64
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:6618: checking for $ac_func" >&5
+echo "configure:6619: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6623 "configure"
+#line 6624 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -6642,7 +6643,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:6646: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6647: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@@ -6668,13 +6669,13 @@ done
if test x"$ac_cv_func_ftello" = xyes -a x"$ac_cv_func_fseeko" = xyes; then
echo $ac_n "checking size of off_t""... $ac_c" 1>&6
-echo "configure:6672: checking size of off_t" >&5
+echo "configure:6673: checking size of off_t" >&5
if eval "test \"`echo '$''{'ac_cv_sizeof_off_t'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
for ac_size in 4 8 1 2 16 12 ; do # List sizes in rough order of prevalence.
cat > conftest.$ac_ext <<EOF
-#line 6678 "configure"
+#line 6679 "configure"
#include "confdefs.h"
#include "confdefs.h"
#include <sys/types.h>
@@ -6684,7 +6685,7 @@ int main() {
switch (0) case 0: case (sizeof (off_t) == $ac_size):;
; return 0; }
EOF
-if { (eval echo configure:6688: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
+if { (eval echo configure:6689: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
ac_cv_sizeof_off_t=$ac_size
else
@@ -6708,7 +6709,7 @@ EOF
fi
echo $ac_n "checking file_ptr type""... $ac_c" 1>&6
-echo "configure:6712: checking file_ptr type" >&5
+echo "configure:6713: checking file_ptr type" >&5
bfd_file_ptr="long"
bfd_ufile_ptr="unsigned long"
if test x"$ac_cv_func_ftello64" = xyes -a x"$ac_cv_func_fseeko64" = xyes \
@@ -6733,17 +6734,17 @@ for ac_hdr in unistd.h
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
-echo "configure:6737: checking for $ac_hdr" >&5
+echo "configure:6738: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6742 "configure"
+#line 6743 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
-{ (eval echo configure:6747: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
+{ (eval echo configure:6748: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
@@ -6772,12 +6773,12 @@ done
for ac_func in getpagesize
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:6776: checking for $ac_func" >&5
+echo "configure:6777: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 6781 "configure"
+#line 6782 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -6800,7 +6801,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:6804: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:6805: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@@ -6825,7 +6826,7 @@ fi
done
echo $ac_n "checking for working mmap""... $ac_c" 1>&6
-echo "configure:6829: checking for working mmap" >&5
+echo "configure:6830: checking for working mmap" >&5
if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@@ -6833,7 +6834,7 @@ else
ac_cv_func_mmap_fixed_mapped=no
else
cat > conftest.$ac_ext <<EOF
-#line 6837 "configure"
+#line 6838 "configure"
#include "confdefs.h"
/* Thanks to Mike Haertel and Jim Avera for this test.
@@ -6973,7 +6974,7 @@ main()
}
EOF
-if { (eval echo configure:6977: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
+if { (eval echo configure:6978: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
ac_cv_func_mmap_fixed_mapped=yes
else
@@ -6998,12 +6999,12 @@ fi
for ac_func in madvise mprotect
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
-echo "configure:7002: checking for $ac_func" >&5
+echo "configure:7003: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
-#line 7007 "configure"
+#line 7008 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@@ -7026,7 +7027,7 @@ $ac_func();
; return 0; }
EOF
-if { (eval echo configure:7030: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
+if { (eval echo configure:7031: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
diff --git a/bfd/configure.in b/bfd/configure.in
index 00890d7..229893e 100644
--- a/bfd/configure.in
+++ b/bfd/configure.in
@@ -589,6 +589,7 @@ do
bfd_elf32_bigmips_vec) tb="$tb elf32-mips.lo elfxx-mips.lo elf32.lo $elf ecofflink.lo" ;;
bfd_elf32_cr16c_vec) tb="$tb elf32-cr16c.lo elf32.lo $elf" ;;
bfd_elf32_cris_vec) tb="$tb elf32-cris.lo elf32.lo $elf" ;;
+ bfd_elf32_crx_vec) tb="$tb elf32-crx.lo elf32.lo $elf" ;;
bfd_elf32_d10v_vec) tb="$tb elf32-d10v.lo elf32.lo $elf" ;;
bfd_elf32_d30v_vec) tb="$tb elf32-d30v.lo elf32.lo $elf" ;;
bfd_elf32_dlx_big_vec) tb="$tb elf32-dlx.lo elf32.lo $elf" ;;
diff --git a/bfd/cpu-crx.c b/bfd/cpu-crx.c
new file mode 100644
index 0000000..9636630
--- /dev/null
+++ b/bfd/cpu-crx.c
@@ -0,0 +1,39 @@
+/* BFD support for the CRX processor.
+ Copyright 2004 Free Software Foundation, Inc.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "libbfd.h"
+
+
+const bfd_arch_info_type bfd_crx_arch =
+ {
+ 16, /* 16 bits in a word. */
+ 32, /* 32 bits in an address. */
+ 8, /* 8 bits in a byte. */
+ bfd_arch_crx, /* enum bfd_architecture arch. */
+ bfd_mach_crx,
+ "crx", /* Arch name. */
+ "crx", /* Printable name. */
+ 1, /* Unsigned int section alignment power. */
+ TRUE, /* The one and only. */
+ bfd_default_compatible,
+ bfd_default_scan ,
+ 0,
+ };
diff --git a/bfd/elf32-crx.c b/bfd/elf32-crx.c
new file mode 100644
index 0000000..03575f2
--- /dev/null
+++ b/bfd/elf32-crx.c
@@ -0,0 +1,1233 @@
+/* BFD back-end for National Semiconductor's CRX ELF
+ Copyright 2004 Free Software Foundation, Inc.
+ Written by Tomer Levi, NSC, Israel.
+
+ This file is part of BFD, the Binary File Descriptor library.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#include "bfd.h"
+#include "sysdep.h"
+#include "bfdlink.h"
+#include "libbfd.h"
+#include "elf-bfd.h"
+#include "elf/crx.h"
+
+static reloc_howto_type *elf_crx_reloc_type_lookup
+ (bfd *, bfd_reloc_code_real_type);
+static void elf_crx_info_to_howto
+ (bfd *, arelent *, Elf_Internal_Rela *);
+static bfd_boolean elf32_crx_relax_delete_bytes
+ (bfd *, asection *, bfd_vma, int);
+static bfd_reloc_status_type crx_elf_final_link_relocate
+ (reloc_howto_type *, bfd *, bfd *, asection *,
+ bfd_byte *, bfd_vma, bfd_vma, bfd_vma,
+ struct bfd_link_info *, asection *, int);
+static bfd_boolean elf32_crx_relocate_section
+ (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
+ Elf_Internal_Rela *, Elf_Internal_Sym *, asection **);
+static asection * elf32_crx_gc_mark_hook
+ (asection *, struct bfd_link_info *, Elf_Internal_Rela *,
+ struct elf_link_hash_entry *, Elf_Internal_Sym *);
+static bfd_boolean elf32_crx_gc_sweep_hook
+ (bfd *, struct bfd_link_info *, asection *,
+ const Elf_Internal_Rela *);
+static bfd_boolean elf32_crx_relax_section
+ (bfd *, asection *, struct bfd_link_info *, bfd_boolean *);
+static bfd_byte * elf32_crx_get_relocated_section_contents
+ (bfd *, struct bfd_link_info *, struct bfd_link_order *,
+ bfd_byte *, bfd_boolean, asymbol **);
+
+/* crx_reloc_map array maps BFD relocation enum into a CRGAS relocation type. */
+
+struct crx_reloc_map
+{
+ bfd_reloc_code_real_type bfd_reloc_enum; /* BFD relocation enum. */
+ unsigned short crx_reloc_type; /* CRX relocation type. */
+};
+
+static const struct crx_reloc_map crx_reloc_map[R_CRX_MAX] =
+{
+ {BFD_RELOC_NONE, R_CRX_NONE},
+ {BFD_RELOC_CRX_REL4, R_CRX_REL4},
+ {BFD_RELOC_CRX_REL8, R_CRX_REL8},
+ {BFD_RELOC_CRX_REL8_CMP, R_CRX_REL8_CMP},
+ {BFD_RELOC_CRX_REL16, R_CRX_REL16},
+ {BFD_RELOC_CRX_REL24, R_CRX_REL24},
+ {BFD_RELOC_CRX_REL32, R_CRX_REL32},
+ {BFD_RELOC_CRX_REGREL12, R_CRX_REGREL12},
+ {BFD_RELOC_CRX_REGREL22, R_CRX_REGREL22},
+ {BFD_RELOC_CRX_REGREL28, R_CRX_REGREL28},
+ {BFD_RELOC_CRX_REGREL32, R_CRX_REGREL32},
+ {BFD_RELOC_CRX_ABS16, R_CRX_ABS16},
+ {BFD_RELOC_CRX_ABS32, R_CRX_ABS32},
+ {BFD_RELOC_CRX_NUM8, R_CRX_NUM8},
+ {BFD_RELOC_CRX_NUM16, R_CRX_NUM16},
+ {BFD_RELOC_CRX_NUM32, R_CRX_NUM32},
+ {BFD_RELOC_CRX_IMM16, R_CRX_IMM16},
+ {BFD_RELOC_CRX_IMM32, R_CRX_IMM32}
+};
+
+static reloc_howto_type crx_elf_howto_table[] =
+{
+ HOWTO (R_CRX_NONE, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_NONE", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REL4, /* type */
+ 1, /* rightshift */
+ 0, /* size */
+ 4, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REL4", /* name */
+ FALSE, /* partial_inplace */
+ 0xf, /* src_mask */
+ 0xf, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REL8, /* type */
+ 1, /* rightshift */
+ 0, /* size */
+ 8, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REL8", /* name */
+ FALSE, /* partial_inplace */
+ 0xff, /* src_mask */
+ 0xff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REL8_CMP, /* type */
+ 1, /* rightshift */
+ 0, /* size */
+ 8, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REL8_CMP", /* name */
+ FALSE, /* partial_inplace */
+ 0xff, /* src_mask */
+ 0xff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REL16, /* type */
+ 1, /* rightshift */
+ 1, /* size */
+ 16, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REL16", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REL24, /* type */
+ 1, /* rightshift */
+ 2, /* size */
+ 24, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REL24", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffff, /* src_mask */
+ 0xffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REL32, /* type */
+ 1, /* rightshift */
+ 2, /* size */
+ 32, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REL32", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REGREL12, /* type */
+ 0, /* rightshift */
+ 1, /* size */
+ 12, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REGREL12", /* name */
+ FALSE, /* partial_inplace */
+ 0xfff, /* src_mask */
+ 0xfff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REGREL22, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 22, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REGREL22", /* name */
+ FALSE, /* partial_inplace */
+ 0x3fffff, /* src_mask */
+ 0x3fffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REGREL28, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 28, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REGREL28", /* name */
+ FALSE, /* partial_inplace */
+ 0xfffffff, /* src_mask */
+ 0xfffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_REGREL32, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_REGREL32", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_ABS16, /* type */
+ 0, /* rightshift */
+ 1, /* size */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_ABS16", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_ABS32, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_ABS32", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_NUM8, /* type */
+ 0, /* rightshift */
+ 0, /* size */
+ 8, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_NUM8", /* name */
+ FALSE, /* partial_inplace */
+ 0xff, /* src_mask */
+ 0xff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_NUM16, /* type */
+ 0, /* rightshift */
+ 1, /* size */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_NUM16", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_NUM32, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_NUM32", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_IMM16, /* type */
+ 0, /* rightshift */
+ 1, /* size */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_IMM16", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ HOWTO (R_CRX_IMM32, /* type */
+ 0, /* rightshift */
+ 2, /* size */
+ 32, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_bitfield,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_CRX_IMM32", /* name */
+ FALSE, /* partial_inplace */
+ 0xffffffff, /* src_mask */
+ 0xffffffff, /* dst_mask */
+ FALSE) /* pcrel_offset */
+};
+
+/* Retrieve a howto ptr using a BFD reloc_code. */
+
+static reloc_howto_type *
+elf_crx_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
+ bfd_reloc_code_real_type code)
+{
+ unsigned int i;
+
+ for (i = 0; i < R_CRX_MAX; i++)
+ if (code == crx_reloc_map[i].bfd_reloc_enum)
+ return &crx_elf_howto_table[crx_reloc_map[i].crx_reloc_type];
+
+ printf ("This relocation Type is not supported -0x%x\n", code);
+ return 0;
+}
+
+/* Retrieve a howto ptr using an internal relocation entry. */
+
+static void
+elf_crx_info_to_howto (bfd *abfd ATTRIBUTE_UNUSED, arelent *cache_ptr,
+ Elf_Internal_Rela *dst)
+{
+ unsigned int r_type = ELF32_R_TYPE (dst->r_info);
+ BFD_ASSERT (r_type < (unsigned int) R_CRX_MAX);
+ cache_ptr->howto = &crx_elf_howto_table[r_type];
+}
+
+/* Perform a relocation as part of a final link. */
+
+static bfd_reloc_status_type
+crx_elf_final_link_relocate (reloc_howto_type *howto, bfd *input_bfd,
+ bfd *output_bfd ATTRIBUTE_UNUSED,
+ asection *input_section, bfd_byte *contents,
+ bfd_vma offset, bfd_vma Rvalue, bfd_vma addend,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ asection *sec ATTRIBUTE_UNUSED,
+ int is_local ATTRIBUTE_UNUSED)
+{
+ unsigned short r_type = howto->type;
+ bfd_byte *hit_data = contents + offset;
+ bfd_vma reloc_bits, check;
+
+ switch (r_type)
+ {
+ case R_CRX_IMM16:
+ case R_CRX_IMM32:
+ case R_CRX_ABS16:
+ case R_CRX_ABS32:
+ case R_CRX_REL8_CMP:
+ case R_CRX_REL16:
+ case R_CRX_REL24:
+ case R_CRX_REL32:
+ case R_CRX_REGREL12:
+ case R_CRX_REGREL22:
+ case R_CRX_REGREL28:
+ case R_CRX_REGREL32:
+ /* 'hit_data' is relative to the start of the instruction, not the
+ relocation offset. Advance it to account for the exact offset. */
+ hit_data += 2;
+ break;
+
+ case R_CRX_REL4:
+ /* This relocation type is used only in 'Branch if Equal to 0'
+ instructions and requires special handling. */
+ Rvalue -= 1;
+ break;
+
+ case R_CRX_NONE:
+ return bfd_reloc_ok;
+ break;
+
+ default:
+ break;
+ }
+
+ if (howto->pc_relative)
+ {
+ /* Subtract the address of the section containing the location. */
+ Rvalue -= (input_section->output_section->vma
+ + input_section->output_offset);
+ /* Subtract the position of the location within the section. */
+ Rvalue -= offset;
+ }
+
+ /* Add in supplied addend. */
+ Rvalue += addend;
+
+ /* Complain if the bitfield overflows, whether it is considered
+ as signed or unsigned. */
+ check = Rvalue >> howto->rightshift;
+
+ /* Assumes two's complement. This expression avoids
+ overflow if howto->bitsize is the number of bits in
+ bfd_vma. */
+ reloc_bits = (((1 << (howto->bitsize - 1)) - 1) << 1) | 1;
+
+ if (((bfd_vma) check & ~reloc_bits) != 0
+ && (((bfd_vma) check & ~reloc_bits)
+ != (-(bfd_vma) 1 & ~reloc_bits)))
+ {
+ /* The above right shift is incorrect for a signed
+ value. See if turning on the upper bits fixes the
+ overflow. */
+ if (howto->rightshift && (bfd_signed_vma) Rvalue < 0)
+ {
+ check |= ((bfd_vma) - 1
+ & ~((bfd_vma) - 1
+ >> howto->rightshift));
+ if (((bfd_vma) check & ~reloc_bits)
+ != (-(bfd_vma) 1 & ~reloc_bits))
+ return bfd_reloc_overflow;
+ }
+ else
+ return bfd_reloc_overflow;
+ }
+
+ /* Drop unwanted bits from the value we are relocating to. */
+ Rvalue >>= (bfd_vma) howto->rightshift;
+
+ /* Apply dst_mask to select only relocatable part of the insn. */
+ Rvalue &= howto->dst_mask;
+
+ switch (howto->size)
+ {
+ case 0:
+ if (r_type == R_CRX_REL4)
+ {
+ Rvalue <<= 4;
+ Rvalue |= (bfd_get_8 (input_bfd, hit_data) & 0x0f);
+ }
+
+ bfd_put_8 (input_bfd, (unsigned char) Rvalue, hit_data);
+ break;
+
+ case 1:
+ if (r_type == R_CRX_REGREL12)
+ Rvalue |= (bfd_get_16 (input_bfd, hit_data) & 0xf000);
+
+ bfd_put_16 (input_bfd, Rvalue, hit_data);
+ break;
+
+ case 2:
+ if (r_type == R_CRX_REL24
+ || r_type == R_CRX_REGREL22
+ || r_type == R_CRX_REGREL28)
+ Rvalue |= (((bfd_get_16 (input_bfd, hit_data) << 16) |
+ bfd_get_16 (input_bfd, hit_data + 2)) & ~howto->dst_mask);
+
+ if (r_type == R_CRX_NUM32)
+ /* Relocation on DATA is purely little-endian, that is, for a
+ multi-byte datum, the lowest address in memory contains the
+ little end of the datum, that is, the least significant byte.
+ Therefore we use BFD's byte Putting functions. */
+ bfd_put_32 (input_bfd, Rvalue, hit_data);
+ else
+ /* Relocation on INSTRUCTIONS is different : Instructions are
+ word-addressable, that is, each word itself is arranged according
+ to little-endian convention, whereas the words are arranged with
+ respect to one another in BIG ENDIAN fashion.
+ When there is an immediate value that spans a word boundary, it is
+ split in a big-endian way with respect to the words. */
+ {
+ bfd_put_16 (input_bfd, (Rvalue >> 16) & 0xffff, hit_data);
+ bfd_put_16 (input_bfd, Rvalue & 0xffff, hit_data + 2);
+ }
+ break;
+
+ default:
+ return bfd_reloc_notsupported;
+ }
+
+ return bfd_reloc_ok;
+}
+
+/* Delete some bytes from a section while relaxing. */
+
+static bfd_boolean
+elf32_crx_relax_delete_bytes (bfd *abfd, asection *sec,
+ bfd_vma addr, int count)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ unsigned int sec_shndx;
+ bfd_byte *contents;
+ Elf_Internal_Rela *irel, *irelend;
+ Elf_Internal_Rela *irelalign;
+ bfd_vma toaddr;
+ Elf_Internal_Sym *isym;
+ Elf_Internal_Sym *isymend;
+ struct elf_link_hash_entry **sym_hashes;
+ struct elf_link_hash_entry **end_hashes;
+ unsigned int symcount;
+
+ sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec);
+
+ contents = elf_section_data (sec)->this_hdr.contents;
+
+ /* The deletion must stop at the next ALIGN reloc for an aligment
+ power larger than the number of bytes we are deleting. */
+
+ irelalign = NULL;
+ toaddr = sec->size;
+
+ irel = elf_section_data (sec)->relocs;
+ irelend = irel + sec->reloc_count;
+
+ /* Actually delete the bytes. */
+ memmove (contents + addr, contents + addr + count,
+ (size_t) (toaddr - addr - count));
+ sec->size -= count;
+
+ /* Adjust all the relocs. */
+ for (irel = elf_section_data (sec)->relocs; irel < irelend; irel++)
+ {
+ /* Get the new reloc address. */
+ if ((irel->r_offset > addr
+ && irel->r_offset < toaddr))
+ irel->r_offset -= count;
+ }
+
+ /* Adjust the local symbols defined in this section. */
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+ isym = (Elf_Internal_Sym *) symtab_hdr->contents;
+ for (isymend = isym + symtab_hdr->sh_info; isym < isymend; isym++)
+ {
+ if (isym->st_shndx == sec_shndx
+ && isym->st_value > addr
+ && isym->st_value < toaddr)
+ isym->st_value -= count;
+ }
+
+ /* Now adjust the global symbols defined in this section. */
+ symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym)
+ - symtab_hdr->sh_info);
+ sym_hashes = elf_sym_hashes (abfd);
+ end_hashes = sym_hashes + symcount;
+
+ for (; sym_hashes < end_hashes; sym_hashes++)
+ {
+ struct elf_link_hash_entry *sym_hash = *sym_hashes;
+
+ if ((sym_hash->root.type == bfd_link_hash_defined
+ || sym_hash->root.type == bfd_link_hash_defweak)
+ && sym_hash->root.u.def.section == sec
+ && sym_hash->root.u.def.value > addr
+ && sym_hash->root.u.def.value < toaddr)
+ sym_hash->root.u.def.value -= count;
+ }
+
+ return TRUE;
+}
+
+/* This is a version of bfd_generic_get_relocated_section_contents
+ which uses elf32_crx_relocate_section. */
+
+static bfd_byte *
+elf32_crx_get_relocated_section_contents (bfd *output_bfd,
+ struct bfd_link_info *link_info,
+ struct bfd_link_order *link_order,
+ bfd_byte *data,
+ bfd_boolean relocatable,
+ asymbol **symbols)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ asection *input_section = link_order->u.indirect.section;
+ bfd *input_bfd = input_section->owner;
+ asection **sections = NULL;
+ Elf_Internal_Rela *internal_relocs = NULL;
+ Elf_Internal_Sym *isymbuf = NULL;
+
+ /* We only need to handle the case of relaxing, or of having a
+ particular set of section contents, specially. */
+ if (relocatable
+ || elf_section_data (input_section)->this_hdr.contents == NULL)
+ return bfd_generic_get_relocated_section_contents (output_bfd, link_info,
+ link_order, data,
+ relocatable,
+ symbols);
+
+ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+
+ memcpy (data, elf_section_data (input_section)->this_hdr.contents,
+ (size_t) input_section->size);
+
+ if ((input_section->flags & SEC_RELOC) != 0
+ && input_section->reloc_count > 0)
+ {
+ Elf_Internal_Sym *isym;
+ Elf_Internal_Sym *isymend;
+ asection **secpp;
+ bfd_size_type amt;
+
+ internal_relocs = (_bfd_elf_link_read_relocs
+ (input_bfd, input_section, (PTR) NULL,
+ (Elf_Internal_Rela *) NULL, FALSE));
+ if (internal_relocs == NULL)
+ goto error_return;
+
+ if (symtab_hdr->sh_info != 0)
+ {
+ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
+ if (isymbuf == NULL)
+ isymbuf = bfd_elf_get_elf_syms (input_bfd, symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ if (isymbuf == NULL)
+ goto error_return;
+ }
+
+ amt = symtab_hdr->sh_info;
+ amt *= sizeof (asection *);
+ sections = bfd_malloc (amt);
+ if (sections == NULL && amt != 0)
+ goto error_return;
+
+ isymend = isymbuf + symtab_hdr->sh_info;
+ for (isym = isymbuf, secpp = sections; isym < isymend; ++isym, ++secpp)
+ {
+ asection *isec;
+
+ if (isym->st_shndx == SHN_UNDEF)
+ isec = bfd_und_section_ptr;
+ else if (isym->st_shndx == SHN_ABS)
+ isec = bfd_abs_section_ptr;
+ else if (isym->st_shndx == SHN_COMMON)
+ isec = bfd_com_section_ptr;
+ else
+ isec = bfd_section_from_elf_index (input_bfd, isym->st_shndx);
+
+ *secpp = isec;
+ }
+
+ if (! elf32_crx_relocate_section (output_bfd, link_info, input_bfd,
+ input_section, data, internal_relocs,
+ isymbuf, sections))
+ goto error_return;
+
+ if (sections != NULL)
+ free (sections);
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ free (isymbuf);
+ if (elf_section_data (input_section)->relocs != internal_relocs)
+ free (internal_relocs);
+ }
+
+ return data;
+
+ error_return:
+ if (sections != NULL)
+ free (sections);
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ free (isymbuf);
+ if (internal_relocs != NULL
+ && elf_section_data (input_section)->relocs != internal_relocs)
+ free (internal_relocs);
+ return NULL;
+}
+
+/* Relocate a CRX ELF section. */
+
+static bfd_boolean
+elf32_crx_relocate_section (bfd *output_bfd, struct bfd_link_info *info,
+ bfd *input_bfd, asection *input_section,
+ bfd_byte *contents, Elf_Internal_Rela *relocs,
+ Elf_Internal_Sym *local_syms,
+ asection **local_sections)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ struct elf_link_hash_entry **sym_hashes;
+ Elf_Internal_Rela *rel, *relend;
+
+ if (info->relocatable)
+ return TRUE;
+
+ symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr;
+ sym_hashes = elf_sym_hashes (input_bfd);
+
+ rel = relocs;
+ relend = relocs + input_section->reloc_count;
+ for (; rel < relend; rel++)
+ {
+ int r_type;
+ reloc_howto_type *howto;
+ unsigned long r_symndx;
+ Elf_Internal_Sym *sym;
+ asection *sec;
+ struct elf_link_hash_entry *h;
+ bfd_vma relocation;
+ bfd_reloc_status_type r;
+
+ r_symndx = ELF32_R_SYM (rel->r_info);
+ r_type = ELF32_R_TYPE (rel->r_info);
+ howto = crx_elf_howto_table + (r_type);
+
+ h = NULL;
+ sym = NULL;
+ sec = NULL;
+ if (r_symndx < symtab_hdr->sh_info)
+ {
+ sym = local_syms + r_symndx;
+ sec = local_sections[r_symndx];
+ relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel);
+ }
+ else
+ {
+ bfd_boolean unresolved_reloc, warned;
+
+ RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel,
+ r_symndx, symtab_hdr, sym_hashes,
+ h, sec, relocation,
+ unresolved_reloc, warned);
+ }
+
+ r = crx_elf_final_link_relocate (howto, input_bfd, output_bfd,
+ input_section,
+ contents, rel->r_offset,
+ relocation, rel->r_addend,
+ info, sec, h == NULL);
+
+ if (r != bfd_reloc_ok)
+ {
+ const char *name;
+ const char *msg = (const char *) 0;
+
+ if (h != NULL)
+ name = h->root.root.string;
+ else
+ {
+ name = (bfd_elf_string_from_elf_section
+ (input_bfd, symtab_hdr->sh_link, sym->st_name));
+ if (name == NULL || *name == '\0')
+ name = bfd_section_name (input_bfd, sec);
+ }
+
+ switch (r)
+ {
+ case bfd_reloc_overflow:
+ if (!((*info->callbacks->reloc_overflow)
+ (info, name, howto->name, (bfd_vma) 0,
+ input_bfd, input_section, rel->r_offset)))
+ return FALSE;
+ break;
+
+ case bfd_reloc_undefined:
+ if (!((*info->callbacks->undefined_symbol)
+ (info, name, input_bfd, input_section,
+ rel->r_offset, TRUE)))
+ return FALSE;
+ break;
+
+ case bfd_reloc_outofrange:
+ msg = _("internal error: out of range error");
+ goto common_error;
+
+ case bfd_reloc_notsupported:
+ msg = _("internal error: unsupported relocation error");
+ goto common_error;
+
+ case bfd_reloc_dangerous:
+ msg = _("internal error: dangerous error");
+ goto common_error;
+
+ default:
+ msg = _("internal error: unknown error");
+ /* Fall through. */
+
+ common_error:
+ if (!((*info->callbacks->warning)
+ (info, msg, name, input_bfd, input_section,
+ rel->r_offset)))
+ return FALSE;
+ break;
+ }
+ }
+ }
+
+ return TRUE;
+}
+
+/* This function handles relaxing for the CRX.
+
+ There's quite a few relaxing opportunites available on the CRX:
+
+ * bal/bcond:32 -> bal/bcond:16 2 bytes
+ * bcond:16 -> bcond:8 2 bytes
+ * cmpbcond:24 -> cmpbcond:8 2 bytes
+ * arithmetic imm32 -> arithmetic imm16 2 bytes
+
+ Symbol- and reloc-reading infrastructure copied from elf-m10200.c. */
+
+static bfd_boolean
+elf32_crx_relax_section (bfd *abfd, asection *sec,
+ struct bfd_link_info *link_info, bfd_boolean *again)
+{
+ Elf_Internal_Shdr *symtab_hdr;
+ Elf_Internal_Rela *internal_relocs;
+ Elf_Internal_Rela *irel, *irelend;
+ bfd_byte *contents = NULL;
+ Elf_Internal_Sym *isymbuf = NULL;
+
+ /* Assume nothing changes. */
+ *again = FALSE;
+
+ /* We don't have to do anything for a relocatable link, if
+ this section does not have relocs, or if this is not a
+ code section. */
+ if (link_info->relocatable
+ || (sec->flags & SEC_RELOC) == 0
+ || sec->reloc_count == 0
+ || (sec->flags & SEC_CODE) == 0)
+ return TRUE;
+
+ symtab_hdr = &elf_tdata (abfd)->symtab_hdr;
+
+ /* Get a copy of the native relocations. */
+ internal_relocs = (_bfd_elf_link_read_relocs
+ (abfd, sec, (PTR) NULL, (Elf_Internal_Rela *) NULL,
+ link_info->keep_memory));
+ if (internal_relocs == NULL)
+ goto error_return;
+
+ /* Walk through them looking for relaxing opportunities. */
+ irelend = internal_relocs + sec->reloc_count;
+ for (irel = internal_relocs; irel < irelend; irel++)
+ {
+ bfd_vma symval;
+
+ /* If this isn't something that can be relaxed, then ignore
+ this reloc. */
+ if (ELF32_R_TYPE (irel->r_info) != (int) R_CRX_REL32
+ && ELF32_R_TYPE (irel->r_info) != (int) R_CRX_REL16
+ && ELF32_R_TYPE (irel->r_info) != (int) R_CRX_REL24
+ && ELF32_R_TYPE (irel->r_info) != (int) R_CRX_IMM32)
+ continue;
+
+ /* Get the section contents if we haven't done so already. */
+ if (contents == NULL)
+ {
+ /* Get cached copy if it exists. */
+ if (elf_section_data (sec)->this_hdr.contents != NULL)
+ contents = elf_section_data (sec)->this_hdr.contents;
+ /* Go get them off disk. */
+ else if (!bfd_malloc_and_get_section (abfd, sec, &contents))
+ goto error_return;
+ }
+
+ /* Read this BFD's local symbols if we haven't done so already. */
+ if (isymbuf == NULL && symtab_hdr->sh_info != 0)
+ {
+ isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents;
+ if (isymbuf == NULL)
+ isymbuf = bfd_elf_get_elf_syms (abfd, symtab_hdr,
+ symtab_hdr->sh_info, 0,
+ NULL, NULL, NULL);
+ if (isymbuf == NULL)
+ goto error_return;
+ }
+
+ /* Get the value of the symbol referred to by the reloc. */
+ if (ELF32_R_SYM (irel->r_info) < symtab_hdr->sh_info)
+ {
+ /* A local symbol. */
+ Elf_Internal_Sym *isym;
+ asection *sym_sec;
+
+ isym = isymbuf + ELF32_R_SYM (irel->r_info);
+ if (isym->st_shndx == SHN_UNDEF)
+ sym_sec = bfd_und_section_ptr;
+ else if (isym->st_shndx == SHN_ABS)
+ sym_sec = bfd_abs_section_ptr;
+ else if (isym->st_shndx == SHN_COMMON)
+ sym_sec = bfd_com_section_ptr;
+ else
+ sym_sec = bfd_section_from_elf_index (abfd, isym->st_shndx);
+ symval = (isym->st_value
+ + sym_sec->output_section->vma
+ + sym_sec->output_offset);
+ }
+ else
+ {
+ unsigned long indx;
+ struct elf_link_hash_entry *h;
+
+ /* An external symbol. */
+ indx = ELF32_R_SYM (irel->r_info) - symtab_hdr->sh_info;
+ h = elf_sym_hashes (abfd)[indx];
+ BFD_ASSERT (h != NULL);
+
+ if (h->root.type != bfd_link_hash_defined
+ && h->root.type != bfd_link_hash_defweak)
+ /* This appears to be a reference to an undefined
+ symbol. Just ignore it--it will be caught by the
+ regular reloc processing. */
+ continue;
+
+ symval = (h->root.u.def.value
+ + h->root.u.def.section->output_section->vma
+ + h->root.u.def.section->output_offset);
+ }
+
+ /* For simplicity of coding, we are going to modify the section
+ contents, the section relocs, and the BFD symbol table. We
+ must tell the rest of the code not to free up this
+ information. It would be possible to instead create a table
+ of changes which have to be made, as is done in coff-mips.c;
+ that would be more work, but would require less memory when
+ the linker is run. */
+
+ /* Try to turn a 32bit pc-relative branch/call into
+ a 16bit pc-relative branch/call. */
+ if (ELF32_R_TYPE (irel->r_info) == (int) R_CRX_REL32)
+ {
+ bfd_vma value = symval;
+
+ /* Deal with pc-relative gunk. */
+ value -= (sec->output_section->vma + sec->output_offset);
+ value -= irel->r_offset;
+ value += irel->r_addend;
+
+ /* See if the value will fit in 16 bits, note the high value is
+ 0xfffe + 2 as the target will be two bytes closer if we are
+ able to relax. */
+ if ((long) value < 0x10000 && (long) value > -0x10002)
+ {
+ unsigned short code;
+
+ /* Get the opcode. */
+ code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
+
+ /* Verify it's a 'bal'/'bcond' and fix the opcode. */
+ if ((code & 0xfff0) == 0x3170)
+ bfd_put_8 (abfd, 0x30, contents + irel->r_offset + 1);
+ else if ((code & 0xf0ff) == 0x707f)
+ bfd_put_8 (abfd, 0x7e, contents + irel->r_offset);
+ else
+ continue;
+
+ /* Note that we've changed the relocs, section contents, etc. */
+ elf_section_data (sec)->relocs = internal_relocs;
+ elf_section_data (sec)->this_hdr.contents = contents;
+ symtab_hdr->contents = (unsigned char *) isymbuf;
+
+ /* Fix the relocation's type. */
+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
+ R_CRX_REL16);
+
+ /* Delete two bytes of data. */
+ if (!elf32_crx_relax_delete_bytes (abfd, sec,
+ irel->r_offset + 2, 2))
+ goto error_return;
+
+ /* That will change things, so, we should relax again.
+ Note that this is not required, and it may be slow. */
+ *again = TRUE;
+ }
+ }
+
+ /* Try to turn a 16bit pc-relative branch into an
+ 8bit pc-relative branch. */
+ if (ELF32_R_TYPE (irel->r_info) == (int) R_CRX_REL16)
+ {
+ bfd_vma value = symval;
+
+ /* Deal with pc-relative gunk. */
+ value -= (sec->output_section->vma + sec->output_offset);
+ value -= irel->r_offset;
+ value += irel->r_addend;
+
+ /* See if the value will fit in 8 bits, note the high value is
+ 0xfc + 2 as the target will be two bytes closer if we are
+ able to relax. */
+ if ((long) value < 0xfe && (long) value > -0x100)
+ {
+ unsigned short code;
+
+ /* Get the opcode. */
+ code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
+
+ /* Verify it's a 'bcond' opcode. */
+ if ((code & 0xf0ff) != 0x707e)
+ continue;
+
+ /* Note that we've changed the relocs, section contents, etc. */
+ elf_section_data (sec)->relocs = internal_relocs;
+ elf_section_data (sec)->this_hdr.contents = contents;
+ symtab_hdr->contents = (unsigned char *) isymbuf;
+
+ /* Fix the relocation's type. */
+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
+ R_CRX_REL8);
+
+ /* Delete two bytes of data. */
+ if (!elf32_crx_relax_delete_bytes (abfd, sec,
+ irel->r_offset + 2, 2))
+ goto error_return;
+
+ /* That will change things, so, we should relax again.
+ Note that this is not required, and it may be slow. */
+ *again = TRUE;
+ }
+ }
+
+ /* Try to turn a 24bit pc-relative cmp&branch into
+ an 8bit pc-relative cmp&branch. */
+ if (ELF32_R_TYPE (irel->r_info) == (int) R_CRX_REL24)
+ {
+ bfd_vma value = symval;
+
+ /* Deal with pc-relative gunk. */
+ value -= (sec->output_section->vma + sec->output_offset);
+ value -= irel->r_offset;
+ value += irel->r_addend;
+
+ /* See if the value will fit in 8 bits, note the high value is
+ 0x7e + 2 as the target will be two bytes closer if we are
+ able to relax. */
+ if ((long) value < 0x100 && (long) value > -0x100)
+ {
+ unsigned short code;
+
+ /* Get the opcode. */
+ code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
+
+ /* Verify it's a 'cmp&branch' opcode. */
+ if ((code & 0xfff0) != 0x3180 && (code & 0xfff0) != 0x3190
+ && (code & 0xfff0) != 0x31a0 && (code & 0xfff0) != 0x31c0
+ && (code & 0xfff0) != 0x31d0 && (code & 0xfff0) != 0x31e0)
+ continue;
+
+ /* Note that we've changed the relocs, section contents, etc. */
+ elf_section_data (sec)->relocs = internal_relocs;
+ elf_section_data (sec)->this_hdr.contents = contents;
+ symtab_hdr->contents = (unsigned char *) isymbuf;
+
+ /* Fix the opcode. */
+ bfd_put_8 (abfd, 0x30, contents + irel->r_offset + 1);
+
+ /* Fix the relocation's type. */
+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
+ R_CRX_REL8_CMP);
+
+ /* Delete two bytes of data. */
+ if (!elf32_crx_relax_delete_bytes (abfd, sec,
+ irel->r_offset + 4, 2))
+ goto error_return;
+
+ /* That will change things, so, we should relax again.
+ Note that this is not required, and it may be slow. */
+ *again = TRUE;
+ }
+ }
+
+ /* Try to turn a 32bit immediate address into
+ a 16bit immediate address. */
+ if (ELF32_R_TYPE (irel->r_info) == (int) R_CRX_IMM32)
+ {
+ bfd_vma value = symval;
+
+ /* See if the value will fit in 16 bits. */
+ if ((long) value < 0x7fff && (long) value > -0x8000)
+ {
+ unsigned short code;
+
+ /* Get the opcode. */
+ code = (unsigned short) bfd_get_16 (abfd, contents + irel->r_offset);
+
+ /* Verify it's a 'arithmetic double'. */
+ if ((code & 0xf0f0) != 0x20f0)
+ continue;
+
+ /* Note that we've changed the relocs, section contents, etc. */
+ elf_section_data (sec)->relocs = internal_relocs;
+ elf_section_data (sec)->this_hdr.contents = contents;
+ symtab_hdr->contents = (unsigned char *) isymbuf;
+
+ /* Fix the opcode. */
+ bfd_put_8 (abfd, (code & 0xff) - 0x10, contents + irel->r_offset);
+
+ /* Fix the relocation's type. */
+ irel->r_info = ELF32_R_INFO (ELF32_R_SYM (irel->r_info),
+ R_CRX_IMM16);
+
+ /* Delete two bytes of data. */
+ if (!elf32_crx_relax_delete_bytes (abfd, sec,
+ irel->r_offset + 2, 2))
+ goto error_return;
+
+ /* That will change things, so, we should relax again.
+ Note that this is not required, and it may be slow. */
+ *again = TRUE;
+ }
+ }
+ }
+
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ {
+ if (! link_info->keep_memory)
+ free (isymbuf);
+ else
+ {
+ /* Cache the symbols for elf_link_input_bfd. */
+ symtab_hdr->contents = (unsigned char *) isymbuf;
+ }
+ }
+
+ if (contents != NULL
+ && elf_section_data (sec)->this_hdr.contents != contents)
+ {
+ if (! link_info->keep_memory)
+ free (contents);
+ else
+ {
+ /* Cache the section contents for elf_link_input_bfd. */
+ elf_section_data (sec)->this_hdr.contents = contents;
+ }
+ }
+
+ if (internal_relocs != NULL
+ && elf_section_data (sec)->relocs != internal_relocs)
+ free (internal_relocs);
+
+ return TRUE;
+
+ error_return:
+ if (isymbuf != NULL
+ && symtab_hdr->contents != (unsigned char *) isymbuf)
+ free (isymbuf);
+ if (contents != NULL
+ && elf_section_data (sec)->this_hdr.contents != contents)
+ free (contents);
+ if (internal_relocs != NULL
+ && elf_section_data (sec)->relocs != internal_relocs)
+ free (internal_relocs);
+
+ return FALSE;
+}
+
+static asection *
+elf32_crx_gc_mark_hook (asection *sec,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ Elf_Internal_Rela *rel ATTRIBUTE_UNUSED,
+ struct elf_link_hash_entry *h,
+ Elf_Internal_Sym *sym)
+{
+ if (h == NULL)
+ return bfd_section_from_elf_index (sec->owner, sym->st_shndx);
+
+ switch (h->root.type)
+ {
+ case bfd_link_hash_defined:
+ case bfd_link_hash_defweak:
+ return h->root.u.def.section;
+
+ case bfd_link_hash_common:
+ return h->root.u.c.p->section;
+
+ default:
+ return NULL;
+ }
+}
+
+/* Update the got entry reference counts for the section being removed. */
+
+static bfd_boolean
+elf32_crx_gc_sweep_hook (bfd *abfd ATTRIBUTE_UNUSED,
+ struct bfd_link_info *info ATTRIBUTE_UNUSED,
+ asection *sec ATTRIBUTE_UNUSED,
+ const Elf_Internal_Rela *relocs ATTRIBUTE_UNUSED)
+{
+ /* We don't support garbage collection of GOT and PLT relocs yet. */
+ return TRUE;
+}
+
+/* Definitions for setting CRX target vector. */
+#define TARGET_LITTLE_SYM bfd_elf32_crx_vec
+#define TARGET_LITTLE_NAME "elf32-crx"
+#define ELF_ARCH bfd_arch_crx
+#define ELF_MACHINE_CODE EM_CRX
+#define ELF_MAXPAGESIZE 0x1
+#define elf_symbol_leading_char '_'
+
+#define bfd_elf32_bfd_reloc_type_lookup elf_crx_reloc_type_lookup
+#define elf_info_to_howto elf_crx_info_to_howto
+#define elf_info_to_howto_rel 0
+#define elf_backend_relocate_section elf32_crx_relocate_section
+#define bfd_elf32_bfd_relax_section elf32_crx_relax_section
+#define bfd_elf32_bfd_get_relocated_section_contents \
+ elf32_crx_get_relocated_section_contents
+#define elf_backend_gc_mark_hook elf32_crx_gc_mark_hook
+#define elf_backend_gc_sweep_hook elf32_crx_gc_sweep_hook
+#define elf_backend_can_gc_sections 1
+#define elf_backend_rela_normal 1
+
+#include "elf32-target.h"
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index 217299b..095010c 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -1508,6 +1508,23 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_16C_IMM24_C",
"BFD_RELOC_16C_IMM32",
"BFD_RELOC_16C_IMM32_C",
+ "BFD_RELOC_CRX_REL4",
+ "BFD_RELOC_CRX_REL8",
+ "BFD_RELOC_CRX_REL8_CMP",
+ "BFD_RELOC_CRX_REL16",
+ "BFD_RELOC_CRX_REL24",
+ "BFD_RELOC_CRX_REL32",
+ "BFD_RELOC_CRX_REGREL12",
+ "BFD_RELOC_CRX_REGREL22",
+ "BFD_RELOC_CRX_REGREL28",
+ "BFD_RELOC_CRX_REGREL32",
+ "BFD_RELOC_CRX_ABS16",
+ "BFD_RELOC_CRX_ABS32",
+ "BFD_RELOC_CRX_NUM8",
+ "BFD_RELOC_CRX_NUM16",
+ "BFD_RELOC_CRX_NUM32",
+ "BFD_RELOC_CRX_IMM16",
+ "BFD_RELOC_CRX_IMM32",
"BFD_RELOC_CRIS_BDISP8",
"BFD_RELOC_CRIS_UNSIGNED_5",
"BFD_RELOC_CRIS_SIGNED_6",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index a6f158c..e8279d2 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -3854,6 +3854,43 @@ ENUMX
ENUMDOC
NS CR16C Relocations.
+ENUM
+ BFD_RELOC_CRX_REL4
+ENUMX
+ BFD_RELOC_CRX_REL8
+ENUMX
+ BFD_RELOC_CRX_REL8_CMP
+ENUMX
+ BFD_RELOC_CRX_REL16
+ENUMX
+ BFD_RELOC_CRX_REL24
+ENUMX
+ BFD_RELOC_CRX_REL32
+ENUMX
+ BFD_RELOC_CRX_REGREL12
+ENUMX
+ BFD_RELOC_CRX_REGREL22
+ENUMX
+ BFD_RELOC_CRX_REGREL28
+ENUMX
+ BFD_RELOC_CRX_REGREL32
+ENUMX
+ BFD_RELOC_CRX_ABS16
+ENUMX
+ BFD_RELOC_CRX_ABS32
+ENUMX
+ BFD_RELOC_CRX_NUM8
+ENUMX
+ BFD_RELOC_CRX_NUM16
+ENUMX
+ BFD_RELOC_CRX_NUM32
+ENUMX
+ BFD_RELOC_CRX_IMM16
+ENUMX
+ BFD_RELOC_CRX_IMM32
+ENUMDOC
+ NS CRX Relocations.
+
ENUM
BFD_RELOC_CRIS_BDISP8
ENUMX
diff --git a/bfd/targets.c b/bfd/targets.c
index 320f7b9..0719d4f 100644
--- a/bfd/targets.c
+++ b/bfd/targets.c
@@ -532,6 +532,7 @@ extern const bfd_target bfd_elf32_bigarm_vec;
extern const bfd_target bfd_elf32_bigmips_vec;
extern const bfd_target bfd_elf32_cr16c_vec;
extern const bfd_target bfd_elf32_cris_vec;
+extern const bfd_target bfd_elf32_crx_vec;
extern const bfd_target bfd_elf32_d10v_vec;
extern const bfd_target bfd_elf32_d30v_vec;
extern const bfd_target bfd_elf32_dlx_big_vec;
@@ -826,6 +827,7 @@ static const bfd_target * const _bfd_target_vector[] = {
&bfd_elf32_bigmips_vec,
&bfd_elf32_cr16c_vec,
&bfd_elf32_cris_vec,
+ &bfd_elf32_crx_vec,
&bfd_elf32_d10v_vec,
&bfd_elf32_d30v_vec,
&bfd_elf32_dlx_big_vec,