Add ARM v5t, v5te and XScale support

7 files changed, 41 insertions, 2 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 188b62f..3229922 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,21 @@
+2000-11-24  Nick Clifton  <nickc@redhat.com>
+
+	* archures.c (bfd_mach_arm_5TE): Define.
+	(bfd_mach_arm+XScale): Define.
+	* bfd-in2.h: Regenerate.
+
+	* coff-arm.c (coff_arm_reloc_type_lookup): Accept
+	BFD_RELOC_ARM_PCREL_BLX.
+
+	* coffcode.h (coff_set_flags): Set flags for 5t, 5te and
+	XScale machine numbers.
+
+	* config.bfd (xscale-elf): Add target.
+	(xscale-coff): Add target.
+
+	* cpu-arm.c: Add xscale machine name.
+	Add v5t, v5te and XScale machine numbers.
+
 2000-11-23  Kazu Hirata  <kazu@hxi.com>
 
 	* aix386-core.c: Fix formatting.
diff --git a/bfd/archures.c b/bfd/archures.c
index 8cfc39e..f494d88 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -205,6 +205,8 @@ DESCRIPTION
 .#define bfd_mach_arm_4T 	6
 .#define bfd_mach_arm_5 	7
 .#define bfd_mach_arm_5T	8
+.#define bfd_mach_arm_5TE	9
+.#define bfd_mach_arm_XScale	10
 .  bfd_arch_ns32k,     {* National Semiconductors ns32000 *}
 .  bfd_arch_w65,       {* WDC 65816 *}
 .  bfd_arch_tic30,     {* Texas Instruments TMS320C30 *}
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 20a0e4c..e13b3d1 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -1471,6 +1471,8 @@ enum bfd_architecture
 #define bfd_mach_arm_4T        6
 #define bfd_mach_arm_5         7
 #define bfd_mach_arm_5T        8
+#define bfd_mach_arm_5TE       9
+#define bfd_mach_arm_XScale    10
   bfd_arch_ns32k,     /* National Semiconductors ns32000 */
   bfd_arch_w65,       /* WDC 65816 */
   bfd_arch_tic30,     /* Texas Instruments TMS320C30 */
diff --git a/bfd/coff-arm.c b/bfd/coff-arm.c
index 35297d9..95e65cd 100644
--- a/bfd/coff-arm.c
+++ b/bfd/coff-arm.c
@@ -845,6 +845,7 @@ coff_arm_reloc_type_lookup (abfd, code)
       ASTD (BFD_RELOC_16,                   ARM_16);
       ASTD (BFD_RELOC_32,                   ARM_32);
       ASTD (BFD_RELOC_ARM_PCREL_BRANCH,     ARM_26);
+      ASTD (BFD_RELOC_ARM_PCREL_BLX,        ARM_26);
       ASTD (BFD_RELOC_8_PCREL,              ARM_DISP8);
       ASTD (BFD_RELOC_16_PCREL,             ARM_DISP16);
       ASTD (BFD_RELOC_32_PCREL,             ARM_DISP32);
diff --git a/bfd/coffcode.h b/bfd/coffcode.h
index 3bdf307..c5025fb 100644
--- a/bfd/coffcode.h
+++ b/bfd/coffcode.h
@@ -2596,7 +2596,10 @@ coff_set_flags (abfd, magicp, flagsp)
 	case bfd_mach_arm_4:  * flagsp |= F_ARM_4;  break;
 	case bfd_mach_arm_4T: * flagsp |= F_ARM_4T; break;
 	case bfd_mach_arm_5:  * flagsp |= F_ARM_5;  break;
-	case bfd_mach_arm_5T: * flagsp |= F_ARM_5;  break; /* XXX - we do not have an F_ARM_5T */
+	  /* FIXME: we do not have F_ARM vaues greater than F_ARM_5.  */
+	case bfd_mach_arm_5T: * flagsp |= F_ARM_5;  break;
+	case bfd_mach_arm_5TE: * flagsp |= F_ARM_5; break;
+	case bfd_mach_arm_XScale: * flagsp |= F_ARM_5; break;
 	}
       return true;
 #endif
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 6235079..5deb6cc 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -32,6 +32,7 @@ alpha*) targ_archs=bfd_alpha_arch ;;
 arm*)	targ_archs=bfd_arm_arch ;;
 strongarm*) targ_archs=bfd_arm_arch ;;
 thumb*)	targ_archs=bfd_arm_arch ;;
+xscale*) targ_archs=bfd_arm_arch ;;
 c30*)	targ_archs=bfd_tic30_arch ;;
 c54x*)	targ_archs=bfd_tic54x_arch ;;
 hppa*)	targ_archs=bfd_hppa_arch ;;
@@ -182,6 +183,15 @@ case "${targ}" in
     targ_selvecs=armcoff_big_vec
     targ_underscore=yes
     ;;
+  xscale-*-elf)
+    targ_defvec=bfd_elf32_littlearm_vec
+    targ_selvecs=bfd_elf32_bigarm_vec
+    ;;
+  xscale-*-coff)
+    targ_defvec=armcoff_little_vec
+    targ_selvecs=armcoff_big_vec
+    targ_underscore=yes
+    ;;
 
   a29k-*-ebmon* | a29k-*-udi* | a29k-*-coff* | a29k-*-sym1* | \
   a29k-*-vxworks* | a29k-*-sysv*)
diff --git a/bfd/cpu-arm.c b/bfd/cpu-arm.c
index 7b351f5..91507f8 100644
--- a/bfd/cpu-arm.c
+++ b/bfd/cpu-arm.c
@@ -93,6 +93,7 @@ processors[] =
   { bfd_mach_arm_4,  "strongarm"},
   { bfd_mach_arm_4,  "strongarm110" },
   { bfd_mach_arm_4,  "strongarm1100" },
+  { bfd_mach_arm_XScale, "xscale" }
 };
 
 static boolean
@@ -135,7 +136,9 @@ static const bfd_arch_info_type arch_info_struct[] =
   N( bfd_mach_arm_4,  "armv4",  false, & arch_info_struct[5] ),
   N( bfd_mach_arm_4T, "armv4t", false, & arch_info_struct[6] ),
   N( bfd_mach_arm_5,  "armv5",  false, & arch_info_struct[7] ),
-  N( bfd_mach_arm_5T, "armv5t", false, NULL )
+  N( bfd_mach_arm_5T, "armv5t", false, & arch_info_struct[8] ),
+  N( bfd_mach_arm_5TE, "armv5te", false, & arch_info_struct[9] ),
+  N( bfd_mach_arm_XScale, "xscale", false, NULL )
 };
 
 const bfd_arch_info_type bfd_arm_arch =