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authorVictor Do Nascimento <victor.donascimento@arm.com>2024-06-25 14:13:25 +0100
committerVictor Do Nascimento <victor.donascimento@arm.com>2024-06-26 00:30:52 +0100
commite80f3b4643914a703cc054fd26f22f8164c48f6c (patch)
treef1e5c34334cee2b8764bbd7c3495a14996063c12 /bfd/po
parent64e3e92fe0c0229638dbdcf95a7a231cdb6b44a2 (diff)
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aarch64: FP8 scale and convert - Implement minor improvements
Following feedback received shortly after the initial commit of the aarch64 instructions for scaling and converting fp8 instructions, this patch addresses the issues raised in the relevant feedback. This includes the following changes: * Standardize all FP8 qualifier-set names. This has resulted in the renaming of QL_V2FP8B8H to QL_V2_HB_LOWER and, likewise, QL_V28H16B to QL_V2_HB_FULL. * Update `FP8_INSN' aarch64_opcode_table[] entries to reflect the new standardized qualifier-set names mentioned above and, in the case of the "fcvtn" entries, also add a leading 0 to their opcode values so they are given as 8 hexadecimal digits in length to ensure consistency in formatting relative to other entries in the table. * Revise the added test-cases so that when checking operand fields in the disassembled binaries, all bits for these fields get tested to ensure they can be toggled on/off by the relevant operand arguments.
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