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authorNelson Chu <nelson.chu@sifive.com>2021-07-22 13:47:07 +0800
committerNelson Chu <nelson.chu@sifive.com>2021-12-16 16:04:53 +0800
commit23ff54c27d535727c1c467abdd4bed8fbd46d4a6 (patch)
treeda2e9d4b80b472a0fc4d8c1829859f30d2f720b1 /bfd/elfxx-riscv.c
parent7d554943ba2f60d7562a7f7360b683885313dec8 (diff)
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RISC-V: Support svinval extension with frozen version 1.0.
According to the privileged spec, there are five new instructions for svinval extension. Two of them (HINVAL.VVMA and HINVAL.GVMA) need to enable the hypervisor extension. But there is no implementation of hypervisor extension in mainline for now, so let's consider the related issues later. 31..25 24..20 19..15 14..12 11...7 6..2 1..0 sinval.vma 0001011 rs2 rs1 000 00000 11100 11 sfence.w.inval 0001100 00000 00000 000 00000 11100 11 sfence.inval.ir 0001100 00001 00000 000 00000 11100 11 hinval.vvma 0010011 rs2 rs1 000 00000 11100 11 hinval.gvma 0110011 rs2 rs1 000 00000 11100 11 This patch is cherry-picked from the riscv integration branch since the svinval extension is frozen for now. Besides, we fix the funct7 encodings of hinval.vvma and hinval.gvma, from 0x0011011 and 0x0111011 to 0x0010011 and 0x0110011. bfd/ * elfxx-riscv.c (riscv_supported_std_s_ext): Added svinval. (riscv_multi_subset_supports): Handle INSN_CLASS_SVINVAL. gas/ * testsuite/gas/riscv/svinval.d: New testcase. * testsuite/gas/riscv/svinval.s: Likewise. include/ * opcode/riscv-opc.h: Added encodings for svinval. * opcode/riscv.h (enum riscv_insn_class): Added INSN_CLASS_SVINVAL. opcodes/ * riscv-opc.c (riscv_opcodes): Added svinval instructions.
Diffstat (limited to 'bfd/elfxx-riscv.c')
-rw-r--r--bfd/elfxx-riscv.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c
index 8c44c4a..c575ab0 100644
--- a/bfd/elfxx-riscv.c
+++ b/bfd/elfxx-riscv.c
@@ -1227,6 +1227,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
static struct riscv_supported_ext riscv_supported_std_s_ext[] =
{
+ {"svinval", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{NULL, 0, 0, 0, 0}
};
@@ -2403,6 +2404,8 @@ riscv_multi_subset_supports (riscv_parse_subset_t *rps,
|| riscv_subset_supports (rps, "zve64d")
|| riscv_subset_supports (rps, "zve64f")
|| riscv_subset_supports (rps, "zve32f"));
+ case INSN_CLASS_SVINVAL:
+ return riscv_subset_supports (rps, "svinval");
default:
rps->error_handler
(_("internal: unreachable INSN_CLASS_*"));