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authorAndreas Schwab <schwab@suse.de>2023-08-03 17:22:42 +0200
committerAndreas Schwab <schwab@suse.de>2023-12-05 13:20:27 +0100
commit1b183017aa2fbb73785dc24b4cff32daae942c9c (patch)
treea38cc647f52a6a83f7c496ef7c36cbe04892f579 /bfd/config.bfd
parentdb4ab410dec3554bf38f69879de2306ce5e25b7e (diff)
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Add basic support for RISC-V 64-bit EFI objects
This adds a new PEI target pei-riscv64-little. Only objdump and objcopy are supported. bfd: * .gitignore: Add pe-riscv64igen.c. * Makefile.am (BFD64_BACKENDS): Add pei-riscv64.lo, pe-riscv64igen.lo. (BFD64_BACKENDS_CFILES): Add pei-riscv64.c. (BUILD_CFILES): Add pe-riscv64igen.c. (pe-riscv64igen.c): New rule. * Makefile.in: Regenerate. * bfd.c (bfd_get_sign_extend_vma): Add pei-riscv64-little. * coff-riscv64.c: New file. * coffcode.h (coff_set_arch_mach_hook, coff_set_flags) (coff_write_object_contents): Add riscv64 (riscv64_pei_vec) support. * config.bfd (targ_selvecs): Add riscv64_pei_vec to all riscv* targets. * configure.ac: Handle riscv64_pei_vec. * configure: Regenerate. * libpei.h (GET_OPTHDR_IMAGE_BASE, PUT_OPTHDR_IMAGE_BASE) (GET_OPTHDR_SIZE_OF_STACK_RESERVE) (PUT_OPTHDR_SIZE_OF_STACK_RESERVE) (GET_OPTHDR_SIZE_OF_STACK_COMMIT, PUT_OPTHDR_SIZE_OF_STACK_COMMIT) (GET_OPTHDR_SIZE_OF_HEAP_RESERVE, PUT_OPTHDR_SIZE_OF_HEAP_RESERVE) (GET_OPTHDR_SIZE_OF_HEAP_COMMIT, PUT_OPTHDR_SIZE_OF_HEAP_COMMIT) (GET_PDATA_ENTRY, _bfd_XX_bfd_copy_private_bfd_data_common) (_bfd_XX_bfd_copy_private_section_data) (_bfd_XX_get_symbol_info, _bfd_XX_only_swap_filehdr_out) (_bfd_XX_print_private_bfd_data_common) (_bfd_XXi_final_link_postscript, _bfd_XXi_only_swap_filehdr_out) (_bfd_XXi_swap_aouthdr_in, _bfd_XXi_swap_aouthdr_out) (_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out) (_bfd_XXi_swap_lineno_in, _bfd_XXi_swap_lineno_out) (_bfd_XXi_swap_scnhdr_out, _bfd_XXi_swap_sym_in) (_bfd_XXi_swap_sym_out, _bfd_XXi_swap_debugdir_in) (_bfd_XXi_swap_debugdir_out, _bfd_XXi_write_codeview_record) (_bfd_XXi_slurp_codeview_record) [COFF_WITH_peRiscV64]: Define. (_bfd_peRiscV64_print_ce_compressed_pdata): Declare. * peXXigen.c (_bfd_XXi_swap_aouthdr_in, _bfd_XXi_swap_aouthdr_out) (_bfd_XXi_swap_scnhdr_out, pe_print_pdata) (_bfd_XX_print_private_bfd_data_common) (_bfd_XX_bfd_copy_private_section_data) (_bfd_XXi_final_link_postscript): Support COFF_WITH_peRiscV64. * pei-riscv64.c: New file. * peicode.h (coff_swap_scnhdr_in, pe_ILF_build_a_bfd) (pe_ILF_object_p): Support COFF_WITH_peRiscV64. (jtab): Add dummy entry that traps. * targets.c (_bfd_target_vector): Add riscv64_pei_vec. binutils: * testsuite/binutils-all/riscv/pei-riscv64.d: New. * testsuite/binutils-all/riscv/pei-riscv64.s: New. include: * coff/riscv64.h: New file. * coff/pe.h (IMAGE_FILE_MACHINE_RISCV32) (IMAGE_FILE_MACHINE_RISCV64): Define.
Diffstat (limited to 'bfd/config.bfd')
-rw-r--r--bfd/config.bfd8
1 files changed, 4 insertions, 4 deletions
diff --git a/bfd/config.bfd b/bfd/config.bfd
index 8c9637a..4106924 100644
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -1229,22 +1229,22 @@ case "${targ}" in
#ifdef BFD64
riscvbe-*-* | riscv32be*-*-*)
targ_defvec=riscv_elf32_be_vec
- targ_selvecs="riscv_elf32_vec riscv_elf64_vec riscv_elf32_be_vec riscv_elf64_be_vec"
+ targ_selvecs="riscv_elf32_vec riscv_elf64_vec riscv_elf32_be_vec riscv_elf64_be_vec riscv64_pei_vec"
want64=true
;;
riscv-*-* | riscv32*-*-*)
targ_defvec=riscv_elf32_vec
- targ_selvecs="riscv_elf32_vec riscv_elf64_vec riscv_elf32_be_vec riscv_elf64_be_vec"
+ targ_selvecs="riscv_elf32_vec riscv_elf64_vec riscv_elf32_be_vec riscv_elf64_be_vec riscv64_pei_vec"
want64=true
;;
riscv64be*-*-*)
targ_defvec=riscv_elf64_be_vec
- targ_selvecs="riscv_elf32_vec riscv_elf64_vec riscv_elf32_be_vec riscv_elf64_be_vec"
+ targ_selvecs="riscv_elf32_vec riscv_elf64_vec riscv_elf32_be_vec riscv_elf64_be_vec riscv64_pei_vec"
want64=true
;;
riscv64*-*-*)
targ_defvec=riscv_elf64_vec
- targ_selvecs="riscv_elf32_vec riscv_elf64_vec riscv_elf32_be_vec riscv_elf64_be_vec"
+ targ_selvecs="riscv_elf32_vec riscv_elf64_vec riscv_elf32_be_vec riscv_elf64_be_vec riscv64_pei_vec"
want64=true
;;
#endif