Add basic support for RISC-V 64-bit EFI objects

This adds a new PEI target pei-riscv64-little.  Only objdump and objcopy
are supported.

bfd:
	* .gitignore: Add pe-riscv64igen.c.
	* Makefile.am (BFD64_BACKENDS): Add pei-riscv64.lo,
	pe-riscv64igen.lo.
	(BFD64_BACKENDS_CFILES): Add pei-riscv64.c.
	(BUILD_CFILES): Add pe-riscv64igen.c.
	(pe-riscv64igen.c): New rule.
	* Makefile.in: Regenerate.
	* bfd.c (bfd_get_sign_extend_vma): Add pei-riscv64-little.
	* coff-riscv64.c: New file.
	* coffcode.h (coff_set_arch_mach_hook, coff_set_flags)
	(coff_write_object_contents): Add riscv64 (riscv64_pei_vec)
	support.
	* config.bfd (targ_selvecs): Add riscv64_pei_vec to all riscv*
	targets.
	* configure.ac: Handle riscv64_pei_vec.
	* configure: Regenerate.
	* libpei.h (GET_OPTHDR_IMAGE_BASE, PUT_OPTHDR_IMAGE_BASE)
	(GET_OPTHDR_SIZE_OF_STACK_RESERVE)
	(PUT_OPTHDR_SIZE_OF_STACK_RESERVE)
	(GET_OPTHDR_SIZE_OF_STACK_COMMIT, PUT_OPTHDR_SIZE_OF_STACK_COMMIT)
	(GET_OPTHDR_SIZE_OF_HEAP_RESERVE, PUT_OPTHDR_SIZE_OF_HEAP_RESERVE)
	(GET_OPTHDR_SIZE_OF_HEAP_COMMIT, PUT_OPTHDR_SIZE_OF_HEAP_COMMIT)
	(GET_PDATA_ENTRY, _bfd_XX_bfd_copy_private_bfd_data_common)
	(_bfd_XX_bfd_copy_private_section_data)
	(_bfd_XX_get_symbol_info, _bfd_XX_only_swap_filehdr_out)
	(_bfd_XX_print_private_bfd_data_common)
	(_bfd_XXi_final_link_postscript, _bfd_XXi_only_swap_filehdr_out)
	(_bfd_XXi_swap_aouthdr_in, _bfd_XXi_swap_aouthdr_out)
	(_bfd_XXi_swap_aux_in, _bfd_XXi_swap_aux_out)
	(_bfd_XXi_swap_lineno_in, _bfd_XXi_swap_lineno_out)
	(_bfd_XXi_swap_scnhdr_out, _bfd_XXi_swap_sym_in)
	(_bfd_XXi_swap_sym_out, _bfd_XXi_swap_debugdir_in)
	(_bfd_XXi_swap_debugdir_out, _bfd_XXi_write_codeview_record)
	(_bfd_XXi_slurp_codeview_record) [COFF_WITH_peRiscV64]: Define.
	(_bfd_peRiscV64_print_ce_compressed_pdata): Declare.
	* peXXigen.c (_bfd_XXi_swap_aouthdr_in, _bfd_XXi_swap_aouthdr_out)
	(_bfd_XXi_swap_scnhdr_out, pe_print_pdata)
	(_bfd_XX_print_private_bfd_data_common)
	(_bfd_XX_bfd_copy_private_section_data)
	(_bfd_XXi_final_link_postscript): Support COFF_WITH_peRiscV64.
	* pei-riscv64.c: New file.
	* peicode.h (coff_swap_scnhdr_in, pe_ILF_build_a_bfd)
	(pe_ILF_object_p): Support COFF_WITH_peRiscV64.
	(jtab): Add dummy entry that traps.
	* targets.c (_bfd_target_vector): Add riscv64_pei_vec.

binutils:
	* testsuite/binutils-all/riscv/pei-riscv64.d: New.
	* testsuite/binutils-all/riscv/pei-riscv64.s: New.

include:
	* coff/riscv64.h: New file.
	* coff/pe.h (IMAGE_FILE_MACHINE_RISCV32)
	(IMAGE_FILE_MACHINE_RISCV64): Define.

1 files changed, 18 insertions, 1 deletions

diff --git a/bfd/coffcode.h b/bfd/coffcode.h
index 0487555..a368ed1 100644
--- a/bfd/coffcode.h
+++ b/bfd/coffcode.h
@@ -2235,6 +2235,12 @@ coff_set_arch_mach_hook (bfd *abfd, void * filehdr)
       machine = internal_f->f_flags & F_LOONGARCH64_ARCHITECTURE_MASK;
       break;
 #endif
+#ifdef RISCV64MAGIC
+    case RISCV64MAGIC:
+      arch = bfd_arch_riscv;
+      machine = bfd_mach_riscv64;
+      break;
+#endif
 #ifdef Z80MAGIC
     case Z80MAGIC:
       arch = bfd_arch_z80;
@@ -2806,6 +2812,12 @@ coff_set_flags (bfd * abfd,
       return true;
 #endif
 
+#ifdef RISCV64MAGIC
+    case bfd_arch_riscv:
+      * magicp = RISCV64MAGIC;
+      return true;
+#endif
+
 #ifdef ARMMAGIC
     case bfd_arch_arm:
 #ifdef ARM_WINCE
@@ -4002,7 +4014,7 @@ coff_write_object_contents (bfd * abfd)
     internal_f.f_flags |= IMAGE_FILE_LARGE_ADDRESS_AWARE;
 #endif
 
-#if !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64) && !defined(COFF_WITH_peLoongArch64)
+#if !defined(COFF_WITH_pex64) && !defined(COFF_WITH_peAArch64) && !defined(COFF_WITH_peLoongArch64) && !defined (COFF_WITH_peRiscV64)
 #ifdef COFF_WITH_PE
   internal_f.f_flags |= IMAGE_FILE_32BIT_MACHINE;
 #else
@@ -4061,6 +4073,11 @@ coff_write_object_contents (bfd * abfd)
     internal_a.magic = ZMAGIC;
 #endif
 
+#if defined(RISCV64)
+#define __A_MAGIC_SET__
+    internal_a.magic = ZMAGIC;
+#endif
+
 #if defined MCORE_PE
 #define __A_MAGIC_SET__
     internal_a.magic = IMAGE_NT_OPTIONAL_HDR_MAGIC;