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| author | Dave Brolley <brolley@redhat.com> | 2002-06-18 21:10:55 +0000 |
|---|---|---|
| committer | Dave Brolley <brolley@redhat.com> | 2002-06-18 21:10:55 +0000 |
| commit | 4e5ba5b7eb03f3d40fd2b6c58cf9a6bc1dfa0632 (patch) | |
| tree | 1827c18c6d0100e90722371f1e4abe3db8985ba6 /bfd/bfd-in2.h | |
| parent | d2a864148ec8a0f8b7992dc807bb109cab35678a (diff) | |
| download | gdb-4e5ba5b7eb03f3d40fd2b6c58cf9a6bc1dfa0632.zip gdb-4e5ba5b7eb03f3d40fd2b6c58cf9a6bc1dfa0632.tar.gz gdb-4e5ba5b7eb03f3d40fd2b6c58cf9a6bc1dfa0632.tar.bz2 | |
2002-06-18 Dave Brolley <brolley@redhat.com>
From Catherine Moore, Michael Meissner, Dave Brolley:
* po/SRC-POTFILES.in: Add cpu-frv.c and elf32-frv.c
* targets.c: Support bfd_elf32_frv_vec.
* reloc.c: Add FRV relocs.
* configure.in: Add support for bfd-elf32-frv-vec.
* config.bfd (targ_cpu): Add support for frv-*-elf.
* archures.c: Add frv arch and machines.
* Makefile.am (ALL_MACHINES): Add cpu-frv.lo.
(ALL_MACHINES_CFILES): Add cpu-frv.c.
(BFD32_BACKENDS): Add elf32-frv.lo.
(BFD32_BACKENDS_CFILES): Add elf32-frv.c
(cpu-frv.lo): New target.
(elf32-frv.lo): New target.
* cpu-frv.c: New file.
* elf32-frv.c: New file.
Diffstat (limited to 'bfd/bfd-in2.h')
| -rw-r--r-- | bfd/bfd-in2.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index e4319ff..4a8d802 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -1637,6 +1637,13 @@ enum bfd_architecture #define bfd_mach_am33 330 bfd_arch_fr30, #define bfd_mach_fr30 0x46523330 + bfd_arch_frv, +#define bfd_mach_frv 0 +#define bfd_mach_frvsimple 1 +#define bfd_mach_fr300 300 +#define bfd_mach_fr400 400 +#define bfd_mach_frvtomcat 499 /* fr500 prototype */ +#define bfd_mach_fr500 500 bfd_arch_mcore, bfd_arch_ia64, /* HP/Intel ia64 */ #define bfd_mach_ia64_elf64 0 @@ -2832,6 +2839,17 @@ value of SUBI insn. */ into 22 bits. */ BFD_RELOC_AVR_CALL, +/* Fujitsu Frv Relocations. */ + BFD_RELOC_FRV_LABEL16, + BFD_RELOC_FRV_LABEL24, + BFD_RELOC_FRV_LO16, + BFD_RELOC_FRV_HI16, + BFD_RELOC_FRV_GPREL12, + BFD_RELOC_FRV_GPRELU12, + BFD_RELOC_FRV_GPREL32, + BFD_RELOC_FRV_GPRELHI, + BFD_RELOC_FRV_GPRELLO, + /* Direct 12 bit. */ BFD_RELOC_390_12, |