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authorJim Wilson <jimw@sifive.com>2018-10-22 14:10:13 -0700
committerJim Wilson <jimw@sifive.com>2018-10-22 14:10:13 -0700
commit270b9329b713fdc166f95dfa3a0a2f72f3a49608 (patch)
tree880ae6d15b5b07aff96c87942acafad62cc23fd3 /COPYING.NEWLIB
parent192c2bfbd7a6d4b2069f6b94b020d274a483c198 (diff)
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RISC-V: Print FP regs as union of float types.
A 64-bit FP register can hold either a single or double float value, so print it as both types by using a union type for FP registers. Likewise for 128-bit regs which can also hold long double. gdb/ * riscv-tdep.c (riscv_fpreg_d_type, riscv_fpreg_q_type): New. (riscv_register_type): Use them. (riscv_print_one_register_info): Handle union of floats same as float. * riscv-tdep.h (struct gdbarch_tdep): Add riscv_fpreg_d_type and riscv_fpreg_q_type fields.
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