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| author | Mike Frysinger <vapier@gentoo.org> | 2023-12-18 20:55:58 -0500 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2024-01-01 10:51:23 -0500 |
| commit | fa99355b567e0693fb9b09bf328e0d1111e713c0 (patch) | |
| tree | d346457ae65eec95487da5bd80ca978d0921329e | |
| parent | cbbb73f4f9b0d7890c045fe8e159f651fbdca685 (diff) | |
| download | gdb-fa99355b567e0693fb9b09bf328e0d1111e713c0.zip gdb-fa99355b567e0693fb9b09bf328e0d1111e713c0.tar.gz gdb-fa99355b567e0693fb9b09bf328e0d1111e713c0.tar.bz2 | |
cpu: or1k: drop unused l.swa flag
The "flag" argument isn't set/used in this insn, so drop it.
This fixes an unused variable warning in the generated sim.
| -rw-r--r-- | cpu/or1korbis.cpu | 2 | ||||
| -rw-r--r-- | sim/or1k/sem-switch.c | 1 | ||||
| -rw-r--r-- | sim/or1k/sem.c | 1 |
3 files changed, 1 insertions, 3 deletions
diff --git a/cpu/or1korbis.cpu b/cpu/or1korbis.cpu index a8002a3..b4ecb84 100644 --- a/cpu/or1korbis.cpu +++ b/cpu/or1korbis.cpu @@ -717,7 +717,7 @@ ((MACH ORBIS-MACHS)) "l.swa ${simm16-split}($rA),$rB" (+ OPC_SWA rA rB simm16) - (sequence ((SI addr) (BI flag)) + (sequence ((SI addr)) (set addr (load-store-addr rA simm16-split 4)) (set sys-sr-f (and atomic-reserve (eq addr atomic-address))) (if sys-sr-f diff --git a/sim/or1k/sem-switch.c b/sim/or1k/sem-switch.c index b63add8..dccc65a 100644 --- a/sim/or1k/sem-switch.c +++ b/sim/or1k/sem-switch.c @@ -1056,7 +1056,6 @@ if (EQSI (ANDSI (tmp_addr, 268435452), CPU (h_atomic_address))) { { SI tmp_addr; - BI tmp_flag; tmp_addr = or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 4); { USI opval = ANDBI (CPU (h_atomic_reserve), EQSI (tmp_addr, CPU (h_atomic_address))); diff --git a/sim/or1k/sem.c b/sim/or1k/sem.c index 95c474d..973590d 100644 --- a/sim/or1k/sem.c +++ b/sim/or1k/sem.c @@ -933,7 +933,6 @@ SEM_FN_NAME (or1k32bf,l_swa) (SIM_CPU *current_cpu, SEM_ARG sem_arg) { SI tmp_addr; - BI tmp_flag; tmp_addr = or1k32bf_make_load_store_addr (current_cpu, GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16_split)), 4); { USI opval = ANDBI (CPU (h_atomic_reserve), EQSI (tmp_addr, CPU (h_atomic_address))); |