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| author | Andrew Cagney <cagney@redhat.com> | 2001-10-20 19:32:40 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 2001-10-20 19:32:40 +0000 |
| commit | f1e3ec292fa26e99995c66f09814d6a24661680b (patch) | |
| tree | ed709045208be2001e8105a8d40962a7d713d84f | |
| parent | 1f613cde70d34ffa70bbdcaf1830f022f04c8c84 (diff) | |
| download | gdb-f1e3ec292fa26e99995c66f09814d6a24661680b.zip gdb-f1e3ec292fa26e99995c66f09814d6a24661680b.tar.gz gdb-f1e3ec292fa26e99995c66f09814d6a24661680b.tar.bz2 | |
* alpha-nat.c: Include <alpha/coreregs.h> instead of
<machine/reg.h>.
(fetch_osf_core_registers): Define core_reg_mapping in a way that
works on OSF5 as well as previous OSF versions.
| -rw-r--r-- | gdb/ChangeLog | 7 | ||||
| -rw-r--r-- | gdb/alpha-nat.c | 22 |
2 files changed, 26 insertions, 3 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 745438f..7715a54 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,10 @@ +2001-10-20 Andrew Cagney <ac131313@redhat.com> + + * alpha-nat.c: Include <alpha/coreregs.h> instead of + <machine/reg.h>. + (fetch_osf_core_registers): Define core_reg_mapping in a way that + works on OSF5 as well as previous OSF versions. + 2001-10-20 Christopher Faylor <cgf@redhat.com> * win32-nat.c (handle_load_dll): Avoid strlwr'ing loaded DLLs or cygwin diff --git a/gdb/alpha-nat.c b/gdb/alpha-nat.c index d67dcac..f7e565b 100644 --- a/gdb/alpha-nat.c +++ b/gdb/alpha-nat.c @@ -29,7 +29,7 @@ #include <asm/reg.h> #include <alpha/ptrace.h> #else -#include <machine/reg.h> +#include <alpha/coreregs.h> #endif #include <sys/user.h> @@ -93,10 +93,25 @@ fetch_osf_core_registers (char *core_reg_sect, unsigned core_reg_size, register int addr; int bad_reg = -1; - /* Table to map a gdb regnum to an index in the core register section. - The floating point register values are garbage in OSF/1.2 core files. */ + /* Table to map a gdb regnum to an index in the core register + section. The floating point register values are garbage in + OSF/1.2 core files. OSF5 uses different names for the register + enum list, need to handle two cases. The actual values are the + same. */ static int core_reg_mapping[NUM_REGS] = { +#ifdef NCF_REGS +#define EFL NCF_REGS + CF_V0, CF_T0, CF_T1, CF_T2, CF_T3, CF_T4, CF_T5, CF_T6, + CF_T7, CF_S0, CF_S1, CF_S2, CF_S3, CF_S4, CF_S5, CF_S6, + CF_A0, CF_A1, CF_A2, CF_A3, CF_A4, CF_A5, CF_T8, CF_T9, + CF_T10, CF_T11, CF_RA, CF_T12, CF_AT, CF_GP, CF_SP, -1, + EFL + 0, EFL + 1, EFL + 2, EFL + 3, EFL + 4, EFL + 5, EFL + 6, EFL + 7, + EFL + 8, EFL + 9, EFL + 10, EFL + 11, EFL + 12, EFL + 13, EFL + 14, EFL + 15, + EFL + 16, EFL + 17, EFL + 18, EFL + 19, EFL + 20, EFL + 21, EFL + 22, EFL + 23, + EFL + 24, EFL + 25, EFL + 26, EFL + 27, EFL + 28, EFL + 29, EFL + 30, EFL + 31, + CF_PC, -1 +#else #define EFL (EF_SIZE / 8) EF_V0, EF_T0, EF_T1, EF_T2, EF_T3, EF_T4, EF_T5, EF_T6, EF_T7, EF_S0, EF_S1, EF_S2, EF_S3, EF_S4, EF_S5, EF_S6, @@ -107,6 +122,7 @@ fetch_osf_core_registers (char *core_reg_sect, unsigned core_reg_size, EFL + 16, EFL + 17, EFL + 18, EFL + 19, EFL + 20, EFL + 21, EFL + 22, EFL + 23, EFL + 24, EFL + 25, EFL + 26, EFL + 27, EFL + 28, EFL + 29, EFL + 30, EFL + 31, EF_PC, -1 +#endif }; static char zerobuf[MAX_REGISTER_RAW_SIZE] = {0}; |