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| author | Elena Zannoni <ezannoni@kwikemart.cygnus.com> | 2002-04-18 15:10:15 +0000 |
|---|---|---|
| committer | Elena Zannoni <ezannoni@kwikemart.cygnus.com> | 2002-04-18 15:10:15 +0000 |
| commit | ebeac11a97f7cd824f5d85fa973a905968945597 (patch) | |
| tree | 4664d286e32489a1565f65363b7ab3747d470129 | |
| parent | e20049926b7a0204df8c5072bd6de93ef3f5ec0c (diff) | |
| download | gdb-ebeac11a97f7cd824f5d85fa973a905968945597.zip gdb-ebeac11a97f7cd824f5d85fa973a905968945597.tar.gz gdb-ebeac11a97f7cd824f5d85fa973a905968945597.tar.bz2 | |
2002-04-17 Elena Zannoni <ezannoni@redhat.com>
* rs6000-tdep.c (COMMON_UISA_NOFP_REGS): New macro.
(registers_powerpc_nofp): New register set for processors
without floating point unit.
| -rw-r--r-- | gdb/ChangeLog | 6 | ||||
| -rw-r--r-- | gdb/rs6000-tdep.c | 19 |
2 files changed, 25 insertions, 0 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index afc1275..39aad84 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,9 @@ +2002-04-18 Elena Zannoni <ezannoni@redhat.com> + + * rs6000-tdep.c (COMMON_UISA_NOFP_REGS): New macro. + (registers_powerpc_nofp): New register set for processors + without floating point unit. + 2002-04-18 David S. Miller <davem@redhat.com> * MAINTAINERS: Add myself to write-after-approval. diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c index 3fd0794..8140565 100644 --- a/gdb/rs6000-tdep.c +++ b/gdb/rs6000-tdep.c @@ -2055,6 +2055,17 @@ rs6000_convert_from_func_ptr_addr (CORE_ADDR addr) /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \ /* 64 */ R(pc), R(ps) +#define COMMON_UISA_NOFP_REGS \ + /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \ + /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \ + /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \ + /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \ + /* 32 */ R0, R0, R0, R0, R0, R0, R0, R0, \ + /* 40 */ R0, R0, R0, R0, R0, R0, R0, R0, \ + /* 48 */ R0, R0, R0, R0, R0, R0, R0, R0, \ + /* 56 */ R0, R0, R0, R0, R0, R0, R0, R0, \ + /* 64 */ R(pc), R(ps) + /* UISA-level SPRs for PowerPC. */ #define PPC_UISA_SPRS \ /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr) @@ -2104,6 +2115,14 @@ static const struct reg registers_powerpc[] = PPC_ALTIVEC_REGS }; +/* PowerPC UISA - a PPC processor as viewed by user-level + code, but without floating point registers. */ +static const struct reg registers_powerpc_nofp[] = +{ + COMMON_UISA_NOFP_REGS, + PPC_UISA_SPRS +}; + /* IBM PowerPC 403. */ static const struct reg registers_403[] = { |