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authorJiri Gaisler <jiri@gaisler.se>2015-02-19 23:31:20 +0100
committerMike Frysinger <vapier@gentoo.org>2015-02-21 23:11:36 -0500
commitdf9bc4163b1331c8a4dad6830afeff4ff305a20a (patch)
tree22559227610b9f3b7018f7eeaa667077ff9849b5
parent53b5af48f6591c3120fb076f078188a4f117c2b7 (diff)
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sim/erc32: Corrected wrong CPU implementation and version ID in psr
-rw-r--r--sim/erc32/ChangeLog4
-rw-r--r--sim/erc32/exec.c2
2 files changed, 5 insertions, 1 deletions
diff --git a/sim/erc32/ChangeLog b/sim/erc32/ChangeLog
index 4a316bc..3757e5b 100644
--- a/sim/erc32/ChangeLog
+++ b/sim/erc32/ChangeLog
@@ -1,5 +1,9 @@
2015-02-21 Jiri Gaisler <jiri@gaisler.se>
+ * exec.c (init_regs): erc32 has vendor ID 1 and version ID 1 in %psr.
+
+2015-02-21 Jiri Gaisler <jiri@gaisler.se>
+
* func.c (print_insn_sparc_sis): Add helper function for disassembly.
(disp_ctrl): Use helper function.
diff --git a/sim/erc32/exec.c b/sim/erc32/exec.c
index dc86ba3..07f3586 100644
--- a/sim/erc32/exec.c
+++ b/sim/erc32/exec.c
@@ -2011,7 +2011,7 @@ init_regs(sregs)
sregs->npc = 4;
sregs->trap = 0;
sregs->psr &= 0x00f03fdf;
- sregs->psr |= 0x080; /* Set supervisor bit */
+ sregs->psr |= 0x11000080; /* Set supervisor bit */
sregs->breakpoint = 0;
sregs->annul = 0;
sregs->fpstate = FP_EXE_MODE;