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authorAditya Vidyadhar Kamath <Aditya.Kamath1@ibm.com>2023-09-26 00:48:57 -0500
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2023-09-26 15:13:18 +0200
commitdd05a5ca6944b8b035461350cca12aeb5d11dc03 (patch)
tree993136946bcff740143066f6a3383ac5fe76e272
parent6f56739807051e82a6327ff184b01be67be37670 (diff)
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Fix to step instruction due to P10 prefix instruction.
In AIX, power 10 instructions like paddi occupy 8 bytes, while the other instructions 4 bytes of space. Due to this when we do a stepi on paddi instruction we get a SIGILL interrupt. Hence, we need to check during stepi if we are able to step 8 bytes during this instruction execution and is the breakpoint to this instruction set correctly in both 32- and 64-bit mode. This patch is a fix to the same.
-rw-r--r--gdb/rs6000-aix-tdep.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/gdb/rs6000-aix-tdep.c b/gdb/rs6000-aix-tdep.c
index c5446db..b8772bd 100644
--- a/gdb/rs6000-aix-tdep.c
+++ b/gdb/rs6000-aix-tdep.c
@@ -1025,7 +1025,11 @@ rs6000_software_single_step (struct regcache *regcache)
if (!next_pcs.empty ())
return next_pcs;
- breaks[0] = loc + PPC_INSN_SIZE;
+ /* Here 0xfc000000 is the opcode mask to detect a P10 prefix instruction. */
+ if ((insn & 0xfc000000) == 1 << 26)
+ breaks[0] = loc + 2 * PPC_INSN_SIZE;
+ else
+ breaks[0] = loc + PPC_INSN_SIZE;
opcode = insn >> 26;
breaks[1] = branch_dest (regcache, opcode, insn, loc, breaks[0]);