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| author | Alan Hayward <alan.hayward@arm.com> | 2018-08-24 09:53:09 +0100 |
|---|---|---|
| committer | Alan Hayward <alan.hayward@arm.com> | 2018-10-01 14:00:14 +0100 |
| commit | c74e7cb96ffc525b0218cd329c292aacb16f94f8 (patch) | |
| tree | a3903387854cabfb23cfa90a9b5a7561306328e1 | |
| parent | 714e9a954a2e4123dcb26bb8da850e1344de4f5f (diff) | |
| download | gdb-c74e7cb96ffc525b0218cd329c292aacb16f94f8.zip gdb-c74e7cb96ffc525b0218cd329c292aacb16f94f8.tar.gz gdb-c74e7cb96ffc525b0218cd329c292aacb16f94f8.tar.bz2 | |
Aarch64: Move pseudo defines to header
gdb/
* aarch64-tdep.c (AARCH64_Q0_REGNUM): Move to here.
(AARCH64_D0_REGNUM): Likewise.
(AARCH64_S0_REGNUM): Likewise.
(AARCH64_H0_REGNUM): Likewise.
(AARCH64_B0_REGNUM): Likewise.
(AARCH64_SVE_V0_REGNUM): Likewise.
* arch/aarch64.h (AARCH64_Q0_REGNUM): Move from here.
(AARCH64_D0_REGNUM): Likewise.
(AARCH64_S0_REGNUM): Likewise.
(AARCH64_H0_REGNUM): Likewise.
(AARCH64_B0_REGNUM): Likewise.
(AARCH64_SVE_V0_REGNUM): Likewise.
| -rw-r--r-- | gdb/ChangeLog | 15 | ||||
| -rw-r--r-- | gdb/aarch64-tdep.c | 8 | ||||
| -rw-r--r-- | gdb/arch/aarch64.h | 8 |
3 files changed, 23 insertions, 8 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 12a04ee..2eec2e3 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,18 @@ +2018-10-01 Alan Hayward <alan.hayward@arm.com> + + * aarch64-tdep.c (AARCH64_Q0_REGNUM): Move to here. + (AARCH64_D0_REGNUM): Likewise. + (AARCH64_S0_REGNUM): Likewise. + (AARCH64_H0_REGNUM): Likewise. + (AARCH64_B0_REGNUM): Likewise. + (AARCH64_SVE_V0_REGNUM): Likewise. + * arch/aarch64.h (AARCH64_Q0_REGNUM): Move from here. + (AARCH64_D0_REGNUM): Likewise. + (AARCH64_S0_REGNUM): Likewise. + (AARCH64_H0_REGNUM): Likewise. + (AARCH64_B0_REGNUM): Likewise. + (AARCH64_SVE_V0_REGNUM): Likewise. + 2018-10-01 Gary Benson <gbenson@redhat.com> * gdb_proc_service.h (gdb_prfpregset_t): Remove typedef. diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c index 90b6deb..023e8eb 100644 --- a/gdb/aarch64-tdep.c +++ b/gdb/aarch64-tdep.c @@ -63,14 +63,6 @@ #define bit(obj,st) (((obj) >> (st)) & 1) #define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st))) -/* Pseudo register base numbers. */ -#define AARCH64_Q0_REGNUM 0 -#define AARCH64_D0_REGNUM (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT) -#define AARCH64_S0_REGNUM (AARCH64_D0_REGNUM + 32) -#define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32) -#define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32) -#define AARCH64_SVE_V0_REGNUM (AARCH64_B0_REGNUM + 32) - /* A Homogeneous Floating-Point or Short-Vector Aggregate may have at most four members. */ #define HA_MAX_NUM_FLDS 4 diff --git a/gdb/arch/aarch64.h b/gdb/arch/aarch64.h index d6b88e6..ff91860 100644 --- a/gdb/arch/aarch64.h +++ b/gdb/arch/aarch64.h @@ -57,6 +57,14 @@ enum aarch64_regnum AARCH64_LAST_V_ARG_REGNUM = AARCH64_V0_REGNUM + 7 }; +/* Pseudo register base numbers. */ +#define AARCH64_Q0_REGNUM 0 +#define AARCH64_D0_REGNUM (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT) +#define AARCH64_S0_REGNUM (AARCH64_D0_REGNUM + 32) +#define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32) +#define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32) +#define AARCH64_SVE_V0_REGNUM (AARCH64_B0_REGNUM + 32) + #define AARCH64_X_REGS_NUM 31 #define AARCH64_V_REGS_NUM 32 #define AARCH64_SVE_Z_REGS_NUM AARCH64_V_REGS_NUM |