diff options
author | Mike Frysinger <vapier@gentoo.org> | 2021-11-21 03:41:39 -0500 |
---|---|---|
committer | Mike Frysinger <vapier@gentoo.org> | 2021-11-26 19:48:05 -0500 |
commit | c0d6a6e5828882040bbb55bafea6b188a18fc000 (patch) | |
tree | d8cf4615c587d48caa174be280f30eb622d167b7 | |
parent | 4c721b266fdae6e2761cc122fac4cfb42932e295 (diff) | |
download | gdb-c0d6a6e5828882040bbb55bafea6b188a18fc000.zip gdb-c0d6a6e5828882040bbb55bafea6b188a18fc000.tar.gz gdb-c0d6a6e5828882040bbb55bafea6b188a18fc000.tar.bz2 |
sim: testsuite: rework sim_init usage
The sim_init function was called by runtest for each test when --tool
was set to sim. When we changed to --tool '' to collapse the testsuite
dir, the init function was no longer called on every test. However, it
was still being called explicitly by config/default.exp. It's not clear
why that explicit call ever existed since, in the past, it meant it was
redundant.
Lets drop the single sim_init call in config/default.exp and move it out
to all our tests. This replicates the runtest behavior so we can setup
variables on a per-test basis which allows us to recollapse the sim_path
logic back. We'll also leverage this in the future for toolchain setup.
Also add a few comments clarifying the overall runtime behavior.
44 files changed, 109 insertions, 26 deletions
diff --git a/sim/testsuite/aarch64/allinsn.exp b/sim/testsuite/aarch64/allinsn.exp index 54d6478..402d748 100644 --- a/sim/testsuite/aarch64/allinsn.exp +++ b/sim/testsuite/aarch64/allinsn.exp @@ -1,5 +1,7 @@ # AArch64 simulator testsuite +sim_init + if [istarget aarch64*-*] { # all machines set all_machs "aarch64" diff --git a/sim/testsuite/arm/allinsn.exp b/sim/testsuite/arm/allinsn.exp index 4f4f438..ef41c95 100644 --- a/sim/testsuite/arm/allinsn.exp +++ b/sim/testsuite/arm/allinsn.exp @@ -1,5 +1,7 @@ # ARM simulator testsuite. +sim_init + if { [istarget arm*-*-*] } { # all machines set all_machs "xscale" diff --git a/sim/testsuite/arm/iwmmxt/iwmmxt.exp b/sim/testsuite/arm/iwmmxt/iwmmxt.exp index 058e9e6..7283a42 100644 --- a/sim/testsuite/arm/iwmmxt/iwmmxt.exp +++ b/sim/testsuite/arm/iwmmxt/iwmmxt.exp @@ -1,5 +1,7 @@ # Intel(r) Wireless MMX(tm) technology simulator testsuite. +sim_init + if { [istarget arm*-*-*] } { # all machines set all_machs "xscale" diff --git a/sim/testsuite/arm/misc.exp b/sim/testsuite/arm/misc.exp index 818ee58..0b939a6 100644 --- a/sim/testsuite/arm/misc.exp +++ b/sim/testsuite/arm/misc.exp @@ -1,5 +1,7 @@ # Miscellaneous ARM simulator testcases +sim_init + if { [istarget arm*-*-*] } { # all machines set all_machs "arm7tdmi" diff --git a/sim/testsuite/arm/thumb/allthumb.exp b/sim/testsuite/arm/thumb/allthumb.exp index ec09a0d..76aac93 100644 --- a/sim/testsuite/arm/thumb/allthumb.exp +++ b/sim/testsuite/arm/thumb/allthumb.exp @@ -1,5 +1,7 @@ # ARM simulator testsuite. +sim_init + if { [istarget arm*-*-*] } { # all machines set all_machs "arm7tdmi" diff --git a/sim/testsuite/arm/xscale/xscale.exp b/sim/testsuite/arm/xscale/xscale.exp index 394e351..17e99c3 100644 --- a/sim/testsuite/arm/xscale/xscale.exp +++ b/sim/testsuite/arm/xscale/xscale.exp @@ -1,5 +1,7 @@ # XSCALE simulator testsuite. +sim_init + if { [istarget arm*-*-*] } { # all machines set all_machs "xscale" diff --git a/sim/testsuite/avr/allinsn.exp b/sim/testsuite/avr/allinsn.exp index 584a93d..c82610c 100644 --- a/sim/testsuite/avr/allinsn.exp +++ b/sim/testsuite/avr/allinsn.exp @@ -1,5 +1,7 @@ # avr simulator testsuite +sim_init + if [istarget avr-*] { # all machines set all_machs "avr" diff --git a/sim/testsuite/bfin/allinsn.exp b/sim/testsuite/bfin/allinsn.exp index f250d23..d5269da 100644 --- a/sim/testsuite/bfin/allinsn.exp +++ b/sim/testsuite/bfin/allinsn.exp @@ -1,5 +1,7 @@ # Analog Devices Blackfin simulator testsuite +sim_init + if [istarget bfin-*-elf] { # all machines set all_machs "bfin" diff --git a/sim/testsuite/bpf/allinsn.exp b/sim/testsuite/bpf/allinsn.exp index 66e76f6..4f81d4c 100644 --- a/sim/testsuite/bpf/allinsn.exp +++ b/sim/testsuite/bpf/allinsn.exp @@ -1,5 +1,7 @@ # eBPF simulator testsuite +sim_init + if [istarget bpf-unknown-none] { # all machines set all_machs "bpf" diff --git a/sim/testsuite/config/default.exp b/sim/testsuite/config/default.exp index c167e10..d95b554 100644 --- a/sim/testsuite/config/default.exp +++ b/sim/testsuite/config/default.exp @@ -1,5 +1,3 @@ # Simulator default dejagnu configuration file. load_lib sim-defs.exp - -sim_init diff --git a/sim/testsuite/cr16/allinsn.exp b/sim/testsuite/cr16/allinsn.exp index 7105a1a..3f05fb9 100644 --- a/sim/testsuite/cr16/allinsn.exp +++ b/sim/testsuite/cr16/allinsn.exp @@ -1,5 +1,7 @@ # CR16 simulator testsuite. +sim_init + if [istarget cr16*-*-*] { # all machines set all_machs "cr16" diff --git a/sim/testsuite/cr16/misc.exp b/sim/testsuite/cr16/misc.exp index bb1bef3..136b0e7 100644 --- a/sim/testsuite/cr16/misc.exp +++ b/sim/testsuite/cr16/misc.exp @@ -1,5 +1,7 @@ # Miscellaneous CR16 simulator testcases +sim_init + if [istarget cr16*-*-*] { # all machines set all_machs "cr16" diff --git a/sim/testsuite/cris/asm/asm.exp b/sim/testsuite/cris/asm/asm.exp index 415bbf1..d64d352 100644 --- a/sim/testsuite/cris/asm/asm.exp +++ b/sim/testsuite/cris/asm/asm.exp @@ -15,6 +15,8 @@ # Miscellaneous CRIS simulator testcases in assembly code. +sim_init + if [istarget cris*-*-*] { global ASFLAGS_FOR_TARGET # All machines we test and the corresponding assembler option. Needs diff --git a/sim/testsuite/cris/c/c.exp b/sim/testsuite/cris/c/c.exp index 25d812ea..08a085d 100644 --- a/sim/testsuite/cris/c/c.exp +++ b/sim/testsuite/cris/c/c.exp @@ -15,6 +15,8 @@ # Miscellaneous CRIS simulator testcases testing syscall sequences. +sim_init + if ![istarget cris*-*-*] { return } @@ -69,6 +71,7 @@ proc anytarget { targets } { return 0 } +global sim_path foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.c]] { set orig_ldflags "" @@ -94,7 +97,7 @@ foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.c]] { continue } - if ![file exists [sim_tool_path]] { + if ![file exists $sim_path] { untested $testname return 0 } diff --git a/sim/testsuite/cris/hw/rv-n-cris/rvc.exp b/sim/testsuite/cris/hw/rv-n-cris/rvc.exp index 847d906..7c136db 100644 --- a/sim/testsuite/cris/hw/rv-n-cris/rvc.exp +++ b/sim/testsuite/cris/hw/rv-n-cris/rvc.exp @@ -16,15 +16,18 @@ # Miscellaneous CRIS simulator testcases in assembly code, testing # dv-rv.c and dv-cris.c functions. +sim_init + # Check whether dv-rv and dv-cris are present. proc sim_has_rv_and_cris {} { global srcdir global subdir global objdir + global sim_path global SIMFLAGS_FOR_TARGET - if ![file exists [sim_tool_path]] { + if ![file exists $sim_path] { return 0 } diff --git a/sim/testsuite/d10v/allinsn.exp b/sim/testsuite/d10v/allinsn.exp index 5f1a131..6e76196 100644 --- a/sim/testsuite/d10v/allinsn.exp +++ b/sim/testsuite/d10v/allinsn.exp @@ -1,5 +1,7 @@ # d10v simulator testsuite. +sim_init + if [istarget d10v*-*] { # all machines set all_machs "d10v" diff --git a/sim/testsuite/example-synacor/allinsn.exp b/sim/testsuite/example-synacor/allinsn.exp index 4c8f653..2f1fc74 100644 --- a/sim/testsuite/example-synacor/allinsn.exp +++ b/sim/testsuite/example-synacor/allinsn.exp @@ -1,5 +1,7 @@ # Example synacor simulator testsuite. +sim_init + if [istarget *] { # All machines. set all_machs "example" diff --git a/sim/testsuite/frv/allinsn.exp b/sim/testsuite/frv/allinsn.exp index 1781bf0..dea8041 100644 --- a/sim/testsuite/frv/allinsn.exp +++ b/sim/testsuite/frv/allinsn.exp @@ -1,5 +1,7 @@ # FRV simulator testsuite. +sim_init + if [istarget frv*-*] { # all machines set all_machs "frv fr500 fr550 fr400 fr405 fr450" diff --git a/sim/testsuite/frv/fr400/allinsn.exp b/sim/testsuite/frv/fr400/allinsn.exp index 03ccbd6..ed501e5 100644 --- a/sim/testsuite/frv/fr400/allinsn.exp +++ b/sim/testsuite/frv/fr400/allinsn.exp @@ -1,5 +1,7 @@ # FRV simulator testsuite. +sim_init + if [istarget frv*-*] { # all machines set all_machs "fr400 fr405 fr450 fr550" diff --git a/sim/testsuite/frv/fr500/allinsn.exp b/sim/testsuite/frv/fr500/allinsn.exp index fa03797..40d81d9 100644 --- a/sim/testsuite/frv/fr500/allinsn.exp +++ b/sim/testsuite/frv/fr500/allinsn.exp @@ -1,5 +1,7 @@ # FRV simulator testsuite. +sim_init + if [istarget frv*-*] { # all machines set all_machs "frv fr500 fr550" diff --git a/sim/testsuite/frv/fr550/allinsn.exp b/sim/testsuite/frv/fr550/allinsn.exp index c0e373a..91948be 100644 --- a/sim/testsuite/frv/fr550/allinsn.exp +++ b/sim/testsuite/frv/fr550/allinsn.exp @@ -1,5 +1,7 @@ # FRV simulator testsuite. +sim_init + if [istarget frv*-*] { # all machines set all_machs "fr550" diff --git a/sim/testsuite/frv/interrupts.exp b/sim/testsuite/frv/interrupts.exp index 6b2c84a..38c2f41 100644 --- a/sim/testsuite/frv/interrupts.exp +++ b/sim/testsuite/frv/interrupts.exp @@ -1,5 +1,7 @@ # FRV simulator testsuite. +sim_init + if [istarget frv*-*] { # all machines set all_machs "frv fr500 fr550 fr400" diff --git a/sim/testsuite/frv/misc.exp b/sim/testsuite/frv/misc.exp index fb394bb..2025935 100644 --- a/sim/testsuite/frv/misc.exp +++ b/sim/testsuite/frv/misc.exp @@ -1,5 +1,7 @@ # Miscellaneous FRV simulator testcases. +sim_init + if [istarget frv*-*] { # all machines set all_machs "frv fr500 fr550 fr400 fr405 fr450" diff --git a/sim/testsuite/frv/parallel.exp b/sim/testsuite/frv/parallel.exp index 612a1bf..2fcc652 100644 --- a/sim/testsuite/frv/parallel.exp +++ b/sim/testsuite/frv/parallel.exp @@ -1,5 +1,7 @@ # FRV simulator testsuite. +sim_init + if [istarget frv*-*] { # all machines set all_machs "frv fr500 fr550 fr400" diff --git a/sim/testsuite/ft32/allinsn.exp b/sim/testsuite/ft32/allinsn.exp index 730b422..6958f06 100644 --- a/sim/testsuite/ft32/allinsn.exp +++ b/sim/testsuite/ft32/allinsn.exp @@ -1,5 +1,7 @@ # ft32 simulator testsuite +sim_init + if [istarget ft32-*] { # all machines set all_machs "ft32" diff --git a/sim/testsuite/h8300/allinsn.exp b/sim/testsuite/h8300/allinsn.exp index 68468f6..df4d02a 100644 --- a/sim/testsuite/h8300/allinsn.exp +++ b/sim/testsuite/h8300/allinsn.exp @@ -1,5 +1,7 @@ # Hitachi H8/300 (h, s, sx) simulator testsuite +sim_init + if {[istarget h8300*-*-*] || [istarget h8sx*-*-*]} then { set all_machs "h8300 h8300h h8300s h8sx" diff --git a/sim/testsuite/iq2000/allinsn.exp b/sim/testsuite/iq2000/allinsn.exp index 38eee9b..c6a83a0 100644 --- a/sim/testsuite/iq2000/allinsn.exp +++ b/sim/testsuite/iq2000/allinsn.exp @@ -1,5 +1,7 @@ # iq2000 simulator testsuite +sim_init + if [istarget iq2000-*] { # all machines set all_machs "iq2000" diff --git a/sim/testsuite/lib/sim-defs.exp b/sim/testsuite/lib/sim-defs.exp index 405f1b7..46a8b3f 100644 --- a/sim/testsuite/lib/sim-defs.exp +++ b/sim/testsuite/lib/sim-defs.exp @@ -7,12 +7,22 @@ set sim_path "unknown-run" # Initialize the testrun. -# Required by dejagnu. +# +# Normally dejagnu will execute ${tool}_init automatically, but since we set +# --tool '' (for a simpler testsuite/ layout), we have each test call this +# itself. proc sim_init { args } { + global builddir + global subdir global sim_path - set sim_path [board_info target sim] - # Need to return an empty string (copied from GAS). + + # Find the path to the simulator for executing. + set arch "$subdir" + while { [file dirname $arch] != "." } { + set arch [file dirname $arch] + } + set sim_path "$builddir/$arch/run" # As gross as it is, we unset the linker script specified by the target # board. The simulator board file mips-sim.exp, sets ldscript to the @@ -23,6 +33,8 @@ proc sim_init { args } { # all simulators. unset_currtarget_info ldscript + # Need to return an empty string. This tells dejagnu to *not* re-run us + # with the exact test that we're about to run. return "" } @@ -35,22 +47,6 @@ proc sim_version {} { clone_output "$sim_path $version\n" } -# Find the path to the simulator for executing. -proc sim_tool_path {} { - global sim_path - set sim "$sim_path" - if [string equal "" $sim] { - global builddir - global subdir - set arch "$subdir" - while { [file dirname $arch] != "." } { - set arch [file dirname $arch] - } - return "$builddir/$arch/run" - } - return "$sim" -} - # Run a program on the simulator. # Required by dejagnu (at least ${tool}_run used to be). # @@ -73,6 +69,8 @@ proc sim_tool_path {} { # simulator (not the simulated program, the simulator) with sim_load. proc sim_run { prog sim_opts prog_opts redir options } { + global sim_path + # Set the default value of the timeout. # FIXME: The timeout value we actually want is a function of # host, target, and testcase. @@ -99,7 +97,7 @@ proc sim_run { prog sim_opts prog_opts redir options } { verbose "testcase timeout is set to $testcase_timeout" 1 - set sim [sim_tool_path] + set sim $sim_path if [is_remote host] { set prog [remote_download host $prog] @@ -182,13 +180,14 @@ proc sim_run { prog sim_opts prog_opts redir options } { proc run_sim_test { name requested_machs } { global subdir srcdir objdir + global sim_path global opts global cpu_option global cpu_option_sep global SIMFLAGS_FOR_TARGET - if ![file exists [sim_tool_path]] { - unsupported "$name: missing simulator [sim_tool_path]" + if ![file exists $sim_path] { + unsupported "$name: missing simulator $sim_path" return } diff --git a/sim/testsuite/lm32/allinsn.exp b/sim/testsuite/lm32/allinsn.exp index 6174498..c3e70b2 100644 --- a/sim/testsuite/lm32/allinsn.exp +++ b/sim/testsuite/lm32/allinsn.exp @@ -1,5 +1,7 @@ # lm32 simulator testsuite +sim_init + if [istarget lm32-*] { # all machines set all_machs "lm32" diff --git a/sim/testsuite/m32c/allinsn.exp b/sim/testsuite/m32c/allinsn.exp index fb5ccca..045cc7e 100644 --- a/sim/testsuite/m32c/allinsn.exp +++ b/sim/testsuite/m32c/allinsn.exp @@ -1,6 +1,8 @@ # M32C simulator testsuite. # TODO: Add support for .c tests. +sim_init + if [istarget m32c*-*-*] { # all machines set all_machs "m32c" diff --git a/sim/testsuite/m32r/allinsn.exp b/sim/testsuite/m32r/allinsn.exp index 17a8618..1461134 100644 --- a/sim/testsuite/m32r/allinsn.exp +++ b/sim/testsuite/m32r/allinsn.exp @@ -1,5 +1,7 @@ # M32R simulator testsuite. +sim_init + if [istarget m32r*-*-*] { # all machines set all_machs "m32r" diff --git a/sim/testsuite/m32r/misc.exp b/sim/testsuite/m32r/misc.exp index 6c624e7..d45e119 100644 --- a/sim/testsuite/m32r/misc.exp +++ b/sim/testsuite/m32r/misc.exp @@ -1,5 +1,7 @@ # Miscellaneous M32R simulator testcases +sim_init + if [istarget m32r*-*-*] { # all machines set all_machs "m32r" diff --git a/sim/testsuite/m68hc11/allinsn.exp b/sim/testsuite/m68hc11/allinsn.exp index db0cbd5..710af98 100644 --- a/sim/testsuite/m68hc11/allinsn.exp +++ b/sim/testsuite/m68hc11/allinsn.exp @@ -1,5 +1,7 @@ # m68hc11 simulator testsuite +sim_init + if [istarget m68hc11-*] { # all machines set all_machs "m68hc11" diff --git a/sim/testsuite/mcore/allinsn.exp b/sim/testsuite/mcore/allinsn.exp index 5921cfc..6463ac2 100644 --- a/sim/testsuite/mcore/allinsn.exp +++ b/sim/testsuite/mcore/allinsn.exp @@ -1,5 +1,7 @@ # mcore simulator testsuite +sim_init + if [istarget mcore-*] { # all machines set all_machs "mcore" diff --git a/sim/testsuite/microblaze/allinsn.exp b/sim/testsuite/microblaze/allinsn.exp index f756914..f3662c2 100644 --- a/sim/testsuite/microblaze/allinsn.exp +++ b/sim/testsuite/microblaze/allinsn.exp @@ -1,5 +1,7 @@ # microblaze simulator testsuite +sim_init + if [istarget microblaze-*] { # all machines set all_machs "microblaze" diff --git a/sim/testsuite/mips/basic.exp b/sim/testsuite/mips/basic.exp index ff96a68..1509492 100644 --- a/sim/testsuite/mips/basic.exp +++ b/sim/testsuite/mips/basic.exp @@ -1,5 +1,7 @@ # MIPS simulator instruction tests +sim_init + # Do "run_sim_test TESTFILE MODELS" for each combination of the # mf{lo,hi} -> mult/div/mt{lo,hi} hazard described in mips.igen. # Insert NOPS nops after the mflo or mfhi. diff --git a/sim/testsuite/mn10300/allinsn.exp b/sim/testsuite/mn10300/allinsn.exp index f8431e7..2eaf249 100644 --- a/sim/testsuite/mn10300/allinsn.exp +++ b/sim/testsuite/mn10300/allinsn.exp @@ -1,5 +1,7 @@ # mn10300 simulator testsuite +sim_init + if [istarget mn10300-*] { # all machines set all_machs "mn10300" diff --git a/sim/testsuite/moxie/allinsn.exp b/sim/testsuite/moxie/allinsn.exp index 1a6af8b..d534085 100644 --- a/sim/testsuite/moxie/allinsn.exp +++ b/sim/testsuite/moxie/allinsn.exp @@ -1,5 +1,7 @@ # moxie simulator testsuite +sim_init + if [istarget moxie-*] { # all machines set all_machs "moxie" diff --git a/sim/testsuite/msp430/allinsn.exp b/sim/testsuite/msp430/allinsn.exp index affa8ae..c7da3c5 100644 --- a/sim/testsuite/msp430/allinsn.exp +++ b/sim/testsuite/msp430/allinsn.exp @@ -1,5 +1,7 @@ # msp430 simulator testsuite +sim_init + if [istarget msp430-*] { # all machines set all_machs "msp430" diff --git a/sim/testsuite/or1k/alltests.exp b/sim/testsuite/or1k/alltests.exp index 701cca6..6f4238d 100644 --- a/sim/testsuite/or1k/alltests.exp +++ b/sim/testsuite/or1k/alltests.exp @@ -15,6 +15,8 @@ # You should have received a copy of the GNU General Public License # along with this program. If not, see <http://www.gnu.org/licenses/>. +sim_init + if [istarget or1k*-*-*] { set all_machs "or1k" diff --git a/sim/testsuite/pru/allinsn.exp b/sim/testsuite/pru/allinsn.exp index d147f73..b71a387 100644 --- a/sim/testsuite/pru/allinsn.exp +++ b/sim/testsuite/pru/allinsn.exp @@ -18,6 +18,8 @@ # You should have received a copy of the GNU General Public License # along with this program. If not, see <http://www.gnu.org/licenses/>. +sim_init + if [istarget pru-*] { # all machines set all_machs "pru" diff --git a/sim/testsuite/riscv/allinsn.exp b/sim/testsuite/riscv/allinsn.exp index 03bec1b..bdf9299 100644 --- a/sim/testsuite/riscv/allinsn.exp +++ b/sim/testsuite/riscv/allinsn.exp @@ -1,5 +1,7 @@ # RISC-V simulator testsuite. +sim_init + if [istarget riscv*-*] { # all machines set all_machs "riscv" diff --git a/sim/testsuite/sh/allinsn.exp b/sim/testsuite/sh/allinsn.exp index 05a28e0..ceed950 100644 --- a/sim/testsuite/sh/allinsn.exp +++ b/sim/testsuite/sh/allinsn.exp @@ -1,5 +1,7 @@ # sh tests +sim_init + set all_machs "sh shdsp" global ASFLAGS_FOR_TARGET diff --git a/sim/testsuite/v850/allinsns.exp b/sim/testsuite/v850/allinsns.exp index 2dc8d60..c4c15b0 100644 --- a/sim/testsuite/v850/allinsns.exp +++ b/sim/testsuite/v850/allinsns.exp @@ -1,5 +1,7 @@ # v850 simulator testsuite. +sim_init + if [istarget v850*-*] { # All machines. # Should add more cpus if the testsuite adds coverage for their insns, but |