aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAlan Hayward <alan.hayward@arm.com>2019-03-28 12:27:30 +0000
committerAlan Hayward <alan.hayward@arm.com>2019-03-28 12:27:30 +0000
commitbffa1015cd6cb4a2a4bd1276ed749d150684dd5c (patch)
tree4ff1e3f204350fb5738e43ea91c891d8feb3cafb
parentfc96163a3ea7761f5353591c825027090942e330 (diff)
downloadgdb-bffa1015cd6cb4a2a4bd1276ed749d150684dd5c.zip
gdb-bffa1015cd6cb4a2a4bd1276ed749d150684dd5c.tar.gz
gdb-bffa1015cd6cb4a2a4bd1276ed749d150684dd5c.tar.bz2
AArch64: View the pseudo V registers as vectors
When SVE is enabled, the V registers become pseudo registers based on the Z registers. They should look the same as they do when there is no SVE. The existing code viewed them as single value registers. Switch this to a vector. gdb/ChangeLog: * aarch64-tdep.c (aarch64_vnv_type): Use vector types.
-rw-r--r--gdb/ChangeLog4
-rw-r--r--gdb/aarch64-tdep.c53
2 files changed, 52 insertions, 5 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 0a1a335..0bd86ee 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,5 +1,9 @@
2019-03-28 Alan Hayward <alan.hayward@arm.com>
+ * aarch64-tdep.c (aarch64_vnv_type): Use vector types.
+
+2019-03-28 Alan Hayward <alan.hayward@arm.com>
+
* features/aarch64-sve.c (create_feature_aarch64_sve): Add q view.
2019-03-24 Philippe Waroquiers <philippe.waroquiers@skynet.be>
diff --git a/gdb/aarch64-tdep.c b/gdb/aarch64-tdep.c
index 247d0ed..68b6549 100644
--- a/gdb/aarch64-tdep.c
+++ b/gdb/aarch64-tdep.c
@@ -1976,14 +1976,57 @@ aarch64_vnv_type (struct gdbarch *gdbarch)
if (tdep->vnv_type == NULL)
{
+ /* The other AArch64 psuedo registers (Q,D,H,S,B) refer to a single value
+ slice from the non-pseudo vector registers. However NEON V registers
+ are always vector registers, and need constructing as such. */
+ const struct builtin_type *bt = builtin_type (gdbarch);
+
struct type *t = arch_composite_type (gdbarch, "__gdb_builtin_type_vnv",
TYPE_CODE_UNION);
- append_composite_type_field (t, "d", aarch64_vnd_type (gdbarch));
- append_composite_type_field (t, "s", aarch64_vns_type (gdbarch));
- append_composite_type_field (t, "h", aarch64_vnh_type (gdbarch));
- append_composite_type_field (t, "b", aarch64_vnb_type (gdbarch));
- append_composite_type_field (t, "q", aarch64_vnq_type (gdbarch));
+ struct type *sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vnd",
+ TYPE_CODE_UNION);
+ append_composite_type_field (sub, "f",
+ init_vector_type (bt->builtin_double, 2));
+ append_composite_type_field (sub, "u",
+ init_vector_type (bt->builtin_uint64, 2));
+ append_composite_type_field (sub, "s",
+ init_vector_type (bt->builtin_int64, 2));
+ append_composite_type_field (t, "d", sub);
+
+ sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vns",
+ TYPE_CODE_UNION);
+ append_composite_type_field (sub, "f",
+ init_vector_type (bt->builtin_float, 4));
+ append_composite_type_field (sub, "u",
+ init_vector_type (bt->builtin_uint32, 4));
+ append_composite_type_field (sub, "s",
+ init_vector_type (bt->builtin_int32, 4));
+ append_composite_type_field (t, "s", sub);
+
+ sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vnh",
+ TYPE_CODE_UNION);
+ append_composite_type_field (sub, "u",
+ init_vector_type (bt->builtin_uint16, 8));
+ append_composite_type_field (sub, "s",
+ init_vector_type (bt->builtin_int16, 8));
+ append_composite_type_field (t, "h", sub);
+
+ sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vnb",
+ TYPE_CODE_UNION);
+ append_composite_type_field (sub, "u",
+ init_vector_type (bt->builtin_uint8, 16));
+ append_composite_type_field (sub, "s",
+ init_vector_type (bt->builtin_int8, 16));
+ append_composite_type_field (t, "b", sub);
+
+ sub = arch_composite_type (gdbarch, "__gdb_builtin_type_vnq",
+ TYPE_CODE_UNION);
+ append_composite_type_field (sub, "u",
+ init_vector_type (bt->builtin_uint128, 1));
+ append_composite_type_field (sub, "s",
+ init_vector_type (bt->builtin_int128, 1));
+ append_composite_type_field (t, "q", sub);
tdep->vnv_type = t;
}