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authorAdam Nemet <anemet@caviumnetworks.com>2008-05-29 16:03:41 +0000
committerAdam Nemet <anemet@caviumnetworks.com>2008-05-29 16:03:41 +0000
commitb15591bb36cc0a263f3fa2e8cdd20021fd4a26fc (patch)
tree08b6fc857a6de810cd53fe5ac0087b904dbc7475
parent7ea566bee7efd9a4249255fdda3c3a8e6445396e (diff)
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* config/tc-mips.c (mips_cpu_info_table): Move records for
ST Loongson-2E/2F processors to a better place.
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-mips.c7
2 files changed, 8 insertions, 4 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 44319fe..74be89b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2008-05-29 Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Move records for
+ ST Loongson-2E/2F processors to a better place.
+
2008-05-23 H.J. Lu <hongjiu.lu@intel.com>
PR gas/6518
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 1cac610..484f5b4 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -14829,6 +14829,9 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
{ "r4600", 0, ISA_MIPS3, CPU_R4600 },
{ "orion", 0, ISA_MIPS3, CPU_R4600 },
{ "r4650", 0, ISA_MIPS3, CPU_R4650 },
+ /* ST Microelectronics Loongson 2E and 2F cores */
+ { "loongson2e", 0, ISA_MIPS3, CPU_LOONGSON_2E },
+ { "loongson2f", 0, ISA_MIPS3, CPU_LOONGSON_2F },
/* MIPS IV */
{ "r8000", 0, ISA_MIPS4, CPU_R8000 },
@@ -14919,10 +14922,6 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
{ "sb1a", MIPS_CPU_ASE_MIPS3D | MIPS_CPU_ASE_MDMX,
ISA_MIPS64, CPU_SB1 },
- /* ST Microelectronics Loongson 2E and 2F cores */
- { "loongson2e", 0, ISA_MIPS3, CPU_LOONGSON_2E },
- { "loongson2f", 0, ISA_MIPS3, CPU_LOONGSON_2F },
-
/* Cavium Networks Octeon CPU core */
{ "octeon", 0, ISA_MIPS64R2, CPU_OCTEON },