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authorAndrew Bennett <andrew.bennett@imgtec.com>2015-03-12 16:27:46 +0000
committerAndrew Bennett <andrew.bennett@imgtec.com>2015-03-12 16:37:09 +0000
commit7ef0d2976a57c6cfde60281d67111969d7285d65 (patch)
treebca853847be77ea7ce27591b2277b8411e2e53c4
parent93ef582debb0a179916965a882f4344223569219 (diff)
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Add i6400 entry to the MIPS CPU table.
gas/ * config/tc-mips.c (mips_cpu_info_table): Add i6400 entry. * doc/c-mips.texi: Document i6400 -march option.
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-mips.c3
-rw-r--r--gas/doc/c-mips.texi1
3 files changed, 9 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 36f0f32..eef846c 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2015-03-12 Andrew Bennett <andrew.bennett@imgtec.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Add i6400 entry.
+ * doc/c-mips.texi: Document i6400 -march option.
+
2015-03-12 Nick Clifton <nickc@redhat.com>
PR gas/17444
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index af18430..e61bb4d 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -18686,6 +18686,9 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
MIPS64R2 rather than MIPS64. */
{ "xlp", 0, 0, ISA_MIPS64R2, CPU_XLR },
+ /* i6400. */
+ { "i6400", 0, ASE_MSA, ISA_MIPS64R6, CPU_MIPS64R6},
+
/* End marker */
{ NULL, 0, 0, 0, 0 }
};
diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi
index 1cee3a5..f72db68 100644
--- a/gas/doc/c-mips.texi
+++ b/gas/doc/c-mips.texi
@@ -376,6 +376,7 @@ p5600,
25kf,
sb1,
sb1a,
+i6400,
loongson2e,
loongson2f,
loongson3a,