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| author | H.J. Lu <hjl.tools@gmail.com> | 2018-07-20 12:47:25 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2018-07-20 12:55:14 -0700 |
| commit | 7a54636a02e089436f69446a631451593ffeca30 (patch) | |
| tree | 064eba06036d7c4ab03e5df4aaad47d6306327f1 | |
| parent | d5f4da5e334dc4d87d7751a816c15d2bf4db3d43 (diff) | |
| download | gdb-7a54636a02e089436f69446a631451593ffeca30.zip gdb-7a54636a02e089436f69446a631451593ffeca30.tar.gz gdb-7a54636a02e089436f69446a631451593ffeca30.tar.bz2 | |
x86: Rename match_reg_size to match_operand_size
match_reg_size checks size for both memory and register operands. This
patch renamed match_reg_size to match_operand_size and updated comments
for
commit 3ac21baa8498d3aa9951f79e2c3336d532eeff7b
Author: Jan Beulich <jbeulich@novell.com>
Date: Mon Jul 16 08:19:21 2018 +0200
x86: fix operand size checking
which added one argument to match_reg_size, match_simd_size and
match_mem_size.
* config/tc-i386.c (match_reg_size): Renamed to ...
(match_operand_size): This. Update comments.
(match_simd_size): Update comments. Replace match_reg_size
with match_operand_size.
(match_mem_size): Likewise.
(operand_size_match): Replace match_reg_size with
match_operand_size.
| -rw-r--r-- | gas/ChangeLog | 10 | ||||
| -rw-r--r-- | gas/config/tc-i386.c | 23 |
2 files changed, 22 insertions, 11 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index a612f71..bee9664 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,13 @@ +2018-07-20 H.J. Lu <hongjiu.lu@intel.com> + + * config/tc-i386.c (match_reg_size): Renamed to ... + (match_operand_size): This. Update comments. + (match_simd_size): Update comments. Replace match_reg_size + with match_operand_size. + (match_mem_size): Likewise. + (operand_size_match): Replace match_reg_size with + match_operand_size. + 2018-07-20 Chenghua Xu <paul.hua.gm@gmail.com> Maciej W. Rozycki <macro@mips.com> diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 41f701c..02de778 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -1897,11 +1897,12 @@ operand_type_check (i386_operand_type t, enum operand_type c) return 0; } -/* Return 1 if there is no conflict in 8bit/16bit/32bit/64bit/80bit on - operand J for instruction template T. */ +/* Return 1 if there is no conflict in 8bit/16bit/32bit/64bit/80bit size + between operand GIVEN and opeand WANTED for instruction template T. */ static INLINE int -match_reg_size (const insn_template *t, unsigned int wanted, unsigned int given) +match_operand_size (const insn_template *t, unsigned int wanted, + unsigned int given) { return !((i.types[given].bitfield.byte && !t->operand_types[wanted].bitfield.byte) @@ -1915,8 +1916,8 @@ match_reg_size (const insn_template *t, unsigned int wanted, unsigned int given) && !t->operand_types[wanted].bitfield.tbyte)); } -/* Return 1 if there is no conflict in SIMD register on - operand J for instruction template T. */ +/* Return 1 if there is no conflict in SIMD register between operand GIVEN + and opeand WANTED for instruction template T. */ static INLINE int match_simd_size (const insn_template *t, unsigned int wanted, unsigned int given) @@ -1929,13 +1930,13 @@ match_simd_size (const insn_template *t, unsigned int wanted, unsigned int given && !t->operand_types[wanted].bitfield.zmmword)); } -/* Return 1 if there is no conflict in any size on operand J for - instruction template T. */ +/* Return 1 if there is no conflict in any size between operand GIVEN + and opeand WANTED for instruction template T. */ static INLINE int match_mem_size (const insn_template *t, unsigned int wanted, unsigned int given) { - return (match_reg_size (t, wanted, given) + return (match_operand_size (t, wanted, given) && !((i.types[given].bitfield.unspecified && !i.broadcast && !t->operand_types[wanted].bitfield.unspecified) @@ -1985,7 +1986,7 @@ operand_size_match (const insn_template *t) continue; if (t->operand_types[j].bitfield.reg - && !match_reg_size (t, j, j)) + && !match_operand_size (t, j, j)) { match = 0; break; @@ -1999,7 +2000,7 @@ operand_size_match (const insn_template *t) } if (t->operand_types[j].bitfield.acc - && (!match_reg_size (t, j, j) || !match_simd_size (t, j, j))) + && (!match_operand_size (t, j, j) || !match_simd_size (t, j, j))) { match = 0; break; @@ -2027,7 +2028,7 @@ mismatch: { if ((t->operand_types[j].bitfield.reg || t->operand_types[j].bitfield.acc) - && !match_reg_size (t, j, !j)) + && !match_operand_size (t, j, !j)) goto mismatch; if (i.types[!j].bitfield.mem |