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authorJan Beulich <jbeulich@suse.com>2023-11-17 11:20:06 +0100
committerJan Beulich <jbeulich@suse.com>2023-11-17 11:20:06 +0100
commit742b55c7364c2cc9fbbec98e0db2adac498c5ab8 (patch)
tree7dfd0a514139e17a0372b3df6e05615f0f247d09
parent580a53dab47c9e4f97c8559440d2bc43fb7331b6 (diff)
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x86-64: extend expected-size check in check_qword_reg()
Due to a missing check "crc32q %al, %rax" was wrongly translated to the encoding of "crc32q %rax, %rax", rather than being rejected as invalid. (The mnemonic suffix describes the source operand, not the destination one.) Note that check_{word,long}_reg() do not (currently) appear to require similar amending, as there are no insn templates permitting an L or W suffix and having an operand which allows for Reg8 and Reg64, but neither Reg16 nor Reg32.
-rw-r--r--gas/config/tc-i386.c3
-rw-r--r--gas/testsuite/gas/i386/x86-64-inval-crc32.l40
-rw-r--r--gas/testsuite/gas/i386/x86-64-inval-crc32.s2
3 files changed, 26 insertions, 19 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 235e41e..6dcdccb 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -8151,7 +8151,8 @@ check_qword_reg (void)
&& (i.tm.operand_types[op].bitfield.class == Reg
|| i.tm.operand_types[op].bitfield.instance == Accum)
&& (i.tm.operand_types[op].bitfield.word
- || i.tm.operand_types[op].bitfield.dword))
+ || i.tm.operand_types[op].bitfield.dword
+ || i.tm.operand_types[op].bitfield.qword))
{
as_bad (_("`%s%s' not allowed with `%s%c'"),
register_prefix,
diff --git a/gas/testsuite/gas/i386/x86-64-inval-crc32.l b/gas/testsuite/gas/i386/x86-64-inval-crc32.l
index 4c3d418..260f4e7 100644
--- a/gas/testsuite/gas/i386/x86-64-inval-crc32.l
+++ b/gas/testsuite/gas/i386/x86-64-inval-crc32.l
@@ -15,8 +15,8 @@
.*:19: Error: .*
.*:20: Error: .*
.*:21: Error: .*
-.*:24: Error: .*
-.*:25: Error: .*
+.*:22: Error: .*
+.*:23: Error: .*
.*:26: Error: .*
.*:27: Error: .*
.*:28: Error: .*
@@ -26,6 +26,8 @@
.*:32: Error: .*
.*:33: Error: .*
.*:34: Error: .*
+.*:35: Error: .*
+.*:36: Error: .*
GAS LISTING .*
@@ -52,20 +54,22 @@ GAS LISTING .*
[ ]*17[ ]+crc32 %eax, %rax
[ ]*18[ ]+crc32l %rax, %eax
[ ]*19[ ]+crc32l %eax, %rax
-[ ]*20[ ]+crc32q %eax, %rax
-[ ]*21[ ]+crc32q %rax, %eax
-[ ]*22[ ]+
-[ ]*23[ ]+\.intel_syntax noprefix
-[ ]*24[ ]+crc32 al,byte ptr \[rsi\]
-[ ]*25[ ]+crc32 ax, word ptr \[rsi\]
-[ ]*26[ ]+crc32 rax,word ptr \[rsi\]
-[ ]*27[ ]+crc32 rax,dword ptr \[rsi\]
-[ ]*28[ ]+crc32 al,\[rsi\]
-[ ]*29[ ]+crc32 ax,\[rsi\]
-[ ]*30[ ]+crc32 eax,\[rsi\]
-[ ]*31[ ]+crc32 rax,\[rsi\]
-[ ]*32[ ]+crc32 al,al
-[ ]*33[ ]+crc32 ax, ax
-[ ]*34[ ]+crc32 rax,eax
-[ ]*35[ ]*
+[ ]*[0-9]+[ ]+crc32q %al, %rax
+[ ]*[0-9]+[ ]+crc32q %ax, %rax
+[ ]*[0-9]+[ ]+crc32q %eax, %rax
+[ ]*[0-9]+[ ]+crc32q %rax, %eax
+[ ]*[0-9]+[ ]+
+[ ]*[0-9]+[ ]+\.intel_syntax noprefix
+[ ]*[0-9]+[ ]+crc32 al,byte ptr \[rsi\]
+[ ]*[0-9]+[ ]+crc32 ax, word ptr \[rsi\]
+[ ]*[0-9]+[ ]+crc32 rax,word ptr \[rsi\]
+[ ]*[0-9]+[ ]+crc32 rax,dword ptr \[rsi\]
+[ ]*[0-9]+[ ]+crc32 al,\[rsi\]
+[ ]*[0-9]+[ ]+crc32 ax,\[rsi\]
+[ ]*[0-9]+[ ]+crc32 eax,\[rsi\]
+[ ]*[0-9]+[ ]+crc32 rax,\[rsi\]
+[ ]*[0-9]+[ ]+crc32 al,al
+[ ]*[0-9]+[ ]+crc32 ax, ax
+[ ]*[0-9]+[ ]+crc32 rax,eax
+[ ]*[0-9]+[ ]*
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-inval-crc32.s b/gas/testsuite/gas/i386/x86-64-inval-crc32.s
index 8f05c57..7e106c7 100644
--- a/gas/testsuite/gas/i386/x86-64-inval-crc32.s
+++ b/gas/testsuite/gas/i386/x86-64-inval-crc32.s
@@ -17,6 +17,8 @@ crc32 %rax, %eax
crc32 %eax, %rax
crc32l %rax, %eax
crc32l %eax, %rax
+crc32q %al, %rax
+crc32q %ax, %rax
crc32q %eax, %rax
crc32q %rax, %eax