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| author | H.J. Lu <hjl.tools@gmail.com> | 2007-02-05 18:22:49 +0000 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2007-02-05 18:22:49 +0000 |
| commit | 65ca155d272d69a8dbd249c54bbb41ff672ea190 (patch) | |
| tree | 8c209dbcc7049e1fbc25b4744e822fef4afcd511 | |
| parent | f1ab23406b16f148da6a95860e57cac688a2690c (diff) | |
| download | gdb-65ca155d272d69a8dbd249c54bbb41ff672ea190.zip gdb-65ca155d272d69a8dbd249c54bbb41ff672ea190.tar.gz gdb-65ca155d272d69a8dbd249c54bbb41ff672ea190.tar.bz2 | |
ld/testsuite/
2076-02-05 H.J. Lu <hongjiu.lu@intel.com>
* ld-i386/pcrel16.d: Undo the last change.
* ld-x86-64/pcrel16.d: Likewise.
opcodes/
2076-02-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_J): Undo the last change. Properly handle 64K
wrap around within the same segment in 16bit mode.
| -rw-r--r-- | ld/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | ld/testsuite/ld-i386/pcrel16.d | 2 | ||||
| -rw-r--r-- | ld/testsuite/ld-x86-64/pcrel16.d | 2 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/i386-dis.c | 16 |
5 files changed, 22 insertions, 8 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index 9814ca3..75a579d 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2076-02-05 H.J. Lu <hongjiu.lu@intel.com> + + * ld-i386/pcrel16.d: Undo the last change. + * ld-x86-64/pcrel16.d: Likewise. + 2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * ld-i386/pcrel16.d: Updated. diff --git a/ld/testsuite/ld-i386/pcrel16.d b/ld/testsuite/ld-i386/pcrel16.d index 3df4907..3d45afe 100644 --- a/ld/testsuite/ld-i386/pcrel16.d +++ b/ld/testsuite/ld-i386/pcrel16.d @@ -12,4 +12,4 @@ Disassembly of section .text: 420: cd 42[ ]+int \$0x42 422: ca 02 00[ ]+lret \$0x2 ... - f065: e9 b8 13[ ]+jmp 10420 <__bss_start\+0x3b8> + f065: e9 b8 13[ ]+jmp 420 <_start\+0x420> diff --git a/ld/testsuite/ld-x86-64/pcrel16.d b/ld/testsuite/ld-x86-64/pcrel16.d index 0ad5eef..f593657 100644 --- a/ld/testsuite/ld-x86-64/pcrel16.d +++ b/ld/testsuite/ld-x86-64/pcrel16.d @@ -12,4 +12,4 @@ Disassembly of section .text: 420: cd 42[ ]+int \$0x42 422: ca 02 00[ ]+lret \$0x2 ... - f065: e9 b8 13[ ]+jmp 10420 <_start\+0x10420> + f065: e9 b8 13[ ]+jmp 420 <_start\+0x420> diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 2321dfa..74f6d87 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2076-02-05 H.J. Lu <hongjiu.lu@intel.com> + + * i386-dis.c (OP_J): Undo the last change. Properly handle 64K + wrap around within the same segment in 16bit mode. + 2076-02-02 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_J): Mask to 16bit only if there is a data16 diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 5ecc143..509cc5d 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -4901,6 +4901,7 @@ OP_J (int bytemode, int sizeflag) { bfd_vma disp; bfd_vma mask = -1; + bfd_vma segment = 0; switch (bytemode) { @@ -4918,11 +4919,14 @@ OP_J (int bytemode, int sizeflag) disp = get16 (); if ((disp & 0x8000) != 0) disp -= 0x10000; - /* For some reason, a data16 prefix on a jump instruction - means that the pc is masked to 16 bits after the - displacement is added! */ - if ((prefixes & PREFIX_DATA) != 0) - mask = 0xffff; + /* In 16bit mode, address is wrapped around at 64k within + the same segment. Otherwise, a data16 prefix on a jump + instruction means that the pc is masked to 16 bits after + the displacement is added! */ + mask = 0xffff; + if ((prefixes & PREFIX_DATA) == 0) + segment = ((start_pc + codep - start_codep) + & ~((bfd_vma) 0xffff)); } used_prefixes |= (prefixes & PREFIX_DATA); break; @@ -4930,7 +4934,7 @@ OP_J (int bytemode, int sizeflag) oappend (INTERNAL_DISASSEMBLER_ERROR); return; } - disp = (start_pc + codep - start_codep + disp) & mask; + disp = ((start_pc + codep - start_codep + disp) & mask) | segment; set_op (disp, 0); print_operand_value (scratchbuf, 1, disp); oappend (scratchbuf); |