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authorNick Clifton <nickc@redhat.com>2003-04-01 13:08:06 +0000
committerNick Clifton <nickc@redhat.com>2003-04-01 13:08:06 +0000
commit5a6c681789fe44d0cfb3a3839aeb8a1060842c1f (patch)
tree71caa9c0f02720bfa21b4b77fcee77ef59cbdc22
parent49634642a549784aaa0d26c1442a2580b697f49b (diff)
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Fixes for iWMMXt contribution.
-rw-r--r--bfd/ChangeLog24
-rw-r--r--bfd/archures.c1
-rw-r--r--bfd/bfd-in.h10
-rw-r--r--bfd/bfd-in2.h11
-rw-r--r--bfd/coff-arm.c66
-rw-r--r--bfd/coffcode.h53
-rw-r--r--bfd/coffgen.c3
-rw-r--r--bfd/cpu-arm.c278
-rw-r--r--bfd/elf32-arm.h102
-rw-r--r--gas/ChangeLog10
-rw-r--r--gas/config/tc-arm.c436
-rw-r--r--include/elf/ChangeLog4
-rw-r--r--include/elf/arm.h2
-rw-r--r--ld/ChangeLog7
-rw-r--r--ld/emulparams/armelf.sh2
-rw-r--r--ld/emulparams/armelf_linux.sh2
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/arm-dis.c4
-rw-r--r--opcodes/arm-opc.h2
19 files changed, 651 insertions, 371 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 786e939..8ea9e6e 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,27 @@
+2003-04-01 Nick Clifton <nickc@redhat.com>
+
+ * archures.c (bfd_mach_arm_unknown): Define.
+ * bfd-in.h (bfd_arm_merge_machines, bfd_arm+update_notes,
+ bfd_arm_get_mach_from_notes): Prototype.
+ * bfd-in2.h: Regenerate.
+ * coff-arm.c (coff_arm_merge_private_bfd_data): Call
+ bfd_arm_merge_machines.
+ (coff_arm_final_link_postscript): Call bfd_arm_update_notes.
+ * coffcode.h (coff_set_arch_mach_hook): Call
+ bfd_arm_get_mach_from_notes.
+ * coffgen.c (coff_real_object_p): Revert previous delta.
+ * cpu_arm.c (arm_check_note): New function. Examine a note in a
+ .note section.
+ (bfd_arm_merge_machines): New function: Handle the merging of ARM
+ binaries compiled for different architectures..
+ (bfd_arm_update_notes): New function: Update an ARM note section.
+ (bfd_arm_get_mach_from_notes): New function: Extract a bfd machine
+ number from an ARM note section.
+ * elf32-arm.h (elf32_arm_object_p): Use
+ bfd_arm_get_mach_from_notes.
+ (elf32_arm_merge_private_bfd_data): Use bfd_arm_merge_machines.
+ (elf32_arm_final_write_processing): Use bfd_arm_update_notes.
+
2003-04-01 Ben Elliston <bje@wasabisystems.com>
* dwarf2.c (read_attribute_value): Correct typo in comment.
diff --git a/bfd/archures.c b/bfd/archures.c
index 18ebb83..28e27df 100644
--- a/bfd/archures.c
+++ b/bfd/archures.c
@@ -224,6 +224,7 @@ DESCRIPTION
.#define bfd_mach_alpha_ev5 0x20
.#define bfd_mach_alpha_ev6 0x30
. bfd_arch_arm, {* Advanced Risc Machines ARM. *}
+.#define bfd_mach_arm_unknown 0
.#define bfd_mach_arm_2 1
.#define bfd_mach_arm_2a 2
.#define bfd_mach_arm_3 3
diff --git a/bfd/bfd-in.h b/bfd/bfd-in.h
index 917b46f..c39bfedd 100644
--- a/bfd/bfd-in.h
+++ b/bfd/bfd-in.h
@@ -835,6 +835,16 @@ extern bfd_boolean bfd_elf32_arm_get_bfd_for_interworking
extern bfd_boolean bfd_elf32_arm_add_glue_sections_to_bfd
PARAMS ((bfd *, struct bfd_link_info *));
+/* ARM Note section processing. */
+extern bfd_boolean bfd_arm_merge_machines
+ PARAMS ((bfd *, bfd *));
+
+extern bfd_boolean bfd_arm_update_notes
+ PARAMS ((bfd *, const char *));
+
+extern unsigned int bfd_arm_get_mach_from_notes
+ PARAMS ((bfd *, const char *));
+
/* TI COFF load page support. */
extern void bfd_ticoff_set_section_load_page
PARAMS ((struct sec *, int));
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 51e2a21..d15bcda 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -842,6 +842,16 @@ extern bfd_boolean bfd_elf32_arm_get_bfd_for_interworking
extern bfd_boolean bfd_elf32_arm_add_glue_sections_to_bfd
PARAMS ((bfd *, struct bfd_link_info *));
+/* ARM Note section processing. */
+extern bfd_boolean bfd_arm_merge_machines
+ PARAMS ((bfd *, bfd *));
+
+extern bfd_boolean bfd_arm_update_notes
+ PARAMS ((bfd *, const char *));
+
+extern unsigned int bfd_arm_get_mach_from_notes
+ PARAMS ((bfd *, const char *));
+
/* TI COFF load page support. */
extern void bfd_ticoff_set_section_load_page
PARAMS ((struct sec *, int));
@@ -1680,6 +1690,7 @@ enum bfd_architecture
#define bfd_mach_alpha_ev5 0x20
#define bfd_mach_alpha_ev6 0x30
bfd_arch_arm, /* Advanced Risc Machines ARM. */
+#define bfd_mach_arm_unknown 0
#define bfd_mach_arm_2 1
#define bfd_mach_arm_2a 2
#define bfd_mach_arm_3 3
diff --git a/bfd/coff-arm.c b/bfd/coff-arm.c
index 2401504..f089a6c 100644
--- a/bfd/coff-arm.c
+++ b/bfd/coff-arm.c
@@ -2240,25 +2240,6 @@ coff_arm_merge_private_bfd_data (ibfd, obfd)
if (ibfd == obfd)
return TRUE;
- if (bfd_get_mach (obfd) && bfd_get_mach (obfd) != bfd_get_mach (ibfd))
- {
- /* For now, allow an output file type of 'xscale' if the
- input file type is 'iWMMXt'. This means that we will
- not have to build an entire iWMMXt enabled set of libraries
- just to test a iWMMXt enabled binary. Change the output
- type to iWMMXt though. Similarly allow 'xscale' binaries
- to be linked into a 'iWMMXt' output binary. */
- if ( bfd_get_mach (obfd) == bfd_mach_arm_XScale
- && bfd_get_mach (ibfd) == bfd_mach_arm_iWMMXt)
- bfd_set_arch_mach (obfd, bfd_get_arch (obfd), bfd_mach_arm_iWMMXt);
- else if ( bfd_get_mach (ibfd) != bfd_mach_arm_XScale
- || bfd_get_mach (obfd) != bfd_mach_arm_iWMMXt)
- {
- bfd_set_error (bfd_error_wrong_format);
- return FALSE;
- }
- }
-
/* If the two formats are different we cannot merge anything.
This is not an error, since it is permissable to change the
input and output formats. */
@@ -2266,7 +2247,12 @@ coff_arm_merge_private_bfd_data (ibfd, obfd)
|| obfd->xvec->flavour != bfd_target_coff_flavour)
return TRUE;
- /* Verify that the APCS is the same for the two BFDs */
+ /* Determine what should happen if the input ARM architecture
+ does not match the output ARM architecture. */
+ if (! bfd_arm_merge_machines (ibfd, obfd))
+ return FALSE;
+
+ /* Verify that the APCS is the same for the two BFDs. */
if (APCS_SET (ibfd))
{
if (APCS_SET (obfd))
@@ -2603,45 +2589,7 @@ coff_arm_final_link_postscript (abfd, pfinfo)
globals->bfd_of_glue_owner->output_has_begun = TRUE;
}
- {
- asection * arm_arch_section;
-
- /* Look for a .note section. If one is present check
- the machine number encoded in it, and set it to the current
- machine number if it is different. This allows XScale and
- iWMMXt binaries to be merged and the resulting output to be set
- to iWMMXt, even if the first input file had an XScale .note. */
-
- arm_arch_section = bfd_get_section_by_name (abfd, ".note");
-
- if (arm_arch_section != NULL)
- {
- char buffer [4];
-
- if (bfd_get_section_contents (abfd, arm_arch_section, buffer,
- (file_ptr) 0, sizeof buffer))
- {
- unsigned long arm_mach;
-
- /* We have to extract the value this way to allow for a
- host whose endian-ness is different from the target. */
- arm_mach = bfd_get_32 (abfd, buffer);
-
- if (arm_mach != bfd_get_mach (abfd))
- {
- bfd_put_32 (abfd, bfd_get_mach (abfd), buffer);
-
- if (! bfd_set_section_contents (abfd, arm_arch_section, buffer,
- (file_ptr) 0, sizeof buffer))
- (*_bfd_error_handler)
- (_("warning: unable to update contents of .note section in %s"),
- bfd_get_filename (abfd));
- }
- }
- }
- }
-
- return TRUE;
+ return bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
}
#include "coffcode.h"
diff --git a/bfd/coffcode.h b/bfd/coffcode.h
index da8121f..5c6c286 100644
--- a/bfd/coffcode.h
+++ b/bfd/coffcode.h
@@ -1883,43 +1883,26 @@ coff_set_arch_mach_hook (abfd, filehdr)
case ARMPEMAGIC:
case THUMBPEMAGIC:
arch = bfd_arch_arm;
- switch (internal_f->f_flags & F_ARM_ARCHITECTURE_MASK)
+ machine = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
+ if (machine == bfd_mach_arm_unknown)
{
- case F_ARM_2: machine = bfd_mach_arm_2; break;
- case F_ARM_2a: machine = bfd_mach_arm_2a; break;
- case F_ARM_3: machine = bfd_mach_arm_3; break;
- default:
- case F_ARM_3M: machine = bfd_mach_arm_3M; break;
- case F_ARM_4: machine = bfd_mach_arm_4; break;
- case F_ARM_4T: machine = bfd_mach_arm_4T; break;
- /* The COFF header does not have enough bits available
- to cover all the different ARM architectures. So
- we interpret F_ARM_5, the highest flag value to mean
- "the highest ARM architecture known to BFD" which is
- currently the XScale. */
- case F_ARM_5: machine = bfd_mach_arm_XScale; break;
+ switch (internal_f->f_flags & F_ARM_ARCHITECTURE_MASK)
+ {
+ case F_ARM_2: machine = bfd_mach_arm_2; break;
+ case F_ARM_2a: machine = bfd_mach_arm_2a; break;
+ case F_ARM_3: machine = bfd_mach_arm_3; break;
+ default:
+ case F_ARM_3M: machine = bfd_mach_arm_3M; break;
+ case F_ARM_4: machine = bfd_mach_arm_4; break;
+ case F_ARM_4T: machine = bfd_mach_arm_4T; break;
+ /* The COFF header does not have enough bits available
+ to cover all the different ARM architectures. So
+ we interpret F_ARM_5, the highest flag value to mean
+ "the highest ARM architecture known to BFD" which is
+ currently the XScale. */
+ case F_ARM_5: machine = bfd_mach_arm_XScale; break;
+ }
}
-
- {
- asection * arm_arch_section;
-
- arm_arch_section = bfd_get_section_by_name (abfd, ".note");
-
- if (arm_arch_section)
- {
- bfd_byte buffer [4];
-
- if (! bfd_get_section_contents (abfd, arm_arch_section, buffer,
- (file_ptr) 0, sizeof buffer))
- (*_bfd_error_handler)
- (_("%s: warning: unable to retrieve .note section from %s"),
- bfd_get_filename (abfd));
-
- /* We have to extract the value this way to allow for a
- host whose endian-ness is different from the target. */
- machine = bfd_get_32 (abfd, buffer);
- }
- }
break;
#endif
#ifdef MC68MAGIC
diff --git a/bfd/coffgen.c b/bfd/coffgen.c
index a3e3eec..fcb00fc 100644
--- a/bfd/coffgen.c
+++ b/bfd/coffgen.c
@@ -241,9 +241,6 @@ coff_real_object_p (abfd, nscns, internal_f, internal_a)
}
}
- bfd_coff_set_arch_mach_hook (abfd, (PTR) internal_f);
- /* make_abs_section (abfd); */
-
return abfd->xvec;
fail:
diff --git a/bfd/cpu-arm.c b/bfd/cpu-arm.c
index eb3011d..66c3a46 100644
--- a/bfd/cpu-arm.c
+++ b/bfd/cpu-arm.c
@@ -1,5 +1,5 @@
/* BFD support for the ARM processor
- Copyright 1994, 1997, 1999, 2000, 2002 Free Software Foundation, Inc.
+ Copyright 1994, 1997, 1999, 2000, 2002, 2003 Free Software Foundation, Inc.
Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org)
This file is part of BFD, the Binary File Descriptor library.
@@ -21,11 +21,14 @@
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
+#include "libiberty.h"
static const bfd_arch_info_type * compatible
PARAMS ((const bfd_arch_info_type *, const bfd_arch_info_type *));
static bfd_boolean scan
PARAMS ((const struct bfd_arch_info *, const char *));
+static bfd_boolean arm_check_note
+ PARAMS ((bfd *, char *, bfd_size_type, const char *, char **));
/* This routine is provided two arch_infos and works out which ARM
machine which would be compatible with both and returns a pointer
@@ -149,3 +152,276 @@ static const bfd_arch_info_type arch_info_struct[] =
const bfd_arch_info_type bfd_arm_arch =
N (0, "arm", TRUE, & arch_info_struct[0]);
+
+/* Support functions used by both the COFF and ELF versions of the ARM port. */
+
+/* Handle the mergeing of the 'machine' settings of input file IBFD
+ and an output file OBFD. These values actually represent the
+ different possible ARM architecture variants.
+ Returns TRUE if they were merged successfully or FALSE otherwise. */
+
+bfd_boolean
+bfd_arm_merge_machines (ibfd, obfd)
+ bfd * ibfd;
+ bfd * obfd;
+{
+ unsigned int in = bfd_get_mach (ibfd);
+ unsigned int out = bfd_get_mach (obfd);
+
+ /* If the output architecture is unknown, we now have a value to set. */
+ if (out == bfd_mach_arm_unknown)
+ bfd_set_arch_mach (obfd, bfd_arch_arm, in);
+
+ /* If the input architecure is unknown,
+ then so must be the output architecture. */
+ else if (in == bfd_mach_arm_unknown)
+ /* FIXME: We ought to have some way to
+ override this on the command line. */
+ bfd_set_arch_mach (obfd, bfd_arch_arm, bfd_mach_arm_unknown);
+
+ /* If they are the same then nothing needs to be done. */
+ else if (out == in)
+ ;
+
+ /* Otherwise the general principle that a earlier architecture can be
+ linked with a later architecure to produce a binary that will execute
+ on the later architecture.
+
+ We fail however if we attempt to link a Cirrus EP9312 binary with an
+ Intel XScale binary, since these architecture have co-processors which
+ will not both be present on the same physical hardware. */
+ else if (in == bfd_mach_arm_ep9312
+ && (out == bfd_mach_arm_XScale || out == bfd_mach_arm_iWMMXt))
+ {
+ _bfd_error_handler (_("\
+ERROR: %s is compiled for the EP9312, whereas %s is compiled for XScale"),
+ bfd_archive_filename (ibfd),
+ bfd_get_filename (obfd));
+ bfd_set_error (bfd_error_wrong_format);
+ return FALSE;
+ }
+ else if (out == bfd_mach_arm_ep9312
+ && (in == bfd_mach_arm_XScale || in == bfd_mach_arm_iWMMXt))
+ {
+ _bfd_error_handler (_("\
+ERROR: %s is compiled for the EP9312, whereas %s is compiled for XScale"),
+ bfd_archive_filename (obfd),
+ bfd_get_filename (ibfd));
+ bfd_set_error (bfd_error_wrong_format);
+ return FALSE;
+ }
+ else if (in > out)
+ bfd_set_arch_mach (obfd, bfd_arch_arm, in);
+ /* else
+ Nothing to do. */
+
+ return TRUE;
+}
+
+typedef struct
+{
+ unsigned char namesz[4]; /* Size of entry's owner string. */
+ unsigned char descsz[4]; /* Size of the note descriptor. */
+ unsigned char type[4]; /* Interpretation of the descriptor. */
+ char name[1]; /* Start of the name+desc data. */
+} arm_Note;
+
+static bfd_boolean
+arm_check_note (abfd, buffer, buffer_size, expected_name, description_return)
+ bfd * abfd;
+ char * buffer;
+ bfd_size_type buffer_size;
+ const char * expected_name;
+ char ** description_return;
+{
+ unsigned long namesz;
+ unsigned long descsz;
+ unsigned long type;
+ char * descr;
+
+ if (buffer_size < offsetof (arm_Note, name))
+ return FALSE;
+
+ /* We have to extract the values this way to allow for a
+ host whose endian-ness is different from the target. */
+ namesz = bfd_get_32 (abfd, buffer);
+ descsz = bfd_get_32 (abfd, buffer + offsetof (arm_Note, descsz));
+ type = bfd_get_32 (abfd, buffer + offsetof (arm_Note, type));
+ descr = buffer + offsetof (arm_Note, name);
+
+ /* Check for buffer overflow. */
+ if (namesz + descsz + offsetof (arm_Note, name) > buffer_size)
+ return FALSE;
+
+ if (expected_name == NULL)
+ {
+ if (namesz != 0)
+ return FALSE;
+ }
+ else
+ {
+ if (namesz != (strlen (expected_name) + 1 + 3) & ~3)
+ return FALSE;
+
+ if (strcmp (descr, expected_name) != 0)
+ return FALSE;
+
+ descr += (namesz + 3) & ~3;
+ }
+
+ /* FIXME: We should probably check the type as well. */
+
+ if (description_return != NULL)
+ * description_return = descr;
+
+ return TRUE;
+}
+
+#define NOTE_ARCH_STRING "arch: "
+
+bfd_boolean
+bfd_arm_update_notes (abfd, note_section)
+ bfd * abfd;
+ const char * note_section;
+{
+ asection * arm_arch_section;
+ bfd_size_type buffer_size;
+ char * buffer;
+ char * arch_string;
+ char * expected;
+
+ /* Look for a note section. If one is present check the architecture
+ string encoded in it, and set it to the current architecture if it is
+ different. */
+ arm_arch_section = bfd_get_section_by_name (abfd, note_section);
+
+ if (arm_arch_section == NULL)
+ return TRUE;
+
+ buffer_size = arm_arch_section->_raw_size;
+ if (buffer_size == 0)
+ return FALSE;
+
+ buffer = bfd_malloc (buffer_size);
+ if (buffer == NULL)
+ return FALSE;
+
+ if (! bfd_get_section_contents (abfd, arm_arch_section, buffer,
+ (file_ptr) 0, buffer_size))
+ goto FAIL;
+
+ /* Parse the note. */
+ if (! arm_check_note (abfd, buffer, buffer_size, NOTE_ARCH_STRING, & arch_string))
+ goto FAIL;
+
+ /* Check the architecture in the note against the architecture of the bfd. */
+ switch (bfd_get_mach (abfd))
+ {
+ default:
+ case bfd_mach_arm_unknown: expected = "unknown"; break;
+ case bfd_mach_arm_2: expected = "armv2"; break;
+ case bfd_mach_arm_2a: expected = "armv2a"; break;
+ case bfd_mach_arm_3: expected = "armv3"; break;
+ case bfd_mach_arm_3M: expected = "armv3M"; break;
+ case bfd_mach_arm_4: expected = "armv4"; break;
+ case bfd_mach_arm_4T: expected = "armv4t"; break;
+ case bfd_mach_arm_5: expected = "armv5"; break;
+ case bfd_mach_arm_5T: expected = "armv5t"; break;
+ case bfd_mach_arm_5TE: expected = "armv5te"; break;
+ case bfd_mach_arm_XScale: expected = "XScale"; break;
+ case bfd_mach_arm_ep9312: expected = "ep9312"; break;
+ case bfd_mach_arm_iWMMXt: expected = "iWMMXt"; break;
+ }
+
+ if (strcmp (arch_string, expected) != 0)
+ {
+ strcpy (buffer + offsetof (arm_Note, name) + ((strlen (NOTE_ARCH_STRING) + 3) & ~3), expected);
+
+ if (! bfd_set_section_contents (abfd, arm_arch_section, buffer,
+ (file_ptr) 0, buffer_size))
+ {
+ (*_bfd_error_handler)
+ (_("warning: unable to update contents of %s section in %s"),
+ note_section, bfd_get_filename (abfd));
+ goto FAIL;
+ }
+ }
+
+ free (buffer);
+ return TRUE;
+
+ FAIL:
+ free (buffer);
+ return FALSE;
+}
+
+
+static struct
+{
+ const char * string;
+ unsigned int mach;
+}
+architectures[] =
+{
+ { "armv2", bfd_mach_arm_2 },
+ { "armv2a", bfd_mach_arm_2a },
+ { "armv3", bfd_mach_arm_3 },
+ { "armv3M", bfd_mach_arm_3M },
+ { "armv4", bfd_mach_arm_4 },
+ { "armv4t", bfd_mach_arm_4T },
+ { "armv5", bfd_mach_arm_5 },
+ { "armv5t", bfd_mach_arm_5T },
+ { "armv5te", bfd_mach_arm_5TE },
+ { "XScale", bfd_mach_arm_XScale },
+ { "ep9312", bfd_mach_arm_ep9312 },
+ { "iWMMXt", bfd_mach_arm_iWMMXt }
+};
+
+/* Extract the machine number stored in a note section. */
+unsigned int
+bfd_arm_get_mach_from_notes (abfd, note_section)
+ bfd * abfd;
+ const char * note_section;
+{
+ asection * arm_arch_section;
+ bfd_size_type buffer_size;
+ char * buffer;
+ char * arch_string;
+ int i;
+
+ /* Look for a note section. If one is present check the architecture
+ string encoded in it, and set it to the current architecture if it is
+ different. */
+ arm_arch_section = bfd_get_section_by_name (abfd, note_section);
+
+ if (arm_arch_section == NULL)
+ return bfd_mach_arm_unknown;
+
+ buffer_size = arm_arch_section->_raw_size;
+ if (buffer_size == 0)
+ return bfd_mach_arm_unknown;
+
+ buffer = bfd_malloc (buffer_size);
+ if (buffer == NULL)
+ return bfd_mach_arm_unknown;
+
+ if (! bfd_get_section_contents (abfd, arm_arch_section, buffer,
+ (file_ptr) 0, buffer_size))
+ goto FAIL;
+
+ /* Parse the note. */
+ if (! arm_check_note (abfd, buffer, buffer_size, NOTE_ARCH_STRING, & arch_string))
+ goto FAIL;
+
+ /* Interpret the architecture string. */
+ for (i = ARRAY_SIZE (architectures); i--;)
+ if (strcmp (arch_string, architectures[i].string) == 0)
+ {
+ free (buffer);
+ return architectures[i].mach;
+ }
+
+ FAIL:
+ free (buffer);
+ return bfd_mach_arm_unknown;
+}
diff --git a/bfd/elf32-arm.h b/bfd/elf32-arm.h
index 417284b..631b2b9 100644
--- a/bfd/elf32-arm.h
+++ b/bfd/elf32-arm.h
@@ -2119,43 +2119,18 @@ static bfd_boolean
elf32_arm_object_p (abfd)
bfd *abfd;
{
- asection * arm_arch_section;
+ unsigned int mach;
+
+ mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION);
- arm_arch_section = bfd_get_section_by_name (abfd, ARM_NOTE_SECTION);
+ if (mach != bfd_mach_arm_unknown)
+ bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
+
+ else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
+ bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
- if (arm_arch_section)
- {
- char buffer [4];
- unsigned long arm_mach;
-
- if (! bfd_get_section_contents (abfd, arm_arch_section, buffer,
- (file_ptr) 0, sizeof buffer))
- (*_bfd_error_handler)
- (_("%s: warning: unable to retrieve %s section from %s"),
- ARM_NOTE_SECTION, bfd_get_filename (abfd));
- else
- {
- /* We have to extract the value this way to allow for a
- host whose endian-ness is different from the target. */
- arm_mach = bfd_get_32 (abfd, buffer);
- bfd_default_set_arch_mach (abfd, bfd_arch_arm, arm_mach);
-
- if (bfd_get_arch (abfd) == bfd_arch_arm)
- return TRUE;
-
- /* If the set failed for some reason, do not leave the architecture
- type as 0 (unknown), but issue a warning message and force it to
- be set to bfd_arch_arm. */
- (*_bfd_error_handler)
- (_("%s: warning: unrecognized ARM machine number: %x"),
- bfd_get_filename (abfd), arm_mach);
- }
- }
else
- {
- if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT)
- bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312);
- }
+ bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach);
return TRUE;
}
@@ -2296,24 +2271,10 @@ elf32_arm_merge_private_bfd_data (ibfd, obfd)
return TRUE;
}
- if (bfd_get_mach (obfd) && bfd_get_mach (obfd) != bfd_get_mach (ibfd))
- {
- /* For now, allow an output file type of 'xscale' if the
- input file type is 'iWMMXt'. This means that we will
- not have to build an entire iWMMXt enabled set of libraries
- just to test a iWMMXt enabled binary. Change the output
- type to iWMMXt though. Similarly allow 'xscale' binaries
- to be linked into a 'iWMMXt' output binary. */
- if ( bfd_get_mach (obfd) == bfd_mach_arm_XScale
- && bfd_get_mach (ibfd) == bfd_mach_arm_iWMMXt)
- bfd_set_arch_mach (obfd, bfd_get_arch (obfd), bfd_mach_arm_iWMMXt);
- else if ( bfd_get_mach (ibfd) != bfd_mach_arm_XScale
- || bfd_get_mach (obfd) != bfd_mach_arm_iWMMXt)
- {
- bfd_set_error (bfd_error_wrong_format);
- return FALSE;
- }
- }
+ /* Determine what should happen if the input ARM architecture
+ does not match the output ARM architecture. */
+ if (! bfd_arm_merge_machines (ibfd, obfd))
+ return FALSE;
/* Identical flags must be compatible. */
if (in_flags == out_flags)
@@ -3733,42 +3694,7 @@ elf32_arm_final_write_processing (abfd, linker)
bfd *abfd;
bfd_boolean linker ATTRIBUTE_UNUSED;
{
- asection * arm_arch_section;
- char buffer [4];
- unsigned long arm_mach;
-
- /* Look for a .note.arm.ident section. If one is present check
- the machine number encoded in it, and set it to the current
- machine number if it is different. This allows XScale and
- iWMMXt binaries to be merged and the resulting output to be set
- to iWMMXt, even if the first input file had an XScale .note. */
-
- arm_arch_section = bfd_get_section_by_name (abfd, ARM_NOTE_SECTION);
-
- if (arm_arch_section == NULL)
- return;
-
- if (! bfd_get_section_contents (abfd, arm_arch_section, buffer,
- (file_ptr) 0, sizeof buffer))
- /* If the ident section does not exist then just skip this check. */
- return;
-
- /* We have to extract the value this way to allow for a
- host whose endian-ness is different from the target. */
- arm_mach = bfd_get_32 (abfd, buffer);
-
- if (arm_mach == bfd_get_mach (abfd))
- return;
-
- bfd_put_32 (abfd, bfd_get_mach (abfd), buffer);
-
- if (! bfd_set_section_contents (abfd, arm_arch_section, buffer,
- (file_ptr) 0, sizeof buffer))
- (*_bfd_error_handler)
- (_("warning: unable to update contents of %s section in %s"),
- ARM_NOTE_SECTION, bfd_get_filename (abfd));
-
- return;
+ bfd_arm_update_notes (abfd, ARM_NOTE_SECTION);
}
#define ELF_ARCH bfd_arch_arm
diff --git a/gas/ChangeLog b/gas/ChangeLog
index efd1a49..132ad34 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,13 @@
+2003-04-01 Nick Clifton <nickc@redhat.com>
+ Richard Earnshaw <rearnsha@arm.com>
+
+ * config/tc-arm.c: Remove presence of (r) and (tm) symbols.
+ (ARM_ARCH_IWMMXT): Simplify.
+ (insns): Place iwmmx instructions in correct place in table.
+ (arm_add_note): New function: Add a note entry to a .note section.
+ (md_begin): Make the default architecture be unknown.
+ Suppress the creation of an arm note section.
+
2003-03-26 Eric Christopher <echristo@redhat.com>
* config/tc-mips.c (nopic_need_relax): Check for
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index b9935e7..33b0bea 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -59,7 +59,7 @@
/* Co-processor space extensions. */
#define ARM_CEXT_XSCALE 0x00800000 /* Allow MIA etc. */
#define ARM_CEXT_MAVERICK 0x00400000 /* Use Cirrus/DSP coprocessor. */
-#define ARM_CEXT_IWMMXT 0x00200000 /* Intel(r) Wireless MMX(tm) technology coprocessor. */
+#define ARM_CEXT_IWMMXT 0x00200000 /* Intel Wireless MMX technology coprocessor. */
/* Architectures are the sum of the base and extensions. The ARM ARM (rev E)
defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
@@ -85,7 +85,7 @@
/* Processors with specific extensions in the co-processor space. */
#define ARM_ARCH_XSCALE (ARM_ARCH_V5TE | ARM_CEXT_XSCALE)
-#define ARM_ARCH_IWMMXT (ARM_ARCH_V5TE | ARM_CEXT_XSCALE | ARM_CEXT_IWMMXT)
+#define ARM_ARCH_IWMMXT (ARM_ARCH_XSCALE | ARM_CEXT_IWMMXT)
/* Some useful combinations: */
#define ARM_ANY 0x0000ffff /* Any basic core. */
@@ -602,7 +602,7 @@ static const struct reg_entry rn_table[] =
static const struct reg_entry iwmmxt_table[] =
{
- /* Intel(r) Wireless MMX(tm) technology register names. */
+ /* Intel Wireless MMX technology register names. */
{ "wr0", 0x0 | WR_PREFIX}, {"wr1", 0x1 | WR_PREFIX},
{ "wr2", 0x2 | WR_PREFIX}, {"wr3", 0x3 | WR_PREFIX},
{ "wr4", 0x4 | WR_PREFIX}, {"wr5", 0x5 | WR_PREFIX},
@@ -759,7 +759,7 @@ struct reg_map all_reg_maps[] =
{mav_mvdx_table, 15, NULL, N_("Maverick MVFX register expected")},
{mav_mvax_table, 3, NULL, N_("Maverick MVAX register expected")},
{mav_dspsc_table, 0, NULL, N_("Maverick DSPSC register expected")},
- {iwmmxt_table, 23, NULL, N_("Intel(r) Wireless MMX(tm) technology register expected")},
+ {iwmmxt_table, 23, NULL, N_("Intel Wireless MMX technology register expected")},
};
/* Enumeration matching entries in table above. */
@@ -1077,170 +1077,6 @@ struct asm_opcode
static const struct asm_opcode insns[] =
{
- /* Intel(r) Wireless MMX(tm) technology instructions. */
- {"tandcb", 0xee130130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandc},
- {"tandch", 0xee530130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandc},
- {"tandcw", 0xee930130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandc},
- {"tbcstb", 0xee400010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tbcst},
- {"tbcsth", 0xee400050, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tbcst},
- {"tbcstw", 0xee400090, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tbcst},
- {"textrcb", 0xee130170, 7, ARM_CEXT_IWMMXT, do_iwmmxt_textrc},
- {"textrch", 0xee530170, 7, ARM_CEXT_IWMMXT, do_iwmmxt_textrc},
- {"textrcw", 0xee930170, 7, ARM_CEXT_IWMMXT, do_iwmmxt_textrc},
- {"textrmub", 0xee100070, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
- {"textrmuh", 0xee500070, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
- {"textrmuw", 0xee900070, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
- {"textrmsb", 0xee100078, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
- {"textrmsh", 0xee500078, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
- {"textrmsw", 0xee900078, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
- {"tinsrb", 0xee600010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tinsr},
- {"tinsrh", 0xee600050, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tinsr},
- {"tinsrw", 0xee600090, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tinsr},
- {"tmcr", 0xee000110, 4, ARM_CEXT_IWMMXT, do_iwmmxt_tmcr},
- {"tmcrr", 0xec400000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_tmcrr},
- {"tmia", 0xee200010, 4, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
- {"tmiaph", 0xee280010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
- {"tmiabb", 0xee2c0010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
- {"tmiabt", 0xee2d0010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
- {"tmiatb", 0xee2e0010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
- {"tmiatt", 0xee2f0010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
- {"tmovmskb", 0xee100030, 8, ARM_CEXT_IWMMXT, do_iwmmxt_tmovmsk},
- {"tmovmskh", 0xee500030, 8, ARM_CEXT_IWMMXT, do_iwmmxt_tmovmsk},
- {"tmovmskw", 0xee900030, 8, ARM_CEXT_IWMMXT, do_iwmmxt_tmovmsk},
- {"tmrc", 0xee100110, 4, ARM_CEXT_IWMMXT, do_iwmmxt_tmrc},
- {"tmrrc", 0xec500000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_tmrrc},
- {"torcb", 0xee130150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_torc},
- {"torch", 0xee530150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_torc},
- {"torcw", 0xee930150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_torc},
- {"waccb", 0xee0001c0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"wacch", 0xee4001c0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"waccw", 0xee8001c0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"waddbss", 0xee300180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"waddb", 0xee000180, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"waddbus", 0xee100180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"waddhss", 0xee700180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"waddh", 0xee400180, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"waddhus", 0xee500180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"waddwss", 0xeeb00180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"waddw", 0xee800180, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"waddwus", 0xee900180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"waligni", 0xee000020, 7, ARM_CEXT_IWMMXT, do_iwmmxt_waligni},
- {"walignr0", 0xee800020, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"walignr1", 0xee900020, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"walignr2", 0xeea00020, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"walignr3", 0xeeb00020, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wand", 0xee200000, 4, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wandn", 0xee300000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wavg2b", 0xee800000, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wavg2br", 0xee900000, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wavg2h", 0xeec00000, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wavg2hr", 0xeed00000, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wcmpeqb", 0xee000060, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wcmpeqh", 0xee400060, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wcmpeqw", 0xee800060, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wcmpgtub", 0xee100060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wcmpgtuh", 0xee500060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wcmpgtuw", 0xee900060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wcmpgtsb", 0xee300060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wcmpgtsh", 0xee700060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wcmpgtsw", 0xeeb00060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wldrb", 0xec100000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_byte_addr},
- {"wldrh", 0xec100100, 5, ARM_CEXT_IWMMXT, do_iwmmxt_byte_addr},
- {"wldrw", 0xec100200, 5, ARM_CEXT_IWMMXT, do_iwmmxt_word_addr},
- {"wldrd", 0xec100300, 5, ARM_CEXT_IWMMXT, do_iwmmxt_word_addr},
- {"wmacs", 0xee600100, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmacsz", 0xee700100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmacu", 0xee400100, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmacuz", 0xee500100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmadds", 0xeea00100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmaddu", 0xee800100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmaxsb", 0xee200160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmaxsh", 0xee600160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmaxsw", 0xeea00160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmaxub", 0xee000160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmaxuh", 0xee400160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmaxuw", 0xee800160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wminsb", 0xee300160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wminsh", 0xee700160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wminsw", 0xeeb00160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wminub", 0xee100160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wminuh", 0xee500160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wminuw", 0xee900160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmov", 0xee000000, 4, ARM_CEXT_IWMMXT, do_iwmmxt_wmov},
- {"wmulsm", 0xee300100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmulsl", 0xee200100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmulum", 0xee100100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wmulul", 0xee000100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wor", 0xee000000, 3, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wpackhss", 0xee700080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wpackhus", 0xee500080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wpackwss", 0xeeb00080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wpackwus", 0xee900080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wpackdss", 0xeef00080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wpackdus", 0xeed00080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wrorh", 0xee700040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wrorhg", 0xee700148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
- {"wrorw", 0xeeb00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wrorwg", 0xeeb00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
- {"wrord", 0xeef00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wrordg", 0xeef00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
- {"wsadb", 0xee000120, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsadbz", 0xee100120, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsadh", 0xee400120, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsadhz", 0xee500120, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wshufh", 0xee0001e0, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wshufh},
- {"wsllh", 0xee500040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsllhg", 0xee500148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
- {"wsllw", 0xee900040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsllwg", 0xee900148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
- {"wslld", 0xeed00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wslldg", 0xeed00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
- {"wsrah", 0xee400040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsrahg", 0xee400148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
- {"wsraw", 0xee800040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsrawg", 0xee800148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
- {"wsrad", 0xeec00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsradg", 0xeec00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
- {"wsrlh", 0xee600040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsrlhg", 0xee600148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
- {"wsrlw", 0xeea00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsrlwg", 0xeea00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
- {"wsrld", 0xeee00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsrldg", 0xeee00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
- {"wstrb", 0xec000000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_byte_addr},
- {"wstrh", 0xec000100, 5, ARM_CEXT_IWMMXT, do_iwmmxt_byte_addr},
- {"wstrw", 0xec000200, 5, ARM_CEXT_IWMMXT, do_iwmmxt_word_addr},
- {"wstrd", 0xec000300, 5, ARM_CEXT_IWMMXT, do_iwmmxt_word_addr},
- {"wsubbss", 0xee3001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsubb", 0xee0001a0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsubbus", 0xee1001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsubhss", 0xee7001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsubh", 0xee4001a0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsubhus", 0xee5001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsubwss", 0xeeb001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsubw", 0xee8001a0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wsubwus", 0xee9001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wunpckehub", 0xee0000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"wunpckehuh", 0xee4000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"wunpckehuw", 0xee8000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"wunpckehsb", 0xee2000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"wunpckehsh", 0xee6000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"wunpckehsw", 0xeea000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"wunpckihb", 0xee1000c0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wunpckihh", 0xee5000c0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wunpckihw", 0xee9000c0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wunpckelub", 0xee0000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"wunpckeluh", 0xee4000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"wunpckeluw", 0xee8000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"wunpckelsb", 0xee2000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"wunpckelsh", 0xee6000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"wunpckelsw", 0xeea000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
- {"wunpckilb", 0xee1000e0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wunpckilh", 0xee5000e0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wunpckilw", 0xee9000e0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wxor", 0xee100000, 4, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
- {"wzero", 0xee300000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wzero},
-
/* Core ARM Instructions. */
{"and", 0xe0000000, 3, ARM_EXT_V1, do_arit},
{"ands", 0xe0100000, 3, ARM_EXT_V1, do_arit},
@@ -1988,6 +1824,170 @@ static const struct asm_opcode insns[] =
{"mar", 0xec400000, 3, ARM_CEXT_XSCALE, do_xsc_mar},
{"mra", 0xec500000, 3, ARM_CEXT_XSCALE, do_xsc_mra},
+ /* Intel Wireless MMX technology instructions. */
+ {"tandcb", 0xee130130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandc},
+ {"tandch", 0xee530130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandc},
+ {"tandcw", 0xee930130, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tandc},
+ {"tbcstb", 0xee400010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tbcst},
+ {"tbcsth", 0xee400050, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tbcst},
+ {"tbcstw", 0xee400090, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tbcst},
+ {"textrcb", 0xee130170, 7, ARM_CEXT_IWMMXT, do_iwmmxt_textrc},
+ {"textrch", 0xee530170, 7, ARM_CEXT_IWMMXT, do_iwmmxt_textrc},
+ {"textrcw", 0xee930170, 7, ARM_CEXT_IWMMXT, do_iwmmxt_textrc},
+ {"textrmub", 0xee100070, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
+ {"textrmuh", 0xee500070, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
+ {"textrmuw", 0xee900070, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
+ {"textrmsb", 0xee100078, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
+ {"textrmsh", 0xee500078, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
+ {"textrmsw", 0xee900078, 8, ARM_CEXT_IWMMXT, do_iwmmxt_textrm},
+ {"tinsrb", 0xee600010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tinsr},
+ {"tinsrh", 0xee600050, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tinsr},
+ {"tinsrw", 0xee600090, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tinsr},
+ {"tmcr", 0xee000110, 4, ARM_CEXT_IWMMXT, do_iwmmxt_tmcr},
+ {"tmcrr", 0xec400000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_tmcrr},
+ {"tmia", 0xee200010, 4, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
+ {"tmiaph", 0xee280010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
+ {"tmiabb", 0xee2c0010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
+ {"tmiabt", 0xee2d0010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
+ {"tmiatb", 0xee2e0010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
+ {"tmiatt", 0xee2f0010, 6, ARM_CEXT_IWMMXT, do_iwmmxt_tmia},
+ {"tmovmskb", 0xee100030, 8, ARM_CEXT_IWMMXT, do_iwmmxt_tmovmsk},
+ {"tmovmskh", 0xee500030, 8, ARM_CEXT_IWMMXT, do_iwmmxt_tmovmsk},
+ {"tmovmskw", 0xee900030, 8, ARM_CEXT_IWMMXT, do_iwmmxt_tmovmsk},
+ {"tmrc", 0xee100110, 4, ARM_CEXT_IWMMXT, do_iwmmxt_tmrc},
+ {"tmrrc", 0xec500000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_tmrrc},
+ {"torcb", 0xee130150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_torc},
+ {"torch", 0xee530150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_torc},
+ {"torcw", 0xee930150, 5, ARM_CEXT_IWMMXT, do_iwmmxt_torc},
+ {"waccb", 0xee0001c0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"wacch", 0xee4001c0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"waccw", 0xee8001c0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"waddbss", 0xee300180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"waddb", 0xee000180, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"waddbus", 0xee100180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"waddhss", 0xee700180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"waddh", 0xee400180, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"waddhus", 0xee500180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"waddwss", 0xeeb00180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"waddw", 0xee800180, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"waddwus", 0xee900180, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"waligni", 0xee000020, 7, ARM_CEXT_IWMMXT, do_iwmmxt_waligni},
+ {"walignr0", 0xee800020, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"walignr1", 0xee900020, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"walignr2", 0xeea00020, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"walignr3", 0xeeb00020, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wand", 0xee200000, 4, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wandn", 0xee300000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wavg2b", 0xee800000, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wavg2br", 0xee900000, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wavg2h", 0xeec00000, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wavg2hr", 0xeed00000, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wcmpeqb", 0xee000060, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wcmpeqh", 0xee400060, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wcmpeqw", 0xee800060, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wcmpgtub", 0xee100060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wcmpgtuh", 0xee500060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wcmpgtuw", 0xee900060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wcmpgtsb", 0xee300060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wcmpgtsh", 0xee700060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wcmpgtsw", 0xeeb00060, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wldrb", 0xec100000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_byte_addr},
+ {"wldrh", 0xec100100, 5, ARM_CEXT_IWMMXT, do_iwmmxt_byte_addr},
+ {"wldrw", 0xec100200, 5, ARM_CEXT_IWMMXT, do_iwmmxt_word_addr},
+ {"wldrd", 0xec100300, 5, ARM_CEXT_IWMMXT, do_iwmmxt_word_addr},
+ {"wmacs", 0xee600100, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmacsz", 0xee700100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmacu", 0xee400100, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmacuz", 0xee500100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmadds", 0xeea00100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmaddu", 0xee800100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmaxsb", 0xee200160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmaxsh", 0xee600160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmaxsw", 0xeea00160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmaxub", 0xee000160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmaxuh", 0xee400160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmaxuw", 0xee800160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wminsb", 0xee300160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wminsh", 0xee700160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wminsw", 0xeeb00160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wminub", 0xee100160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wminuh", 0xee500160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wminuw", 0xee900160, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmov", 0xee000000, 4, ARM_CEXT_IWMMXT, do_iwmmxt_wmov},
+ {"wmulsm", 0xee300100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmulsl", 0xee200100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmulum", 0xee100100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wmulul", 0xee000100, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wor", 0xee000000, 3, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wpackhss", 0xee700080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wpackhus", 0xee500080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wpackwss", 0xeeb00080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wpackwus", 0xee900080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wpackdss", 0xeef00080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wpackdus", 0xeed00080, 8, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wrorh", 0xee700040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wrorhg", 0xee700148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
+ {"wrorw", 0xeeb00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wrorwg", 0xeeb00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
+ {"wrord", 0xeef00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wrordg", 0xeef00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
+ {"wsadb", 0xee000120, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsadbz", 0xee100120, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsadh", 0xee400120, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsadhz", 0xee500120, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wshufh", 0xee0001e0, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wshufh},
+ {"wsllh", 0xee500040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsllhg", 0xee500148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
+ {"wsllw", 0xee900040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsllwg", 0xee900148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
+ {"wslld", 0xeed00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wslldg", 0xeed00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
+ {"wsrah", 0xee400040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsrahg", 0xee400148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
+ {"wsraw", 0xee800040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsrawg", 0xee800148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
+ {"wsrad", 0xeec00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsradg", 0xeec00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
+ {"wsrlh", 0xee600040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsrlhg", 0xee600148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
+ {"wsrlw", 0xeea00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsrlwg", 0xeea00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
+ {"wsrld", 0xeee00040, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsrldg", 0xeee00148, 6, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwcg},
+ {"wstrb", 0xec000000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_byte_addr},
+ {"wstrh", 0xec000100, 5, ARM_CEXT_IWMMXT, do_iwmmxt_byte_addr},
+ {"wstrw", 0xec000200, 5, ARM_CEXT_IWMMXT, do_iwmmxt_word_addr},
+ {"wstrd", 0xec000300, 5, ARM_CEXT_IWMMXT, do_iwmmxt_word_addr},
+ {"wsubbss", 0xee3001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsubb", 0xee0001a0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsubbus", 0xee1001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsubhss", 0xee7001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsubh", 0xee4001a0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsubhus", 0xee5001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsubwss", 0xeeb001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsubw", 0xee8001a0, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wsubwus", 0xee9001a0, 7, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wunpckehub", 0xee0000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"wunpckehuh", 0xee4000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"wunpckehuw", 0xee8000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"wunpckehsb", 0xee2000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"wunpckehsh", 0xee6000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"wunpckehsw", 0xeea000c0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"wunpckihb", 0xee1000c0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wunpckihh", 0xee5000c0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wunpckihw", 0xee9000c0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wunpckelub", 0xee0000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"wunpckeluh", 0xee4000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"wunpckeluw", 0xee8000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"wunpckelsb", 0xee2000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"wunpckelsh", 0xee6000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"wunpckelsw", 0xeea000e0, 10, ARM_CEXT_IWMMXT, do_iwmmxt_wrwr},
+ {"wunpckilb", 0xee1000e0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wunpckilh", 0xee5000e0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wunpckilw", 0xee9000e0, 9, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wxor", 0xee100000, 4, ARM_CEXT_IWMMXT, do_iwmmxt_wrwrwr},
+ {"wzero", 0xee300000, 5, ARM_CEXT_IWMMXT, do_iwmmxt_wzero},
+
/* Cirrus Maverick instructions. */
{"cfldrs", 0xec100400, 6, ARM_CEXT_MAVERICK, do_mav_ldst_1},
{"cfldrd", 0xec500400, 6, ARM_CEXT_MAVERICK, do_mav_ldst_2},
@@ -2361,6 +2361,9 @@ static int arm_parse_extension PARAMS ((char *, int *));
static int arm_parse_cpu PARAMS ((char *));
static int arm_parse_arch PARAMS ((char *));
static int arm_parse_fpu PARAMS ((char *));
+#if defined OBJ_COFF || defined OBJ_ELF
+static void arm_add_note PARAMS ((const char *, const char *, unsigned int));
+#endif
/* Stuff needed to resolve the label ambiguity
As:
@@ -2999,7 +3002,7 @@ reg_required_here (str, shift)
return FAIL;
}
-/* A Intel(r) Wireless MMX(tm) technology register
+/* A Intel Wireless MMX technology register
must be given at this point.
Shift is the place to put it in inst.instruction.
Restores input start point on err.
@@ -3044,7 +3047,7 @@ wreg_required_here (str, shift, reg_type)
/* In the few cases where we might be able to accept
something else this error can be overridden. */
- sprintf (buff, _("Intel(r) Wireless MMX(tm) technology register expected, not '%.100s'"), start);
+ sprintf (buff, _("Intel Wireless MMX technology register expected, not '%.100s'"), start);
inst.error = buff;
return FAIL;
@@ -10083,6 +10086,54 @@ build_arm_ops_hsh ()
}
}
+#if defined OBJ_ELF || defined OBJ_COFF
+
+#ifdef OBJ_ELF
+#define arm_Note Elf_External_Note
+#else
+typedef struct
+{
+ unsigned char namesz[4]; /* Size of entry's owner string. */
+ unsigned char descsz[4]; /* Size of the note descriptor. */
+ unsigned char type[4]; /* Interpretation of the descriptor. */
+ char name[1]; /* Start of the name+desc data. */
+} arm_Note;
+#endif
+
+/* The description is kept to a fix sized in order to make updating
+ it and merging it easier. */
+#define ARM_NOTE_DESCRIPTION_LENGTH 8
+
+static void
+arm_add_note (name, description, type)
+ const char * name;
+ const char * description;
+ unsigned int type;
+{
+ arm_Note note ATTRIBUTE_UNUSED;
+ char * p;
+ unsigned int name_len;
+
+ name_len = (strlen (name) + 1 + 3) & ~3;
+
+ p = frag_more (sizeof (note.namesz));
+ md_number_to_chars (p, (valueT) name_len, sizeof (note.namesz));
+
+ p = frag_more (sizeof (note.descsz));
+ md_number_to_chars (p, (valueT) ARM_NOTE_DESCRIPTION_LENGTH, sizeof (note.descsz));
+
+ p = frag_more (sizeof (note.type));
+ md_number_to_chars (p, (valueT) type, sizeof (note.type));
+
+ p = frag_more (name_len);
+ strcpy (p, name);
+
+ p = frag_more (ARM_NOTE_DESCRIPTION_LENGTH);
+ strncpy (p, description, ARM_NOTE_DESCRIPTION_LENGTH);
+ frag_align (2, 0, 0);
+}
+#endif
+
void
md_begin ()
{
@@ -10216,7 +10267,7 @@ md_begin ()
break;
default:
- mach = bfd_mach_arm_4;
+ mach = bfd_mach_arm_unknown;
break;
}
@@ -10246,13 +10297,24 @@ md_begin ()
else if (cpu_variant & ARM_EXT_V3M)
mach = bfd_mach_arm_3M;
+#if 0 /* Suppressed - for now. */
#if defined (OBJ_ELF) || defined (OBJ_COFF)
+
+ /* Create a .note section to fully identify this arm binary. */
+
+#define NOTE_ARCH_STRING "arch: "
+
+#if defined OBJ_COFF && ! defined NT_VERSION
+#define NT_VERSION 1
+#define NT_ARCH 2
+#endif
+
{
- expressionS exp;
segT current_seg = now_seg;
subsegT current_subseg = now_subseg;
asection * arm_arch;
-
+ const char * arch_string;
+
arm_arch = bfd_make_section_old_way (stdoutput, ARM_NOTE_SECTION);
#ifdef OBJ_COFF
@@ -10262,17 +10324,32 @@ md_begin ()
#endif
arm_arch->output_section = arm_arch;
subseg_set (arm_arch, 0);
- exp.X_op = O_constant;
- exp.X_add_number = mach;
- exp.X_add_symbol = NULL;
- exp.X_op_symbol = NULL;
- emit_expr (&exp, 4);
+ switch (mach)
+ {
+ default:
+ case bfd_mach_arm_unknown: arch_string = "unknown"; break;
+ case bfd_mach_arm_2: arch_string = "armv2"; break;
+ case bfd_mach_arm_2a: arch_string = "armv2a"; break;
+ case bfd_mach_arm_3: arch_string = "armv3"; break;
+ case bfd_mach_arm_3M: arch_string = "armv3M"; break;
+ case bfd_mach_arm_4: arch_string = "armv4"; break;
+ case bfd_mach_arm_4T: arch_string = "armv4t"; break;
+ case bfd_mach_arm_5: arch_string = "armv5"; break;
+ case bfd_mach_arm_5T: arch_string = "armv5t"; break;
+ case bfd_mach_arm_5TE: arch_string = "armv5te"; break;
+ case bfd_mach_arm_XScale: arch_string = "XScale"; break;
+ case bfd_mach_arm_ep9312: arch_string = "ep9312"; break;
+ case bfd_mach_arm_iWMMXt: arch_string = "iWMMXt"; break;
+ }
+
+ arm_add_note (NOTE_ARCH_STRING, arch_string, NT_ARCH);
subseg_set (current_seg, current_subseg);
}
#endif
-
+#endif /* Suppressed code. */
+
bfd_set_arch_mach (stdoutput, TARGET_ARCH, mach);
}
@@ -11760,6 +11837,7 @@ static struct arm_cpu_option_table arm_cpus[] =
{"arm1020e", ARM_ARCH_V5TE, FPU_ARCH_VFP_V2},
/* ??? XSCALE is really an architecture. */
{"xscale", ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2},
+ /* ??? iwmmxt is not a processor. */
{"iwmmxt", ARM_ARCH_IWMMXT, FPU_ARCH_VFP_V2},
{"i80200", ARM_ARCH_XSCALE, FPU_ARCH_VFP_V2},
/* Maverick */
diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog
index 5411f76..6055c22 100644
--- a/include/elf/ChangeLog
+++ b/include/elf/ChangeLog
@@ -1,3 +1,7 @@
+2003-04-01 Nick Clifton <nickc@redhat.com>
+
+ * arm.h (ARM_NOTE_SECTION): Include .gnu in the string.
+
2003-03-25 Stan Cox <scox@redhat.com>
Nick Clifton <nickc@redhat.com>
diff --git a/include/elf/arm.h b/include/elf/arm.h
index 3b3f8d0..181a9f0 100644
--- a/include/elf/arm.h
+++ b/include/elf/arm.h
@@ -141,6 +141,6 @@ START_RELOC_NUMBERS (elf_arm_reloc_type)
END_RELOC_NUMBERS (R_ARM_max)
/* The name of the note section used to identify arm variants. */
-#define ARM_NOTE_SECTION ".note.arm.ident"
+#define ARM_NOTE_SECTION ".note.gnu.arm.ident"
#endif /* _ELF_ARM_H */
diff --git a/ld/ChangeLog b/ld/ChangeLog
index 3af0d2c..098d30f 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,10 @@
+2003-04-01 Nick Clifton <nickc@redhat.com>
+
+ * emulparams/armelf.sh (OTHER_READONLY_SECTIONS): Chnage name of
+ note section.
+ * emulparams/armelf_linux.sh (OTHER_READONLY_SECTIONS): Chnage
+ name of note section.
+
2003-03-31 Alexandre Oliva <aoliva@redhat.com>
* ld.texinfo (-Tbss, -Tdata, -Ttext): Document in terms of
diff --git a/ld/emulparams/armelf.sh b/ld/emulparams/armelf.sh
index fd723bc..9e2ada7 100644
--- a/ld/emulparams/armelf.sh
+++ b/ld/emulparams/armelf.sh
@@ -7,7 +7,7 @@ TEXT_START_ADDR=0x8000
TEMPLATE_NAME=elf32
EXTRA_EM_FILE=armelf
OTHER_TEXT_SECTIONS='*(.glue_7t) *(.glue_7)'
-OTHER_READONLY_SECTIONS='.note.arm.ident : { KEEP (*(.note.arm.ident)) }'
+OTHER_READONLY_SECTIONS='.note.gnu.arm.ident : { KEEP (*(.note.gnu.arm.ident)) }'
OTHER_BSS_SYMBOLS='__bss_start__ = .;'
OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;'
diff --git a/ld/emulparams/armelf_linux.sh b/ld/emulparams/armelf_linux.sh
index 734e92c..f03fb76 100644
--- a/ld/emulparams/armelf_linux.sh
+++ b/ld/emulparams/armelf_linux.sh
@@ -10,7 +10,7 @@ GENERATE_SHLIB_SCRIPT=yes
DATA_START_SYMBOLS='__data_start = . ;';
OTHER_TEXT_SECTIONS='*(.glue_7t) *(.glue_7)'
-OTHER_READONLY_SECTIONS='.note.arm.ident : { KEEP (*(.note.arm.ident)) }'
+OTHER_READONLY_SECTIONS='.note.gnu.arm.ident : { KEEP (*(.note.gnu.arm.ident)) }'
OTHER_BSS_SYMBOLS='__bss_start__ = .;'
OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ; __end__ = . ;'
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b133896..f58e425 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2003-04-01 Nick Clifton <nickc@redhat.com>
+
+ * arm-dis.c: Remove presence of (r) and (tm) symbols.
+ * arm-opc.h: Remove presence of (r) and (tm) symbols.
+
2003-03-25 Stan Cox <scox@redhat.com>
Nick Clifton <nickc@redhat.com>
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index 8fb9702..2c9e385 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -71,9 +71,9 @@ static arm_regname regnames[] =
{ "a1", "a2", "a3", "a4", "v1", "v2", "v3", "v4", "v5", "v6", "v7", "v8", "IP", "SP", "LR", "PC" }},
{ "special-atpcs", "Select special register names used in the ATPCS",
{ "a1", "a2", "a3", "a4", "v1", "v2", "v3", "WR", "v5", "SB", "SL", "FP", "IP", "SP", "LR", "PC" }},
- { "iwmmxt_regnames", "Select register names used on the Intel(r) Wireless MMX(tm) technology coprocessor",
+ { "iwmmxt_regnames", "Select register names used on the Intel Wireless MMX technology coprocessor",
{ "wr0", "wr1", "wr2", "wr3", "wr4", "wr5", "wr6", "wr7", "wr8", "wr9", "wr10", "wr11", "wr12", "wr13", "wr14", "wr15"}},
- { "iwmmxt_Cregnames", "Select control register names used on the Intel(r) Wireless MMX(tm) technology coprocessor",
+ { "iwmmxt_Cregnames", "Select control register names used on the Intel Wireless MMX technology coprocessor",
{"wcid", "wcon", "wcssf", "wcasf", "reserved", "reserved", "reserved", "reserved", "wcgr0", "wcgr1", "wcgr2", "wcgr3", "reserved", "reserved", "reserved", "reserved"}}
};
diff --git a/opcodes/arm-opc.h b/opcodes/arm-opc.h
index 233a830..22313cb 100644
--- a/opcodes/arm-opc.h
+++ b/opcodes/arm-opc.h
@@ -108,7 +108,7 @@ static const struct arm_opcode arm_opcodes[] =
{0x0c500000, 0x0ff00fff, "mra%c\t%12-15r, %16-19r, acc0"},
{0xf450f000, 0xfc70f000, "pld\t%a"},
- /* Intel(r) Wireless MMX(tm) technology instructions. */
+ /* Intel Wireless MMX technology instructions. */
#define FIRST_IWMMXT_INSN 0x0e130130
#define IWMMXT_INSN_COUNT 47
{0x0e130130, 0x0f3f0fff, "tandc%22-23w%c\t%12-15r"},