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author | Omair Javaid <omair.javaid@linaro.org> | 2018-05-26 05:58:51 +0500 |
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committer | Omair Javaid <omair.javaid@linaro.org> | 2018-05-31 07:31:21 +0500 |
commit | 5969f0dba74e17c694faf333b120f1e0b95783ed (patch) | |
tree | 5b1969d7d5c41099b6e0ec201fbad028b264b4f3 | |
parent | 0034eed03a7428c4902244a33a286763bca65016 (diff) | |
download | gdb-5969f0dba74e17c694faf333b120f1e0b95783ed.zip gdb-5969f0dba74e17c694faf333b120f1e0b95783ed.tar.gz gdb-5969f0dba74e17c694faf333b120f1e0b95783ed.tar.bz2 |
Unset gdbarch significant_addr_bit by default
This patch fixes a bug introduced by fix to AArch64 pointer tagging.
In our fix for tagged pointer support our agreed approach was to sign
extend user-space address after clearing tag bits. This is not same
for all architectures and this patch allows sign extension for
addresses on targets which specifically set significant_addr_bit.
More information about patch that caused the issues and discussion
around tagged pointer support can be found in links below:
https://sourceware.org/ml/gdb-patches/2018-05/msg00000.html
https://sourceware.org/ml/gdb-patches/2017-12/msg00159.html
gdb/ChangeLog:
2018-05-31 Omair Javaid <omair.javaid@linaro.org>
PR gdb/23210
* gdbarch.sh (significant_addr_bit): Default to zero when
not set by target architecture.
* gdbarch.c: Re-generated.
* utils.c (address_significant): Update.
-rw-r--r-- | gdb/ChangeLog | 8 | ||||
-rw-r--r-- | gdb/gdbarch.c | 4 | ||||
-rwxr-xr-x | gdb/gdbarch.sh | 2 | ||||
-rw-r--r-- | gdb/utils.c | 5 |
4 files changed, 14 insertions, 5 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index f8f1acd..c940fe7 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,11 @@ +2018-05-31 Omair Javaid <omair.javaid@linaro.org> + + PR gdb/23210 + * gdbarch.sh (significant_addr_bit): Default to zero when + not set by target architecture. + * gdbarch.c: Re-generated. + * utils.c (address_significant): Update. + 2018-05-30 Joel Brobecker <brobecker@adacore.com> * stack.c (func_command): Remove trailing newline in call to error. diff --git a/gdb/gdbarch.c b/gdb/gdbarch.c index c430ebe..558cc55 100644 --- a/gdb/gdbarch.c +++ b/gdb/gdbarch.c @@ -615,8 +615,7 @@ verify_gdbarch (struct gdbarch *gdbarch) /* Skip verify of stabs_argument_has_addr, invalid_p == 0 */ /* Skip verify of convert_from_func_ptr_addr, invalid_p == 0 */ /* Skip verify of addr_bits_remove, invalid_p == 0 */ - if (gdbarch->significant_addr_bit == 0) - gdbarch->significant_addr_bit = gdbarch_addr_bit (gdbarch); + /* Skip verify of significant_addr_bit, invalid_p == 0 */ /* Skip verify of software_single_step, has predicate. */ /* Skip verify of single_step_through_delay, has predicate. */ /* Skip verify of print_insn, invalid_p == 0 */ @@ -3209,6 +3208,7 @@ int gdbarch_significant_addr_bit (struct gdbarch *gdbarch) { gdb_assert (gdbarch != NULL); + /* Skip verify of significant_addr_bit, invalid_p == 0 */ if (gdbarch_debug >= 2) fprintf_unfiltered (gdb_stdlog, "gdbarch_significant_addr_bit called\n"); return gdbarch->significant_addr_bit; diff --git a/gdb/gdbarch.sh b/gdb/gdbarch.sh index 7330430..0a23b1e 100755 --- a/gdb/gdbarch.sh +++ b/gdb/gdbarch.sh @@ -622,7 +622,7 @@ m;CORE_ADDR;addr_bits_remove;CORE_ADDR addr;addr;;core_addr_identity;;0 # For example, on AArch64, the top bits of an address known as the "tag" # are ignored by the kernel, the hardware, etc. and can be regarded as # additional data associated with the address. -v;int;significant_addr_bit;;;;;gdbarch_addr_bit (gdbarch); +v;int;significant_addr_bit;;;;;;0 # FIXME/cagney/2001-01-18: This should be split in two. A target method that # indicates if the target needs software single step. An ISA method to diff --git a/gdb/utils.c b/gdb/utils.c index a2e933b..fe9a674 100644 --- a/gdb/utils.c +++ b/gdb/utils.c @@ -2708,10 +2708,11 @@ address_significant (gdbarch *gdbarch, CORE_ADDR addr) /* Clear insignificant bits of a target address and sign extend resulting address, avoiding shifts larger or equal than the width of a CORE_ADDR. The local variable ADDR_BIT stops the compiler reporting a shift overflow - when it won't occur. */ + when it won't occur. Skip updating of target address if current target + has not set gdbarch significant_addr_bit. */ int addr_bit = gdbarch_significant_addr_bit (gdbarch); - if (addr_bit < (sizeof (CORE_ADDR) * HOST_CHAR_BIT)) + if (addr_bit && (addr_bit < (sizeof (CORE_ADDR) * HOST_CHAR_BIT))) { CORE_ADDR sign = (CORE_ADDR) 1 << (addr_bit - 1); addr &= ((CORE_ADDR) 1 << addr_bit) - 1; |