diff options
author | Jan Beulich <jbeulich@novell.com> | 2005-08-22 12:37:37 +0000 |
---|---|---|
committer | Jan Beulich <jbeulich@novell.com> | 2005-08-22 12:37:37 +0000 |
commit | 4fa24527c95f3582ec61330240bb2790b588b8d1 (patch) | |
tree | 99dc45c3f842ac2fa7ba0d4e52b6d67972cfb6f8 | |
parent | 656d44423872aef8bc7b7eab7bff1d7dd23f6143 (diff) | |
download | gdb-4fa24527c95f3582ec61330240bb2790b588b8d1.zip gdb-4fa24527c95f3582ec61330240bb2790b588b8d1.tar.gz gdb-4fa24527c95f3582ec61330240bb2790b588b8d1.tar.bz2 |
gas/
2005-08-22 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (object_64bit): New.
(i386_target_format): Initialize it.
(output_disp): Use object_64bit for relocation type determination.
(output_imm): Likewise.
(i386_validate_fix): Likewise.
(tc_gen_reloc): Likewise.
(lex_got): Likewise. Remove static mode_name. Change array size
of gotrel's rel field, and adjust its initializer. Adjust diagnostic.
(x86_cons): Use object_64bit for deciding whether quad fields can
have relocations.
gas/testsuite/
2005-08-22 Jan Beulich <jbeulich@novell.com>
* gas/i386/mixed-mode-reloc.s, gas/i386/mixed-mode-reloc32.d,
gas/i386/mixed-mode-reloc64.d: New.
* gas/i386/i386.exp: Run new tests.
-rw-r--r-- | gas/ChangeLog | 13 | ||||
-rw-r--r-- | gas/config/tc-i386.c | 55 | ||||
-rw-r--r-- | gas/testsuite/ChangeLog | 6 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/i386.exp | 2 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/mixed-mode-reloc.s | 16 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/mixed-mode-reloc32.d | 14 | ||||
-rw-r--r-- | gas/testsuite/gas/i386/mixed-mode-reloc64.d | 14 |
7 files changed, 94 insertions, 26 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index ad13a43..43b87a6 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,16 @@ +2005-08-22 Jan Beulich <jbeulich@novell.com> + + * config/tc-i386.c (object_64bit): New. + (i386_target_format): Initialize it. + (output_disp): Use object_64bit for relocation type determination. + (output_imm): Likewise. + (i386_validate_fix): Likewise. + (tc_gen_reloc): Likewise. + (lex_got): Likewise. Remove static mode_name. Change array size + of gotrel's rel field, and adjust its initializer. Adjust diagnostic. + (x86_cons): Use object_64bit for deciding whether quad fields can + have relocations. + 2005-08-18 Christian Groessler <chris@groessler.org> * config/tc-h8300.h: Remove TC_RELOC_MANGLE/tc_reloc_mangle. diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index afdd169..acba3e1 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -287,6 +287,7 @@ enum flag_code { #define NUM_FLAG_CODE ((int) CODE_64BIT + 1) static enum flag_code flag_code; +static unsigned int object_64bit; static int use_rela_relocations = 0; /* The names used to print error messages. */ @@ -3611,7 +3612,7 @@ output_disp (insn_start_frag, insn_start_off) add += p - frag_now->fr_literal; } - if (flag_code != CODE_64BIT) + if (!object_64bit) reloc_type = BFD_RELOC_386_GOTPC; else reloc_type = BFD_RELOC_X86_64_GOTPC32; @@ -3748,7 +3749,7 @@ output_imm (insn_start_frag, insn_start_off) add += p - frag_now->fr_literal; } - if (flag_code != CODE_64BIT) + if (!object_64bit) reloc_type = BFD_RELOC_386_GOTPC; else reloc_type = BFD_RELOC_X86_64_GOTPC32; @@ -3778,25 +3779,24 @@ lex_got (enum bfd_reloc_code_real *reloc, int *adjust, unsigned int *types) { - static const char * const mode_name[NUM_FLAG_CODE] = { "32", "16", "64" }; static const struct { const char *str; - const enum bfd_reloc_code_real rel[NUM_FLAG_CODE]; + const enum bfd_reloc_code_real rel[2]; const unsigned int types64; } gotrel[] = { - { "PLT", { BFD_RELOC_386_PLT32, 0, BFD_RELOC_X86_64_PLT32 }, Imm32|Imm32S|Disp32 }, - { "GOTOFF", { BFD_RELOC_386_GOTOFF, 0, BFD_RELOC_X86_64_GOTOFF64 }, Imm64|Disp64 }, - { "GOTPCREL", { 0, 0, BFD_RELOC_X86_64_GOTPCREL }, Imm32|Imm32S|Disp32 }, - { "TLSGD", { BFD_RELOC_386_TLS_GD, 0, BFD_RELOC_X86_64_TLSGD }, Imm32|Imm32S|Disp32 }, - { "TLSLDM", { BFD_RELOC_386_TLS_LDM, 0, 0 }, 0 }, - { "TLSLD", { 0, 0, BFD_RELOC_X86_64_TLSLD }, Imm32|Imm32S|Disp32 }, - { "GOTTPOFF", { BFD_RELOC_386_TLS_IE_32, 0, BFD_RELOC_X86_64_GOTTPOFF }, Imm32|Imm32S|Disp32 }, - { "TPOFF", { BFD_RELOC_386_TLS_LE_32, 0, BFD_RELOC_X86_64_TPOFF32 }, Imm32|Imm32S|Imm64|Disp32|Disp64 }, - { "NTPOFF", { BFD_RELOC_386_TLS_LE, 0, 0 }, 0 }, - { "DTPOFF", { BFD_RELOC_386_TLS_LDO_32, 0, BFD_RELOC_X86_64_DTPOFF32 }, Imm32|Imm32S|Imm64|Disp32|Disp64 }, - { "GOTNTPOFF",{ BFD_RELOC_386_TLS_GOTIE, 0, 0 }, 0 }, - { "INDNTPOFF",{ BFD_RELOC_386_TLS_IE, 0, 0 }, 0 }, - { "GOT", { BFD_RELOC_386_GOT32, 0, BFD_RELOC_X86_64_GOT32 }, Imm32|Imm32S|Disp32 } + { "PLT", { BFD_RELOC_386_PLT32, BFD_RELOC_X86_64_PLT32 }, Imm32|Imm32S|Disp32 }, + { "GOTOFF", { BFD_RELOC_386_GOTOFF, BFD_RELOC_X86_64_GOTOFF64 }, Imm64|Disp64 }, + { "GOTPCREL", { 0, BFD_RELOC_X86_64_GOTPCREL }, Imm32|Imm32S|Disp32 }, + { "TLSGD", { BFD_RELOC_386_TLS_GD, BFD_RELOC_X86_64_TLSGD }, Imm32|Imm32S|Disp32 }, + { "TLSLDM", { BFD_RELOC_386_TLS_LDM, 0 }, 0 }, + { "TLSLD", { 0, BFD_RELOC_X86_64_TLSLD }, Imm32|Imm32S|Disp32 }, + { "GOTTPOFF", { BFD_RELOC_386_TLS_IE_32, BFD_RELOC_X86_64_GOTTPOFF }, Imm32|Imm32S|Disp32 }, + { "TPOFF", { BFD_RELOC_386_TLS_LE_32, BFD_RELOC_X86_64_TPOFF32 }, Imm32|Imm32S|Imm64|Disp32|Disp64 }, + { "NTPOFF", { BFD_RELOC_386_TLS_LE, 0 }, 0 }, + { "DTPOFF", { BFD_RELOC_386_TLS_LDO_32, BFD_RELOC_X86_64_DTPOFF32 }, Imm32|Imm32S|Imm64|Disp32|Disp64 }, + { "GOTNTPOFF",{ BFD_RELOC_386_TLS_GOTIE, 0 }, 0 }, + { "INDNTPOFF",{ BFD_RELOC_386_TLS_IE, 0 }, 0 }, + { "GOT", { BFD_RELOC_386_GOT32, BFD_RELOC_X86_64_GOT32 }, Imm32|Imm32S|Disp32 } }; char *cp; unsigned int j; @@ -3815,12 +3815,12 @@ lex_got (enum bfd_reloc_code_real *reloc, len = strlen (gotrel[j].str); if (strncasecmp (cp + 1, gotrel[j].str, len) == 0) { - if (gotrel[j].rel[(unsigned int) flag_code] != 0) + if (gotrel[j].rel[object_64bit] != 0) { int first, second; char *tmpbuf, *past_reloc; - *reloc = gotrel[j].rel[(unsigned int) flag_code]; + *reloc = gotrel[j].rel[object_64bit]; if (adjust) *adjust = len; @@ -3859,8 +3859,8 @@ lex_got (enum bfd_reloc_code_real *reloc, return tmpbuf; } - as_bad (_("@%s reloc is not supported in %s bit mode"), - gotrel[j].str, mode_name[(unsigned int) flag_code]); + as_bad (_("@%s reloc is not supported with %d-bit output format"), + gotrel[j].str, 1 << (5 + object_64bit)); return NULL; } } @@ -3890,7 +3890,7 @@ x86_cons (exp, size) expressionS *exp; int size; { - if (size == 4 || (flag_code == CODE_64BIT && size == 8)) + if (size == 4 || (object_64bit && size == 8)) { /* Handle @GOTOFF and the like in an expression. */ char *save; @@ -5319,7 +5319,10 @@ i386_target_format () case bfd_target_elf_flavour: { if (flag_code == CODE_64BIT) - use_rela_relocations = 1; + { + object_64bit = 1; + use_rela_relocations = 1; + } return flag_code == CODE_64BIT ? "elf64-x86-64" : ELF_TARGET_FORMAT; } #endif @@ -5456,13 +5459,13 @@ i386_validate_fix (fixp) { if (fixp->fx_r_type == BFD_RELOC_32_PCREL) { - if (flag_code != CODE_64BIT) + if (!object_64bit) abort (); fixp->fx_r_type = BFD_RELOC_X86_64_GOTPCREL; } else { - if (flag_code != CODE_64BIT) + if (!object_64bit) fixp->fx_r_type = BFD_RELOC_386_GOTOFF; else fixp->fx_r_type = BFD_RELOC_X86_64_GOTOFF64; @@ -5564,7 +5567,7 @@ tc_gen_reloc (section, fixp) && GOT_symbol && fixp->fx_addsy == GOT_symbol) { - if (flag_code != CODE_64BIT) + if (!object_64bit) code = BFD_RELOC_386_GOTPC; else code = BFD_RELOC_X86_64_GOTPC32; diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index d5860c9..23d5afd 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2005-08-22 Jan Beulich <jbeulich@novell.com> + + * gas/i386/mixed-mode-reloc.s, gas/i386/mixed-mode-reloc32.d, + gas/i386/mixed-mode-reloc64.d: New. + * gas/i386/i386.exp: Run new tests. + 2005-08-15 Paul Brook <paul@codesourcery.com> * gas/arm/thumb2_it.s: Add more instruction variants. diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 8981092..0e3f696 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -107,6 +107,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "bss" run_dump_test "reloc32" run_list_test "reloc32" "--defsym _bad_=1" + run_dump_test "mixed-mode-reloc32" } # This is a PE specific test. @@ -150,6 +151,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t if [is_elf_format] then { run_dump_test "reloc64" run_list_test "reloc64" "--defsym _bad_=1" + run_dump_test "mixed-mode-reloc64" } set ASFLAGS "$old_ASFLAGS" diff --git a/gas/testsuite/gas/i386/mixed-mode-reloc.s b/gas/testsuite/gas/i386/mixed-mode-reloc.s new file mode 100644 index 0000000..1b1a7fe --- /dev/null +++ b/gas/testsuite/gas/i386/mixed-mode-reloc.s @@ -0,0 +1,16 @@ + .text + + .code16 +_start16: +#FIXME movl xtrn@got(%ebx), %eax +#FIXME calll xtrn@plt + + .code32 +_start32: +#FIXME movl xtrn@got(%ebx), %eax + calll xtrn@plt + + .code64 +_start64: + movq xtrn@got(%rbx), %rax + callq xtrn@plt diff --git a/gas/testsuite/gas/i386/mixed-mode-reloc32.d b/gas/testsuite/gas/i386/mixed-mode-reloc32.d new file mode 100644 index 0000000..2dba860 --- /dev/null +++ b/gas/testsuite/gas/i386/mixed-mode-reloc32.d @@ -0,0 +1,14 @@ +#objdump: -r +#source: mixed-mode-reloc.s +#name: x86 mixed mode relocs (32-bit object) + +.*: +file format .*i386.* + +RELOCATION RECORDS FOR \[.text\]: +OFFSET[ ]+TYPE[ ]+VALUE[ ]* +#[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]* +#[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]* +#[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]* +[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]* +[0-9a-f]+[ ]+R_386_GOT32[ ]+xtrn[ ]* +[0-9a-f]+[ ]+R_386_PLT32[ ]+xtrn[ ]* diff --git a/gas/testsuite/gas/i386/mixed-mode-reloc64.d b/gas/testsuite/gas/i386/mixed-mode-reloc64.d new file mode 100644 index 0000000..9c99eef --- /dev/null +++ b/gas/testsuite/gas/i386/mixed-mode-reloc64.d @@ -0,0 +1,14 @@ +#objdump: -r +#source: mixed-mode-reloc.s +#name: x86 mixed mode relocs (64-bit object) + +.*: +file format .*x86-64.* + +RELOCATION RECORDS FOR \[.text\]: +OFFSET[ ]+TYPE[ ]+VALUE[ ]* +#[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]* +#[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]* +#[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]* +[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]* +[0-9a-f]+[ ]+R_X86_64_GOT32[ ]+xtrn[ ]* +[0-9a-f]+[ ]+R_X86_64_PLT32[ ]+xtrn\+0xf+c[ ]* |