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authorStephen Casner <casner@acm.org>2020-06-03 13:42:54 -0700
committerStephen Casner <casner@acm.org>2020-06-03 13:42:54 -0700
commit338d56a848007d806190e53c8ea53764060a7abb (patch)
tree4b1ac236555b306ab24a8909735df2e8ed112f64
parentd4d8aee345704f7c39ebe9910cc08386708637b1 (diff)
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* gas/doc/c-riscv.texi (RISC-V-Options): Fix non-ASCII apostrophe.
-rw-r--r--gas/ChangeLog4
-rw-r--r--gas/doc/c-riscv.texi2
2 files changed, 5 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index c463de1..210017b 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,7 @@
+2020-06-03 Stephen Casner <casner@acm.org>
+
+ * doc/c-riscv.texi (RISC-V-Options): Fix non-ASCII apostrophe.
+
2020-06-02 Frédéric Pétrot <frederic.petrot@univ-grenoble-alpes.fr>
Jim Wilson <jimw@sifive.com>
diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi
index 57ba9fa..8937bc8 100644
--- a/gas/doc/c-riscv.texi
+++ b/gas/doc/c-riscv.texi
@@ -42,7 +42,7 @@ Don't generate position-independent code (default)
@cindex @samp{-march=ISA} option, RISC-V
@item -march=ISA
Select the base isa, as specified by ISA. For example -march=rv32ima.
-If this option and the architecture attributes aren’t set, then assembler
+If this option and the architecture attributes aren't set, then assembler
will check the default configure setting --with-arch=ISA.
@cindex @samp{-misa-spec=ISAspec} option, RISC-V