i386: Check vector length for EVEX vextractfXX and vinsertfXX

Since not all vector lengths are supported by EVEX vextractfXX and
vinsertfXX, decode them only with supported vector lengths.

gas/

	PR binutils/24633
	* testsuite/gas/i386/disassem.s: Add tests for invalid vector
	lengths for EVEX vextractfXX and vinsertfXX.
	* testsuite/gas/i386/x86-64-disassem.s: Likewise.
	* testsuite/gas/i386/disassem.d: Updated.
	* testsuite/gas/i386/x86-64-disassem.d: Likewise.

opcodes/

	PR binutils/24633
	* i386-dis-evex.h (evex_table): Update EVEX_W_0F3A18_P_2,
	EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2 and EVEX_W_0F3A1B_P_2.
	(evex_len_table): EVEX_LEN_0F3A18_P_2_W_0,
	EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
	EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
	EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
	EVEX_LEN_0F3A1B_P_2_W_1.
	* i386-dis.c (EVEX_LEN_0F3A18_P_2_W_0): New enum.
	(EVEX_LEN_0F3A18_P_2_W_1): Likewise.
	(EVEX_LEN_0F3A19_P_2_W_0): Likewise.
	(EVEX_LEN_0F3A19_P_2_W_1): Likewise.
	(EVEX_LEN_0F3A1A_P_2_W_0): Likewise.
	(EVEX_LEN_0F3A1A_P_2_W_1): Likewise.
	(EVEX_LEN_0F3A1B_P_2_W_0): Likewise.
	(EVEX_LEN_0F3A1B_P_2_W_1): Likewise.

8 files changed, 113 insertions, 11 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 036d734..88bba08 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2019-06-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/24633
+	* testsuite/gas/i386/disassem.s: Add tests for invalid vector
+	lengths for EVEX vextractfXX and vinsertfXX.
+	* testsuite/gas/i386/x86-64-disassem.s: Likewise.
+	* testsuite/gas/i386/disassem.d: Updated.
+	* testsuite/gas/i386/x86-64-disassem.d: Likewise.
+
 2019-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR binutils/24626
diff --git a/gas/testsuite/gas/i386/disassem.d b/gas/testsuite/gas/i386/disassem.d
index ff9ee49..530e3a1 100644
--- a/gas/testsuite/gas/i386/disassem.d
+++ b/gas/testsuite/gas/i386/disassem.d
@@ -345,5 +345,8 @@ Disassembly of section \.text:
 [ 	]*[a-f0-9]+:[ 	]*41[ 	]*inc[ 	]*%ecx
 [ 	]*[a-f0-9]+:[ 	]*37[ 	]*aaa[ ]*
 [ 	]*[a-f0-9]+:[ 	]*62 f2 ad 08 1c[ 	]*\(bad\)[ ]*
-[ 	]*[a-f0-9]+:[ 	]*01[ 	]*.byte[ 	]*0x1
+[ 	]*[a-f0-9]+:[ 	]*01 01[ 	]*add[ 	]*%eax,\(%ecx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7d 28 1b[ 	]*\(bad\)[ ]*
+[ 	]*[a-f0-9]+:[ 	]*c8[ 	]*.byte[ 	]*0xc8
+[ 	]*[a-f0-9]+:[ 	]*25[ 	]*.byte[ 	]*0x25
 #pass
diff --git a/gas/testsuite/gas/i386/disassem.s b/gas/testsuite/gas/i386/disassem.s
index 700208a..00eeb39 100644
--- a/gas/testsuite/gas/i386/disassem.s
+++ b/gas/testsuite/gas/i386/disassem.s
@@ -169,3 +169,5 @@
 .byte 0xC4, 0xE1, 0xF9, 0x93, 0x3F
 .byte 0xc4, 0xe2, 0x1, 0x1c, 0x41, 0x37
 .byte 0x62, 0xf2, 0xad, 0x08, 0x1c, 0x01
+.byte 0x1
+.byte 0x62, 0xf3, 0x7d, 0x28, 0x1b, 0xc8, 0x25
diff --git a/gas/testsuite/gas/i386/x86-64-disassem.d b/gas/testsuite/gas/i386/x86-64-disassem.d
index c8277bf..a7c2c3e 100644
--- a/gas/testsuite/gas/i386/x86-64-disassem.d
+++ b/gas/testsuite/gas/i386/x86-64-disassem.d
@@ -344,5 +344,8 @@ Disassembly of section \.text:
 [ 	]*[a-f0-9]+:[ 	]*c4 62 01 1c[ 	]*\(bad\)[ ]*
 [ 	]*[a-f0-9]+:[ 	]*41 37[ 	]*rex.B \(bad\)[ ]*
 [ 	]*[a-f0-9]+:[ 	]*62 72 ad 08 1c[ 	]*\(bad\)[ ]*
-[ 	]*[a-f0-9]+:[ 	]*01[ 	]*.byte[ 	]*0x1
+[ 	]*[a-f0-9]+:[ 	]*01 01[ 	]*add[ 	]*%eax,\(%rcx\)
+[ 	]*[a-f0-9]+:[ 	]*62 f3 7d 28 1b[ 	]*\(bad\)[ ]*
+[ 	]*[a-f0-9]+:[ 	]*c8[ 	]*.byte[ 	]*0xc8
+[ 	]*[a-f0-9]+:[ 	]*25[ 	]*.byte[ 	]*0x25
 #pass
diff --git a/gas/testsuite/gas/i386/x86-64-disassem.s b/gas/testsuite/gas/i386/x86-64-disassem.s
index ade5e15..ef4e87d 100644
--- a/gas/testsuite/gas/i386/x86-64-disassem.s
+++ b/gas/testsuite/gas/i386/x86-64-disassem.s
@@ -169,3 +169,5 @@
 .byte 0xC4, 0xE1, 0xF9, 0x93, 0x3F
 .byte 0xc4, 0x62, 0x1, 0x1c, 0x41, 0x37
 .byte 0x62, 0x72, 0xad, 0x08, 0x1c, 0x01
+.byte 0x1
+.byte 0x62, 0xf3, 0x7d, 0x28, 0x1b, 0xc8, 0x25
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9f5b347..8d72ded 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,22 @@
+2019-06-05  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR binutils/24633
+	* i386-dis-evex.h (evex_table): Update EVEX_W_0F3A18_P_2,
+	EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2 and EVEX_W_0F3A1B_P_2.
+	(evex_len_table): EVEX_LEN_0F3A18_P_2_W_0,
+	EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
+	EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
+	EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
+	EVEX_LEN_0F3A1B_P_2_W_1.
+	* i386-dis.c (EVEX_LEN_0F3A18_P_2_W_0): New enum.
+	(EVEX_LEN_0F3A18_P_2_W_1): Likewise.
+	(EVEX_LEN_0F3A19_P_2_W_0): Likewise.
+	(EVEX_LEN_0F3A19_P_2_W_1): Likewise.
+	(EVEX_LEN_0F3A1A_P_2_W_0): Likewise.
+	(EVEX_LEN_0F3A1A_P_2_W_1): Likewise.
+	(EVEX_LEN_0F3A1B_P_2_W_0): Likewise.
+	(EVEX_LEN_0F3A1B_P_2_W_1): Likewise.
+
 2019-06-04  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR binutils/24626
diff --git a/opcodes/i386-dis-evex.h b/opcodes/i386-dis-evex.h
index 9965d4f..0003e77 100644
--- a/opcodes/i386-dis-evex.h
+++ b/opcodes/i386-dis-evex.h
@@ -3912,23 +3912,23 @@ static const struct dis386 evex_table[][256] = {
   },
   /* EVEX_W_0F3A18_P_2 */
   {
-    { "vinsertf32x4",	{ XM, Vex, EXxmm, Ib }, 0 },
-    { "vinsertf64x2",	{ XM, Vex, EXxmm, Ib }, 0 },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A18_P_2_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A18_P_2_W_1) },
   },
   /* EVEX_W_0F3A19_P_2 */
   {
-    { "vextractf32x4",	{ EXxmm, XM, Ib }, 0 },
-    { "vextractf64x2",	{ EXxmm, XM, Ib }, 0 },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A19_P_2_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A19_P_2_W_1) },
   },
   /* EVEX_W_0F3A1A_P_2 */
   {
-    { "vinsertf32x8",	{ XM, Vex, EXxmmq, Ib }, 0 },
-    { "vinsertf64x4",	{ XM, Vex, EXxmmq, Ib }, 0 },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A1A_P_2_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A1A_P_2_W_1) },
   },
   /* EVEX_W_0F3A1B_P_2 */
   {
-    { "vextractf32x8",	{ EXxmmq, XM, Ib }, 0 },
-    { "vextractf64x4",	{ EXxmmq, XM, Ib }, 0 },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A1B_P_2_W_0) },
+    { EVEX_LEN_TABLE (EVEX_LEN_0F3A1B_P_2_W_1) },
   },
   /* EVEX_W_0F3A1D_P_2 */
   {
@@ -4129,4 +4129,60 @@ static const struct dis386 evex_table[][256] = {
     { VEX_W_TABLE (EVEX_W_0FD6_P_2) },
   },
 
+  /* EVEX_LEN_0F3A18_P_2_W_0 */
+  {
+    { Bad_Opcode },
+    { "vinsertf32x4",	{ XM, Vex, EXxmm, Ib }, 0 },
+    { "vinsertf32x4",	{ XM, Vex, EXxmm, Ib }, 0 },
+  },
+
+  /* EVEX_LEN_0F3A18_P_2_W_1 */
+  {
+    { Bad_Opcode },
+    { "vinsertf64x2",	{ XM, Vex, EXxmm, Ib }, 0 },
+    { "vinsertf64x2",	{ XM, Vex, EXxmm, Ib }, 0 },
+  },
+
+  /* EVEX_LEN_0F3A19_P_2_W_0 */
+  {
+    { Bad_Opcode },
+    { "vextractf32x4",	{ EXxmm, XM, Ib }, 0 },
+    { "vextractf32x4",	{ EXxmm, XM, Ib }, 0 },
+  },
+
+  /* EVEX_LEN_0F3A19_P_2_W_1 */
+  {
+    { Bad_Opcode },
+    { "vextractf64x2",	{ EXxmm, XM, Ib }, 0 },
+    { "vextractf64x2",	{ EXxmm, XM, Ib }, 0 },
+  },
+
+  /* EVEX_LEN_0F3A1A_P_2_W_0 */
+  {
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vinsertf32x8",	{ XM, Vex, EXxmmq, Ib }, 0 },
+  },
+
+  /* EVEX_LEN_0F3A1A_P_2_W_1 */
+  {
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vinsertf64x4",	{ XM, Vex, EXxmmq, Ib }, 0 },
+  },
+
+  /* EVEX_LEN_0F3A1B_P_2_W_0 */
+  {
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vextractf32x8",	{ EXxmmq, XM, Ib }, 0 },
+  },
+
+  /* EVEX_LEN_0F3A1B_P_2_W_1 */
+  {
+    { Bad_Opcode },
+    { Bad_Opcode },
+    { "vextractf64x4",	{ EXxmmq, XM, Ib }, 0 },
+  },
+
 #endif /* NEED_EVEX_LEN_TABLE */
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index f597539..5d1bd6b 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1937,7 +1937,15 @@ enum
   EVEX_LEN_0F6E_P_2 = 0,
   EVEX_LEN_0F7E_P_1,
   EVEX_LEN_0F7E_P_2,
-  EVEX_LEN_0FD6_P_2
+  EVEX_LEN_0FD6_P_2,
+  EVEX_LEN_0F3A18_P_2_W_0,
+  EVEX_LEN_0F3A18_P_2_W_1,
+  EVEX_LEN_0F3A19_P_2_W_0,
+  EVEX_LEN_0F3A19_P_2_W_1,
+  EVEX_LEN_0F3A1A_P_2_W_0,
+  EVEX_LEN_0F3A1A_P_2_W_1,
+  EVEX_LEN_0F3A1B_P_2_W_0,
+  EVEX_LEN_0F3A1B_P_2_W_1
 };
 
 enum