aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMike Frysinger <vapier@gentoo.org>2021-05-13 05:44:02 -0400
committerMike Frysinger <vapier@gentoo.org>2021-05-17 01:02:09 -0400
commit10c23a2c6fec069ef8279fc19f625348da70cd0d (patch)
treecf41d7afc62bb9f64c08aa8fb9fb9a57456c8bde
parent2ad10cb22246b16fdebece06646db288dbea1fdb (diff)
downloadgdb-10c23a2c6fec069ef8279fc19f625348da70cd0d.zip
gdb-10c23a2c6fec069ef8279fc19f625348da70cd0d.tar.gz
gdb-10c23a2c6fec069ef8279fc19f625348da70cd0d.tar.bz2
sim: riscv: invert sim_state storage
-rw-r--r--sim/riscv/ChangeLog9
-rw-r--r--sim/riscv/interp.c3
-rw-r--r--sim/riscv/sim-main.c13
-rw-r--r--sim/riscv/sim-main.h9
4 files changed, 22 insertions, 12 deletions
diff --git a/sim/riscv/ChangeLog b/sim/riscv/ChangeLog
index 53081dc..e7cd0a3 100644
--- a/sim/riscv/ChangeLog
+++ b/sim/riscv/ChangeLog
@@ -1,3 +1,12 @@
+2021-05-17 Mike Frysinger <vapier@gentoo.org>
+
+ * interp.c (sim_open): Call sim_state_alloc_extra.
+ * sim-main.c (execute_a): Change sd to riscv_sim_state.
+ * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
+ (struct sim_state): Delete.
+ (struct riscv_sim_state): New struct.
+ (RISCV_SIM_STATE): Define.
+
2021-05-16 Mike Frysinger <vapier@gentoo.org>
* interp.c, machs.c, sim-main.c: Replace config.h include with defs.h.
diff --git a/sim/riscv/interp.c b/sim/riscv/interp.c
index d430d77..f3754da 100644
--- a/sim/riscv/interp.c
+++ b/sim/riscv/interp.c
@@ -59,7 +59,8 @@ sim_open (SIM_OPEN_KIND kind, host_callback *callback,
{
char c;
int i;
- SIM_DESC sd = sim_state_alloc (kind, callback);
+ SIM_DESC sd = sim_state_alloc_extra (kind, callback,
+ sizeof (struct riscv_sim_state));
/* The cpu data is kept in a separately allocated chunk of memory. */
if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c
index 7f87f1b..a09ae03 100644
--- a/sim/riscv/sim-main.c
+++ b/sim/riscv/sim-main.c
@@ -794,6 +794,7 @@ static sim_cia
execute_a (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
{
SIM_DESC sd = CPU_STATE (cpu);
+ struct riscv_sim_state *state = RISCV_SIM_STATE (sd);
int rd = (iw >> OP_SH_RD) & OP_MASK_RD;
int rs1 = (iw >> OP_SH_RS1) & OP_MASK_RS1;
int rs2 = (iw >> OP_SH_RS2) & OP_MASK_RS2;
@@ -813,7 +814,7 @@ execute_a (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
sim_core_read_unaligned_4 (cpu, cpu->pc, read_map, cpu->regs[rs1]));
/* Walk the reservation list to find an existing match. */
- amo_curr = sd->amo_reserved_list;
+ amo_curr = state->amo_reserved_list;
while (amo_curr)
{
if (amo_curr->addr == cpu->regs[rs1])
@@ -824,15 +825,15 @@ execute_a (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
/* No reservation exists, so add one. */
amo_curr = xmalloc (sizeof (*amo_curr));
amo_curr->addr = cpu->regs[rs1];
- amo_curr->next = sd->amo_reserved_list;
- sd->amo_reserved_list = amo_curr;
+ amo_curr->next = state->amo_reserved_list;
+ state->amo_reserved_list = amo_curr;
goto done;
case MATCH_SC_W:
TRACE_INSN (cpu, "%s %s, %s, (%s);", op->name, rd_name, rs2_name,
rs1_name);
/* Walk the reservation list to find a match. */
- amo_curr = amo_prev = sd->amo_reserved_list;
+ amo_curr = amo_prev = state->amo_reserved_list;
while (amo_curr)
{
if (amo_curr->addr == cpu->regs[rs1])
@@ -841,8 +842,8 @@ execute_a (SIM_CPU *cpu, unsigned_word iw, const struct riscv_opcode *op)
sim_core_write_unaligned_4 (cpu, cpu->pc, write_map,
cpu->regs[rs1], cpu->regs[rs2]);
store_rd (cpu, rd, 0);
- if (amo_curr == sd->amo_reserved_list)
- sd->amo_reserved_list = amo_curr->next;
+ if (amo_curr == state->amo_reserved_list)
+ state->amo_reserved_list = amo_curr->next;
else
amo_prev->next = amo_curr->next;
free (amo_curr);
diff --git a/sim/riscv/sim-main.h b/sim/riscv/sim-main.h
index 4a1b31e..fd09539 100644
--- a/sim/riscv/sim-main.h
+++ b/sim/riscv/sim-main.h
@@ -21,6 +21,8 @@
#ifndef SIM_MAIN_H
#define SIM_MAIN_H
+#define SIM_HAVE_COMMON_SIM_STATE
+
#include "sim-basics.h"
#include "machs.h"
#include "sim-base.h"
@@ -66,13 +68,10 @@ struct atomic_mem_reserved_list {
address_word addr;
};
-struct sim_state {
- sim_cpu *cpu[MAX_NR_PROCESSORS];
+struct riscv_sim_state {
struct atomic_mem_reserved_list *amo_reserved_list;
-
- /* ... simulator specific members ... */
- sim_state_base base;
};
+#define RISCV_SIM_STATE(sd) ((struct riscv_sim_state *) STATE_ARCH_DATA (sd))
extern void step_once (SIM_CPU *);
extern void initialize_cpu (SIM_DESC, SIM_CPU *, int);