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| author | WANG Xuerui <git@xen0n.name> | 2023-07-02 19:10:52 +0800 |
|---|---|---|
| committer | liuzhensong <liuzhensong@loongson.cn> | 2023-07-03 09:00:48 +0800 |
| commit | 0ed3ac2f4a06cb842065d4cf2d1fe1c269d508b9 (patch) | |
| tree | ca7a8834990bf6aa9a1ddbbc8e22330c4b03149d | |
| parent | 4bf2114b634413e224c990593455168b873519d9 (diff) | |
| download | gdb-0ed3ac2f4a06cb842065d4cf2d1fe1c269d508b9.zip gdb-0ed3ac2f4a06cb842065d4cf2d1fe1c269d508b9.tar.gz gdb-0ed3ac2f4a06cb842065d4cf2d1fe1c269d508b9.tar.bz2 | |
binutils: NEWS: Announce LoongArch changes in the 2.41 cycle
binutils/ChangeLog:
* NEWS: Mention LoongArch changes for 2.41.
Signed-off-by: WANG Xuerui <git@xen0n.name>
| -rw-r--r-- | binutils/NEWS | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/binutils/NEWS b/binutils/NEWS index 834e648..939cfea 100644 --- a/binutils/NEWS +++ b/binutils/NEWS @@ -29,6 +29,20 @@ * The RISC-V port now supports the following vendor-defined extensions: - XVentanaCondOps +* The LoongArch port now supports the following extensions: + - LSX (Loongson SIMD eXtension; 128-bit vectors) + - LASX (Loongson Advanced SIMD eXtension; 256-bit vectors) + - LVZ (Loongson Virtualization extension) + - LBT (Loongson Binary Translation extension) + +* The LoongArch disassembly output received the following tweaks: + - Colored output is now supported. + - Some pseudo-instructions are now shown in place of the canonical forms, + where semantics are equivalent. A disassembler option '-M no-aliases' is + added to disable the new behavior. + - Signed immediates are no longer printed with their hex representation. + - Unrecognized instruction words are now shown with '.word'. + Changes in 2.40: * Objdump has a new command line option --show-all-symbols which will make it |