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author | Jan Beulich <jbeulich@suse.com> | 2024-02-09 08:38:04 +0100 |
---|---|---|
committer | Jan Beulich <jbeulich@suse.com> | 2024-02-09 08:38:04 +0100 |
commit | 066673f6d5ef258b9534f6baaa3d52fa35905b00 (patch) | |
tree | 2f82f794e36c913563ef27d51d1be8950455ff52 | |
parent | 272b9416f3ce062de0c28f8dfa2a4112993dd77c (diff) | |
download | gdb-066673f6d5ef258b9534f6baaa3d52fa35905b00.zip gdb-066673f6d5ef258b9534f6baaa3d52fa35905b00.tar.gz gdb-066673f6d5ef258b9534f6baaa3d52fa35905b00.tar.bz2 |
x86: change type of Dwarf2 register numbers in register table
Already the %bnd<N> registers used numbers beyond 127, and eGPR ones are
all out of reach for "signed char", at least when CHAR_BITS=8. Switch to
"unsigned char", covering appropriately in places where the value
returned for "none" actually matters (in tc_x86_parse_to_dw2regnum()
this is actually achieved by altering how X_op is set).
-rw-r--r-- | gas/config/tc-i386.c | 14 | ||||
-rw-r--r-- | opcodes/i386-opc.h | 4 |
2 files changed, 8 insertions, 10 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 9e7bb1d..925986f 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -5396,10 +5396,8 @@ ginsn_opsize_prefix_p (void) static unsigned int ginsn_dw2_regnum (const reg_entry *ireg) { - /* PS: Note the data type here as int32_t, because of Dw2Inval (-1). */ - int32_t dwarf_reg = Dw2Inval; const reg_entry *temp = ireg; - unsigned int idx = 0; + unsigned int dwarf_reg = Dw2Inval, idx = 0; /* ginsn creation is available for AMD64 abi only ATM. Other flag_code are not expected. */ @@ -5442,9 +5440,9 @@ ginsn_dw2_regnum (const reg_entry *ireg) /* Sanity check - failure may indicate state corruption, bad ginsn or perhaps the i386-reg table and the current function got out of sync. */ - gas_assert (dwarf_reg >= 0); + gas_assert (dwarf_reg < Dw2Inval); - return (unsigned int) dwarf_reg; + return dwarf_reg; } static ginsnS * @@ -17546,14 +17544,14 @@ tc_x86_parse_to_dw2regnum (expressionS *exp) if (exp->X_op == O_register && exp->X_add_number >= 0) { + exp->X_op = O_illegal; if ((addressT) exp->X_add_number < i386_regtab_size) { - exp->X_op = O_constant; exp->X_add_number = i386_regtab[exp->X_add_number] .dw2_regnum[flag_code >> 1]; + if (exp->X_add_number != Dw2Inval) + exp->X_op = O_constant; } - else - exp->X_op = O_illegal; } } diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 004d9ee..0a2c44a 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -1051,7 +1051,7 @@ typedef struct #define RegIZ (RegIP - 1) /* FLAT is a fake segment register (Intel mode). */ #define RegFlat ((unsigned char) ~0) - signed char dw2_regnum[2]; -#define Dw2Inval (-1) + unsigned char dw2_regnum[2]; +#define Dw2Inval 0xff } reg_entry; |