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author | Andrew Haley <aph@redhat.com> | 2000-02-22 19:01:25 +0000 |
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committer | Andrew Haley <aph@redhat.com> | 2000-02-22 19:01:25 +0000 |
commit | 87f398dd6a71a1d10f378be4ad51da680034260f (patch) | |
tree | 501074e95e3baf116e81370249e0a355c678cb92 | |
parent | 6349b5f4900c4ab462bdf205da066467d4f852c2 (diff) | |
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g2000-02-22 Andrew Haley <aph@cygnus.com>
* mips.h: (OPCODE_IS_MEMBER): Add comment.
-rw-r--r-- | include/opcode/ChangeLog | 4 | ||||
-rw-r--r-- | include/opcode/mips.h | 5 |
2 files changed, 8 insertions, 1 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index b95bb22..b5befb8 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2000-02-22 Andrew Haley <aph@cygnus.com> + + * mips.h: (OPCODE_IS_MEMBER): Add comment. + 1999-12-30 Andrew Haley <aph@cygnus.com> * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 3f9207f..68fe57a 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -326,7 +326,10 @@ struct mips_opcode /* Test for membership in an ISA including chip specific ISAs. INSN is pointer to an element of the opcode table; ISA is the specified ISA to test against; and CPU is the CPU specific ISA - to test, or zero if no CPU specific ISA test is desired. */ + to test, or zero if no CPU specific ISA test is desired. + The gp32 arg is set when you need to force 32-bit register usage on + a machine with 64-bit registers; see the documentation under -mgp32 + in the MIPS gas docs. */ #define OPCODE_IS_MEMBER(insn,isa,cpu,gp32) \ ((((insn)->membership & INSN_ISA) != 0 \ |