From 87f398dd6a71a1d10f378be4ad51da680034260f Mon Sep 17 00:00:00 2001 From: Andrew Haley Date: Tue, 22 Feb 2000 19:01:25 +0000 Subject: g2000-02-22 Andrew Haley * mips.h: (OPCODE_IS_MEMBER): Add comment. --- include/opcode/ChangeLog | 4 ++++ include/opcode/mips.h | 5 ++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index b95bb22..b5befb8 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2000-02-22 Andrew Haley + + * mips.h: (OPCODE_IS_MEMBER): Add comment. + 1999-12-30 Andrew Haley * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 3f9207f..68fe57a 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -326,7 +326,10 @@ struct mips_opcode /* Test for membership in an ISA including chip specific ISAs. INSN is pointer to an element of the opcode table; ISA is the specified ISA to test against; and CPU is the CPU specific ISA - to test, or zero if no CPU specific ISA test is desired. */ + to test, or zero if no CPU specific ISA test is desired. + The gp32 arg is set when you need to force 32-bit register usage on + a machine with 64-bit registers; see the documentation under -mgp32 + in the MIPS gas docs. */ #define OPCODE_IS_MEMBER(insn,isa,cpu,gp32) \ ((((insn)->membership & INSN_ISA) != 0 \ -- cgit v1.1