aboutsummaryrefslogtreecommitdiff
path: root/gcc/testsuite/gcc.target/powerpc/pr89213.c
blob: 90a8b1b5787b9d92e11b1c828c46e3c3a658506a (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
/* { dg-do compile } */
/* { dg-require-effective-target powerpc_vsx } */
/* { dg-options "-mcpu=power9 -O2" } */

/* Optimize vector shifts by constants.  */

#include <altivec.h>

typedef vector long long vi64_t;
typedef vector unsigned long long vui64_t;

typedef vector int vi32_t;
typedef vector unsigned int vui32_t;

vi64_t
shiftra_test64_4 (vi64_t a)
{
  vui64_t x = {4, 4};
  return (vi64_t) vec_vsrad (a, x);
}

vi64_t
shiftrl_test64_4 (vi64_t a)
{
  vui64_t x = {4, 4};
  return (vi64_t) vec_vsrd (a, x);
}

vi64_t
shiftl_test64_4 (vi64_t a)
{
  vui64_t x = {4, 4};
  return (vi64_t) vec_vsld (a, x);
}

vi64_t
shiftra_test64_29 (vi64_t a)
{
  vui64_t x = {29, 29};
  return (vi64_t) vec_vsrad (a, x);
}

vi64_t
shiftrl_test64_29 (vi64_t a)
{
  vui64_t x = {29, 29};
  return (vi64_t) vec_vsrd (a, x);
}

vi64_t
shiftl_test64_29 (vi64_t a)
{
  vui64_t x = {29, 29};
  return (vi64_t) vec_vsld (a, x);
}

vi32_t
shiftra_test32_4 (vi32_t a)
{
  vui32_t x = {4, 4, 4, 4};
  return (vi32_t) vec_vsraw (a, x);
}

vi32_t
shiftrl_test32_4 (vi32_t a)
{
  vui32_t x = {4, 4, 4, 4};
  return (vi32_t) vec_vsrw (a, x);
}

vi32_t
shiftl_test32_4 (vi32_t a)
{
  vui32_t x = {4, 4, 4, 4};
  return (vi32_t) vec_vslw (a, x);
}

vi32_t
shiftra_test32_29 (vi32_t a)
{
  vui32_t x = {29, 29, 29, 29};
  return (vi32_t) vec_vsraw (a, x);
}

vi32_t
shiftrl_test32_29 (vi32_t a)
{
  vui32_t x = {29, 29, 29, 29};
  return (vi32_t) vec_vsrw (a, x);
}

vi32_t
shiftl_test32_29 (vi32_t a)
{
  vui32_t x = {29, 29, 29, 29};
  return (vi32_t) vec_vslw (a, x);
}

/* { dg-final { scan-assembler-times {\mxxspltib\M}  6 } } */
/* { dg-final { scan-assembler-times {\mvsld\M}      2 } } */
/* { dg-final { scan-assembler-times {\mvslw\M}      2 } } */
/* { dg-final { scan-assembler-times {\mvspltisw\M}  6 } } */
/* { dg-final { scan-assembler-times {\mvsrd\M}      2 } } */
/* { dg-final { scan-assembler-times {\mvsrw\M}      2 } } */
/* { dg-final { scan-assembler-times {\mvsrad\M}     2 } } */
/* { dg-final { scan-assembler-times {\mvsraw\M}     2 } } */