1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
|
/* Verify that overloaded built-ins for vec_min with long long
inputs produce the right results. */
/* { dg-do compile } */
/* { dg-options "-mvsx" } */
/* { dg-additional-options "-mdejagnu-cpu=power8" { target { ! has_arch_pwr8 } } } */
/* { dg-require-effective-target powerpc_vsx } */
#include <altivec.h>
vector signed long long
test3_min (vector signed long long x, vector signed long long y)
{
return vec_min (x, y);
}
vector unsigned long long
test6_min (vector unsigned long long x, vector unsigned long long y)
{
return vec_min (x, y);
}
vector signed long long
test3_max (vector signed long long x, vector signed long long y)
{
return vec_max (x, y);
}
vector unsigned long long
test6_max (vector unsigned long long x, vector unsigned long long y)
{
return vec_max (x, y);
}
vector signed long long
test7_max (vector signed long long x, vector long long bool y)
{
return vec_max (x, y);
}
vector signed long long
test8_max (vector long long bool x, vector signed long long y)
{
return vec_max (x, y);
}
vector unsigned long long
test9_max (vector unsigned long long x, vector long long bool y)
{
return vec_max (x, y);
}
vector unsigned long long
test10_max (vector long long bool x, vector unsigned long long y)
{
return vec_max (x, y);
}
/* { dg-final { scan-assembler-times "vminsd" 1 } } */
/* { dg-final { scan-assembler-times "vmaxsd" 3 } } */
/* { dg-final { scan-assembler-times "vminud" 1 } } */
/* { dg-final { scan-assembler-times "vmaxud" 3 } } */
|
