1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
|
/* Verify that overloaded built-ins for vec_or, vec_xor, vec_nor with
* long long inputs produce the right results. */
/* { dg-do compile } */
/* { dg-options "-mvsx -O2" } */
/* { dg-additional-options "-mdejagnu-cpu=power8" { target { ! has_arch_pwr8 } } } */
/* { dg-require-effective-target powerpc_vsx } */
#include <altivec.h>
vector signed long long
test1_or (vector bool long long x, vector signed long long y)
{
vector signed long long *foo;
*foo += vec_or (x, y);
return *foo;
}
vector signed long long
test1_xor (vector bool long long x, vector signed long long y)
{
vector signed long long *foo;
*foo += vec_xor (x, y);
return *foo;
}
vector signed long long
test1_nor (vector bool long long x, vector signed long long y)
{
vector signed long long *foo;
*foo += vec_nor (x, y);
return *foo;
}
vector signed long long
test2_or (vector signed long long x, vector bool long long y)
{
vector signed long long *foo;
*foo += vec_or (x, y);
return *foo;
}
vector signed long long
test2_xor (vector signed long long x, vector bool long long y)
{
vector signed long long *foo;
*foo += vec_xor (x, y);
return *foo;
}
vector signed long long
test2_nor (vector signed long long x, vector bool long long y)
{
vector signed long long *foo;
*foo += vec_nor (x, y);
return *foo;
}
vector signed long long
test3_or (vector signed long long x, vector signed long long y)
{
vector signed long long *foo;
*foo += vec_or (x, y);
return *foo;
}
vector signed long long
test3_xor (vector signed long long x, vector signed long long y)
{
vector signed long long *foo;
*foo += vec_xor (x, y);
return *foo;
}
vector signed long long
test3_nor (vector signed long long x, vector signed long long y)
{
vector signed long long *foo;
*foo += vec_nor (x, y);
return *foo;
}
vector unsigned long long
test4_or (vector bool long long x, vector unsigned long long y)
{
vector unsigned long long *foo;
*foo += vec_or (x, y);
return *foo;
}
vector unsigned long long
test4_xor (vector bool long long x, vector unsigned long long y)
{
vector unsigned long long *foo;
*foo += vec_xor (x, y);
return *foo;
}
vector unsigned long long
test4_nor (vector bool long long x, vector unsigned long long y)
{
vector unsigned long long *foo;
*foo += vec_nor (x, y);
return *foo;
}
vector unsigned long long
test5_or (vector unsigned long long x, vector bool long long y)
{
vector unsigned long long *foo;
*foo += vec_or (x, y);
return *foo;
}
vector unsigned long long
test5_xor (vector unsigned long long x, vector bool long long y)
{
vector unsigned long long *foo;
*foo += vec_xor (x, y);
return *foo;
}
vector unsigned long long
test5_nor (vector unsigned long long x, vector bool long long y)
{
vector unsigned long long *foo;
*foo += vec_nor (x, y);
return *foo;
}
vector unsigned long long
test6_or (vector unsigned long long x, vector unsigned long long y)
{
vector unsigned long long *foo;
*foo += vec_or (x, y);
return *foo;
}
vector unsigned long long
test6_xor (vector unsigned long long x, vector unsigned long long y)
{
vector unsigned long long *foo;
*foo += vec_xor (x, y);
return *foo;
}
vector unsigned long long
test6_nor (vector unsigned long long x, vector unsigned long long y)
{
vector unsigned long long *foo;
*foo += vec_nor (x, y);
return *foo;
}
// The number of xxlor instructions generated varies between 6 and 24 for
// older systems (power6,power7), as well as for 32-bit versus 64-bit targets.
// For simplicity, this test now only targets "powerpc_vsx" environments
// where the answer is expected to be 6.
/* { dg-final { scan-assembler-times {\mxxlor\M} 6 } } */
/* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */
/* { dg-final { scan-assembler-times {\mxxlnor\M} 6 } } */
|
