1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
2207
2208
2209
2210
2211
2212
2213
2214
2215
2216
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262
2263
2264
2265
2266
2267
2268
2269
2270
2271
2272
2273
2274
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331
2332
2333
2334
2335
2336
2337
2338
2339
2340
2341
2342
2343
2344
2345
2346
2347
2348
2349
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375
2376
2377
2378
2379
2380
2381
2382
2383
2384
2385
2386
2387
2388
2389
2390
2391
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419
2420
2421
2422
2423
2424
2425
2426
2427
2428
2429
2430
2431
2432
2433
2434
2435
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466
2467
2468
2469
2470
2471
2472
2473
2474
2475
2476
2477
2478
2479
2480
2481
2482
2483
2484
2485
2486
2487
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498
2499
2500
2501
2502
2503
2504
2505
2506
2507
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524
2525
2526
2527
2528
2529
2530
2531
2532
2533
2534
2535
2536
2537
2538
2539
2540
2541
2542
2543
2544
2545
2546
2547
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558
2559
2560
2561
2562
2563
2564
2565
2566
2567
2568
2569
2570
2571
2572
2573
2574
2575
2576
2577
2578
2579
2580
2581
2582
2583
2584
2585
2586
2587
2588
2589
2590
2591
2592
2593
2594
2595
2596
2597
2598
2599
2600
2601
2602
2603
2604
2605
2606
2607
2608
2609
2610
2611
2612
2613
2614
2615
2616
2617
2618
2619
2620
2621
2622
2623
2624
2625
2626
2627
2628
2629
2630
2631
2632
2633
2634
2635
2636
2637
2638
2639
2640
2641
2642
2643
2644
2645
2646
2647
2648
2649
2650
2651
2652
2653
2654
2655
2656
2657
2658
2659
2660
2661
2662
2663
2664
2665
2666
2667
2668
2669
2670
2671
2672
2673
2674
2675
2676
2677
2678
2679
2680
2681
2682
2683
2684
2685
2686
2687
2688
2689
2690
2691
2692
2693
2694
2695
2696
2697
2698
2699
2700
2701
2702
2703
2704
2705
2706
2707
2708
2709
2710
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730
2731
2732
2733
2734
2735
2736
2737
2738
2739
2740
2741
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761
2762
2763
2764
2765
2766
2767
2768
2769
2770
2771
2772
2773
2774
2775
2776
2777
2778
2779
2780
2781
2782
2783
2784
2785
2786
2787
2788
2789
2790
2791
2792
2793
2794
2795
2796
2797
2798
2799
2800
2801
2802
2803
2804
2805
2806
2807
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846
2847
2848
2849
2850
2851
2852
2853
2854
2855
2856
2857
2858
2859
2860
2861
2862
2863
2864
2865
2866
2867
2868
2869
2870
2871
2872
2873
2874
2875
2876
2877
2878
2879
2880
2881
2882
2883
2884
2885
2886
2887
2888
2889
2890
2891
2892
2893
2894
2895
2896
2897
2898
2899
2900
2901
2902
2903
2904
2905
2906
2907
2908
2909
2910
2911
2912
2913
2914
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945
2946
2947
2948
2949
2950
2951
2952
2953
2954
2955
2956
2957
2958
2959
2960
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979
2980
2981
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018
3019
3020
3021
3022
3023
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038
3039
3040
3041
3042
3043
3044
3045
3046
3047
3048
3049
3050
3051
3052
3053
3054
3055
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098
3099
3100
3101
3102
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129
3130
3131
3132
3133
3134
3135
3136
3137
3138
3139
3140
3141
3142
3143
3144
3145
3146
3147
3148
3149
3150
3151
3152
3153
3154
3155
3156
3157
3158
3159
3160
3161
3162
3163
3164
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191
3192
3193
3194
3195
3196
3197
3198
3199
3200
3201
3202
3203
3204
3205
3206
3207
3208
3209
3210
3211
3212
3213
3214
3215
3216
3217
3218
3219
3220
3221
3222
3223
3224
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235
3236
3237
3238
3239
3240
3241
3242
3243
3244
3245
3246
3247
3248
3249
3250
3251
3252
3253
3254
3255
3256
3257
3258
3259
3260
3261
3262
3263
3264
3265
3266
3267
3268
3269
3270
3271
3272
3273
3274
3275
3276
3277
3278
3279
3280
3281
3282
3283
3284
3285
3286
3287
3288
3289
3290
3291
3292
3293
3294
3295
3296
3297
3298
3299
3300
3301
3302
3303
3304
3305
3306
3307
3308
3309
3310
3311
3312
3313
3314
3315
3316
3317
3318
3319
3320
3321
3322
3323
3324
3325
3326
3327
3328
3329
3330
3331
3332
3333
3334
3335
3336
3337
3338
3339
3340
3341
3342
3343
3344
3345
3346
3347
3348
3349
3350
3351
3352
3353
3354
3355
3356
3357
3358
3359
3360
3361
3362
3363
3364
3365
3366
3367
3368
3369
3370
3371
3372
3373
3374
3375
3376
3377
3378
3379
3380
3381
3382
3383
3384
3385
3386
3387
3388
3389
3390
3391
3392
3393
3394
3395
3396
3397
3398
3399
3400
3401
3402
3403
3404
3405
3406
3407
3408
3409
3410
3411
3412
3413
3414
3415
3416
3417
3418
3419
3420
3421
3422
3423
3424
3425
3426
3427
3428
3429
3430
3431
3432
3433
3434
3435
3436
3437
3438
3439
3440
3441
3442
3443
3444
3445
3446
3447
3448
3449
3450
3451
3452
3453
3454
3455
3456
3457
3458
3459
3460
3461
3462
3463
3464
3465
3466
3467
3468
3469
3470
3471
3472
3473
3474
3475
3476
3477
3478
3479
3480
3481
3482
3483
3484
3485
3486
3487
3488
3489
3490
3491
3492
3493
3494
3495
3496
3497
3498
3499
3500
3501
3502
3503
3504
3505
3506
3507
3508
3509
3510
3511
3512
3513
3514
3515
3516
3517
3518
3519
3520
3521
3522
3523
3524
3525
3526
3527
3528
3529
3530
3531
3532
3533
3534
3535
3536
3537
3538
3539
3540
3541
3542
3543
3544
3545
3546
3547
3548
3549
3550
3551
3552
3553
3554
3555
3556
3557
3558
3559
3560
3561
3562
3563
3564
3565
3566
3567
3568
3569
3570
3571
3572
3573
3574
3575
3576
3577
3578
3579
3580
3581
3582
3583
3584
3585
3586
3587
3588
3589
3590
3591
3592
3593
3594
3595
3596
3597
3598
3599
3600
3601
3602
3603
3604
3605
3606
3607
3608
3609
3610
3611
3612
3613
3614
3615
3616
3617
3618
3619
3620
3621
3622
3623
3624
3625
3626
3627
3628
3629
3630
3631
3632
3633
3634
3635
3636
3637
3638
3639
3640
3641
3642
3643
3644
3645
3646
3647
3648
3649
3650
3651
3652
3653
3654
3655
3656
3657
3658
3659
3660
3661
3662
3663
3664
3665
3666
3667
3668
3669
3670
3671
3672
3673
3674
3675
3676
3677
3678
3679
3680
3681
3682
3683
3684
3685
3686
3687
3688
3689
3690
3691
3692
3693
3694
3695
3696
3697
3698
3699
3700
3701
3702
3703
3704
3705
3706
3707
3708
3709
3710
3711
3712
3713
3714
3715
3716
3717
3718
3719
3720
3721
3722
3723
3724
3725
3726
3727
3728
3729
3730
3731
3732
3733
3734
3735
3736
3737
3738
3739
3740
3741
3742
3743
3744
3745
3746
3747
3748
3749
3750
3751
3752
3753
3754
3755
3756
3757
3758
3759
3760
3761
3762
3763
3764
3765
3766
3767
3768
3769
3770
3771
3772
3773
3774
3775
3776
3777
3778
3779
3780
3781
3782
3783
3784
3785
3786
3787
3788
3789
3790
3791
3792
3793
3794
3795
3796
3797
3798
3799
3800
3801
3802
3803
3804
3805
3806
3807
3808
3809
3810
3811
3812
3813
3814
3815
3816
3817
3818
3819
3820
3821
3822
3823
3824
3825
3826
3827
3828
3829
3830
3831
3832
3833
3834
3835
3836
3837
3838
3839
3840
3841
3842
3843
3844
3845
3846
3847
3848
3849
3850
3851
3852
3853
3854
3855
3856
3857
3858
3859
3860
3861
3862
3863
3864
3865
3866
3867
3868
3869
3870
3871
3872
3873
3874
3875
3876
3877
3878
3879
3880
3881
3882
3883
3884
3885
3886
3887
3888
3889
3890
3891
3892
3893
3894
3895
3896
3897
3898
3899
3900
3901
3902
3903
3904
3905
3906
3907
3908
3909
3910
3911
3912
3913
3914
3915
3916
3917
3918
3919
3920
3921
3922
3923
3924
3925
3926
3927
3928
3929
3930
3931
3932
3933
3934
3935
3936
3937
3938
3939
3940
3941
3942
3943
3944
3945
3946
3947
3948
3949
3950
3951
3952
3953
3954
3955
3956
3957
3958
3959
3960
3961
3962
3963
3964
3965
3966
3967
3968
3969
3970
3971
3972
3973
3974
3975
3976
3977
3978
3979
3980
3981
3982
3983
3984
3985
3986
3987
3988
3989
3990
3991
3992
3993
3994
3995
3996
3997
3998
3999
4000
4001
4002
4003
4004
4005
4006
4007
4008
4009
4010
4011
4012
4013
4014
4015
4016
4017
4018
4019
4020
4021
4022
4023
4024
4025
4026
4027
4028
4029
4030
4031
4032
4033
4034
4035
4036
4037
4038
4039
4040
4041
4042
4043
4044
4045
4046
4047
4048
4049
4050
4051
4052
4053
4054
4055
4056
4057
4058
4059
4060
4061
4062
4063
4064
4065
4066
4067
4068
4069
4070
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080
4081
4082
4083
4084
4085
4086
4087
4088
4089
4090
4091
4092
4093
4094
4095
4096
4097
4098
4099
4100
4101
4102
4103
4104
4105
4106
4107
4108
4109
4110
4111
4112
4113
4114
4115
4116
4117
4118
4119
4120
4121
4122
4123
4124
4125
4126
4127
4128
4129
4130
4131
4132
4133
4134
4135
4136
4137
4138
4139
4140
4141
4142
4143
4144
4145
4146
4147
4148
4149
4150
4151
4152
4153
4154
4155
4156
4157
4158
4159
4160
4161
4162
4163
4164
4165
4166
4167
4168
4169
4170
4171
4172
4173
4174
4175
4176
4177
4178
4179
4180
4181
4182
4183
4184
4185
4186
4187
4188
4189
4190
4191
4192
4193
4194
4195
4196
4197
4198
4199
4200
4201
4202
4203
4204
4205
4206
4207
4208
4209
4210
4211
4212
4213
4214
4215
4216
4217
4218
4219
4220
4221
4222
4223
4224
4225
4226
4227
4228
4229
4230
4231
4232
4233
4234
4235
4236
4237
4238
4239
4240
4241
4242
4243
4244
4245
4246
4247
4248
4249
4250
4251
4252
4253
4254
4255
4256
4257
4258
4259
4260
4261
4262
4263
4264
4265
4266
4267
4268
4269
4270
4271
4272
4273
4274
4275
4276
4277
4278
4279
4280
4281
4282
4283
4284
4285
4286
4287
4288
4289
4290
4291
4292
4293
4294
4295
4296
4297
4298
4299
4300
4301
4302
4303
4304
4305
4306
4307
4308
4309
4310
4311
4312
4313
4314
4315
4316
4317
4318
4319
4320
4321
4322
4323
4324
4325
4326
4327
4328
4329
4330
4331
4332
4333
4334
4335
4336
4337
4338
4339
4340
4341
4342
4343
4344
4345
4346
4347
4348
4349
4350
4351
4352
4353
4354
4355
4356
4357
4358
4359
4360
4361
4362
4363
4364
4365
4366
4367
4368
4369
4370
4371
4372
4373
4374
4375
4376
4377
4378
4379
4380
4381
4382
4383
4384
4385
4386
4387
4388
4389
4390
4391
4392
4393
4394
4395
4396
4397
4398
4399
4400
4401
4402
4403
4404
4405
4406
4407
4408
4409
4410
4411
4412
4413
4414
4415
4416
4417
4418
4419
4420
4421
4422
4423
4424
4425
4426
4427
4428
4429
4430
4431
4432
4433
4434
4435
4436
4437
4438
4439
4440
4441
4442
4443
4444
4445
4446
4447
4448
4449
4450
4451
4452
4453
4454
4455
4456
4457
4458
4459
4460
4461
4462
4463
4464
4465
4466
4467
4468
4469
4470
4471
4472
4473
4474
4475
4476
4477
4478
4479
4480
4481
4482
4483
4484
4485
4486
4487
4488
4489
4490
4491
4492
4493
4494
4495
4496
4497
4498
4499
4500
4501
4502
4503
4504
4505
4506
4507
4508
4509
4510
4511
4512
4513
4514
4515
4516
4517
4518
4519
4520
4521
4522
4523
4524
4525
4526
4527
4528
4529
4530
4531
4532
4533
|
/* Convert RTL to assembler code and output it, for GNU compiler.
Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
2010, 2011
Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 3, or (at your option) any later
version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
for more details.
You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
/* This is the final pass of the compiler.
It looks at the rtl code for a function and outputs assembler code.
Call `final_start_function' to output the assembler code for function entry,
`final' to output assembler code for some RTL code,
`final_end_function' to output assembler code for function exit.
If a function is compiled in several pieces, each piece is
output separately with `final'.
Some optimizations are also done at this level.
Move instructions that were made unnecessary by good register allocation
are detected and omitted from the output. (Though most of these
are removed by the last jump pass.)
Instructions to set the condition codes are omitted when it can be
seen that the condition codes already had the desired values.
In some cases it is sufficient if the inherited condition codes
have related values, but this may require the following insn
(the one that tests the condition codes) to be modified.
The code for the function prologue and epilogue are generated
directly in assembler by the target functions function_prologue and
function_epilogue. Those instructions never exist as rtl. */
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#include "tree.h"
#include "rtl.h"
#include "tm_p.h"
#include "regs.h"
#include "insn-config.h"
#include "insn-attr.h"
#include "recog.h"
#include "conditions.h"
#include "flags.h"
#include "hard-reg-set.h"
#include "output.h"
#include "except.h"
#include "function.h"
#include "rtl-error.h"
#include "toplev.h" /* exact_log2, floor_log2 */
#include "reload.h"
#include "intl.h"
#include "basic-block.h"
#include "target.h"
#include "targhooks.h"
#include "debug.h"
#include "expr.h"
#include "tree-pass.h"
#include "tree-flow.h"
#include "cgraph.h"
#include "coverage.h"
#include "df.h"
#include "vecprim.h"
#include "ggc.h"
#include "cfgloop.h"
#include "params.h"
#include "tree-pretty-print.h" /* for dump_function_header */
#ifdef XCOFF_DEBUGGING_INFO
#include "xcoffout.h" /* Needed for external data
declarations for e.g. AIX 4.x. */
#endif
#include "dwarf2out.h"
#ifdef DBX_DEBUGGING_INFO
#include "dbxout.h"
#endif
#ifdef SDB_DEBUGGING_INFO
#include "sdbout.h"
#endif
/* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT.
So define a null default for it to save conditionalization later. */
#ifndef CC_STATUS_INIT
#define CC_STATUS_INIT
#endif
/* Is the given character a logical line separator for the assembler? */
#ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
#define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';')
#endif
#ifndef JUMP_TABLES_IN_TEXT_SECTION
#define JUMP_TABLES_IN_TEXT_SECTION 0
#endif
/* Bitflags used by final_scan_insn. */
#define SEEN_BB 1
#define SEEN_NOTE 2
#define SEEN_EMITTED 4
/* Last insn processed by final_scan_insn. */
static rtx debug_insn;
rtx current_output_insn;
/* Line number of last NOTE. */
static int last_linenum;
/* Last discriminator written to assembly. */
static int last_discriminator;
/* Discriminator of current block. */
static int discriminator;
/* Highest line number in current block. */
static int high_block_linenum;
/* Likewise for function. */
static int high_function_linenum;
/* Filename of last NOTE. */
static const char *last_filename;
/* Override filename and line number. */
static const char *override_filename;
static int override_linenum;
/* Whether to force emission of a line note before the next insn. */
static bool force_source_line = false;
extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
/* Nonzero while outputting an `asm' with operands.
This means that inconsistencies are the user's fault, so don't die.
The precise value is the insn being output, to pass to error_for_asm. */
rtx this_is_asm_operands;
/* Number of operands of this insn, for an `asm' with operands. */
static unsigned int insn_noperands;
/* Compare optimization flag. */
static rtx last_ignored_compare = 0;
/* Assign a unique number to each insn that is output.
This can be used to generate unique local labels. */
static int insn_counter = 0;
#ifdef HAVE_cc0
/* This variable contains machine-dependent flags (defined in tm.h)
set and examined by output routines
that describe how to interpret the condition codes properly. */
CC_STATUS cc_status;
/* During output of an insn, this contains a copy of cc_status
from before the insn. */
CC_STATUS cc_prev_status;
#endif
/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
static int block_depth;
/* Nonzero if have enabled APP processing of our assembler output. */
static int app_on;
/* If we are outputting an insn sequence, this contains the sequence rtx.
Zero otherwise. */
rtx final_sequence;
#ifdef ASSEMBLER_DIALECT
/* Number of the assembler dialect to use, starting at 0. */
static int dialect_number;
#endif
/* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
rtx current_insn_predicate;
/* True if printing into -fdump-final-insns= dump. */
bool final_insns_dump_p;
#ifdef HAVE_ATTR_length
static int asm_insn_count (rtx);
#endif
static void profile_function (FILE *);
static void profile_after_prologue (FILE *);
static bool notice_source_line (rtx, bool *);
static rtx walk_alter_subreg (rtx *, bool *);
static void output_asm_name (void);
static void output_alternate_entry_point (FILE *, rtx);
static tree get_mem_expr_from_op (rtx, int *);
static void output_asm_operand_names (rtx *, int *, int);
#ifdef LEAF_REGISTERS
static void leaf_renumber_regs (rtx);
#endif
#ifdef HAVE_cc0
static int alter_cond (rtx);
#endif
#ifndef ADDR_VEC_ALIGN
static int final_addr_vec_align (rtx);
#endif
#ifdef HAVE_ATTR_length
static int align_fuzz (rtx, rtx, int, unsigned);
#endif
/* Initialize data in final at the beginning of a compilation. */
void
init_final (const char *filename ATTRIBUTE_UNUSED)
{
app_on = 0;
final_sequence = 0;
#ifdef ASSEMBLER_DIALECT
dialect_number = ASSEMBLER_DIALECT;
#endif
}
/* Default target function prologue and epilogue assembler output.
If not overridden for epilogue code, then the function body itself
contains return instructions wherever needed. */
void
default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
HOST_WIDE_INT size ATTRIBUTE_UNUSED)
{
}
void
default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED,
tree decl ATTRIBUTE_UNUSED,
bool new_is_cold ATTRIBUTE_UNUSED)
{
}
/* Default target hook that outputs nothing to a stream. */
void
no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
{
}
/* Enable APP processing of subsequent output.
Used before the output from an `asm' statement. */
void
app_enable (void)
{
if (! app_on)
{
fputs (ASM_APP_ON, asm_out_file);
app_on = 1;
}
}
/* Disable APP processing of subsequent output.
Called from varasm.c before most kinds of output. */
void
app_disable (void)
{
if (app_on)
{
fputs (ASM_APP_OFF, asm_out_file);
app_on = 0;
}
}
/* Return the number of slots filled in the current
delayed branch sequence (we don't count the insn needing the
delay slot). Zero if not in a delayed branch sequence. */
#ifdef DELAY_SLOTS
int
dbr_sequence_length (void)
{
if (final_sequence != 0)
return XVECLEN (final_sequence, 0) - 1;
else
return 0;
}
#endif
/* The next two pages contain routines used to compute the length of an insn
and to shorten branches. */
/* Arrays for insn lengths, and addresses. The latter is referenced by
`insn_current_length'. */
static int *insn_lengths;
VEC(int,heap) *insn_addresses_;
/* Max uid for which the above arrays are valid. */
static int insn_lengths_max_uid;
/* Address of insn being processed. Used by `insn_current_length'. */
int insn_current_address;
/* Address of insn being processed in previous iteration. */
int insn_last_address;
/* known invariant alignment of insn being processed. */
int insn_current_align;
/* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
gives the next following alignment insn that increases the known
alignment, or NULL_RTX if there is no such insn.
For any alignment obtained this way, we can again index uid_align with
its uid to obtain the next following align that in turn increases the
alignment, till we reach NULL_RTX; the sequence obtained this way
for each insn we'll call the alignment chain of this insn in the following
comments. */
struct label_alignment
{
short alignment;
short max_skip;
};
static rtx *uid_align;
static int *uid_shuid;
static struct label_alignment *label_align;
/* Indicate that branch shortening hasn't yet been done. */
void
init_insn_lengths (void)
{
if (uid_shuid)
{
free (uid_shuid);
uid_shuid = 0;
}
if (insn_lengths)
{
free (insn_lengths);
insn_lengths = 0;
insn_lengths_max_uid = 0;
}
#ifdef HAVE_ATTR_length
INSN_ADDRESSES_FREE ();
#endif
if (uid_align)
{
free (uid_align);
uid_align = 0;
}
}
/* Obtain the current length of an insn. If branch shortening has been done,
get its actual length. Otherwise, use FALLBACK_FN to calculate the
length. */
static inline int
get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
{
#ifdef HAVE_ATTR_length
rtx body;
int i;
int length = 0;
if (insn_lengths_max_uid > INSN_UID (insn))
return insn_lengths[INSN_UID (insn)];
else
switch (GET_CODE (insn))
{
case NOTE:
case BARRIER:
case CODE_LABEL:
case DEBUG_INSN:
return 0;
case CALL_INSN:
length = fallback_fn (insn);
break;
case JUMP_INSN:
body = PATTERN (insn);
if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
{
/* Alignment is machine-dependent and should be handled by
ADDR_VEC_ALIGN. */
}
else
length = fallback_fn (insn);
break;
case INSN:
body = PATTERN (insn);
if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
return 0;
else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
length = asm_insn_count (body) * fallback_fn (insn);
else if (GET_CODE (body) == SEQUENCE)
for (i = 0; i < XVECLEN (body, 0); i++)
length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn);
else
length = fallback_fn (insn);
break;
default:
break;
}
#ifdef ADJUST_INSN_LENGTH
ADJUST_INSN_LENGTH (insn, length);
#endif
return length;
#else /* not HAVE_ATTR_length */
return 0;
#define insn_default_length 0
#define insn_min_length 0
#endif /* not HAVE_ATTR_length */
}
/* Obtain the current length of an insn. If branch shortening has been done,
get its actual length. Otherwise, get its maximum length. */
int
get_attr_length (rtx insn)
{
return get_attr_length_1 (insn, insn_default_length);
}
/* Obtain the current length of an insn. If branch shortening has been done,
get its actual length. Otherwise, get its minimum length. */
int
get_attr_min_length (rtx insn)
{
return get_attr_length_1 (insn, insn_min_length);
}
/* Code to handle alignment inside shorten_branches. */
/* Here is an explanation how the algorithm in align_fuzz can give
proper results:
Call a sequence of instructions beginning with alignment point X
and continuing until the next alignment point `block X'. When `X'
is used in an expression, it means the alignment value of the
alignment point.
Call the distance between the start of the first insn of block X, and
the end of the last insn of block X `IX', for the `inner size of X'.
This is clearly the sum of the instruction lengths.
Likewise with the next alignment-delimited block following X, which we
shall call block Y.
Call the distance between the start of the first insn of block X, and
the start of the first insn of block Y `OX', for the `outer size of X'.
The estimated padding is then OX - IX.
OX can be safely estimated as
if (X >= Y)
OX = round_up(IX, Y)
else
OX = round_up(IX, X) + Y - X
Clearly est(IX) >= real(IX), because that only depends on the
instruction lengths, and those being overestimated is a given.
Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
we needn't worry about that when thinking about OX.
When X >= Y, the alignment provided by Y adds no uncertainty factor
for branch ranges starting before X, so we can just round what we have.
But when X < Y, we don't know anything about the, so to speak,
`middle bits', so we have to assume the worst when aligning up from an
address mod X to one mod Y, which is Y - X. */
#ifndef LABEL_ALIGN
#define LABEL_ALIGN(LABEL) align_labels_log
#endif
#ifndef LOOP_ALIGN
#define LOOP_ALIGN(LABEL) align_loops_log
#endif
#ifndef LABEL_ALIGN_AFTER_BARRIER
#define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
#endif
#ifndef JUMP_ALIGN
#define JUMP_ALIGN(LABEL) align_jumps_log
#endif
int
default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED)
{
return 0;
}
int
default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
{
return align_loops_max_skip;
}
int
default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
{
return align_labels_max_skip;
}
int
default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED)
{
return align_jumps_max_skip;
}
#ifndef ADDR_VEC_ALIGN
static int
final_addr_vec_align (rtx addr_vec)
{
int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
return exact_log2 (align);
}
#define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
#endif
#ifndef INSN_LENGTH_ALIGNMENT
#define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
#endif
#define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
static int min_labelno, max_labelno;
#define LABEL_TO_ALIGNMENT(LABEL) \
(label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
#define LABEL_TO_MAX_SKIP(LABEL) \
(label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
/* For the benefit of port specific code do this also as a function. */
int
label_to_alignment (rtx label)
{
if (CODE_LABEL_NUMBER (label) <= max_labelno)
return LABEL_TO_ALIGNMENT (label);
return 0;
}
int
label_to_max_skip (rtx label)
{
if (CODE_LABEL_NUMBER (label) <= max_labelno)
return LABEL_TO_MAX_SKIP (label);
return 0;
}
#ifdef HAVE_ATTR_length
/* The differences in addresses
between a branch and its target might grow or shrink depending on
the alignment the start insn of the range (the branch for a forward
branch or the label for a backward branch) starts out on; if these
differences are used naively, they can even oscillate infinitely.
We therefore want to compute a 'worst case' address difference that
is independent of the alignment the start insn of the range end
up on, and that is at least as large as the actual difference.
The function align_fuzz calculates the amount we have to add to the
naively computed difference, by traversing the part of the alignment
chain of the start insn of the range that is in front of the end insn
of the range, and considering for each alignment the maximum amount
that it might contribute to a size increase.
For casesi tables, we also want to know worst case minimum amounts of
address difference, in case a machine description wants to introduce
some common offset that is added to all offsets in a table.
For this purpose, align_fuzz with a growth argument of 0 computes the
appropriate adjustment. */
/* Compute the maximum delta by which the difference of the addresses of
START and END might grow / shrink due to a different address for start
which changes the size of alignment insns between START and END.
KNOWN_ALIGN_LOG is the alignment known for START.
GROWTH should be ~0 if the objective is to compute potential code size
increase, and 0 if the objective is to compute potential shrink.
The return value is undefined for any other value of GROWTH. */
static int
align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
{
int uid = INSN_UID (start);
rtx align_label;
int known_align = 1 << known_align_log;
int end_shuid = INSN_SHUID (end);
int fuzz = 0;
for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
{
int align_addr, new_align;
uid = INSN_UID (align_label);
align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
if (uid_shuid[uid] > end_shuid)
break;
known_align_log = LABEL_TO_ALIGNMENT (align_label);
new_align = 1 << known_align_log;
if (new_align < known_align)
continue;
fuzz += (-align_addr ^ growth) & (new_align - known_align);
known_align = new_align;
}
return fuzz;
}
/* Compute a worst-case reference address of a branch so that it
can be safely used in the presence of aligned labels. Since the
size of the branch itself is unknown, the size of the branch is
not included in the range. I.e. for a forward branch, the reference
address is the end address of the branch as known from the previous
branch shortening pass, minus a value to account for possible size
increase due to alignment. For a backward branch, it is the start
address of the branch as known from the current pass, plus a value
to account for possible size increase due to alignment.
NB.: Therefore, the maximum offset allowed for backward branches needs
to exclude the branch size. */
int
insn_current_reference_address (rtx branch)
{
rtx dest, seq;
int seq_uid;
if (! INSN_ADDRESSES_SET_P ())
return 0;
seq = NEXT_INSN (PREV_INSN (branch));
seq_uid = INSN_UID (seq);
if (!JUMP_P (branch))
/* This can happen for example on the PA; the objective is to know the
offset to address something in front of the start of the function.
Thus, we can treat it like a backward branch.
We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
any alignment we'd encounter, so we skip the call to align_fuzz. */
return insn_current_address;
dest = JUMP_LABEL (branch);
/* BRANCH has no proper alignment chain set, so use SEQ.
BRANCH also has no INSN_SHUID. */
if (INSN_SHUID (seq) < INSN_SHUID (dest))
{
/* Forward branch. */
return (insn_last_address + insn_lengths[seq_uid]
- align_fuzz (seq, dest, length_unit_log, ~0));
}
else
{
/* Backward branch. */
return (insn_current_address
+ align_fuzz (dest, seq, length_unit_log, ~0));
}
}
#endif /* HAVE_ATTR_length */
/* Compute branch alignments based on frequency information in the
CFG. */
unsigned int
compute_alignments (void)
{
int log, max_skip, max_log;
basic_block bb;
int freq_max = 0;
int freq_threshold = 0;
if (label_align)
{
free (label_align);
label_align = 0;
}
max_labelno = max_label_num ();
min_labelno = get_first_label_num ();
label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
/* If not optimizing or optimizing for size, don't assign any alignments. */
if (! optimize || optimize_function_for_size_p (cfun))
return 0;
if (dump_file)
{
dump_reg_info (dump_file);
dump_flow_info (dump_file, TDF_DETAILS);
flow_loops_dump (dump_file, NULL, 1);
}
loop_optimizer_init (AVOID_CFG_MODIFICATIONS);
FOR_EACH_BB (bb)
if (bb->frequency > freq_max)
freq_max = bb->frequency;
freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD);
if (dump_file)
fprintf(dump_file, "freq_max: %i\n",freq_max);
FOR_EACH_BB (bb)
{
rtx label = BB_HEAD (bb);
int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
edge e;
edge_iterator ei;
if (!LABEL_P (label)
|| optimize_bb_for_size_p (bb))
{
if (dump_file)
fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n",
bb->index, bb->frequency, bb->loop_father->num,
bb_loop_depth (bb));
continue;
}
max_log = LABEL_ALIGN (label);
max_skip = targetm.asm_out.label_align_max_skip (label);
FOR_EACH_EDGE (e, ei, bb->preds)
{
if (e->flags & EDGE_FALLTHRU)
has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
else
branch_frequency += EDGE_FREQUENCY (e);
}
if (dump_file)
{
fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i",
bb->index, bb->frequency, bb->loop_father->num,
bb_loop_depth (bb),
fallthru_frequency, branch_frequency);
if (!bb->loop_father->inner && bb->loop_father->num)
fprintf (dump_file, " inner_loop");
if (bb->loop_father->header == bb)
fprintf (dump_file, " loop_header");
fprintf (dump_file, "\n");
}
/* There are two purposes to align block with no fallthru incoming edge:
1) to avoid fetch stalls when branch destination is near cache boundary
2) to improve cache efficiency in case the previous block is not executed
(so it does not need to be in the cache).
We to catch first case, we align frequently executed blocks.
To catch the second, we align blocks that are executed more frequently
than the predecessor and the predecessor is likely to not be executed
when function is called. */
if (!has_fallthru
&& (branch_frequency > freq_threshold
|| (bb->frequency > bb->prev_bb->frequency * 10
&& (bb->prev_bb->frequency
<= ENTRY_BLOCK_PTR->frequency / 2))))
{
log = JUMP_ALIGN (label);
if (dump_file)
fprintf(dump_file, " jump alignment added.\n");
if (max_log < log)
{
max_log = log;
max_skip = targetm.asm_out.jump_align_max_skip (label);
}
}
/* In case block is frequent and reached mostly by non-fallthru edge,
align it. It is most likely a first block of loop. */
if (has_fallthru
&& optimize_bb_for_speed_p (bb)
&& branch_frequency + fallthru_frequency > freq_threshold
&& (branch_frequency
> fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS)))
{
log = LOOP_ALIGN (label);
if (dump_file)
fprintf(dump_file, " internal loop alignment added.\n");
if (max_log < log)
{
max_log = log;
max_skip = targetm.asm_out.loop_align_max_skip (label);
}
}
LABEL_TO_ALIGNMENT (label) = max_log;
LABEL_TO_MAX_SKIP (label) = max_skip;
}
loop_optimizer_finalize ();
free_dominance_info (CDI_DOMINATORS);
return 0;
}
struct rtl_opt_pass pass_compute_alignments =
{
{
RTL_PASS,
"alignments", /* name */
NULL, /* gate */
compute_alignments, /* execute */
NULL, /* sub */
NULL, /* next */
0, /* static_pass_number */
TV_NONE, /* tv_id */
0, /* properties_required */
0, /* properties_provided */
0, /* properties_destroyed */
0, /* todo_flags_start */
TODO_verify_rtl_sharing
| TODO_ggc_collect /* todo_flags_finish */
}
};
/* Make a pass over all insns and compute their actual lengths by shortening
any branches of variable length if possible. */
/* shorten_branches might be called multiple times: for example, the SH
port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
In order to do this, it needs proper length information, which it obtains
by calling shorten_branches. This cannot be collapsed with
shorten_branches itself into a single pass unless we also want to integrate
reorg.c, since the branch splitting exposes new instructions with delay
slots. */
void
shorten_branches (rtx first ATTRIBUTE_UNUSED)
{
rtx insn;
int max_uid;
int i;
int max_log;
int max_skip;
#ifdef HAVE_ATTR_length
#define MAX_CODE_ALIGN 16
rtx seq;
int something_changed = 1;
char *varying_length;
rtx body;
int uid;
rtx align_tab[MAX_CODE_ALIGN];
#endif
/* Compute maximum UID and allocate label_align / uid_shuid. */
max_uid = get_max_uid ();
/* Free uid_shuid before reallocating it. */
free (uid_shuid);
uid_shuid = XNEWVEC (int, max_uid);
if (max_labelno != max_label_num ())
{
int old = max_labelno;
int n_labels;
int n_old_labels;
max_labelno = max_label_num ();
n_labels = max_labelno - min_labelno + 1;
n_old_labels = old - min_labelno + 1;
label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels);
/* Range of labels grows monotonically in the function. Failing here
means that the initialization of array got lost. */
gcc_assert (n_old_labels <= n_labels);
memset (label_align + n_old_labels, 0,
(n_labels - n_old_labels) * sizeof (struct label_alignment));
}
/* Initialize label_align and set up uid_shuid to be strictly
monotonically rising with insn order. */
/* We use max_log here to keep track of the maximum alignment we want to
impose on the next CODE_LABEL (or the current one if we are processing
the CODE_LABEL itself). */
max_log = 0;
max_skip = 0;
for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
{
int log;
INSN_SHUID (insn) = i++;
if (INSN_P (insn))
continue;
if (LABEL_P (insn))
{
rtx next;
bool next_is_jumptable;
/* Merge in alignments computed by compute_alignments. */
log = LABEL_TO_ALIGNMENT (insn);
if (max_log < log)
{
max_log = log;
max_skip = LABEL_TO_MAX_SKIP (insn);
}
next = next_nonnote_insn (insn);
next_is_jumptable = next && JUMP_TABLE_DATA_P (next);
if (!next_is_jumptable)
{
log = LABEL_ALIGN (insn);
if (max_log < log)
{
max_log = log;
max_skip = targetm.asm_out.label_align_max_skip (insn);
}
}
/* ADDR_VECs only take room if read-only data goes into the text
section. */
if ((JUMP_TABLES_IN_TEXT_SECTION
|| readonly_data_section == text_section)
&& next_is_jumptable)
{
log = ADDR_VEC_ALIGN (next);
if (max_log < log)
{
max_log = log;
max_skip = targetm.asm_out.label_align_max_skip (insn);
}
}
LABEL_TO_ALIGNMENT (insn) = max_log;
LABEL_TO_MAX_SKIP (insn) = max_skip;
max_log = 0;
max_skip = 0;
}
else if (BARRIER_P (insn))
{
rtx label;
for (label = insn; label && ! INSN_P (label);
label = NEXT_INSN (label))
if (LABEL_P (label))
{
log = LABEL_ALIGN_AFTER_BARRIER (insn);
if (max_log < log)
{
max_log = log;
max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label);
}
break;
}
}
}
#ifdef HAVE_ATTR_length
/* Allocate the rest of the arrays. */
insn_lengths = XNEWVEC (int, max_uid);
insn_lengths_max_uid = max_uid;
/* Syntax errors can lead to labels being outside of the main insn stream.
Initialize insn_addresses, so that we get reproducible results. */
INSN_ADDRESSES_ALLOC (max_uid);
varying_length = XCNEWVEC (char, max_uid);
/* Initialize uid_align. We scan instructions
from end to start, and keep in align_tab[n] the last seen insn
that does an alignment of at least n+1, i.e. the successor
in the alignment chain for an insn that does / has a known
alignment of n. */
uid_align = XCNEWVEC (rtx, max_uid);
for (i = MAX_CODE_ALIGN; --i >= 0;)
align_tab[i] = NULL_RTX;
seq = get_last_insn ();
for (; seq; seq = PREV_INSN (seq))
{
int uid = INSN_UID (seq);
int log;
log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
uid_align[uid] = align_tab[0];
if (log)
{
/* Found an alignment label. */
uid_align[uid] = align_tab[log];
for (i = log - 1; i >= 0; i--)
align_tab[i] = seq;
}
}
#ifdef CASE_VECTOR_SHORTEN_MODE
if (optimize)
{
/* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
label fields. */
int min_shuid = INSN_SHUID (get_insns ()) - 1;
int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
int rel;
for (insn = first; insn != 0; insn = NEXT_INSN (insn))
{
rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
int len, i, min, max, insn_shuid;
int min_align;
addr_diff_vec_flags flags;
if (!JUMP_P (insn)
|| GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
continue;
pat = PATTERN (insn);
len = XVECLEN (pat, 1);
gcc_assert (len > 0);
min_align = MAX_CODE_ALIGN;
for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
{
rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
int shuid = INSN_SHUID (lab);
if (shuid < min)
{
min = shuid;
min_lab = lab;
}
if (shuid > max)
{
max = shuid;
max_lab = lab;
}
if (min_align > LABEL_TO_ALIGNMENT (lab))
min_align = LABEL_TO_ALIGNMENT (lab);
}
XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
insn_shuid = INSN_SHUID (insn);
rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
memset (&flags, 0, sizeof (flags));
flags.min_align = min_align;
flags.base_after_vec = rel > insn_shuid;
flags.min_after_vec = min > insn_shuid;
flags.max_after_vec = max > insn_shuid;
flags.min_after_base = min > rel;
flags.max_after_base = max > rel;
ADDR_DIFF_VEC_FLAGS (pat) = flags;
}
}
#endif /* CASE_VECTOR_SHORTEN_MODE */
/* Compute initial lengths, addresses, and varying flags for each insn. */
for (insn_current_address = 0, insn = first;
insn != 0;
insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
{
uid = INSN_UID (insn);
insn_lengths[uid] = 0;
if (LABEL_P (insn))
{
int log = LABEL_TO_ALIGNMENT (insn);
if (log)
{
int align = 1 << log;
int new_address = (insn_current_address + align - 1) & -align;
insn_lengths[uid] = new_address - insn_current_address;
}
}
INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
if (NOTE_P (insn) || BARRIER_P (insn)
|| LABEL_P (insn) || DEBUG_INSN_P(insn))
continue;
if (INSN_DELETED_P (insn))
continue;
body = PATTERN (insn);
if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
{
/* This only takes room if read-only data goes into the text
section. */
if (JUMP_TABLES_IN_TEXT_SECTION
|| readonly_data_section == text_section)
insn_lengths[uid] = (XVECLEN (body,
GET_CODE (body) == ADDR_DIFF_VEC)
* GET_MODE_SIZE (GET_MODE (body)));
/* Alignment is handled by ADDR_VEC_ALIGN. */
}
else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
else if (GET_CODE (body) == SEQUENCE)
{
int i;
int const_delay_slots;
#ifdef DELAY_SLOTS
const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
#else
const_delay_slots = 0;
#endif
/* Inside a delay slot sequence, we do not do any branch shortening
if the shortening could change the number of delay slots
of the branch. */
for (i = 0; i < XVECLEN (body, 0); i++)
{
rtx inner_insn = XVECEXP (body, 0, i);
int inner_uid = INSN_UID (inner_insn);
int inner_length;
if (GET_CODE (body) == ASM_INPUT
|| asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
inner_length = (asm_insn_count (PATTERN (inner_insn))
* insn_default_length (inner_insn));
else
inner_length = insn_default_length (inner_insn);
insn_lengths[inner_uid] = inner_length;
if (const_delay_slots)
{
if ((varying_length[inner_uid]
= insn_variable_length_p (inner_insn)) != 0)
varying_length[uid] = 1;
INSN_ADDRESSES (inner_uid) = (insn_current_address
+ insn_lengths[uid]);
}
else
varying_length[inner_uid] = 0;
insn_lengths[uid] += inner_length;
}
}
else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
{
insn_lengths[uid] = insn_default_length (insn);
varying_length[uid] = insn_variable_length_p (insn);
}
/* If needed, do any adjustment. */
#ifdef ADJUST_INSN_LENGTH
ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
if (insn_lengths[uid] < 0)
fatal_insn ("negative insn length", insn);
#endif
}
/* Now loop over all the insns finding varying length insns. For each,
get the current insn length. If it has changed, reflect the change.
When nothing changes for a full pass, we are done. */
while (something_changed)
{
something_changed = 0;
insn_current_align = MAX_CODE_ALIGN - 1;
for (insn_current_address = 0, insn = first;
insn != 0;
insn = NEXT_INSN (insn))
{
int new_length;
#ifdef ADJUST_INSN_LENGTH
int tmp_length;
#endif
int length_align;
uid = INSN_UID (insn);
if (LABEL_P (insn))
{
int log = LABEL_TO_ALIGNMENT (insn);
if (log > insn_current_align)
{
int align = 1 << log;
int new_address= (insn_current_address + align - 1) & -align;
insn_lengths[uid] = new_address - insn_current_address;
insn_current_align = log;
insn_current_address = new_address;
}
else
insn_lengths[uid] = 0;
INSN_ADDRESSES (uid) = insn_current_address;
continue;
}
length_align = INSN_LENGTH_ALIGNMENT (insn);
if (length_align < insn_current_align)
insn_current_align = length_align;
insn_last_address = INSN_ADDRESSES (uid);
INSN_ADDRESSES (uid) = insn_current_address;
#ifdef CASE_VECTOR_SHORTEN_MODE
if (optimize && JUMP_P (insn)
&& GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
{
rtx body = PATTERN (insn);
int old_length = insn_lengths[uid];
rtx rel_lab = XEXP (XEXP (body, 0), 0);
rtx min_lab = XEXP (XEXP (body, 2), 0);
rtx max_lab = XEXP (XEXP (body, 3), 0);
int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
rtx prev;
int rel_align = 0;
addr_diff_vec_flags flags;
/* Avoid automatic aggregate initialization. */
flags = ADDR_DIFF_VEC_FLAGS (body);
/* Try to find a known alignment for rel_lab. */
for (prev = rel_lab;
prev
&& ! insn_lengths[INSN_UID (prev)]
&& ! (varying_length[INSN_UID (prev)] & 1);
prev = PREV_INSN (prev))
if (varying_length[INSN_UID (prev)] & 2)
{
rel_align = LABEL_TO_ALIGNMENT (prev);
break;
}
/* See the comment on addr_diff_vec_flags in rtl.h for the
meaning of the flags values. base: REL_LAB vec: INSN */
/* Anything after INSN has still addresses from the last
pass; adjust these so that they reflect our current
estimate for this pass. */
if (flags.base_after_vec)
rel_addr += insn_current_address - insn_last_address;
if (flags.min_after_vec)
min_addr += insn_current_address - insn_last_address;
if (flags.max_after_vec)
max_addr += insn_current_address - insn_last_address;
/* We want to know the worst case, i.e. lowest possible value
for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
its offset is positive, and we have to be wary of code shrink;
otherwise, it is negative, and we have to be vary of code
size increase. */
if (flags.min_after_base)
{
/* If INSN is between REL_LAB and MIN_LAB, the size
changes we are about to make can change the alignment
within the observed offset, therefore we have to break
it up into two parts that are independent. */
if (! flags.base_after_vec && flags.min_after_vec)
{
min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
min_addr -= align_fuzz (insn, min_lab, 0, 0);
}
else
min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
}
else
{
if (flags.base_after_vec && ! flags.min_after_vec)
{
min_addr -= align_fuzz (min_lab, insn, 0, ~0);
min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
}
else
min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
}
/* Likewise, determine the highest lowest possible value
for the offset of MAX_LAB. */
if (flags.max_after_base)
{
if (! flags.base_after_vec && flags.max_after_vec)
{
max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
max_addr += align_fuzz (insn, max_lab, 0, ~0);
}
else
max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
}
else
{
if (flags.base_after_vec && ! flags.max_after_vec)
{
max_addr += align_fuzz (max_lab, insn, 0, 0);
max_addr += align_fuzz (insn, rel_lab, 0, 0);
}
else
max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
}
PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
max_addr - rel_addr,
body));
if (JUMP_TABLES_IN_TEXT_SECTION
|| readonly_data_section == text_section)
{
insn_lengths[uid]
= (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
insn_current_address += insn_lengths[uid];
if (insn_lengths[uid] != old_length)
something_changed = 1;
}
continue;
}
#endif /* CASE_VECTOR_SHORTEN_MODE */
if (! (varying_length[uid]))
{
if (NONJUMP_INSN_P (insn)
&& GET_CODE (PATTERN (insn)) == SEQUENCE)
{
int i;
body = PATTERN (insn);
for (i = 0; i < XVECLEN (body, 0); i++)
{
rtx inner_insn = XVECEXP (body, 0, i);
int inner_uid = INSN_UID (inner_insn);
INSN_ADDRESSES (inner_uid) = insn_current_address;
insn_current_address += insn_lengths[inner_uid];
}
}
else
insn_current_address += insn_lengths[uid];
continue;
}
if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
{
int i;
body = PATTERN (insn);
new_length = 0;
for (i = 0; i < XVECLEN (body, 0); i++)
{
rtx inner_insn = XVECEXP (body, 0, i);
int inner_uid = INSN_UID (inner_insn);
int inner_length;
INSN_ADDRESSES (inner_uid) = insn_current_address;
/* insn_current_length returns 0 for insns with a
non-varying length. */
if (! varying_length[inner_uid])
inner_length = insn_lengths[inner_uid];
else
inner_length = insn_current_length (inner_insn);
if (inner_length != insn_lengths[inner_uid])
{
insn_lengths[inner_uid] = inner_length;
something_changed = 1;
}
insn_current_address += insn_lengths[inner_uid];
new_length += inner_length;
}
}
else
{
new_length = insn_current_length (insn);
insn_current_address += new_length;
}
#ifdef ADJUST_INSN_LENGTH
/* If needed, do any adjustment. */
tmp_length = new_length;
ADJUST_INSN_LENGTH (insn, new_length);
insn_current_address += (new_length - tmp_length);
#endif
if (new_length != insn_lengths[uid])
{
insn_lengths[uid] = new_length;
something_changed = 1;
}
}
/* For a non-optimizing compile, do only a single pass. */
if (!optimize)
break;
}
free (varying_length);
#endif /* HAVE_ATTR_length */
}
#ifdef HAVE_ATTR_length
/* Given the body of an INSN known to be generated by an ASM statement, return
the number of machine instructions likely to be generated for this insn.
This is used to compute its length. */
static int
asm_insn_count (rtx body)
{
const char *templ;
if (GET_CODE (body) == ASM_INPUT)
templ = XSTR (body, 0);
else
templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
return asm_str_count (templ);
}
#endif
/* Return the number of machine instructions likely to be generated for the
inline-asm template. */
int
asm_str_count (const char *templ)
{
int count = 1;
if (!*templ)
return 0;
for (; *templ; templ++)
if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
|| *templ == '\n')
count++;
return count;
}
/* ??? This is probably the wrong place for these. */
/* Structure recording the mapping from source file and directory
names at compile time to those to be embedded in debug
information. */
typedef struct debug_prefix_map
{
const char *old_prefix;
const char *new_prefix;
size_t old_len;
size_t new_len;
struct debug_prefix_map *next;
} debug_prefix_map;
/* Linked list of such structures. */
debug_prefix_map *debug_prefix_maps;
/* Record a debug file prefix mapping. ARG is the argument to
-fdebug-prefix-map and must be of the form OLD=NEW. */
void
add_debug_prefix_map (const char *arg)
{
debug_prefix_map *map;
const char *p;
p = strchr (arg, '=');
if (!p)
{
error ("invalid argument %qs to -fdebug-prefix-map", arg);
return;
}
map = XNEW (debug_prefix_map);
map->old_prefix = xstrndup (arg, p - arg);
map->old_len = p - arg;
p++;
map->new_prefix = xstrdup (p);
map->new_len = strlen (p);
map->next = debug_prefix_maps;
debug_prefix_maps = map;
}
/* Perform user-specified mapping of debug filename prefixes. Return
the new name corresponding to FILENAME. */
const char *
remap_debug_filename (const char *filename)
{
debug_prefix_map *map;
char *s;
const char *name;
size_t name_len;
for (map = debug_prefix_maps; map; map = map->next)
if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0)
break;
if (!map)
return filename;
name = filename + map->old_len;
name_len = strlen (name) + 1;
s = (char *) alloca (name_len + map->new_len);
memcpy (s, map->new_prefix, map->new_len);
memcpy (s + map->new_len, name, name_len);
return ggc_strdup (s);
}
/* Return true if DWARF2 debug info can be emitted for DECL. */
static bool
dwarf2_debug_info_emitted_p (tree decl)
{
if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
return false;
if (DECL_IGNORED_P (decl))
return false;
return true;
}
/* Return scope resulting from combination of S1 and S2. */
static tree
choose_inner_scope (tree s1, tree s2)
{
if (!s1)
return s2;
if (!s2)
return s1;
if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2))
return s1;
return s2;
}
/* Emit lexical block notes needed to change scope from S1 to S2. */
static void
change_scope (rtx orig_insn, tree s1, tree s2)
{
rtx insn = orig_insn;
tree com = NULL_TREE;
tree ts1 = s1, ts2 = s2;
tree s;
while (ts1 != ts2)
{
gcc_assert (ts1 && ts2);
if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2))
ts1 = BLOCK_SUPERCONTEXT (ts1);
else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2))
ts2 = BLOCK_SUPERCONTEXT (ts2);
else
{
ts1 = BLOCK_SUPERCONTEXT (ts1);
ts2 = BLOCK_SUPERCONTEXT (ts2);
}
}
com = ts1;
/* Close scopes. */
s = s1;
while (s != com)
{
rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn);
NOTE_BLOCK (note) = s;
s = BLOCK_SUPERCONTEXT (s);
}
/* Open scopes. */
s = s2;
while (s != com)
{
insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn);
NOTE_BLOCK (insn) = s;
s = BLOCK_SUPERCONTEXT (s);
}
}
/* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based
on the scope tree and the newly reordered instructions. */
static void
reemit_insn_block_notes (void)
{
tree cur_block = DECL_INITIAL (cfun->decl);
rtx insn, note;
insn = get_insns ();
if (!active_insn_p (insn))
insn = next_active_insn (insn);
for (; insn; insn = next_active_insn (insn))
{
tree this_block;
/* Avoid putting scope notes between jump table and its label. */
if (JUMP_TABLE_DATA_P (insn))
continue;
this_block = insn_scope (insn);
/* For sequences compute scope resulting from merging all scopes
of instructions nested inside. */
if (GET_CODE (PATTERN (insn)) == SEQUENCE)
{
int i;
rtx body = PATTERN (insn);
this_block = NULL;
for (i = 0; i < XVECLEN (body, 0); i++)
this_block = choose_inner_scope (this_block,
insn_scope (XVECEXP (body, 0, i)));
}
if (! this_block)
this_block = DECL_INITIAL (cfun->decl);
if (this_block != cur_block)
{
change_scope (insn, cur_block, this_block);
cur_block = this_block;
}
}
/* change_scope emits before the insn, not after. */
note = emit_note (NOTE_INSN_DELETED);
change_scope (note, cur_block, DECL_INITIAL (cfun->decl));
delete_insn (note);
reorder_blocks ();
}
/* Output assembler code for the start of a function,
and initialize some of the variables in this file
for the new function. The label for the function and associated
assembler pseudo-ops have already been output in `assemble_start_function'.
FIRST is the first insn of the rtl for the function being compiled.
FILE is the file to write assembler code to.
OPTIMIZE_P is nonzero if we should eliminate redundant
test and compare insns. */
void
final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
int optimize_p ATTRIBUTE_UNUSED)
{
block_depth = 0;
this_is_asm_operands = 0;
last_filename = LOCATION_FILE (prologue_location);
last_linenum = LOCATION_LINE (prologue_location);
last_discriminator = discriminator = 0;
high_block_linenum = high_function_linenum = last_linenum;
if (!DECL_IGNORED_P (current_function_decl))
debug_hooks->begin_prologue (last_linenum, last_filename);
if (!dwarf2_debug_info_emitted_p (current_function_decl))
dwarf2out_begin_prologue (0, NULL);
#ifdef LEAF_REG_REMAP
if (crtl->uses_only_leaf_regs)
leaf_renumber_regs (first);
#endif
/* The Sun386i and perhaps other machines don't work right
if the profiling code comes after the prologue. */
if (targetm.profile_before_prologue () && crtl->profile)
profile_function (file);
/* If debugging, assign block numbers to all of the blocks in this
function. */
if (write_symbols)
{
reemit_insn_block_notes ();
number_blocks (current_function_decl);
/* We never actually put out begin/end notes for the top-level
block in the function. But, conceptually, that block is
always needed. */
TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
}
if (warn_frame_larger_than
&& get_frame_size () > frame_larger_than_size)
{
/* Issue a warning */
warning (OPT_Wframe_larger_than_,
"the frame size of %wd bytes is larger than %wd bytes",
get_frame_size (), frame_larger_than_size);
}
/* First output the function prologue: code to set up the stack frame. */
targetm.asm_out.function_prologue (file, get_frame_size ());
/* If the machine represents the prologue as RTL, the profiling code must
be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
#ifdef HAVE_prologue
if (! HAVE_prologue)
#endif
profile_after_prologue (file);
}
static void
profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
{
if (!targetm.profile_before_prologue () && crtl->profile)
profile_function (file);
}
static void
profile_function (FILE *file ATTRIBUTE_UNUSED)
{
#ifndef NO_PROFILE_COUNTERS
# define NO_PROFILE_COUNTERS 0
#endif
#ifdef ASM_OUTPUT_REG_PUSH
rtx sval = NULL, chain = NULL;
if (cfun->returns_struct)
sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl),
true);
if (cfun->static_chain_decl)
chain = targetm.calls.static_chain (current_function_decl, true);
#endif /* ASM_OUTPUT_REG_PUSH */
if (! NO_PROFILE_COUNTERS)
{
int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
switch_to_section (data_section);
ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
}
switch_to_section (current_function_section ());
#ifdef ASM_OUTPUT_REG_PUSH
if (sval && REG_P (sval))
ASM_OUTPUT_REG_PUSH (file, REGNO (sval));
if (chain && REG_P (chain))
ASM_OUTPUT_REG_PUSH (file, REGNO (chain));
#endif
FUNCTION_PROFILER (file, current_function_funcdef_no);
#ifdef ASM_OUTPUT_REG_PUSH
if (chain && REG_P (chain))
ASM_OUTPUT_REG_POP (file, REGNO (chain));
if (sval && REG_P (sval))
ASM_OUTPUT_REG_POP (file, REGNO (sval));
#endif
}
/* Output assembler code for the end of a function.
For clarity, args are same as those of `final_start_function'
even though not all of them are needed. */
void
final_end_function (void)
{
app_disable ();
if (!DECL_IGNORED_P (current_function_decl))
debug_hooks->end_function (high_function_linenum);
/* Finally, output the function epilogue:
code to restore the stack frame and return to the caller. */
targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
/* And debug output. */
if (!DECL_IGNORED_P (current_function_decl))
debug_hooks->end_epilogue (last_linenum, last_filename);
if (!dwarf2_debug_info_emitted_p (current_function_decl)
&& dwarf2out_do_frame ())
dwarf2out_end_epilogue (last_linenum, last_filename);
}
/* Dumper helper for basic block information. FILE is the assembly
output file, and INSN is the instruction being emitted. */
static void
dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb,
basic_block *end_to_bb, int bb_map_size, int *bb_seqn)
{
basic_block bb;
if (!flag_debug_asm)
return;
if (INSN_UID (insn) < bb_map_size
&& (bb = start_to_bb[INSN_UID (insn)]) != NULL)
{
edge e;
edge_iterator ei;
fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index);
if (bb->frequency)
fprintf (file, " freq:%d", bb->frequency);
if (bb->count)
fprintf (file, " count:" HOST_WIDEST_INT_PRINT_DEC,
bb->count);
fprintf (file, " seq:%d", (*bb_seqn)++);
fprintf (file, "\n%s PRED:", ASM_COMMENT_START);
FOR_EACH_EDGE (e, ei, bb->preds)
{
dump_edge_info (file, e, TDF_DETAILS, 0);
}
fprintf (file, "\n");
}
if (INSN_UID (insn) < bb_map_size
&& (bb = end_to_bb[INSN_UID (insn)]) != NULL)
{
edge e;
edge_iterator ei;
fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START);
FOR_EACH_EDGE (e, ei, bb->succs)
{
dump_edge_info (asm_out_file, e, TDF_DETAILS, 1);
}
fprintf (file, "\n");
}
}
/* Output assembler code for some insns: all or part of a function.
For description of args, see `final_start_function', above. */
void
final (rtx first, FILE *file, int optimize_p)
{
rtx insn, next;
int seen = 0;
/* Used for -dA dump. */
basic_block *start_to_bb = NULL;
basic_block *end_to_bb = NULL;
int bb_map_size = 0;
int bb_seqn = 0;
last_ignored_compare = 0;
#ifdef HAVE_cc0
for (insn = first; insn; insn = NEXT_INSN (insn))
{
/* If CC tracking across branches is enabled, record the insn which
jumps to each branch only reached from one place. */
if (optimize_p && JUMP_P (insn))
{
rtx lab = JUMP_LABEL (insn);
if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1)
{
LABEL_REFS (lab) = insn;
}
}
}
#endif
init_recog ();
CC_STATUS_INIT;
if (flag_debug_asm)
{
basic_block bb;
bb_map_size = get_max_uid () + 1;
start_to_bb = XCNEWVEC (basic_block, bb_map_size);
end_to_bb = XCNEWVEC (basic_block, bb_map_size);
/* There is no cfg for a thunk. */
if (!cfun->is_thunk)
FOR_EACH_BB_REVERSE (bb)
{
start_to_bb[INSN_UID (BB_HEAD (bb))] = bb;
end_to_bb[INSN_UID (BB_END (bb))] = bb;
}
}
/* Output the insns. */
for (insn = first; insn;)
{
#ifdef HAVE_ATTR_length
if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
{
/* This can be triggered by bugs elsewhere in the compiler if
new insns are created after init_insn_lengths is called. */
gcc_assert (NOTE_P (insn));
insn_current_address = -1;
}
else
insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
#endif /* HAVE_ATTR_length */
dump_basic_block_info (file, insn, start_to_bb, end_to_bb,
bb_map_size, &bb_seqn);
insn = final_scan_insn (insn, file, optimize_p, 0, &seen);
}
if (flag_debug_asm)
{
free (start_to_bb);
free (end_to_bb);
}
/* Remove CFI notes, to avoid compare-debug failures. */
for (insn = first; insn; insn = next)
{
next = NEXT_INSN (insn);
if (NOTE_P (insn)
&& (NOTE_KIND (insn) == NOTE_INSN_CFI
|| NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL))
delete_insn (insn);
}
}
const char *
get_insn_template (int code, rtx insn)
{
switch (insn_data[code].output_format)
{
case INSN_OUTPUT_FORMAT_SINGLE:
return insn_data[code].output.single;
case INSN_OUTPUT_FORMAT_MULTI:
return insn_data[code].output.multi[which_alternative];
case INSN_OUTPUT_FORMAT_FUNCTION:
gcc_assert (insn);
return (*insn_data[code].output.function) (recog_data.operand, insn);
default:
gcc_unreachable ();
}
}
/* Emit the appropriate declaration for an alternate-entry-point
symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
LABEL_KIND != LABEL_NORMAL.
The case fall-through in this function is intentional. */
static void
output_alternate_entry_point (FILE *file, rtx insn)
{
const char *name = LABEL_NAME (insn);
switch (LABEL_KIND (insn))
{
case LABEL_WEAK_ENTRY:
#ifdef ASM_WEAKEN_LABEL
ASM_WEAKEN_LABEL (file, name);
#endif
case LABEL_GLOBAL_ENTRY:
targetm.asm_out.globalize_label (file, name);
case LABEL_STATIC_ENTRY:
#ifdef ASM_OUTPUT_TYPE_DIRECTIVE
ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
#endif
ASM_OUTPUT_LABEL (file, name);
break;
case LABEL_NORMAL:
default:
gcc_unreachable ();
}
}
/* Given a CALL_INSN, find and return the nested CALL. */
static rtx
call_from_call_insn (rtx insn)
{
rtx x;
gcc_assert (CALL_P (insn));
x = PATTERN (insn);
while (GET_CODE (x) != CALL)
{
switch (GET_CODE (x))
{
default:
gcc_unreachable ();
case COND_EXEC:
x = COND_EXEC_CODE (x);
break;
case PARALLEL:
x = XVECEXP (x, 0, 0);
break;
case SET:
x = XEXP (x, 1);
break;
}
}
return x;
}
/* The final scan for one insn, INSN.
Args are same as in `final', except that INSN
is the insn being scanned.
Value returned is the next insn to be scanned.
NOPEEPHOLES is the flag to disallow peephole processing (currently
used for within delayed branch sequence output).
SEEN is used to track the end of the prologue, for emitting
debug information. We force the emission of a line note after
both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
at the beginning of the second basic block, whichever comes
first. */
rtx
final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED,
int nopeepholes ATTRIBUTE_UNUSED, int *seen)
{
#ifdef HAVE_cc0
rtx set;
#endif
rtx next;
insn_counter++;
/* Ignore deleted insns. These can occur when we split insns (due to a
template of "#") while not optimizing. */
if (INSN_DELETED_P (insn))
return NEXT_INSN (insn);
switch (GET_CODE (insn))
{
case NOTE:
switch (NOTE_KIND (insn))
{
case NOTE_INSN_DELETED:
break;
case NOTE_INSN_SWITCH_TEXT_SECTIONS:
in_cold_section_p = !in_cold_section_p;
if (dwarf2out_do_frame ())
dwarf2out_switch_text_section ();
else if (!DECL_IGNORED_P (current_function_decl))
debug_hooks->switch_text_section ();
switch_to_section (current_function_section ());
targetm.asm_out.function_switched_text_sections (asm_out_file,
current_function_decl,
in_cold_section_p);
break;
case NOTE_INSN_BASIC_BLOCK:
if (targetm.asm_out.unwind_emit)
targetm.asm_out.unwind_emit (asm_out_file, insn);
if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
{
*seen |= SEEN_EMITTED;
force_source_line = true;
}
else
*seen |= SEEN_BB;
discriminator = NOTE_BASIC_BLOCK (insn)->discriminator;
break;
case NOTE_INSN_EH_REGION_BEG:
ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
NOTE_EH_HANDLER (insn));
break;
case NOTE_INSN_EH_REGION_END:
ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
NOTE_EH_HANDLER (insn));
break;
case NOTE_INSN_PROLOGUE_END:
targetm.asm_out.function_end_prologue (file);
profile_after_prologue (file);
if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
{
*seen |= SEEN_EMITTED;
force_source_line = true;
}
else
*seen |= SEEN_NOTE;
break;
case NOTE_INSN_EPILOGUE_BEG:
if (!DECL_IGNORED_P (current_function_decl))
(*debug_hooks->begin_epilogue) (last_linenum, last_filename);
targetm.asm_out.function_begin_epilogue (file);
break;
case NOTE_INSN_CFI:
dwarf2out_emit_cfi (NOTE_CFI (insn));
break;
case NOTE_INSN_CFI_LABEL:
ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI",
NOTE_LABEL_NUMBER (insn));
break;
case NOTE_INSN_FUNCTION_BEG:
app_disable ();
if (!DECL_IGNORED_P (current_function_decl))
debug_hooks->end_prologue (last_linenum, last_filename);
if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
{
*seen |= SEEN_EMITTED;
force_source_line = true;
}
else
*seen |= SEEN_NOTE;
break;
case NOTE_INSN_BLOCK_BEG:
if (debug_info_level == DINFO_LEVEL_NORMAL
|| debug_info_level == DINFO_LEVEL_VERBOSE
|| write_symbols == DWARF2_DEBUG
|| write_symbols == VMS_AND_DWARF2_DEBUG
|| write_symbols == VMS_DEBUG)
{
int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
app_disable ();
++block_depth;
high_block_linenum = last_linenum;
/* Output debugging info about the symbol-block beginning. */
if (!DECL_IGNORED_P (current_function_decl))
debug_hooks->begin_block (last_linenum, n);
/* Mark this block as output. */
TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
}
if (write_symbols == DBX_DEBUG
|| write_symbols == SDB_DEBUG)
{
location_t *locus_ptr
= block_nonartificial_location (NOTE_BLOCK (insn));
if (locus_ptr != NULL)
{
override_filename = LOCATION_FILE (*locus_ptr);
override_linenum = LOCATION_LINE (*locus_ptr);
}
}
break;
case NOTE_INSN_BLOCK_END:
if (debug_info_level == DINFO_LEVEL_NORMAL
|| debug_info_level == DINFO_LEVEL_VERBOSE
|| write_symbols == DWARF2_DEBUG
|| write_symbols == VMS_AND_DWARF2_DEBUG
|| write_symbols == VMS_DEBUG)
{
int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
app_disable ();
/* End of a symbol-block. */
--block_depth;
gcc_assert (block_depth >= 0);
if (!DECL_IGNORED_P (current_function_decl))
debug_hooks->end_block (high_block_linenum, n);
}
if (write_symbols == DBX_DEBUG
|| write_symbols == SDB_DEBUG)
{
tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn));
location_t *locus_ptr
= block_nonartificial_location (outer_block);
if (locus_ptr != NULL)
{
override_filename = LOCATION_FILE (*locus_ptr);
override_linenum = LOCATION_LINE (*locus_ptr);
}
else
{
override_filename = NULL;
override_linenum = 0;
}
}
break;
case NOTE_INSN_DELETED_LABEL:
/* Emit the label. We may have deleted the CODE_LABEL because
the label could be proved to be unreachable, though still
referenced (in the form of having its address taken. */
ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
break;
case NOTE_INSN_DELETED_DEBUG_LABEL:
/* Similarly, but need to use different namespace for it. */
if (CODE_LABEL_NUMBER (insn) != -1)
ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn));
break;
case NOTE_INSN_VAR_LOCATION:
case NOTE_INSN_CALL_ARG_LOCATION:
if (!DECL_IGNORED_P (current_function_decl))
debug_hooks->var_location (insn);
break;
default:
gcc_unreachable ();
break;
}
break;
case BARRIER:
break;
case CODE_LABEL:
/* The target port might emit labels in the output function for
some insn, e.g. sh.c output_branchy_insn. */
if (CODE_LABEL_NUMBER (insn) <= max_labelno)
{
int align = LABEL_TO_ALIGNMENT (insn);
#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
int max_skip = LABEL_TO_MAX_SKIP (insn);
#endif
if (align && NEXT_INSN (insn))
{
#ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
#else
#ifdef ASM_OUTPUT_ALIGN_WITH_NOP
ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
#else
ASM_OUTPUT_ALIGN (file, align);
#endif
#endif
}
}
CC_STATUS_INIT;
if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn))
debug_hooks->label (insn);
app_disable ();
next = next_nonnote_insn (insn);
/* If this label is followed by a jump-table, make sure we put
the label in the read-only section. Also possibly write the
label and jump table together. */
if (next != 0 && JUMP_TABLE_DATA_P (next))
{
#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
/* In this case, the case vector is being moved by the
target, so don't output the label at all. Leave that
to the back end macros. */
#else
if (! JUMP_TABLES_IN_TEXT_SECTION)
{
int log_align;
switch_to_section (targetm.asm_out.function_rodata_section
(current_function_decl));
#ifdef ADDR_VEC_ALIGN
log_align = ADDR_VEC_ALIGN (next);
#else
log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
#endif
ASM_OUTPUT_ALIGN (file, log_align);
}
else
switch_to_section (current_function_section ());
#ifdef ASM_OUTPUT_CASE_LABEL
ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
next);
#else
targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
#endif
#endif
break;
}
if (LABEL_ALT_ENTRY_P (insn))
output_alternate_entry_point (file, insn);
else
targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
break;
default:
{
rtx body = PATTERN (insn);
int insn_code_number;
const char *templ;
bool is_stmt;
/* Reset this early so it is correct for ASM statements. */
current_insn_predicate = NULL_RTX;
/* An INSN, JUMP_INSN or CALL_INSN.
First check for special kinds that recog doesn't recognize. */
if (GET_CODE (body) == USE /* These are just declarations. */
|| GET_CODE (body) == CLOBBER)
break;
#ifdef HAVE_cc0
{
/* If there is a REG_CC_SETTER note on this insn, it means that
the setting of the condition code was done in the delay slot
of the insn that branched here. So recover the cc status
from the insn that set it. */
rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
if (note)
{
NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
cc_prev_status = cc_status;
}
}
#endif
/* Detect insns that are really jump-tables
and output them as such. */
if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
{
#if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
int vlen, idx;
#endif
if (! JUMP_TABLES_IN_TEXT_SECTION)
switch_to_section (targetm.asm_out.function_rodata_section
(current_function_decl));
else
switch_to_section (current_function_section ());
app_disable ();
#if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
if (GET_CODE (body) == ADDR_VEC)
{
#ifdef ASM_OUTPUT_ADDR_VEC
ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
#else
gcc_unreachable ();
#endif
}
else
{
#ifdef ASM_OUTPUT_ADDR_DIFF_VEC
ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
#else
gcc_unreachable ();
#endif
}
#else
vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
for (idx = 0; idx < vlen; idx++)
{
if (GET_CODE (body) == ADDR_VEC)
{
#ifdef ASM_OUTPUT_ADDR_VEC_ELT
ASM_OUTPUT_ADDR_VEC_ELT
(file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
#else
gcc_unreachable ();
#endif
}
else
{
#ifdef ASM_OUTPUT_ADDR_DIFF_ELT
ASM_OUTPUT_ADDR_DIFF_ELT
(file,
body,
CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
#else
gcc_unreachable ();
#endif
}
}
#ifdef ASM_OUTPUT_CASE_END
ASM_OUTPUT_CASE_END (file,
CODE_LABEL_NUMBER (PREV_INSN (insn)),
insn);
#endif
#endif
switch_to_section (current_function_section ());
break;
}
/* Output this line note if it is the first or the last line
note in a row. */
if (!DECL_IGNORED_P (current_function_decl)
&& notice_source_line (insn, &is_stmt))
(*debug_hooks->source_line) (last_linenum, last_filename,
last_discriminator, is_stmt);
if (GET_CODE (body) == ASM_INPUT)
{
const char *string = XSTR (body, 0);
/* There's no telling what that did to the condition codes. */
CC_STATUS_INIT;
if (string[0])
{
expanded_location loc;
app_enable ();
loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body));
if (*loc.file && loc.line)
fprintf (asm_out_file, "%s %i \"%s\" 1\n",
ASM_COMMENT_START, loc.line, loc.file);
fprintf (asm_out_file, "\t%s\n", string);
#if HAVE_AS_LINE_ZERO
if (*loc.file && loc.line)
fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
#endif
}
break;
}
/* Detect `asm' construct with operands. */
if (asm_noperands (body) >= 0)
{
unsigned int noperands = asm_noperands (body);
rtx *ops = XALLOCAVEC (rtx, noperands);
const char *string;
location_t loc;
expanded_location expanded;
/* There's no telling what that did to the condition codes. */
CC_STATUS_INIT;
/* Get out the operand values. */
string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc);
/* Inhibit dying on what would otherwise be compiler bugs. */
insn_noperands = noperands;
this_is_asm_operands = insn;
expanded = expand_location (loc);
#ifdef FINAL_PRESCAN_INSN
FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
#endif
/* Output the insn using them. */
if (string[0])
{
app_enable ();
if (expanded.file && expanded.line)
fprintf (asm_out_file, "%s %i \"%s\" 1\n",
ASM_COMMENT_START, expanded.line, expanded.file);
output_asm_insn (string, ops);
#if HAVE_AS_LINE_ZERO
if (expanded.file && expanded.line)
fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START);
#endif
}
if (targetm.asm_out.final_postscan_insn)
targetm.asm_out.final_postscan_insn (file, insn, ops,
insn_noperands);
this_is_asm_operands = 0;
break;
}
app_disable ();
if (GET_CODE (body) == SEQUENCE)
{
/* A delayed-branch sequence */
int i;
final_sequence = body;
/* The first insn in this SEQUENCE might be a JUMP_INSN that will
force the restoration of a comparison that was previously
thought unnecessary. If that happens, cancel this sequence
and cause that insn to be restored. */
next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
if (next != XVECEXP (body, 0, 1))
{
final_sequence = 0;
return next;
}
for (i = 1; i < XVECLEN (body, 0); i++)
{
rtx insn = XVECEXP (body, 0, i);
rtx next = NEXT_INSN (insn);
/* We loop in case any instruction in a delay slot gets
split. */
do
insn = final_scan_insn (insn, file, 0, 1, seen);
while (insn != next);
}
#ifdef DBR_OUTPUT_SEQEND
DBR_OUTPUT_SEQEND (file);
#endif
final_sequence = 0;
/* If the insn requiring the delay slot was a CALL_INSN, the
insns in the delay slot are actually executed before the
called function. Hence we don't preserve any CC-setting
actions in these insns and the CC must be marked as being
clobbered by the function. */
if (CALL_P (XVECEXP (body, 0, 0)))
{
CC_STATUS_INIT;
}
break;
}
/* We have a real machine instruction as rtl. */
body = PATTERN (insn);
#ifdef HAVE_cc0
set = single_set (insn);
/* Check for redundant test and compare instructions
(when the condition codes are already set up as desired).
This is done only when optimizing; if not optimizing,
it should be possible for the user to alter a variable
with the debugger in between statements
and the next statement should reexamine the variable
to compute the condition codes. */
if (optimize_p)
{
if (set
&& GET_CODE (SET_DEST (set)) == CC0
&& insn != last_ignored_compare)
{
rtx src1, src2;
if (GET_CODE (SET_SRC (set)) == SUBREG)
SET_SRC (set) = alter_subreg (&SET_SRC (set));
src1 = SET_SRC (set);
src2 = NULL_RTX;
if (GET_CODE (SET_SRC (set)) == COMPARE)
{
if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
XEXP (SET_SRC (set), 0)
= alter_subreg (&XEXP (SET_SRC (set), 0));
if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
XEXP (SET_SRC (set), 1)
= alter_subreg (&XEXP (SET_SRC (set), 1));
if (XEXP (SET_SRC (set), 1)
== CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0))))
src2 = XEXP (SET_SRC (set), 0);
}
if ((cc_status.value1 != 0
&& rtx_equal_p (src1, cc_status.value1))
|| (cc_status.value2 != 0
&& rtx_equal_p (src1, cc_status.value2))
|| (src2 != 0 && cc_status.value1 != 0
&& rtx_equal_p (src2, cc_status.value1))
|| (src2 != 0 && cc_status.value2 != 0
&& rtx_equal_p (src2, cc_status.value2)))
{
/* Don't delete insn if it has an addressing side-effect. */
if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
/* or if anything in it is volatile. */
&& ! volatile_refs_p (PATTERN (insn)))
{
/* We don't really delete the insn; just ignore it. */
last_ignored_compare = insn;
break;
}
}
}
}
/* If this is a conditional branch, maybe modify it
if the cc's are in a nonstandard state
so that it accomplishes the same thing that it would
do straightforwardly if the cc's were set up normally. */
if (cc_status.flags != 0
&& JUMP_P (insn)
&& GET_CODE (body) == SET
&& SET_DEST (body) == pc_rtx
&& GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
&& COMPARISON_P (XEXP (SET_SRC (body), 0))
&& XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
{
/* This function may alter the contents of its argument
and clear some of the cc_status.flags bits.
It may also return 1 meaning condition now always true
or -1 meaning condition now always false
or 2 meaning condition nontrivial but altered. */
int result = alter_cond (XEXP (SET_SRC (body), 0));
/* If condition now has fixed value, replace the IF_THEN_ELSE
with its then-operand or its else-operand. */
if (result == 1)
SET_SRC (body) = XEXP (SET_SRC (body), 1);
if (result == -1)
SET_SRC (body) = XEXP (SET_SRC (body), 2);
/* The jump is now either unconditional or a no-op.
If it has become a no-op, don't try to output it.
(It would not be recognized.) */
if (SET_SRC (body) == pc_rtx)
{
delete_insn (insn);
break;
}
else if (ANY_RETURN_P (SET_SRC (body)))
/* Replace (set (pc) (return)) with (return). */
PATTERN (insn) = body = SET_SRC (body);
/* Rerecognize the instruction if it has changed. */
if (result != 0)
INSN_CODE (insn) = -1;
}
/* If this is a conditional trap, maybe modify it if the cc's
are in a nonstandard state so that it accomplishes the same
thing that it would do straightforwardly if the cc's were
set up normally. */
if (cc_status.flags != 0
&& NONJUMP_INSN_P (insn)
&& GET_CODE (body) == TRAP_IF
&& COMPARISON_P (TRAP_CONDITION (body))
&& XEXP (TRAP_CONDITION (body), 0) == cc0_rtx)
{
/* This function may alter the contents of its argument
and clear some of the cc_status.flags bits.
It may also return 1 meaning condition now always true
or -1 meaning condition now always false
or 2 meaning condition nontrivial but altered. */
int result = alter_cond (TRAP_CONDITION (body));
/* If TRAP_CONDITION has become always false, delete the
instruction. */
if (result == -1)
{
delete_insn (insn);
break;
}
/* If TRAP_CONDITION has become always true, replace
TRAP_CONDITION with const_true_rtx. */
if (result == 1)
TRAP_CONDITION (body) = const_true_rtx;
/* Rerecognize the instruction if it has changed. */
if (result != 0)
INSN_CODE (insn) = -1;
}
/* Make same adjustments to instructions that examine the
condition codes without jumping and instructions that
handle conditional moves (if this machine has either one). */
if (cc_status.flags != 0
&& set != 0)
{
rtx cond_rtx, then_rtx, else_rtx;
if (!JUMP_P (insn)
&& GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
{
cond_rtx = XEXP (SET_SRC (set), 0);
then_rtx = XEXP (SET_SRC (set), 1);
else_rtx = XEXP (SET_SRC (set), 2);
}
else
{
cond_rtx = SET_SRC (set);
then_rtx = const_true_rtx;
else_rtx = const0_rtx;
}
switch (GET_CODE (cond_rtx))
{
case GTU:
case GT:
case LTU:
case LT:
case GEU:
case GE:
case LEU:
case LE:
case EQ:
case NE:
{
int result;
if (XEXP (cond_rtx, 0) != cc0_rtx)
break;
result = alter_cond (cond_rtx);
if (result == 1)
validate_change (insn, &SET_SRC (set), then_rtx, 0);
else if (result == -1)
validate_change (insn, &SET_SRC (set), else_rtx, 0);
else if (result == 2)
INSN_CODE (insn) = -1;
if (SET_DEST (set) == SET_SRC (set))
delete_insn (insn);
}
break;
default:
break;
}
}
#endif
#ifdef HAVE_peephole
/* Do machine-specific peephole optimizations if desired. */
if (optimize_p && !flag_no_peephole && !nopeepholes)
{
rtx next = peephole (insn);
/* When peepholing, if there were notes within the peephole,
emit them before the peephole. */
if (next != 0 && next != NEXT_INSN (insn))
{
rtx note, prev = PREV_INSN (insn);
for (note = NEXT_INSN (insn); note != next;
note = NEXT_INSN (note))
final_scan_insn (note, file, optimize_p, nopeepholes, seen);
/* Put the notes in the proper position for a later
rescan. For example, the SH target can do this
when generating a far jump in a delayed branch
sequence. */
note = NEXT_INSN (insn);
PREV_INSN (note) = prev;
NEXT_INSN (prev) = note;
NEXT_INSN (PREV_INSN (next)) = insn;
PREV_INSN (insn) = PREV_INSN (next);
NEXT_INSN (insn) = next;
PREV_INSN (next) = insn;
}
/* PEEPHOLE might have changed this. */
body = PATTERN (insn);
}
#endif
/* Try to recognize the instruction.
If successful, verify that the operands satisfy the
constraints for the instruction. Crash if they don't,
since `reload' should have changed them so that they do. */
insn_code_number = recog_memoized (insn);
cleanup_subreg_operands (insn);
/* Dump the insn in the assembly for debugging (-dAP).
If the final dump is requested as slim RTL, dump slim
RTL to the assembly file also. */
if (flag_dump_rtl_in_asm)
{
print_rtx_head = ASM_COMMENT_START;
if (! (dump_flags & TDF_SLIM))
print_rtl_single (asm_out_file, insn);
else
dump_insn_slim (asm_out_file, insn);
print_rtx_head = "";
}
if (! constrain_operands_cached (1))
fatal_insn_not_found (insn);
/* Some target machines need to prescan each insn before
it is output. */
#ifdef FINAL_PRESCAN_INSN
FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
#endif
if (targetm.have_conditional_execution ()
&& GET_CODE (PATTERN (insn)) == COND_EXEC)
current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
#ifdef HAVE_cc0
cc_prev_status = cc_status;
/* Update `cc_status' for this instruction.
The instruction's output routine may change it further.
If the output routine for a jump insn needs to depend
on the cc status, it should look at cc_prev_status. */
NOTICE_UPDATE_CC (body, insn);
#endif
current_output_insn = debug_insn = insn;
/* Find the proper template for this insn. */
templ = get_insn_template (insn_code_number, insn);
/* If the C code returns 0, it means that it is a jump insn
which follows a deleted test insn, and that test insn
needs to be reinserted. */
if (templ == 0)
{
rtx prev;
gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
/* We have already processed the notes between the setter and
the user. Make sure we don't process them again, this is
particularly important if one of the notes is a block
scope note or an EH note. */
for (prev = insn;
prev != last_ignored_compare;
prev = PREV_INSN (prev))
{
if (NOTE_P (prev))
delete_insn (prev); /* Use delete_note. */
}
return prev;
}
/* If the template is the string "#", it means that this insn must
be split. */
if (templ[0] == '#' && templ[1] == '\0')
{
rtx new_rtx = try_split (body, insn, 0);
/* If we didn't split the insn, go away. */
if (new_rtx == insn && PATTERN (new_rtx) == body)
fatal_insn ("could not split insn", insn);
#ifdef HAVE_ATTR_length
/* This instruction should have been split in shorten_branches,
to ensure that we would have valid length info for the
splitees. */
gcc_unreachable ();
#endif
return new_rtx;
}
/* ??? This will put the directives in the wrong place if
get_insn_template outputs assembly directly. However calling it
before get_insn_template breaks if the insns is split. */
if (targetm.asm_out.unwind_emit_before_insn
&& targetm.asm_out.unwind_emit)
targetm.asm_out.unwind_emit (asm_out_file, insn);
if (CALL_P (insn))
{
rtx x = call_from_call_insn (insn);
x = XEXP (x, 0);
if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
{
tree t;
x = XEXP (x, 0);
t = SYMBOL_REF_DECL (x);
if (t)
assemble_external (t);
}
if (!DECL_IGNORED_P (current_function_decl))
debug_hooks->var_location (insn);
}
/* Output assembler code from the template. */
output_asm_insn (templ, recog_data.operand);
/* Some target machines need to postscan each insn after
it is output. */
if (targetm.asm_out.final_postscan_insn)
targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand,
recog_data.n_operands);
if (!targetm.asm_out.unwind_emit_before_insn
&& targetm.asm_out.unwind_emit)
targetm.asm_out.unwind_emit (asm_out_file, insn);
current_output_insn = debug_insn = 0;
}
}
return NEXT_INSN (insn);
}
/* Return whether a source line note needs to be emitted before INSN.
Sets IS_STMT to TRUE if the line should be marked as a possible
breakpoint location. */
static bool
notice_source_line (rtx insn, bool *is_stmt)
{
const char *filename;
int linenum;
if (override_filename)
{
filename = override_filename;
linenum = override_linenum;
}
else
{
filename = insn_file (insn);
linenum = insn_line (insn);
}
if (filename == NULL)
return false;
if (force_source_line
|| filename != last_filename
|| last_linenum != linenum)
{
force_source_line = false;
last_filename = filename;
last_linenum = linenum;
last_discriminator = discriminator;
*is_stmt = true;
high_block_linenum = MAX (last_linenum, high_block_linenum);
high_function_linenum = MAX (last_linenum, high_function_linenum);
return true;
}
if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator)
{
/* If the discriminator changed, but the line number did not,
output the line table entry with is_stmt false so the
debugger does not treat this as a breakpoint location. */
last_discriminator = discriminator;
*is_stmt = false;
return true;
}
return false;
}
/* For each operand in INSN, simplify (subreg (reg)) so that it refers
directly to the desired hard register. */
void
cleanup_subreg_operands (rtx insn)
{
int i;
bool changed = false;
extract_insn_cached (insn);
for (i = 0; i < recog_data.n_operands; i++)
{
/* The following test cannot use recog_data.operand when testing
for a SUBREG: the underlying object might have been changed
already if we are inside a match_operator expression that
matches the else clause. Instead we test the underlying
expression directly. */
if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
{
recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
changed = true;
}
else if (GET_CODE (recog_data.operand[i]) == PLUS
|| GET_CODE (recog_data.operand[i]) == MULT
|| MEM_P (recog_data.operand[i]))
recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed);
}
for (i = 0; i < recog_data.n_dups; i++)
{
if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
{
*recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
changed = true;
}
else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
|| GET_CODE (*recog_data.dup_loc[i]) == MULT
|| MEM_P (*recog_data.dup_loc[i]))
*recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed);
}
if (changed)
df_insn_rescan (insn);
}
/* If X is a SUBREG, replace it with a REG or a MEM,
based on the thing it is a subreg of. */
rtx
alter_subreg (rtx *xp)
{
rtx x = *xp;
rtx y = SUBREG_REG (x);
/* simplify_subreg does not remove subreg from volatile references.
We are required to. */
if (MEM_P (y))
{
int offset = SUBREG_BYTE (x);
/* For paradoxical subregs on big-endian machines, SUBREG_BYTE
contains 0 instead of the proper offset. See simplify_subreg. */
if (offset == 0
&& GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
{
int difference = GET_MODE_SIZE (GET_MODE (y))
- GET_MODE_SIZE (GET_MODE (x));
if (WORDS_BIG_ENDIAN)
offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
if (BYTES_BIG_ENDIAN)
offset += difference % UNITS_PER_WORD;
}
*xp = adjust_address (y, GET_MODE (x), offset);
}
else
{
rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
SUBREG_BYTE (x));
if (new_rtx != 0)
*xp = new_rtx;
else if (REG_P (y))
{
/* Simplify_subreg can't handle some REG cases, but we have to. */
unsigned int regno;
HOST_WIDE_INT offset;
regno = subreg_regno (x);
if (subreg_lowpart_p (x))
offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y));
else
offset = SUBREG_BYTE (x);
*xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset);
}
}
return *xp;
}
/* Do alter_subreg on all the SUBREGs contained in X. */
static rtx
walk_alter_subreg (rtx *xp, bool *changed)
{
rtx x = *xp;
switch (GET_CODE (x))
{
case PLUS:
case MULT:
case AND:
XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed);
break;
case MEM:
case ZERO_EXTEND:
XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed);
break;
case SUBREG:
*changed = true;
return alter_subreg (xp);
default:
break;
}
return *xp;
}
#ifdef HAVE_cc0
/* Given BODY, the body of a jump instruction, alter the jump condition
as required by the bits that are set in cc_status.flags.
Not all of the bits there can be handled at this level in all cases.
The value is normally 0.
1 means that the condition has become always true.
-1 means that the condition has become always false.
2 means that COND has been altered. */
static int
alter_cond (rtx cond)
{
int value = 0;
if (cc_status.flags & CC_REVERSED)
{
value = 2;
PUT_CODE (cond, swap_condition (GET_CODE (cond)));
}
if (cc_status.flags & CC_INVERTED)
{
value = 2;
PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
}
if (cc_status.flags & CC_NOT_POSITIVE)
switch (GET_CODE (cond))
{
case LE:
case LEU:
case GEU:
/* Jump becomes unconditional. */
return 1;
case GT:
case GTU:
case LTU:
/* Jump becomes no-op. */
return -1;
case GE:
PUT_CODE (cond, EQ);
value = 2;
break;
case LT:
PUT_CODE (cond, NE);
value = 2;
break;
default:
break;
}
if (cc_status.flags & CC_NOT_NEGATIVE)
switch (GET_CODE (cond))
{
case GE:
case GEU:
/* Jump becomes unconditional. */
return 1;
case LT:
case LTU:
/* Jump becomes no-op. */
return -1;
case LE:
case LEU:
PUT_CODE (cond, EQ);
value = 2;
break;
case GT:
case GTU:
PUT_CODE (cond, NE);
value = 2;
break;
default:
break;
}
if (cc_status.flags & CC_NO_OVERFLOW)
switch (GET_CODE (cond))
{
case GEU:
/* Jump becomes unconditional. */
return 1;
case LEU:
PUT_CODE (cond, EQ);
value = 2;
break;
case GTU:
PUT_CODE (cond, NE);
value = 2;
break;
case LTU:
/* Jump becomes no-op. */
return -1;
default:
break;
}
if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
switch (GET_CODE (cond))
{
default:
gcc_unreachable ();
case NE:
PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
value = 2;
break;
case EQ:
PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
value = 2;
break;
}
if (cc_status.flags & CC_NOT_SIGNED)
/* The flags are valid if signed condition operators are converted
to unsigned. */
switch (GET_CODE (cond))
{
case LE:
PUT_CODE (cond, LEU);
value = 2;
break;
case LT:
PUT_CODE (cond, LTU);
value = 2;
break;
case GT:
PUT_CODE (cond, GTU);
value = 2;
break;
case GE:
PUT_CODE (cond, GEU);
value = 2;
break;
default:
break;
}
return value;
}
#endif
/* Report inconsistency between the assembler template and the operands.
In an `asm', it's the user's fault; otherwise, the compiler's fault. */
void
output_operand_lossage (const char *cmsgid, ...)
{
char *fmt_string;
char *new_message;
const char *pfx_str;
va_list ap;
va_start (ap, cmsgid);
pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
vasprintf (&new_message, fmt_string, ap);
if (this_is_asm_operands)
error_for_asm (this_is_asm_operands, "%s", new_message);
else
internal_error ("%s", new_message);
free (fmt_string);
free (new_message);
va_end (ap);
}
/* Output of assembler code from a template, and its subroutines. */
/* Annotate the assembly with a comment describing the pattern and
alternative used. */
static void
output_asm_name (void)
{
if (debug_insn)
{
int num = INSN_CODE (debug_insn);
fprintf (asm_out_file, "\t%s %d\t%s",
ASM_COMMENT_START, INSN_UID (debug_insn),
insn_data[num].name);
if (insn_data[num].n_alternatives > 1)
fprintf (asm_out_file, "/%d", which_alternative + 1);
#ifdef HAVE_ATTR_length
fprintf (asm_out_file, "\t[length = %d]",
get_attr_length (debug_insn));
#endif
/* Clear this so only the first assembler insn
of any rtl insn will get the special comment for -dp. */
debug_insn = 0;
}
}
/* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
or its address, return that expr . Set *PADDRESSP to 1 if the expr
corresponds to the address of the object and 0 if to the object. */
static tree
get_mem_expr_from_op (rtx op, int *paddressp)
{
tree expr;
int inner_addressp;
*paddressp = 0;
if (REG_P (op))
return REG_EXPR (op);
else if (!MEM_P (op))
return 0;
if (MEM_EXPR (op) != 0)
return MEM_EXPR (op);
/* Otherwise we have an address, so indicate it and look at the address. */
*paddressp = 1;
op = XEXP (op, 0);
/* First check if we have a decl for the address, then look at the right side
if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
But don't allow the address to itself be indirect. */
if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
return expr;
else if (GET_CODE (op) == PLUS
&& (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
return expr;
while (UNARY_P (op)
|| GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
op = XEXP (op, 0);
expr = get_mem_expr_from_op (op, &inner_addressp);
return inner_addressp ? 0 : expr;
}
/* Output operand names for assembler instructions. OPERANDS is the
operand vector, OPORDER is the order to write the operands, and NOPS
is the number of operands to write. */
static void
output_asm_operand_names (rtx *operands, int *oporder, int nops)
{
int wrote = 0;
int i;
for (i = 0; i < nops; i++)
{
int addressp;
rtx op = operands[oporder[i]];
tree expr = get_mem_expr_from_op (op, &addressp);
fprintf (asm_out_file, "%c%s",
wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
wrote = 1;
if (expr)
{
fprintf (asm_out_file, "%s",
addressp ? "*" : "");
print_mem_expr (asm_out_file, expr);
wrote = 1;
}
else if (REG_P (op) && ORIGINAL_REGNO (op)
&& ORIGINAL_REGNO (op) != REGNO (op))
fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
}
}
#ifdef ASSEMBLER_DIALECT
/* Helper function to parse assembler dialects in the asm string.
This is called from output_asm_insn and asm_fprintf. */
static const char *
do_assembler_dialects (const char *p, int *dialect)
{
char c = *(p - 1);
switch (c)
{
case '{':
{
int i;
if (*dialect)
output_operand_lossage ("nested assembly dialect alternatives");
else
*dialect = 1;
/* If we want the first dialect, do nothing. Otherwise, skip
DIALECT_NUMBER of strings ending with '|'. */
for (i = 0; i < dialect_number; i++)
{
while (*p && *p != '}' && *p++ != '|')
;
if (*p == '}')
break;
}
if (*p == '\0')
output_operand_lossage ("unterminated assembly dialect alternative");
}
break;
case '|':
if (*dialect)
{
/* Skip to close brace. */
do
{
if (*p == '\0')
{
output_operand_lossage ("unterminated assembly dialect alternative");
break;
}
}
while (*p++ != '}');
*dialect = 0;
}
else
putc (c, asm_out_file);
break;
case '}':
if (! *dialect)
putc (c, asm_out_file);
*dialect = 0;
break;
default:
gcc_unreachable ();
}
return p;
}
#endif
/* Output text from TEMPLATE to the assembler output file,
obeying %-directions to substitute operands taken from
the vector OPERANDS.
%N (for N a digit) means print operand N in usual manner.
%lN means require operand N to be a CODE_LABEL or LABEL_REF
and print the label name with no punctuation.
%cN means require operand N to be a constant
and print the constant expression with no punctuation.
%aN means expect operand N to be a memory address
(not a memory reference!) and print a reference
to that address.
%nN means expect operand N to be a constant
and print a constant expression for minus the value
of the operand, with no other punctuation. */
void
output_asm_insn (const char *templ, rtx *operands)
{
const char *p;
int c;
#ifdef ASSEMBLER_DIALECT
int dialect = 0;
#endif
int oporder[MAX_RECOG_OPERANDS];
char opoutput[MAX_RECOG_OPERANDS];
int ops = 0;
/* An insn may return a null string template
in a case where no assembler code is needed. */
if (*templ == 0)
return;
memset (opoutput, 0, sizeof opoutput);
p = templ;
putc ('\t', asm_out_file);
#ifdef ASM_OUTPUT_OPCODE
ASM_OUTPUT_OPCODE (asm_out_file, p);
#endif
while ((c = *p++))
switch (c)
{
case '\n':
if (flag_verbose_asm)
output_asm_operand_names (operands, oporder, ops);
if (flag_print_asm_name)
output_asm_name ();
ops = 0;
memset (opoutput, 0, sizeof opoutput);
putc (c, asm_out_file);
#ifdef ASM_OUTPUT_OPCODE
while ((c = *p) == '\t')
{
putc (c, asm_out_file);
p++;
}
ASM_OUTPUT_OPCODE (asm_out_file, p);
#endif
break;
#ifdef ASSEMBLER_DIALECT
case '{':
case '}':
case '|':
p = do_assembler_dialects (p, &dialect);
break;
#endif
case '%':
/* %% outputs a single %. */
if (*p == '%')
{
p++;
putc (c, asm_out_file);
}
/* %= outputs a number which is unique to each insn in the entire
compilation. This is useful for making local labels that are
referred to more than once in a given insn. */
else if (*p == '=')
{
p++;
fprintf (asm_out_file, "%d", insn_counter);
}
/* % followed by a letter and some digits
outputs an operand in a special way depending on the letter.
Letters `acln' are implemented directly.
Other letters are passed to `output_operand' so that
the TARGET_PRINT_OPERAND hook can define them. */
else if (ISALPHA (*p))
{
int letter = *p++;
unsigned long opnum;
char *endptr;
opnum = strtoul (p, &endptr, 10);
if (endptr == p)
output_operand_lossage ("operand number missing "
"after %%-letter");
else if (this_is_asm_operands && opnum >= insn_noperands)
output_operand_lossage ("operand number out of range");
else if (letter == 'l')
output_asm_label (operands[opnum]);
else if (letter == 'a')
output_address (operands[opnum]);
else if (letter == 'c')
{
if (CONSTANT_ADDRESS_P (operands[opnum]))
output_addr_const (asm_out_file, operands[opnum]);
else
output_operand (operands[opnum], 'c');
}
else if (letter == 'n')
{
if (CONST_INT_P (operands[opnum]))
fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
- INTVAL (operands[opnum]));
else
{
putc ('-', asm_out_file);
output_addr_const (asm_out_file, operands[opnum]);
}
}
else
output_operand (operands[opnum], letter);
if (!opoutput[opnum])
oporder[ops++] = opnum;
opoutput[opnum] = 1;
p = endptr;
c = *p;
}
/* % followed by a digit outputs an operand the default way. */
else if (ISDIGIT (*p))
{
unsigned long opnum;
char *endptr;
opnum = strtoul (p, &endptr, 10);
if (this_is_asm_operands && opnum >= insn_noperands)
output_operand_lossage ("operand number out of range");
else
output_operand (operands[opnum], 0);
if (!opoutput[opnum])
oporder[ops++] = opnum;
opoutput[opnum] = 1;
p = endptr;
c = *p;
}
/* % followed by punctuation: output something for that
punctuation character alone, with no operand. The
TARGET_PRINT_OPERAND hook decides what is actually done. */
else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p))
output_operand (NULL_RTX, *p++);
else
output_operand_lossage ("invalid %%-code");
break;
default:
putc (c, asm_out_file);
}
/* Write out the variable names for operands, if we know them. */
if (flag_verbose_asm)
output_asm_operand_names (operands, oporder, ops);
if (flag_print_asm_name)
output_asm_name ();
putc ('\n', asm_out_file);
}
/* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
void
output_asm_label (rtx x)
{
char buf[256];
if (GET_CODE (x) == LABEL_REF)
x = XEXP (x, 0);
if (LABEL_P (x)
|| (NOTE_P (x)
&& NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL))
ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
else
output_operand_lossage ("'%%l' operand isn't a label");
assemble_name (asm_out_file, buf);
}
/* Helper rtx-iteration-function for mark_symbol_refs_as_used and
output_operand. Marks SYMBOL_REFs as referenced through use of
assemble_external. */
static int
mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED)
{
rtx x = *xp;
/* If we have a used symbol, we may have to emit assembly
annotations corresponding to whether the symbol is external, weak
or has non-default visibility. */
if (GET_CODE (x) == SYMBOL_REF)
{
tree t;
t = SYMBOL_REF_DECL (x);
if (t)
assemble_external (t);
return -1;
}
return 0;
}
/* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */
void
mark_symbol_refs_as_used (rtx x)
{
for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
}
/* Print operand X using machine-dependent assembler syntax.
CODE is a non-digit that preceded the operand-number in the % spec,
such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
between the % and the digits.
When CODE is a non-letter, X is 0.
The meanings of the letters are machine-dependent and controlled
by TARGET_PRINT_OPERAND. */
void
output_operand (rtx x, int code ATTRIBUTE_UNUSED)
{
if (x && GET_CODE (x) == SUBREG)
x = alter_subreg (&x);
/* X must not be a pseudo reg. */
gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
targetm.asm_out.print_operand (asm_out_file, x, code);
if (x == NULL_RTX)
return;
for_each_rtx (&x, mark_symbol_ref_as_used, NULL);
}
/* Print a memory reference operand for address X using
machine-dependent assembler syntax. */
void
output_address (rtx x)
{
bool changed = false;
walk_alter_subreg (&x, &changed);
targetm.asm_out.print_operand_address (asm_out_file, x);
}
/* Print an integer constant expression in assembler syntax.
Addition and subtraction are the only arithmetic
that may appear in these expressions. */
void
output_addr_const (FILE *file, rtx x)
{
char buf[256];
restart:
switch (GET_CODE (x))
{
case PC:
putc ('.', file);
break;
case SYMBOL_REF:
if (SYMBOL_REF_DECL (x))
assemble_external (SYMBOL_REF_DECL (x));
#ifdef ASM_OUTPUT_SYMBOL_REF
ASM_OUTPUT_SYMBOL_REF (file, x);
#else
assemble_name (file, XSTR (x, 0));
#endif
break;
case LABEL_REF:
x = XEXP (x, 0);
/* Fall through. */
case CODE_LABEL:
ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
#ifdef ASM_OUTPUT_LABEL_REF
ASM_OUTPUT_LABEL_REF (file, buf);
#else
assemble_name (file, buf);
#endif
break;
case CONST_INT:
fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
break;
case CONST:
/* This used to output parentheses around the expression,
but that does not work on the 386 (either ATT or BSD assembler). */
output_addr_const (file, XEXP (x, 0));
break;
case CONST_DOUBLE:
if (GET_MODE (x) == VOIDmode)
{
/* We can use %d if the number is one word and positive. */
if (CONST_DOUBLE_HIGH (x))
fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
(unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x),
(unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
else if (CONST_DOUBLE_LOW (x) < 0)
fprintf (file, HOST_WIDE_INT_PRINT_HEX,
(unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x));
else
fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
}
else
/* We can't handle floating point constants;
PRINT_OPERAND must handle them. */
output_operand_lossage ("floating constant misused");
break;
case CONST_FIXED:
fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x));
break;
case PLUS:
/* Some assemblers need integer constants to appear last (eg masm). */
if (CONST_INT_P (XEXP (x, 0)))
{
output_addr_const (file, XEXP (x, 1));
if (INTVAL (XEXP (x, 0)) >= 0)
fprintf (file, "+");
output_addr_const (file, XEXP (x, 0));
}
else
{
output_addr_const (file, XEXP (x, 0));
if (!CONST_INT_P (XEXP (x, 1))
|| INTVAL (XEXP (x, 1)) >= 0)
fprintf (file, "+");
output_addr_const (file, XEXP (x, 1));
}
break;
case MINUS:
/* Avoid outputting things like x-x or x+5-x,
since some assemblers can't handle that. */
x = simplify_subtraction (x);
if (GET_CODE (x) != MINUS)
goto restart;
output_addr_const (file, XEXP (x, 0));
fprintf (file, "-");
if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0)
|| GET_CODE (XEXP (x, 1)) == PC
|| GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
output_addr_const (file, XEXP (x, 1));
else
{
fputs (targetm.asm_out.open_paren, file);
output_addr_const (file, XEXP (x, 1));
fputs (targetm.asm_out.close_paren, file);
}
break;
case ZERO_EXTEND:
case SIGN_EXTEND:
case SUBREG:
case TRUNCATE:
output_addr_const (file, XEXP (x, 0));
break;
default:
if (targetm.asm_out.output_addr_const_extra (file, x))
break;
output_operand_lossage ("invalid expression as operand");
}
}
/* Output a quoted string. */
void
output_quoted_string (FILE *asm_file, const char *string)
{
#ifdef OUTPUT_QUOTED_STRING
OUTPUT_QUOTED_STRING (asm_file, string);
#else
char c;
putc ('\"', asm_file);
while ((c = *string++) != 0)
{
if (ISPRINT (c))
{
if (c == '\"' || c == '\\')
putc ('\\', asm_file);
putc (c, asm_file);
}
else
fprintf (asm_file, "\\%03o", (unsigned char) c);
}
putc ('\"', asm_file);
#endif
}
/* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */
void
fprint_whex (FILE *f, unsigned HOST_WIDE_INT value)
{
char buf[2 + CHAR_BIT * sizeof (value) / 4];
if (value == 0)
putc ('0', f);
else
{
char *p = buf + sizeof (buf);
do
*--p = "0123456789abcdef"[value % 16];
while ((value /= 16) != 0);
*--p = 'x';
*--p = '0';
fwrite (p, 1, buf + sizeof (buf) - p, f);
}
}
/* Internal function that prints an unsigned long in decimal in reverse.
The output string IS NOT null-terminated. */
static int
sprint_ul_rev (char *s, unsigned long value)
{
int i = 0;
do
{
s[i] = "0123456789"[value % 10];
value /= 10;
i++;
/* alternate version, without modulo */
/* oldval = value; */
/* value /= 10; */
/* s[i] = "0123456789" [oldval - 10*value]; */
/* i++ */
}
while (value != 0);
return i;
}
/* Write an unsigned long as decimal to a file, fast. */
void
fprint_ul (FILE *f, unsigned long value)
{
/* python says: len(str(2**64)) == 20 */
char s[20];
int i;
i = sprint_ul_rev (s, value);
/* It's probably too small to bother with string reversal and fputs. */
do
{
i--;
putc (s[i], f);
}
while (i != 0);
}
/* Write an unsigned long as decimal to a string, fast.
s must be wide enough to not overflow, at least 21 chars.
Returns the length of the string (without terminating '\0'). */
int
sprint_ul (char *s, unsigned long value)
{
int len;
char tmp_c;
int i;
int j;
len = sprint_ul_rev (s, value);
s[len] = '\0';
/* Reverse the string. */
i = 0;
j = len - 1;
while (i < j)
{
tmp_c = s[i];
s[i] = s[j];
s[j] = tmp_c;
i++; j--;
}
return len;
}
/* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
%R prints the value of REGISTER_PREFIX.
%L prints the value of LOCAL_LABEL_PREFIX.
%U prints the value of USER_LABEL_PREFIX.
%I prints the value of IMMEDIATE_PREFIX.
%O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
We handle alternate assembler dialects here, just like output_asm_insn. */
void
asm_fprintf (FILE *file, const char *p, ...)
{
char buf[10];
char *q, c;
#ifdef ASSEMBLER_DIALECT
int dialect = 0;
#endif
va_list argptr;
va_start (argptr, p);
buf[0] = '%';
while ((c = *p++))
switch (c)
{
#ifdef ASSEMBLER_DIALECT
case '{':
case '}':
case '|':
p = do_assembler_dialects (p, &dialect);
break;
#endif
case '%':
c = *p++;
q = &buf[1];
while (strchr ("-+ #0", c))
{
*q++ = c;
c = *p++;
}
while (ISDIGIT (c) || c == '.')
{
*q++ = c;
c = *p++;
}
switch (c)
{
case '%':
putc ('%', file);
break;
case 'd': case 'i': case 'u':
case 'x': case 'X': case 'o':
case 'c':
*q++ = c;
*q = 0;
fprintf (file, buf, va_arg (argptr, int));
break;
case 'w':
/* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
'o' cases, but we do not check for those cases. It
means that the value is a HOST_WIDE_INT, which may be
either `long' or `long long'. */
memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
q += strlen (HOST_WIDE_INT_PRINT);
*q++ = *p++;
*q = 0;
fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
break;
case 'l':
*q++ = c;
#ifdef HAVE_LONG_LONG
if (*p == 'l')
{
*q++ = *p++;
*q++ = *p++;
*q = 0;
fprintf (file, buf, va_arg (argptr, long long));
}
else
#endif
{
*q++ = *p++;
*q = 0;
fprintf (file, buf, va_arg (argptr, long));
}
break;
case 's':
*q++ = c;
*q = 0;
fprintf (file, buf, va_arg (argptr, char *));
break;
case 'O':
#ifdef ASM_OUTPUT_OPCODE
ASM_OUTPUT_OPCODE (asm_out_file, p);
#endif
break;
case 'R':
#ifdef REGISTER_PREFIX
fprintf (file, "%s", REGISTER_PREFIX);
#endif
break;
case 'I':
#ifdef IMMEDIATE_PREFIX
fprintf (file, "%s", IMMEDIATE_PREFIX);
#endif
break;
case 'L':
#ifdef LOCAL_LABEL_PREFIX
fprintf (file, "%s", LOCAL_LABEL_PREFIX);
#endif
break;
case 'U':
fputs (user_label_prefix, file);
break;
#ifdef ASM_FPRINTF_EXTENSIONS
/* Uppercase letters are reserved for general use by asm_fprintf
and so are not available to target specific code. In order to
prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
they are defined here. As they get turned into real extensions
to asm_fprintf they should be removed from this list. */
case 'A': case 'B': case 'C': case 'D': case 'E':
case 'F': case 'G': case 'H': case 'J': case 'K':
case 'M': case 'N': case 'P': case 'Q': case 'S':
case 'T': case 'V': case 'W': case 'Y': case 'Z':
break;
ASM_FPRINTF_EXTENSIONS (file, argptr, p)
#endif
default:
gcc_unreachable ();
}
break;
default:
putc (c, file);
}
va_end (argptr);
}
/* Return nonzero if this function has no function calls. */
int
leaf_function_p (void)
{
rtx insn;
rtx link;
if (crtl->profile || profile_arc_flag)
return 0;
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
{
if (CALL_P (insn)
&& ! SIBLING_CALL_P (insn))
return 0;
if (NONJUMP_INSN_P (insn)
&& GET_CODE (PATTERN (insn)) == SEQUENCE
&& CALL_P (XVECEXP (PATTERN (insn), 0, 0))
&& ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
return 0;
}
for (link = crtl->epilogue_delay_list;
link;
link = XEXP (link, 1))
{
insn = XEXP (link, 0);
if (CALL_P (insn)
&& ! SIBLING_CALL_P (insn))
return 0;
if (NONJUMP_INSN_P (insn)
&& GET_CODE (PATTERN (insn)) == SEQUENCE
&& CALL_P (XVECEXP (PATTERN (insn), 0, 0))
&& ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
return 0;
}
return 1;
}
/* Return 1 if branch is a forward branch.
Uses insn_shuid array, so it works only in the final pass. May be used by
output templates to customary add branch prediction hints.
*/
int
final_forward_branch_p (rtx insn)
{
int insn_id, label_id;
gcc_assert (uid_shuid);
insn_id = INSN_SHUID (insn);
label_id = INSN_SHUID (JUMP_LABEL (insn));
/* We've hit some insns that does not have id information available. */
gcc_assert (insn_id && label_id);
return insn_id < label_id;
}
/* On some machines, a function with no call insns
can run faster if it doesn't create its own register window.
When output, the leaf function should use only the "output"
registers. Ordinarily, the function would be compiled to use
the "input" registers to find its arguments; it is a candidate
for leaf treatment if it uses only the "input" registers.
Leaf function treatment means renumbering so the function
uses the "output" registers instead. */
#ifdef LEAF_REGISTERS
/* Return 1 if this function uses only the registers that can be
safely renumbered. */
int
only_leaf_regs_used (void)
{
int i;
const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
if ((df_regs_ever_live_p (i) || global_regs[i])
&& ! permitted_reg_in_leaf_functions[i])
return 0;
if (crtl->uses_pic_offset_table
&& pic_offset_table_rtx != 0
&& REG_P (pic_offset_table_rtx)
&& ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
return 0;
return 1;
}
/* Scan all instructions and renumber all registers into those
available in leaf functions. */
static void
leaf_renumber_regs (rtx first)
{
rtx insn;
/* Renumber only the actual patterns.
The reg-notes can contain frame pointer refs,
and renumbering them could crash, and should not be needed. */
for (insn = first; insn; insn = NEXT_INSN (insn))
if (INSN_P (insn))
leaf_renumber_regs_insn (PATTERN (insn));
for (insn = crtl->epilogue_delay_list;
insn;
insn = XEXP (insn, 1))
if (INSN_P (XEXP (insn, 0)))
leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
}
/* Scan IN_RTX and its subexpressions, and renumber all regs into those
available in leaf functions. */
void
leaf_renumber_regs_insn (rtx in_rtx)
{
int i, j;
const char *format_ptr;
if (in_rtx == 0)
return;
/* Renumber all input-registers into output-registers.
renumbered_regs would be 1 for an output-register;
they */
if (REG_P (in_rtx))
{
int newreg;
/* Don't renumber the same reg twice. */
if (in_rtx->used)
return;
newreg = REGNO (in_rtx);
/* Don't try to renumber pseudo regs. It is possible for a pseudo reg
to reach here as part of a REG_NOTE. */
if (newreg >= FIRST_PSEUDO_REGISTER)
{
in_rtx->used = 1;
return;
}
newreg = LEAF_REG_REMAP (newreg);
gcc_assert (newreg >= 0);
df_set_regs_ever_live (REGNO (in_rtx), false);
df_set_regs_ever_live (newreg, true);
SET_REGNO (in_rtx, newreg);
in_rtx->used = 1;
}
if (INSN_P (in_rtx))
{
/* Inside a SEQUENCE, we find insns.
Renumber just the patterns of these insns,
just as we do for the top-level insns. */
leaf_renumber_regs_insn (PATTERN (in_rtx));
return;
}
format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
switch (*format_ptr++)
{
case 'e':
leaf_renumber_regs_insn (XEXP (in_rtx, i));
break;
case 'E':
if (NULL != XVEC (in_rtx, i))
{
for (j = 0; j < XVECLEN (in_rtx, i); j++)
leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
}
break;
case 'S':
case 's':
case '0':
case 'i':
case 'w':
case 'n':
case 'u':
break;
default:
gcc_unreachable ();
}
}
#endif
/* Turn the RTL into assembly. */
static unsigned int
rest_of_handle_final (void)
{
rtx x;
const char *fnname;
/* Get the function's name, as described by its RTL. This may be
different from the DECL_NAME name used in the source file. */
x = DECL_RTL (current_function_decl);
gcc_assert (MEM_P (x));
x = XEXP (x, 0);
gcc_assert (GET_CODE (x) == SYMBOL_REF);
fnname = XSTR (x, 0);
assemble_start_function (current_function_decl, fnname);
final_start_function (get_insns (), asm_out_file, optimize);
final (get_insns (), asm_out_file, optimize);
final_end_function ();
/* The IA-64 ".handlerdata" directive must be issued before the ".endp"
directive that closes the procedure descriptor. Similarly, for x64 SEH.
Otherwise it's not strictly necessary, but it doesn't hurt either. */
output_function_exception_table (fnname);
assemble_end_function (current_function_decl, fnname);
user_defined_section_attribute = false;
/* Free up reg info memory. */
free_reg_info ();
if (! quiet_flag)
fflush (asm_out_file);
/* Write DBX symbols if requested. */
/* Note that for those inline functions where we don't initially
know for certain that we will be generating an out-of-line copy,
the first invocation of this routine (rest_of_compilation) will
skip over this code by doing a `goto exit_rest_of_compilation;'.
Later on, wrapup_global_declarations will (indirectly) call
rest_of_compilation again for those inline functions that need
to have out-of-line copies generated. During that call, we
*will* be routed past here. */
timevar_push (TV_SYMOUT);
if (!DECL_IGNORED_P (current_function_decl))
debug_hooks->function_decl (current_function_decl);
timevar_pop (TV_SYMOUT);
/* Release the blocks that are linked to DECL_INITIAL() to free the memory. */
DECL_INITIAL (current_function_decl) = error_mark_node;
if (DECL_STATIC_CONSTRUCTOR (current_function_decl)
&& targetm.have_ctors_dtors)
targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0),
decl_init_priority_lookup
(current_function_decl));
if (DECL_STATIC_DESTRUCTOR (current_function_decl)
&& targetm.have_ctors_dtors)
targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0),
decl_fini_priority_lookup
(current_function_decl));
return 0;
}
struct rtl_opt_pass pass_final =
{
{
RTL_PASS,
"final", /* name */
NULL, /* gate */
rest_of_handle_final, /* execute */
NULL, /* sub */
NULL, /* next */
0, /* static_pass_number */
TV_FINAL, /* tv_id */
0, /* properties_required */
0, /* properties_provided */
0, /* properties_destroyed */
0, /* todo_flags_start */
TODO_ggc_collect /* todo_flags_finish */
}
};
static unsigned int
rest_of_handle_shorten_branches (void)
{
/* Shorten branches. */
shorten_branches (get_insns ());
return 0;
}
struct rtl_opt_pass pass_shorten_branches =
{
{
RTL_PASS,
"shorten", /* name */
NULL, /* gate */
rest_of_handle_shorten_branches, /* execute */
NULL, /* sub */
NULL, /* next */
0, /* static_pass_number */
TV_SHORTEN_BRANCH, /* tv_id */
0, /* properties_required */
0, /* properties_provided */
0, /* properties_destroyed */
0, /* todo_flags_start */
0 /* todo_flags_finish */
}
};
static unsigned int
rest_of_clean_state (void)
{
rtx insn, next;
FILE *final_output = NULL;
int save_unnumbered = flag_dump_unnumbered;
int save_noaddr = flag_dump_noaddr;
if (flag_dump_final_insns)
{
final_output = fopen (flag_dump_final_insns, "a");
if (!final_output)
{
error ("could not open final insn dump file %qs: %m",
flag_dump_final_insns);
flag_dump_final_insns = NULL;
}
else
{
flag_dump_noaddr = flag_dump_unnumbered = 1;
if (flag_compare_debug_opt || flag_compare_debug)
dump_flags |= TDF_NOUID;
dump_function_header (final_output, current_function_decl,
dump_flags);
final_insns_dump_p = true;
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
if (LABEL_P (insn))
INSN_UID (insn) = CODE_LABEL_NUMBER (insn);
else
{
if (NOTE_P (insn))
set_block_for_insn (insn, NULL);
INSN_UID (insn) = 0;
}
}
}
/* It is very important to decompose the RTL instruction chain here:
debug information keeps pointing into CODE_LABEL insns inside the function
body. If these remain pointing to the other insns, we end up preserving
whole RTL chain and attached detailed debug info in memory. */
for (insn = get_insns (); insn; insn = next)
{
next = NEXT_INSN (insn);
NEXT_INSN (insn) = NULL;
PREV_INSN (insn) = NULL;
if (final_output
&& (!NOTE_P (insn) ||
(NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION
&& NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION
&& NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG
&& NOTE_KIND (insn) != NOTE_INSN_BLOCK_END
&& NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL)))
print_rtl_single (final_output, insn);
}
if (final_output)
{
flag_dump_noaddr = save_noaddr;
flag_dump_unnumbered = save_unnumbered;
final_insns_dump_p = false;
if (fclose (final_output))
{
error ("could not close final insn dump file %qs: %m",
flag_dump_final_insns);
flag_dump_final_insns = NULL;
}
}
/* In case the function was not output,
don't leave any temporary anonymous types
queued up for sdb output. */
#ifdef SDB_DEBUGGING_INFO
if (write_symbols == SDB_DEBUG)
sdbout_types (NULL_TREE);
#endif
flag_rerun_cse_after_global_opts = 0;
reload_completed = 0;
epilogue_completed = 0;
#ifdef STACK_REGS
regstack_completed = 0;
#endif
/* Clear out the insn_length contents now that they are no
longer valid. */
init_insn_lengths ();
/* Show no temporary slots allocated. */
init_temp_slots ();
free_bb_for_insn ();
delete_tree_ssa ();
/* We can reduce stack alignment on call site only when we are sure that
the function body just produced will be actually used in the final
executable. */
if (decl_binds_to_current_def_p (current_function_decl))
{
unsigned int pref = crtl->preferred_stack_boundary;
if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary)
pref = crtl->stack_alignment_needed;
cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
= pref;
}
/* Make sure volatile mem refs aren't considered valid operands for
arithmetic insns. We must call this here if this is a nested inline
function, since the above code leaves us in the init_recog state,
and the function context push/pop code does not save/restore volatile_ok.
??? Maybe it isn't necessary for expand_start_function to call this
anymore if we do it here? */
init_recog_no_volatile ();
/* We're done with this function. Free up memory if we can. */
free_after_parsing (cfun);
free_after_compilation (cfun);
return 0;
}
struct rtl_opt_pass pass_clean_state =
{
{
RTL_PASS,
"*clean_state", /* name */
NULL, /* gate */
rest_of_clean_state, /* execute */
NULL, /* sub */
NULL, /* next */
0, /* static_pass_number */
TV_FINAL, /* tv_id */
0, /* properties_required */
0, /* properties_provided */
PROP_rtl, /* properties_destroyed */
0, /* todo_flags_start */
0 /* todo_flags_finish */
}
};
|