blob: cb807fdad656abb346e0e0085d089ab03296cb8c (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
|
; Options for the SPARC port of the compiler
;
; Copyright (C) 2005, 2007, 2010, 2011 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
; License for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>.
HeaderInclude
config/sparc/sparc-opts.h
;; Debug flags
TargetVariable
unsigned int sparc_debug
mfpu
Target Report Mask(FPU)
Use hardware FP
mhard-float
Target RejectNegative Mask(FPU) MaskExists
Use hardware FP
msoft-float
Target RejectNegative InverseMask(FPU)
Do not use hardware FP
mflat
Target Report Mask(FLAT)
Use flat register window model
munaligned-doubles
Target Report Mask(UNALIGNED_DOUBLES)
Assume possible double misalignment
mapp-regs
Target Report Mask(APP_REGS)
Use ABI reserved registers
mhard-quad-float
Target Report RejectNegative Mask(HARD_QUAD)
Use hardware quad FP instructions
msoft-quad-float
Target Report RejectNegative InverseMask(HARD_QUAD)
Do not use hardware quad fp instructions
mv8plus
Target Report Mask(V8PLUS)
Compile for V8+ ABI
mvis
Target Report Mask(VIS)
Use UltraSPARC Visual Instruction Set version 1.0 extensions
mvis2
Target Report Mask(VIS2)
Use UltraSPARC Visual Instruction Set version 2.0 extensions
mvis3
Target Report Mask(VIS3)
Use UltraSPARC Visual Instruction Set version 3.0 extensions
mfmaf
Target Report Mask(FMAF)
Use UltraSPARC Fused Multiply-Add extensions
mpopc
Target Report Mask(POPC)
Use UltraSPARC Population-Count instruction
mptr64
Target Report RejectNegative Mask(PTR64)
Pointers are 64-bit
mptr32
Target Report RejectNegative InverseMask(PTR64)
Pointers are 32-bit
m64
Target Report RejectNegative Mask(64BIT)
Use 64-bit ABI
m32
Target Report RejectNegative InverseMask(64BIT)
Use 32-bit ABI
mstack-bias
Target Report Mask(STACK_BIAS)
Use stack bias
mfaster-structs
Target Report Mask(FASTER_STRUCTS)
Use structs on stronger alignment for double-word copies
mrelax
Target
Optimize tail call instructions in assembler and linker
mcpu=
Target RejectNegative Joined Var(sparc_cpu_and_features) Enum(sparc_processor_type) Init(PROCESSOR_V7)
Use features of and schedule code for given CPU
mtune=
Target RejectNegative Joined Var(sparc_cpu) Enum(sparc_processor_type) Init(PROCESSOR_V7)
Schedule code for given CPU
Enum
Name(sparc_processor_type) Type(enum processor_type)
EnumValue
Enum(sparc_processor_type) String(native) Value(PROCESSOR_NATIVE) DriverOnly
EnumValue
Enum(sparc_processor_type) String(v7) Value(PROCESSOR_V7)
EnumValue
Enum(sparc_processor_type) String(cypress) Value(PROCESSOR_CYPRESS)
EnumValue
Enum(sparc_processor_type) String(v8) Value(PROCESSOR_V8)
EnumValue
Enum(sparc_processor_type) String(supersparc) Value(PROCESSOR_SUPERSPARC)
EnumValue
Enum(sparc_processor_type) String(hypersparc) Value(PROCESSOR_HYPERSPARC)
EnumValue
Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)
EnumValue
Enum(sparc_processor_type) String(sparclite) Value(PROCESSOR_SPARCLITE)
EnumValue
Enum(sparc_processor_type) String(f930) Value(PROCESSOR_F930)
EnumValue
Enum(sparc_processor_type) String(f934) Value(PROCESSOR_F934)
EnumValue
Enum(sparc_processor_type) String(sparclite86x) Value(PROCESSOR_SPARCLITE86X)
EnumValue
Enum(sparc_processor_type) String(sparclet) Value(PROCESSOR_SPARCLET)
EnumValue
Enum(sparc_processor_type) String(tsc701) Value(PROCESSOR_TSC701)
EnumValue
Enum(sparc_processor_type) String(v9) Value(PROCESSOR_V9)
EnumValue
Enum(sparc_processor_type) String(ultrasparc) Value(PROCESSOR_ULTRASPARC)
EnumValue
Enum(sparc_processor_type) String(ultrasparc3) Value(PROCESSOR_ULTRASPARC3)
EnumValue
Enum(sparc_processor_type) String(niagara) Value(PROCESSOR_NIAGARA)
EnumValue
Enum(sparc_processor_type) String(niagara2) Value(PROCESSOR_NIAGARA2)
EnumValue
Enum(sparc_processor_type) String(niagara3) Value(PROCESSOR_NIAGARA3)
EnumValue
Enum(sparc_processor_type) String(niagara4) Value(PROCESSOR_NIAGARA4)
mcmodel=
Target RejectNegative Joined Var(sparc_cmodel_string)
Use given SPARC-V9 code model
mdebug=
Target RejectNegative Joined Var(sparc_debug_string)
Enable debug output
mstd-struct-return
Target Report RejectNegative Var(sparc_std_struct_return)
Enable strict 32-bit psABI struct return checking.
mfix-at697f
Target Report RejectNegative Var(sparc_fix_at697f)
Enable workaround for single erratum of AT697F processor
(corresponding to erratum #13 of AT697E processor)
Mask(LONG_DOUBLE_128)
;; Use 128-bit long double
Mask(SPARCLITE)
;; Generate code for SPARClite
Mask(SPARCLET)
;; Generate code for SPARClet
Mask(V8)
;; Generate code for SPARC-V8
Mask(V9)
;; Generate code for SPARC-V9
Mask(DEPRECATED_V8_INSNS)
;; Generate code that uses the V8 instructions deprecated
;; in the V9 architecture.
|
