blob: 58b59f8f0e856e9992e25752ab03595fdaa7e4a2 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
|
; Options for the HP PA-RISC port of the compiler.
; Copyright (C) 2005-2022 Free Software Foundation, Inc.
;
; This file is part of GCC.
;
; GCC is free software; you can redistribute it and/or modify it under
; the terms of the GNU General Public License as published by the Free
; Software Foundation; either version 3, or (at your option) any later
; version.
;
; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
; WARRANTY; without even the implied warranty of MERCHANTABILITY or
; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
; for more details.
;
; You should have received a copy of the GNU General Public License
; along with GCC; see the file COPYING3. If not see
; <http://www.gnu.org/licenses/>.
HeaderInclude
config/pa/pa-opts.h
; Which cpu we are scheduling for.
Variable
enum processor_type pa_cpu = TARGET_SCHED_DEFAULT
march=1.0
Target RejectNegative
Generate PA1.0 code.
march=1.1
Target RejectNegative
Generate PA1.1 code.
march=2.0
Target RejectNegative
Generate PA2.0 code (requires binutils 2.10 or later).
mbig-switch
Target Ignore
Does nothing. Preserved for backward compatibility.
mcaller-copies
Target Mask(CALLER_COPIES)
Caller copies function arguments passed by hidden reference.
mcoherent-ldcw
Target Var(TARGET_COHERENT_LDCW) Init(1)
Use ldcw/ldcd coherent cache-control hint.
mdisable-fpregs
Target Mask(SOFT_FLOAT)
Disable FP regs. Equivalent to -msoft-float.
mdisable-indexing
Target Mask(DISABLE_INDEXING)
Disable indexed addressing.
mfast-indirect-calls
Target Mask(FAST_INDIRECT_CALLS)
Generate fast indirect calls.
mfixed-range=
Target RejectNegative Joined Var(pa_deferred_options) Defer
Specify range of registers to make fixed.
mgas
Target Mask(GAS)
Assume code will be assembled by GAS.
mjump-in-delay
Target Ignore
Does nothing. Preserved for backward compatibility.
;; Not used by gcc
mlinker-opt
Target RejectNegative
Enable linker optimizations.
mlong-calls
Target Mask(LONG_CALLS)
Always generate long calls.
mlong-load-store
Target Mask(LONG_LOAD_STORE)
Emit long load/store sequences.
mnosnake
Target RejectNegative
Generate PA1.0 code.
mno-space-regs
Target RejectNegative Mask(NO_SPACE_REGS)
Disable space regs.
mordered
Target Var(TARGET_ORDERED) Init(0)
Assume memory references are ordered and barriers are not needed.
mpa-risc-1-0
Target RejectNegative
Generate PA1.0 code.
mpa-risc-1-1
Target RejectNegative Mask(PA_11)
Generate PA1.1 code.
mpa-risc-2-0
Target RejectNegative Mask(PA_20)
Generate PA2.0 code (requires binutils 2.10 or later).
mportable-runtime
Target Mask(PORTABLE_RUNTIME)
Use portable calling conventions.
mschedule=
Target RejectNegative Joined Enum(pa_schedule) Var(pa_cpu)
Specify CPU for scheduling purposes. Valid arguments are 700, 7100, 7100LC, 7200, 7300, and 8000.
Enum
Name(pa_schedule) Type(enum processor_type)
EnumValue
Enum(pa_schedule) String(8000) Value(PROCESSOR_8000)
EnumValue
Enum(pa_schedule) String(7100) Value(PROCESSOR_7100)
EnumValue
Enum(pa_schedule) String(700) Value(PROCESSOR_700)
EnumValue
Enum(pa_schedule) String(7100LC) Value(PROCESSOR_7100LC)
EnumValue
Enum(pa_schedule) String(7200) Value(PROCESSOR_7200)
EnumValue
Enum(pa_schedule) String(7300) Value(PROCESSOR_7300)
msoft-float
Target Mask(SOFT_FLOAT)
Use software floating point.
msoft-mult
Target Mask(SOFT_MULT)
Use software integer multiplication.
msnake
Target RejectNegative
Generate PA1.1 code.
mspace-regs
Target RejectNegative InverseMask(NO_SPACE_REGS)
Do not disable space regs.
|
