path: root/gcc/ChangeLog

2024-09-09  David Malcolm  <dmalcolm@redhat.com>

	* ipa-pure-const.cc: Replace include of "opts.h" with
	"opts-diagnostic.h".
	(suggest_attribute): Convert param from int to
	diagnostic_option_id.
	* lto-wrapper.cc (class lto_diagnostic_option_manager): Use
	diagnostic_option_id rather than "int".
	* opts-common.cc
	(compiler_diagnostic_option_manager::option_enabled_p): Likewise.
	* opts-diagnostic.h (class gcc_diagnostic_option_manager):
	Likewise.
	(class compiler_diagnostic_option_manager): Likewise.
	* opts.cc (compiler_diagnostic_option_manager::make_option_name):
	Likewise.
	(gcc_diagnostic_option_manager::make_option_url): Likewise.
	* substring-locations.cc
	(format_string_diagnostic_t::emit_warning_n_va): Likewise.
	(format_string_diagnostic_t::emit_warning_va): Likewise.
	(format_string_diagnostic_t::emit_warning): Likewise.
	(format_string_diagnostic_t::emit_warning_n): Likewise.
	* substring-locations.h
	(format_string_diagnostic_t::emit_warning_va): Likewise.
	(format_string_diagnostic_t::emit_warning_n_va): Likewise.
	(format_string_diagnostic_t::emit_warning): Likewise.
	(format_string_diagnostic_t::emit_warning_n): Likewise.

2024-09-09  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-core.h (struct diagnostic_option_id): New.
	(warning): Use it rather than "int" for param.
	(warning_n): Likewise.
	(warning_at): Likewise.
	(warning_meta): Likewise.
	(pedwarn): Likewise.
	(permerror_opt): Likewise.
	(emit_diagnostic): Likewise.
	(emit_diagnostic_valist): Likewise.
	(emit_diagnostic_valist_meta): Likewise.
	* diagnostic-format-json.cc
	(json_output_format::on_report_diagnostic): Update for renaming of
	diagnostic_info field.
	* diagnostic-format-sarif.cc (sarif_builder::make_result_object):
	Likewise.
	(make_reporting_descriptor_object_for_warning): Likewise.
	* diagnostic-format-text.cc (print_option_information): Likewise.
	* diagnostic-global-context.cc (emit_diagnostic): Use
	"diagnostic_option_id option_id" rather than "int opt".
	(emit_diagnostic_valist): Likewise.
	(emit_diagnostic_valist_meta): Likewise.
	(warning): Likewise.
	(warning_at): Likewise.
	(warning_meta): Likewise.
	(warning_n): Likewise.
	(pedwarn): Likewise.
	(permerror_opt): Likewise.
	* diagnostic.cc (diagnostic_set_info_translated): Update for
	renaming of diagnostic_info field.
	(diagnostic_option_classifier::classify_diagnostic): Use
	"diagnostic_option_id option_id" rather than "int opt".
	(update_effective_level_from_pragmas): Update for renaming of
	diagnostic_info field.
	(diagnostic_context::diagnostic_enabled): Likewise.
	(diagnostic_context::warning_enabled_at): Use
	"diagnostic_option_id option_id" rather than "int opt".
	(diagnostic_context::diagnostic_impl): Likewise.
	(diagnostic_context::diagnostic_n_impl): Likewise.
	* diagnostic.h (diagnostic_info::diagnostic_info): Update for...
	(diagnostic_info::option_index): Rename...
	(diagnostic_info::option_id): ...to this.
	(class diagnostic_option_manager): Use
	"diagnostic_option_id option_id" rather than "int opt" for vfuncs.
	(diagnostic_option_classifier): Likewise for member funcs.
	(diagnostic_classification_change_t::option): Add comment.
	(diagnostic_context::warning_enabled_at): Use
	"diagnostic_option_id option_id" rather than "int option_index".
	(diagnostic_context::option_unspecified_p): Likewise.
	(diagnostic_context::classify_diagnostic): Likewise.
	(diagnostic_context::option_enabled_p): Likewise.
	(diagnostic_context::make_option_name): Likewise.
	(diagnostic_context::make_option_url): Likewise.
	(diagnostic_context::diagnostic_impl): Likewise.
	(diagnostic_context::diagnostic_n_impl): Likewise.
	(diagnostic_override_option_index): Rename...
	(diagnostic_set_option_id): ...to this, and update for
	diagnostic_info field renaming.
	(diagnostic_classify_diagnostic): Use "diagnostic_option_id"
	rather than "int".
	(warning_enabled_at): Likewise.
	(option_unspecified_p): Likewise.

2024-09-09  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic.cc (diagnostic_context::initialize): Replace
	m_options_callbacks with m_option_mgr.
	(diagnostic_context::set_option_hooks): Replace with...
	(diagnostic_context::set_option_manager): ...this.
	* diagnostic.h (diagnostic_option_enabled_cb): Delete.
	(diagnostic_make_option_name_cb): Delete.
	(diagnostic_make_option_url_cb): Delete.
	(class diagnostic_option_manager): New.
	(diagnostic_manager::option_enabled_p): Convert from using
	m_option_callbacks to m_option_mgr.
	(diagnostic_manager::make_option_name): Likewise.
	(diagnostic_manager::make_option_url): Likewise.
	(diagnostic_manager::set_option_hooks): Replace with...
	(diagnostic_manager::set_option_manager): ...this.
	(diagnostic_manager::get_lang_mask): Update for field changes.
	(diagnostic_manager::m_option_callbacks): Replace with...
	(diagnostic_manager::m_option_mgr): ...this and...
	(diagnostic_manager::m_lang_mask): ...this.
	* lto-wrapper.cc (class lto_diagnostic_option_manager): New.
	(main): Port from option hooks to diagnostic_option_manager.
	* opts-common.cc: Include "opts-diagnostic.h".
	(compiler_diagnostic_option_manager::option_enabled_p): New.
	* opts-diagnostic.h (option_name): Drop decl.
	(get_option_url): Drop decl.
	(class gcc_diagnostic_option_manager): New.
	(class compiler_diagnostic_option_manager): New.
	* opts.cc (option_name): Convert to...
	(compiler_diagnostic_option_manager::make_option_name): ...this.
	(get_option_url): Convert to...
	(gcc_diagnostic_option_manager::make_option_url): ...this.
	* toplev.cc (general_init): Port from option hooks to
	diagnostic_option_manager.

2024-09-09  David Malcolm  <dmalcolm@redhat.com>

	PR other/116613
	* attribs.cc (decls_mismatched_attributes): Rename
	diagnostic_context's "printer" field to "m_printer".
	(attr_access::array_as_string): Likewise.
	* diagnostic-format-json.cc
	(json_output_format::on_report_diagnostic): Likewise.
	(diagnostic_output_format_init_json): Likewise.
	* diagnostic-format-sarif.cc
	(sarif_result::on_nested_diagnostic): Likewise.
	(sarif_ice_notification): Likewise.
	(sarif_builder::on_report_diagnostic): Likewise.
	(sarif_builder::make_result_object): Likewise.
	(sarif_builder::make_location_object): Likewise.
	(sarif_builder::make_message_object_for_diagram): Likewise.
	(diagnostic_output_format_init_sarif): Likewise.
	* diagnostic-format-text.cc
	(diagnostic_text_output_format::~diagnostic_text_output_format):
	Likewise.
	(diagnostic_text_output_format::on_report_diagnostic): Likewise.
	(diagnostic_text_output_format::on_diagram): Likewise.
	(diagnostic_text_output_format::print_any_cwe): Likewise.
	(diagnostic_text_output_format::print_any_rules): Likewise.
	(diagnostic_text_output_format::print_option_information):
	Likewise.
	* diagnostic-format.h (diagnostic_output_format::get_printer):
	New.
	* diagnostic-global-context.cc (verbatim): Rename
	diagnostic_context's "printer" field to "m_printer".
	* diagnostic-path.cc (path_label::get_text): Likewise.
	(print_path_summary_as_text): Likewise.
	(diagnostic_context::print_path): Likewise.
	(selftest::test_empty_path): Likewise.
	(selftest::test_intraprocedural_path): Likewise.
	(selftest::test_interprocedural_path_1): Likewise.
	(selftest::test_interprocedural_path_2): Likewise.
	(selftest::test_recursion): Likewise.
	(selftest::test_control_flow_1): Likewise.
	(selftest::test_control_flow_2): Likewise.
	(selftest::test_control_flow_3): Likewise.
	(assert_cfg_edge_path_streq): Likewise.
	(selftest::test_control_flow_5): Likewise.
	(selftest::test_control_flow_6): Likewise.
	* diagnostic-show-locus.cc (layout::layout): Likewise.
	(selftest::test_layout_x_offset_display_utf8): Likewise.
	(selftest::test_layout_x_offset_display_tab): Likewise.
	(selftest::test_diagnostic_show_locus_unknown_location): Likewise.
	(selftest::test_one_liner_simple_caret): Likewise.
	(selftest::test_one_liner_no_column): Likewise.
	(selftest::test_one_liner_caret_and_range): Likewise.
	(selftest::test_one_liner_multiple_carets_and_ranges): Likewise.
	(selftest::test_one_liner_fixit_insert_before): Likewise.
	(selftest::test_one_liner_fixit_insert_after): Likewise.
	(selftest::test_one_liner_fixit_remove): Likewise.
	(selftest::test_one_liner_fixit_replace): Likewise.
	(selftest::test_one_liner_fixit_replace_non_equal_range):
	Likewise.
	(selftest::test_one_liner_fixit_replace_equal_secondary_range):
	Likewise.
	(selftest::test_one_liner_fixit_validation_adhoc_locations):
	Likewise.
	(selftest::test_one_liner_many_fixits_1): Likewise.
	(selftest::test_one_liner_many_fixits_2): Likewise.
	(selftest::test_one_liner_labels): Likewise.
	(selftest::test_one_liner_simple_caret_utf8): Likewise.
	(selftest::test_one_liner_caret_and_range_utf8): Likewise.
	(selftest::test_one_liner_multiple_carets_and_ranges_utf8):
	Likewise.
	(selftest::test_one_liner_fixit_insert_before_utf8): Likewise.
	(selftest::test_one_liner_fixit_insert_after_utf8): Likewise.
	(selftest::test_one_liner_fixit_remove_utf8): Likewise.
	(selftest::test_one_liner_fixit_replace_utf8): Likewise.
	(selftest::test_one_liner_fixit_replace_non_equal_range_utf8):
	Likewise.
	(selftest::test_one_liner_fixit_replace_equal_secondary_range_utf8):
	Likewise.
	(selftest::test_one_liner_fixit_validation_adhoc_locations_utf8):
	Likewise.
	(selftest::test_one_liner_many_fixits_1_utf8): Likewise.
	(selftest::test_one_liner_many_fixits_2_utf8): Likewise.
	(selftest::test_one_liner_labels_utf8): Likewise.
	(selftest::test_one_liner_colorized_utf8): Likewise.
	(selftest::test_add_location_if_nearby): Likewise.
	(selftest::test_diagnostic_show_locus_fixit_lines): Likewise.
	(selftest::test_overlapped_fixit_printing): Likewise.
	(selftest::test_overlapped_fixit_printing_utf8): Likewise.
	(selftest::test_overlapped_fixit_printing_2): Likewise.
	(selftest::test_fixit_insert_containing_newline): Likewise.
	(selftest::test_fixit_insert_containing_newline_2): Likewise.
	(selftest::test_fixit_replace_containing_newline): Likewise.
	(selftest::test_fixit_deletion_affecting_newline): Likewise.
	(selftest::test_tab_expansion): Likewise.
	(selftest::test_escaping_bytes_1): Likewise.
	(selftest::test_escaping_bytes_2): Likewise.
	(selftest::test_line_numbers_multiline_range): Likewise.
	* diagnostic.cc (file_name_as_prefix): Likewise.
	(diagnostic_set_caret_max_width): Likewise.
	(diagnostic_context::initialize): Likewise.
	(diagnostic_context::color_init): Likewise.
	(diagnostic_context::urls_init): Likewise.
	(diagnostic_context::finish): Likewise.
	(diagnostic_context::get_location_text): Likewise.
	(diagnostic_build_prefix): Likewise.
	(diagnostic_context::report_current_module): Likewise.
	(default_diagnostic_starter): Likewise.
	(default_diagnostic_start_span_fn): Likewise.
	(default_diagnostic_finalizer): Likewise.
	(diagnostic_context::report_diagnostic): Likewise.
	(diagnostic_append_note): Likewise.
	(diagnostic_context::error_recursion): Likewise.
	(fancy_abort): Likewise.
	* diagnostic.h (diagnostic_context::set_show_highlight_colors):
	Likewise.
	(diagnostic_context::printer): Rename to...
	(diagnostic_context::m_printer): ...this.
	(diagnostic_format_decoder): Rename diagnostic_context's "printer"
	field to "m_printer".
	(diagnostic_prefixing_rule): Likewise.
	(diagnostic_ready_p): Likewise.
	* gimple-ssa-warn-access.cc (pass_waccess::maybe_warn_memmodel):
	Likewise.
	* langhooks.cc (lhd_print_error_function): Likewise.
	* lto-wrapper.cc (print_lto_docs_link): Likewise.
	* opts-global.cc (init_options_once): Likewise.
	* opts.cc (common_handle_option): Likewise.
	* simple-diagnostic-path.cc (simple_diagnostic_path_cc_tests):
	Likewise.
	* text-art/dump.h (dump_to_file<T>): Likewise.
	* toplev.cc (announce_function): Likewise.
	(toplev::main): Likewise.
	* tree-diagnostic.cc (default_tree_diagnostic_starter): Likewise.
	* tree.cc (escaped_string::escape): Likewise.
	(selftest::test_escaped_strings): Likewise.

2024-09-09  David Malcolm  <dmalcolm@redhat.com>

	PR other/116603
	* diagnostic-format-sarif.cc (SARIF_SCHEMA): Update URL.
	(sarif_builder::maybe_make_region_object): Don't create regions
	with startLine <= 0.
	(sarif_builder::maybe_make_region_object_for_context): Likewise.

2024-09-09  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (*insvdi_lowpart_1): Use "o" constraint
	instead of "m" for double-word mode memory operands.
	(*add<dwi>3_doubleword_zext): Ditto.
	(*addv<dwi>4_doubleword_1): Use "jO" constraint instead of "jM"
	for double-word mode memory operands.

2024-09-09  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/90693
	* internal-fn.cc (expand_POPCOUNT): Handle the second argument
	being `-1` for `<= 1`.
	* tree-ssa-math-opts.cc (match_single_bit_test): Handle LE/GT
	cases.
	(math_opts_dom_walker::after_dom_children): Call match_single_bit_test
	for LE_EXPR/GT_EXPR also.

2024-09-09  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.cc (pa_legitimate_address_p): Don't
	canonicalize operand order of scaled index addresses.

2024-09-09  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116514
	* tree-ssa-ccp.cc (bit_value_binop): Handle EXACT_DIV_EXPR
	like TRUNC_DIV_EXPR.  Handle exact division of a signed value
	by a power-of-two like a shift.  Handle unsigned division by
	a power-of-two like a shift.
	Handle unsigned TRUNC_MOD_EXPR by power-of-two, handle signed
	TRUNC_MOD_EXPR by power-of-two if the result is zero.

2024-09-09  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116647
	* tree-vect-loop.cc (vect_is_simple_reduction): Add missing
	check to double reduction detection.

2024-09-09  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/116601
	* gimple-fold.cc (optimize_memcpy_to_memset): Move
	from tree-ssa-ccp.cc and rename. Also return true
	if the optimization happened.
	(gimple_fold_builtin_memory_op): Call
	optimize_memcpy_to_memset.
	(fold_stmt_1): Call optimize_memcpy_to_memset for
	load/store copies.
	* tree-ssa-ccp.cc (optimize_memcpy): Delete.
	(pass_fold_builtins::execute): Remove code that
	calls optimize_memcpy.

2024-09-09  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-phiopt.cc (factor_out_conditional_operation): Move the has_single_use
	checks much earlier. Remove redundant check for gimple_assign_cast_p.
	Change around the check if the integral consts fits into the new type.

2024-09-09  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/116617
	* doc/invoke.texi: Add meteorlake, raptorlake and lunarlake.

2024-09-08  H.J. Lu  <hjl.tools@gmail.com>

	PR target/116621
	* config/i386/i386.cc (ix86_gimplify_va_arg): Don't use temp for
	a PARALLEL BLKmode container of an EXPR_LIST expression in a
	TImode register.

2024-09-08  Jørgen Kvalsvik  <j@lambda.is>

	* gcov.cc (release_structures): Release source_lines.
	(slurp): New function.
	(output_lines): Read sources with slurp.

2024-09-07  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-ssa-split-paths.cc (is_feasible_trace): Fix wording
	on the print.

2024-09-07  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/116588
	* tree-vrp.cc (execute_fast_vrp): Start with all edges executable.

2024-09-07  Zhao Dingyi  <dingyizhao.zdy@outlook.com>

	* config/riscv/xiangshan.md: Add atomic, trap, fcvt_i2f, fcvt_f2i.

2024-09-07  Jin Ma  <jinma@linux.alibaba.com>

	PR target/116592
	* config/riscv/thead.cc (th_asm_output_opcode): Change '0' to
	"zero"

2024-09-06  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-overload.def (vec_test_lsbb_all_ones,
	vec_test_lsbb_all_zeros): Add built-in instances for vector signed
	char and vector bool char.
	* doc/extend.texi (vec_test_lsbb_all_ones,
	vec_test_lsbb_all_zeros): Add documentation for the
	existing built-ins.

2024-09-06  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/116628
	* tree-vect-patterns.cc (vect_recog_cond_store_pattern): Add SSA_NAME
	check on expression.

2024-09-06  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/116598
	* config/aarch64/aarch64.cc (aarch64_lookup_shared_state_flags): Use
	is_attribute_namespace_p and get_attribute_name instead of manually grabbing
	the namespace and name of the attribute.

2024-09-06  Martin Jambor  <mjambor@suse.cz>

	* passes.def: Move pass_ipa_cdtor_merge before pass_ipa_cp and
	pass_ipa_sra.

2024-09-06  Martin Jambor  <mjambor@suse.cz>

	PR ipa/115815
	* cgraph.cc (cgraph_node_cannot_be_local_p_1): Also check
	DECL_STATIC_CONSTRUCTOR and DECL_STATIC_DESTRUCTOR.
	* ipa-visibility.cc (non_local_p): Likewise.
	(cgraph_node::local_p): Delete extraneous line of tabs.

2024-09-06  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_analyze_slp): Also handle discovery
	for double reductions.

2024-09-06  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_analyze_slp): Perform single-lane
	loop SLP discovery for non-grouped stores.  Move check on the root
	for re-doing SLP analysis with a single lane for load/store-lanes
	earlier and make sure we are dealing with a grouped access.
	* tree-vect-stmts.cc (vectorizable_store): Always set
	vec_num for SLP.

2024-09-06  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.h: Remove "Atmel" from header comment.
	* config/avr/avr.cc: Same.
	* config/avr/avr.md: Same.
	* config/avr/avr.opt: Same.
	* config/avr/avr-dimode.md: Same.
	* config/avr/avr-fixed.md: Same.
	* config/avr/constraints.md: Same.
	* config/avr/predicates.md: Same.
	* config/avr/avr-log.cc: Same.
	* config/avr/avrlibc.h: Same.
	* config/avr/specs.h: Same.
	* common/config/avr/avr-common.cc: Same.
	* doc/install.texi: Same.
	* config/avr/avr-arch.h: Adjust header comment.
	* config/avr/avr-c.cc: Same.
	* config/avr/avr-mcus.def: Same.
	* config/avr/avr-modes.def: Same.
	* config/avr/avr-passes.cc: Same.
	* config/avr/avr-passes.def: Same.
	* config/avr/avr-protos.h: Same.
	* config/avr/driver-avr.cc: Same.
	* config/avr/elf.h: Same.
	* config/avr/gen-avr-mmcu-specs.cc: Same.
	* config/avr/gen-avr-mmcu-texi.cc: Same.

2024-09-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116610
	* tree-vect-loop.cc (vectorizable_induction): Use MINUS_EXPR
	to apply a mask peeling adjustment.

2024-09-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116609
	* tree-vect-loop.cc (vectorizable_live_operation_1): Support
	partial vectors for single-lane SLP.

2024-09-06  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_build_integer): Detect constants
	were the higher half is the lower half inverted.

2024-09-06  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_build_integer): Detect new case
	of constants that can be improved.
	(riscv_move_integer): Add synthesys for concatening constants
	without Zbkb.

2024-09-06  Pan Li  <pan2.li@intel.com>

	* match.pd: Add int_fits_type_p check for .SAT_SUB imm operand.

2024-09-06  Pan Li  <pan2.li@intel.com>

	* match.pd: Add int_fits_type_p check for .SAT_SUB imm operand.

2024-09-06  YunQiang Su  <syq@gcc.gnu.org>

	* common/config/riscv/riscv-common.cc(riscv_select_multilib_by_abi):
	Fix out of index problem.

2024-09-06  Jason Merrill  <jason@redhat.com>

	PR c++/46457
	PR c++/81665
	* doc/extend.texi: Document flag_enum attribute.
	* doc/invoke.texi: Mention flag_enum in -Wswitch.

2024-09-06  liuhongt  <hongtao.liu@intel.com>

	PR target/115517
	* config/i386/sse.md (*avx2_pcmp<mode>3_1): Change predicate
	of operands[1] and operands[2] from nonimmdiate_operand to
	nonimm_or_0_operand.

2024-09-05  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_expand_int_scc): For rv64, use a DI
	temporary for the output and a promoted subreg to extract it into SI
	arget.
	(riscv_noce_conversion_profitable_p): Recognize new output from
	sCC expansion too.

2024-09-05  Marek Polacek  <polacek@redhat.com>

	* doc/invoke.texi: Remove an extra char in @item sme2.

2024-09-05  Prathamesh Kulkarni  <prathameshk@nvidia.com>

	* gimplify.cc (omp_add_variable): Check if decl size is not poly_int_tree_p.
	(gimplify_adjust_omp_clauses): Likewise.
	* omp-low.cc (scan_sharing_clauses): Likewise.
	(lower_omp_target): Likewise.

2024-09-05  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/104957
	* config/nvptx/nvptx.cc (write_fn_proto_1): Revert 2022-03-22
	change; 'write_fn_marker' also for alias DECL.
	(nvptx_asm_output_def_from_decls): 'write_fn_marker' for alias
	DEF.

2024-09-05  Thomas Schwinge  <tschwinge@baylibre.com>

	* doc/sourcebuild.texi (Effective-Target Keywords): Document
	'nvptx_default_ptx_isa_version_at_least_6_0',
	'nvptx_runtime_alias_ptx'.
	(Add Options): Document 'nvptx_alias_ptx'.

2024-09-05  Tamar Christina  <tamar.christina@arm.com>

	* tree-vect-patterns.cc (vect_recog_cond_store_pattern): Use pattern
	statement.

2024-09-05  Tamar Christina  <tamar.christina@arm.com>

	* doc/invoke.texi: Remove duplicate armv9-a mention.

2024-09-05  Jakub Jelinek  <jakub@redhat.com>

	* tree-vrp.cc (pass_vrp::execute): Start diagnostics with
	lowercase u rather than capital U, use semicolon instead of dot.

2024-09-05  YunQiang Su  <yunqiang@isrc.iscas.ac.cn>

	* common/config/riscv/riscv-common.cc(riscv_select_multilib_by_abi):
	look up reversely as the fallback path is listed as the 1st one.

2024-09-05  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_analyze_slp): Analyze SLP for live
	but otherwise unused defs.

2024-09-05  Thomas Schwinge  <tschwinge@baylibre.com>

	* gen-pass-instances.awk: Handle 'PUSH_INSERT_PASSES_WITHIN'.
	* pass_manager.h (PUSH_INSERT_PASSES_WITHIN): Adjust.
	* passes.cc (PUSH_INSERT_PASSES_WITHIN): Likewise.

2024-09-05  Levy Hsu  <admin@levyhsu.com>

	* config/i386/mmx.md (TARGET_MMX_WITH_SSE): New mode iterator VBF_32_64
	(fma<mode>4): define_expand for V2BF/V4BF fma<mode>4.
	(fnma<mode>4): define_expand for V2BF/V4BF fnma<mode>4.
	(fms<mode>4): define_expand for V2BF/V4BF fms<mode>4.
	(fnms<mode>4): define_expand for V2BF/V4BF fnms<mode>4.

2024-09-05  Hu, Lin1  <lin1.hu@intel.com>

	* match.pd: Fix match for (bit_and (ordered @0 @1) (ne @0 @1)).

2024-09-05  Levy Hsu  <admin@levyhsu.com>

	* config/i386/i386.cc (ix86_build_const_vector): Add V2BF/V4BF.
	(ix86_build_signbit_mask): Add V2BF/V4BF.
	* config/i386/mmx.md: Modified supported logic op to use VHBF_32_64.

2024-09-05  Levy Hsu  <admin@levyhsu.com>

	* config/i386/i386.cc (ix86_preferred_simd_mode): Add BFmode Support.

2024-09-04  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_split_integer_cost): Adjust the
	cost of negative repeating constants.
	(riscv_split_integer): Handle negative repeating constants.

2024-09-04  Tom Tromey  <tromey@adacore.com>

	* dwarf2out.cc (modified_type_die): Check DECL_NAMELESS.

2024-09-04  Arsen Arsenović  <arsen@aarsen.me>

	PR c++/106973
	* internal-fn.def (CO_YIELD): Mark as ECF_LEAF.

2024-09-04  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-object-size.cc (object_sizes_execute): Mark lhs for maybe dceing
	if doing a propagate. Call simple_dce_from_worklist.

2024-09-04  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/gen-opt.sh: Use 'enum ptx_isa' instead of 'int'.
	* config/nvptx/nvptx-gen.opt: Regenerate.
	* config/nvptx/nvptx.opt: Use 'enum ptx_version' instead of 'int'.
	* config/nvptx/nvptx-opts.h (enum ptx_isa): Add 'PTX_ISA_unset'.
	(enum ptx_version): Add 'PTX_VERSION_unset'.
	* config/nvptx/nvptx-c.cc (nvptx_cpu_cpp_builtins): Adjust.
	* config/nvptx/nvptx.cc (default_ptx_version_option)
	(handle_ptx_version_option, nvptx_option_override)
	(nvptx_file_start): Likewise.

2024-09-04  Frederik Harwath  <frederik@codesourcery.com>
	    Thomas Schwinge  <tschwinge@baylibre.com>

	* predict.cc (pass_profile::execute): Fix dump message.

2024-09-04  Frederik Harwath  <frederik@codesourcery.com>

	* tree-cfg.h (gimple_debug_cfg): Change argument type from int
	to dump_flags_t.

2024-09-04  Thomas Schwinge  <tschwinge@baylibre.com>

	* passes.cc: Document 'pass_postreload' vs. 'pass_late_compilation'.
	* passes.def: Likewise.

2024-09-04  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_lower_load_permutations): Also
	process single-use grouped loads.
	Avoid lowering contiguous aligned power-of-two sized
	chunks, those are better handled by the vector size
	specific SLP code generation.
	* tree-vect-stmts.cc (get_group_load_store_type): Drop
	the unrelated requirement of a load permutation for the
	single-element interleaving limit.

2024-09-04  Jan Hubicka  <jh@suse.cz>

	* config/i386/x86-tune-costs.h (znver5_cost): Update instruction
	costs.

2024-09-04  Andrew Pinski  <quic_apinski@quicinc.com>

	* expr.cc (expand_expr_divmod): Add dump of the two costs for
	positive division.

2024-09-04  Hans-Peter Nilsson  <hp@axis.com>

	* config/cris/cris.md (lra_szext_decomposed_indir_plus): New
	peephole2 pattern.

2024-09-04  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv.cc (riscv_expand_usadd): Zero extend
	the second operand of usadd as the first operand does.
	* config/riscv/riscv.md (usadd<m>3): Allow imm operand for
	scalar usadd pattern.

2024-09-03  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/112402
	* gimple-ssa-split-paths.cc (poor_ifcvt_pred): New function.
	(is_feasible_trace): Remove old heurstics for ifcvt cases.
	For num_stmts <=1 for both pred check poor_ifcvt_pred on both
	pred.

2024-09-03  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-ssa-split-paths.cc (is_feasible_trace): Move
	check for # of statments in join earlier and add a
	debug print.

2024-09-03  Qing Zhao  <qing.zhao@oracle.com>

	* doc/extend.texi: Explicitly mentions counted_by is available
	only in C for now.

2024-09-03  David Malcolm  <dmalcolm@redhat.com>

	* pretty-print-markup.h (pp_markup::context::context): Drop
	params "buf" and "chunk_idx", initializing m_buf from pp.
	(pp_markup::context::m_chunk_idx): Drop field.
	* pretty-print.cc (pretty_printer::format): Convert param
	from a text_info * to a text_info &.  Split out phase 1
	and phase 2 into subroutines...
	(format_phase_1): New, from pretty_printer::format.
	(format_phase_2): Likewise.
	* pretty-print.h (pretty_printer::format): Convert param
	from a text_info * to a text_info &.
	(pp_format): Update for above change.  Assert that text_info is
	non-null.

2024-09-03  David Malcolm  <dmalcolm@redhat.com>

	* pretty-print-format-impl.h (pp_formatted_chunks::get_prev): New
	accessor.
	* pretty-print.cc (selftest::push_pp_format): New.
	(ASSERT_TEXT_TOKEN): New macro.
	(selftest::test_pp_format_stack): New test.
	(selftest::pretty_print_cc_tests): New.

2024-09-03  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic.cc (diagnostic_set_caret_max_width): Prefix all
	output_buffer fields with "m_".
	* dumpfile.cc (emit_any_pending_textual_chunks): Likewise.
	(emit_any_pending_textual_chunks): Likewise.
	* gimple-pretty-print.cc (gimple_dump_bb_buff): Likewise.
	* json.cc (value::dump): Likewise.
	* pretty-print-format-impl.h (class chunk_info): Rename to...
	(class pp_formatted_chunks): ...this.  Add friend
	class output_buffer.  Update comment near end of decl to show
	the pp_formatted_chunks instance on the chunk_obstack.
	(pp_formatted_chunks::pop_from_output_buffer): Delete decl.
	(pp_formatted_chunks::on_begin_quote): Delete decl that should
	have been removed in r15-3311-ge31b6176996567.
	(pp_formatted_chunks::on_end_quote): Likewise.
	(pp_formatted_chunks::m_prev): Update for renaming.
	* pretty-print.cc (output_buffer::output_buffer): Prefix all
	fields with "m_".  Rename "cur_chunk_array" to
	"m_cur_formatted_chunks".
	(output_buffer::~output_buffer): Prefix all fields with "m_".
	(output_buffer::push_formatted_chunks): New.
	(output_buffer::pop_formatted_chunks): New.
	(pp_write_text_to_stream): Prefix all output_buffer fields with
	"m_".
	(pp_write_text_as_dot_label_to_stream): Likewise.
	(pp_write_text_as_html_like_dot_to_stream): Likewise.
	(chunk_info::append_formatted_chunk): Rename to...
	(pp_formatted_chunks::append_formatted_chunk): ...this.
	(chunk_info::pop_from_output_buffer): Delete.
	(pretty_printer::format): Update leading comment to mention
	pushing pp_formatted_chunks, and to reflect changes in
	r15-3311-ge31b6176996567.  Prefix all output_buffer fields with
	"m_".
	(pp_output_formatted_text): Update leading comment to mention
	popping a pp_formatted_chunks, and to reflect the changes in
	r15-3311-ge31b6176996567.  Prefix all output_buffer fields with
	"m_" and rename "cur_chunk_array" to "m_cur_formatted_chunks".
	Replace call to chunk_info::pop_from_output_buffer with a call to
	output_buffer::pop_formatted_chunks.
	(pp_flush): Prefix all output_buffer fields with "m_".
	(pp_really_flush): Likewise.
	(pp_clear_output_area): Likewise.
	(pp_append_text): Likewise.
	(pretty_printer::remaining_character_count_for_line): Likewise.
	(pp_newline): Likewise.
	(pp_character): Likewise.
	(pp_markup::context::push_back_any_text): Likewise.
	* pretty-print.h (class chunk_info): Rename to...
	(class pp_formatted_chunks): ...this.
	(class output_buffer): Delete unimplemented rule-of-5 members.
	(output_buffer::push_formatted_chunks): New decl.
	(output_buffer::pop_formatted_chunks): New decl.
	(output_buffer::formatted_obstack): Rename to...
	(output_buffer::m_formatted_obstack): ...this.
	(output_buffer::chunk_obstack): Rename to...
	(output_buffer::m_chunk_obstack): ...this.
	(output_buffer::obstack): Rename to...
	(output_buffer::m_obstack): ...this.
	(output_buffer::cur_chunk_array): Rename to...
	(output_buffer::m_cur_formatted_chunks): ...this.
	(output_buffer::stream): Rename to...
	(output_buffer::m_stream): ...this.
	(output_buffer::line_length): Rename to...
	(output_buffer::m_line_length): ...this.
	(output_buffer::digit_buffer): Rename to...
	(output_buffer::m_digit_buffer): ...this.
	(output_buffer::flush_p): Rename to...
	(output_buffer::m_flush_p): ...this.
	(output_buffer_formatted_text): Prefix all output_buffer fields
	with "m_".
	(output_buffer_append_r): Likewise.
	(output_buffer_last_position_in_text): Likewise.
	(pretty_printer::set_output_stream): Likewise.
	(pp_scalar): Likewise.
	(pp_wide_int): Likewise.
	* tree-pretty-print.cc (dump_generic_node): Likewise.
	(dump_generic_node): Likewise.
	(pp_double_int): Likewise.

2024-09-03  Jan Hubicka  <jh@suse.cz>

	* config/i386/i386.cc (ix86_reassociation_width): Update for Znver5.
	* config/i386/x86-tune-costs.h (znver5_costs): Update reassociation
	widths.

2024-09-03  Jeff Law  <jlaw@ventanamicro.com>

	* J: Drop file that should not have been committed

2024-09-03  Jan Hubicka  <jh@suse.cz>

	* config/i386/x86-tune-sched.cc (ix86_fuse_mov_alu_p): Fix
	typo.

2024-09-03  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_print_slp_tree): Annotate load
	and store-lanes nodes.

2024-09-03  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (get_group_load_store_type): Only disable
	peeling for gaps by using smaller vectors when not using
	load-lanes.

2024-09-03  Jan Hubicka  <jh@suse.cz>

	* config/i386/i386.h (TARGET_FUSE_MOV_AND_ALU): New tune.
	* config/i386/x86-tune-sched.cc (ix86_issue_rate): Updat for znver5.
	(ix86_adjust_cost): Add TODO about znver5 memory latency.
	(ix86_fuse_mov_alu_p): New.
	(ix86_macro_fusion_pair_p): Use it.
	* config/i386/x86-tune.def (X86_TUNE_FUSE_ALU_AND_BRANCH): Add ZNVER5.
	(X86_TUNE_FUSE_MOV_AND_ALU): New tune;

2024-09-03  Jan Hubicka  <jh@suse.cz>

	* config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Disable for
	ZNVER5.
	(X86_TUNE_USE_SCATTER_2PARTS): Disable for ZNVER5.
	(X86_TUNE_USE_GATHER_4PARTS): Disable for ZNVER5.
	(X86_TUNE_USE_SCATTER_4PARTS): Disable for ZNVER5.
	(X86_TUNE_USE_GATHER_8PARTS): Disable for ZNVER5.
	(X86_TUNE_USE_SCATTER_8PARTS): Disable for ZNVER5.

2024-09-03  H.J. Lu  <hjl.tools@gmail.com>

	PR ipa/116410
	* ipa-modref.cc (analyze_parms): Always analyze function parameter
	for LTO.

2024-09-03  Jeff Law  <jlaw@ventanamicro.com>

	PR target/115921
	* config/riscv/riscv.md (reassociate bitwise ops): Tighten test for
	cases we do not want reassociate.
	* J: New file.

2024-09-03  Jan Hubicka  <jh@suse.cz>

	* config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): Enable for
	znver5.
	(X86_TUNE_AVOID_256FMA_CHAINS): Likewise.
	(X86_TUNE_AVOID_512FMA_CHAINS): Likewise.

2024-09-03  Tobias Burnus  <tburnus@baylibre.com>

	PR lto/116535
	* lto-cgraph.cc (output_offload_tables): Remove offload_ frees.
	* lto-streamer-out.cc (lto_output): Make call to it depend on
	lto_get_out_decl_state ()->output_offload_tables_p.
	* lto-streamer.h (struct lto_out_decl_state): Add
	output_offload_tables_p field.
	* tree-pass.h (ipa_write_optimization_summaries): Add bool argument.
	* passes.cc (ipa_write_summaries_1): Add bool
	output_offload_tables_p arg.
	(ipa_write_summaries): Update call.
	(ipa_write_optimization_summaries): Accept output_offload_tables_p.

2024-09-03  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116575
	* tree-vect-slp.cc (vect_analyze_slp): Properly compute
	the mask argument for vect_load/store_lanes_supported.
	When the load is masked for now avoid rediscovery.

2024-09-03  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/avx512fp16intrin.h
	(_mm512_mask_fpclass_ph_mask): Correct mask type to __mmask32.
	(_mm512_fpclass_ph_mask): Ditto.

2024-09-03  Richard Biener  <rguenther@suse.de>

	* fold-const.cc (poly_int_binop): Move assert on
	NUM_POLY_INT_COEFFS after INTEGER_CST processing.

2024-09-03  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/116501
	* gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow):
	In the last_ovf case, use build_zero_cst operand not just when
	TYPE_UNSIGNED (typeN), but also when precN >= 0.

2024-09-03  Jennifer Schmitz  <jschmitz@nvidia.com>

	* config/aarch64/aarch64-sve-builtins-base.cc (svmul_impl::fold):
	Try constant folding.

2024-09-03  Jennifer Schmitz  <jschmitz@nvidia.com>

	* config/aarch64/aarch64-sve-builtins-base.cc (svdiv_impl::fold):
	Try constant folding.
	* config/aarch64/aarch64-sve-builtins.h: Declare
	gimple_folder::fold_const_binary.
	* config/aarch64/aarch64-sve-builtins.cc (aarch64_const_binop):
	New function to fold binary SVE intrinsics without overflow.
	(gimple_folder::fold_const_binary): New helper function for
	constant folding of SVE intrinsics.

2024-09-03  Jennifer Schmitz  <jschmitz@nvidia.com>

	* fold-const.h: Declare vector_const_binop.
	* fold-const.cc (const_binop): Remove cases for vector constants.
	(vector_const_binop): New function that folds vector constants
	element-wise.
	(int_const_binop): Remove call to wide_int_binop.
	(poly_int_binop): Add call to wide_int_binop.

2024-09-03  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_build_slp_tree_1): Handle mixing
	all of handled components besides ARRAY_RANGE_REF, drop
	handling of INDIRECT_REF.

2024-09-03  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (vect_get_vector_types_for_stmt):
	Handle all internal_store_fn_p the same.  Remove special-casing
	for the scalar_type of IFN_MASK_STORE.

2024-09-03  Levy Hsu  <admin@levyhsu.com>

	* config/i386/mmx.md (<code><mode>3): New define_expand for V2BF/V4BFsmaxmin

2024-09-03  Levy Hsu  <admin@levyhsu.com>

	* config/i386/mmx.md (VBF_32_64): New mode iterator for partial vectorized V2BF/V4BF.
	(<insn><mode>3): New define_expand for plusminusmultdiv.
	(sqrt<mode>2): New define_expand for sqrt.

2024-09-03  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-protos.h (riscv_expand_ssadd): Add new func
	decl for expanding ssadd.
	* config/riscv/riscv.cc (riscv_gen_sign_max_cst): Add new func
	impl to gen the max int rtx.
	(riscv_expand_ssadd): Add new func impl to expand the ssadd.
	* config/riscv/riscv.md (ssadd<mode>3): Add new pattern for
	signed integer .SAT_ADD.

2024-09-03  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips-msa.md: (MSA_NO_HADD): we have HADD for
	S8/U8/S16/U16/S32/U32 only.
	(reduc_smin_scal_<mode>): New define pattern.
	(reduc_smax_scal_<mode>): Ditto.
	(reduc_umin_scal_<mode>): Ditto.
	(reduc_umax_scal_<mode>): Ditto.
	(reduc_plus_scal_<mode>): Ditto.
	(reduc_plus_scal_v4si): Ditto.
	(reduc_plus_scal_v8hi): Ditto.
	(reduc_plus_scal_v16qi): Ditto.
	(reduc_<optab>_scal_<mode>): Ditto.
	* config/mips/mips-protos.h: New function mips_expand_msa_reduc.
	* config/mips/mips.cc: New function mips_expand_msa_reduc.
	* config/mips/mips.md: Define any_bitwise iterator.

2024-09-02  Alexandre Oliva  <oliva@adacore.com>

	PR d/115295
	* doc/sourcebuild.texi (dg-additional-sources): Add linkonly.

2024-09-02  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn-opts.h (TARGET_GCN5_PLUS): Delete.
	(TARGET_GLOBAL_ADDRSPACE): Delete.
	(TARGET_FLAT_OFFSETS): Delete.
	(TARGET_EXPLICIT_CARRY): Delete.
	(TARGET_MULTIPLY_IMMEDIATE): Delete.
	* config/gcn/gcn-valu.md (*mov<mode>): Rename "gcn_version" to "cdna".
	(*mov<mode>_4reg): Likewise.
	(@mov<mode>_sgprbase): Likwise.
	(gather<mode>_insn_1offset<exec>): Likewise.
	(gather<mode>_insn_1offset_ds<exec>): Likewise.
	(gather<mode>_insn_2offsets<exec>): Likewise.
	(scatter<mode>_insn_1offset<exec_scatter>): Likewise.
	(scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
	(scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
	(gather<mode>_insn_1offset<exec>): Remove TARGET_FLAT_OFFSETS
	conditionals.
	(scatter<mode>_insn_1offset<exec_scatter>): Likewise.
	(scatter<mode>_insn_1offset<exec_scatter>): Likewise.
	(add<mode>3<exec_clobber>): Use "_co" instead of "%^".
	(add<mode>3_dup<exec_clobber>): Likewise.
	(add<mode>3_vcc<exec_vcc>): Likewise.
	(add<mode>3_vcc_dup<exec_vcc>): Likewise.
	(addc<mode>3<exec_vcc>): Likewise.
	(sub<mode>3<exec_clobber>): Likewise.
	(sub<mode>3_vcc<exec_vcc>): Likewise.
	(subc<mode>3<exec_vcc>): Likewise.
	(*plus_carry_dpp_shr_<mode>): Likewise.
	(*plus_carry_in_dpp_shr_<mode>): Likewise.
	* config/gcn/gcn.cc (gcn_flat_address_p): Remove TARGET_FLAT_OFFSETS
	conditionals.
	(gcn_addr_space_legitimate_address_p): Likewise.
	(gcn_addr_space_legitimize_address): Likewise.
	(gcn_expand_scalar_to_vector_address): Likewise.
	(print_operand_address): Likewise, and TARGET_GLOBAL_ADDRSPACE also.
	(print_operand): Remove "%^" operand code.
	Remove TARGET_GLOBAL_ADDRSPACE assertion.
	* config/gcn/gcn.h (STACK_ADDR_SPACE): Remove GCN5 conditional.
	* config/gcn/gcn.md (gcn_version): Rename attribute ...
	(cdna): ... to this, and remove the gcn3 and gcn5 values.
	(enabled): Replace old "gcn_version" logic with new "cdna" logic.
	(*mov<mode>_insn): Rename "gcn_version" to "cdna".
	(*movti_insn): Likewise.
	(addsi3): Use "_co" instead of "%^".
	(addsi3_scalar_carry): Likewise.
	(addsi3_scalar_carry_cst): Likewise.
	(addcsi3_scalar): Likewise.
	(addcsi3_scalar_zero): Likewise.
	(addptrdi3): Likewise.
	(subsi3): Likewise.
	(<su>mulsi3_highpart): Remove TARGET_MULTIPLY_IMMEDIATE conditions.
	(<su>mulsi3_highpart_reg): Remove "gcn_version" attribute.
	(muldi3): Likewise.
	(atomic_fetch_<bare_mnemonic><mode>): Likewise.
	(atomic_<bare_mnemonic><mode>): Likewise.
	(sync_compare_and_swap<mode>_insn): Likewise.
	(atomic_load<mode>): Likewise.
	(atomic_store<mode>): Likewise.
	(atomic_exchange<mode>): Likewise.
	(<su>mulsi3_highpart_imm): Remove both TARGET_MULTIPLY_IMMEDIATE and
	"gcn_version".
	(<su>mulsidi3): Likewise.
	(<su>mulsidi3_imm): Likewise.

2024-09-02  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn-opts.h (enum gcn_isa): Delete ISA_GCN3.
	(TARGET_GCN3): Delete.
	(TARGET_GCN3_PLUS): Delete.
	(TARGET_M0_LDS_LIMIT): Delete.
	* config/gcn/gcn-valu.md
	(gather<mode>_insn_1offset<exec>): Remove TARGET_GCN3 from conditions.
	(*<reduc_op>_dpp_shr_<mode>): Likewise.
	* config/gcn/gcn.cc (enum gcn_isa): Change default to ISA_GCN5.
	(gcn_expand_prologue): Remove TARGET_M0_LDS_LIMIT feature.
	(gcn_expand_reduc_scalar): Remove TARGET_GCN3 conditions.
	* config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Remove TARGET_GCN3.

2024-09-02  Andrew Stubbs  <ams@baylibre.com>

	* config.gcc (amdgcn-*-*): Remove "fiji" from with_arch checks.
	* config/gcn/gcn-hsa.h (ABI_VERSION_SPEC): Remove fiji alternative.
	(NO_XNACK): Likewise.
	(NO_SRAM_ECC): Likewise.
	(ASM_SPEC): Remove "%{}" around ABI_VERSION_SPEC.
	* config/gcn/gcn-opts.h (enum processor_type): Remove PROCESSOR_FIJI.
	(TARGET_FIJI): Delete.
	* config/gcn/gcn.cc (gcn_option_override): Remove Fiji.
	(gcn_omp_device_kind_arch_isa): Likewise.
	(output_file_start): Likewise.
	* config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Likewise.
	* config/gcn/gcn.opt (gpu_type): Likewise.
	(march, mtune): Change default to PROCESSOR_VEGA10.
	* config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX803): Delete.
	(copy_early_debug_info): Remove elf_flags_actual.
	Use ELFABIVERSION_AMDGPU_HSA_V4 unconditionally.
	(get_arch): Remove Fiji.
	(main): Remove gfx803.
	* config/gcn/t-omp-device
	(omp-device-properties-gcn): Remove fiji and gfx803.
	* doc/install.texi (amdgcn*-*-*): Remove fiji and special instructions.
	* doc/invoke.texi: Remove fiji.

2024-09-02  Richard Sandiford  <richard.sandiford@arm.com>

	* doc/gimple.texi (gimple_asm_basic_p): Document.
	(gimple_asm_set_basic): Likewise.
	* gimple.h (GF_ASM_INPUT): Rename to...
	(GF_ASM_BASIC): ...this.
	(gimple_asm_set_input): Rename to...
	(gimple_asm_set_basic): ...this.
	(gimple_asm_input_p): Rename to...
	(gimple_asm_basic_p): ...this.
	* cfgexpand.cc (expand_asm_stmt): Update after above renaming.
	* gimple.cc (gimple_asm_clobbers_memory_p): Likewise.
	* gimplify.cc (gimplify_asm_expr): Likewise.
	* ipa-icf-gimple.cc (func_checker::compare_gimple_asm): Likewise.
	* tree-cfg.cc (stmt_can_terminate_bb_p): Likewise.

2024-09-02  Richard Sandiford  <richard.sandiford@arm.com>

	* doc/generic.texi (ASM_BASIC_P): Document.
	* tree.h (ASM_INPUT_P): Rename to...
	(ASM_BASIC_P): ...this.
	(ASM_VOLATILE_P, ASM_INLINE_P): Reindent.
	* gimplify.cc (gimplify_asm_expr): Update after above renaming.
	* tree-core.h (tree_base): Likewise.

2024-09-02  Tobias Burnus  <tburnus@baylibre.com>

	* lto-wrapper.cc (run_gcc): Honor -save-temps for
	makefile name.

2024-09-02  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/116486
	* gimple-range-op.cc (cfn_clz::fold_range): If lh is [0,0]
	and mini is -1, return [-1,-1] range rather than [prec-1,prec-1].

2024-09-02  Richard Biener  <rguenther@suse.de>

	* tree-vectorizer.h (_slp_tree::ldst_lanes): New flag to mark
	load, store and permute nodes.
	* tree-vect-slp.cc (_slp_tree::_slp_tree): Initialize ldst_lanes.
	(vect_build_slp_instance): For stores iff the target prefers
	store-lanes discover single-lane sub-groups, do not perform
	interleaving lowering but mark the node with ldst_lanes.
	Also allow i == 0 - fatal failure - for splitting up a store group
	when we're not doing single-lane discovery already.
	(vect_lower_load_permutations): When the target supports
	load lanes and the loads all fit the pattern split out
	a single level of permutes only and mark the load and
	permute nodes with ldst_lanes.
	(vectorizable_slp_permutation_1): Handle the load-lane permute
	forwarding of vector defs.
	(vect_analyze_slp): After SLP pattern recog is finished see if
	there are any SLP instances that would benefit from using
	load/store-lanes and re-discover those with forced single lanes.
	* tree-vect-stmts.cc (get_group_load_store_type): Support
	load/store-lanes for SLP.
	(vectorizable_store): Support SLP code generation for store-lanes.
	(vectorizable_load): Support SLP code generation for load-lanes.
	* tree-vect-loop.cc (vect_analyze_loop_2): Do not cancel SLP
	when store-lanes can be used.

2024-09-02  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_build_slp_tree_1): Handle NULL stmt.
	(vect_build_slp_tree_2): Likewise.  Release load permutation
	when there's a NULL in SLP_TREE_SCALAR_STMTS and assert there's
	no actual permutation in that case.
	(vllp_cmp): New function.
	(vect_lower_load_permutations): Likewise.
	(vect_analyze_slp): Call it.

2024-09-02  Xianmiao Qu  <cooper.qu@linux.alibaba.com>

	* config/riscv/riscv.cc (riscv_rtx_costs): Optimize the cost of the
	DFmode register move for RV32.

2024-09-02  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/116544
	* ext-dce.cc (ext_dce_process_uses): Fix thinko in promoted subreg
	handling.

2024-09-02  Levy Hsu  <admin@levyhsu.com>

	* config/i386/i386-expand.cc (ix86_use_mask_cmp_p): Add BFmode
	for int mask cmp.
	* config/i386/sse.md (vec_cmp<mode><avx512fmaskmodelower>): New
	vec_cmp expand for VBF modes.

2024-09-02  Levy Hsu  <admin@levyhsu.com>

	* config/i386/sse.md: Expand VF2H to VF2HB with VBF modes.

2024-09-02  Levy Hsu  <admin@levyhsu.com>

	* config/i386/sse.md
	(<code><mode>3): New define expand pattern for BF smaxmin.

2024-09-02  Levy Hsu  <admin@levyhsu.com>

	* config/i386/sse.md: Add V8BF/V16BF/V32BF to mode iterator FMAMODEM.

2024-09-02  Levy Hsu  <admin@levyhsu.com>

	* config/i386/sse.md (div<mode>3): New expander for BFmode div.
	(VF_BHSD): New mode iterator with vector BFmodes.
	(<insn><mode>3<mask_name><round_name>): Change mode to VF_BHSD.
	(mul<mode>3<mask_name><round_name>): Likewise.

2024-09-02  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/i386-expand.cc (ix86_expand_fp_compare): Add UNSPEC to
	support the optimization.
	* config/i386/i386.cc (ix86_fp_compare_code_to_integer): Add NE/EQ.
	* config/i386/i386.md (*cmpx<unord><MODEF:mode>): New define_insn.
	(*cmpx<unord>hf): Ditto.
	* config/i386/predicates.md (ix86_trivial_fp_comparison_operator):
	Add ne/eq.

2024-09-02  Hu, Lin1  <lin1.hu@intel.com>

	* match.pd: Optimize (and ordered non-equal) to
	(not (or unordered  equal))

2024-09-02  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/sse.md (VI1_AVX512VNNIBW): New.
	(VI2_AVX10_2): Ditto.
	(sdot_prod<mode>): Add AVX10.2
	to auto vectorize and combine 512 bit part.
	(udot_prod<mode>): Ditto.
	(sdot_prodv64qi): Removed.
	(udot_prodv64qi): Ditto.
	(usdot_prod<mode>): Add AVX10.2 to auto vectorize.
	(udot_prod<mode>): Ditto.

2024-09-02  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv.cc (riscv_gen_zero_extend_rtx): Merge
	the zero_extend handing from func riscv_gen_unsigned_xmode_reg.
	(riscv_gen_unsigned_xmode_reg): Remove.
	(riscv_expand_ussub): Leverage riscv_gen_zero_extend_rtx
	instead of riscv_gen_unsigned_xmode_reg.

2024-09-01  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/116554
	* gimple-ssa-strength-reduction.cc: Include tree-ssa-dce.h.
	(replace_mult_candidate): Add sdce_worklist argument, mark
	the rhs1/rhs2 for maybe dceing.
	(replace_unconditional_candidate): Add sdce_worklist argument,
	Update call to replace_mult_candidate.
	(replace_conditional_candidate): Add sdce_worklist argument,
	update call to replace_mult_candidate.
	(replace_uncond_cands_and_profitable_phis): Add sdce_worklist argument,
	update call to replace_conditional_candidate,
	replace_unconditional_candidate, and replace_uncond_cands_and_profitable_phis.
	(replace_one_candidate): Add sdce_worklist argument, mark
	the orig_rhs1/orig_rhs2 for maybe dceing.
	(replace_profitable_candidates): Add sdce_worklist argument,
	update call to replace_one_candidate and replace_profitable_candidates.
	(analyze_candidates_and_replace): Call simple_dce_from_worklist and
	update calls to replace_profitable_candidates, and
	replace_uncond_cands_and_profitable_phis.

2024-08-31  Roger Sayle  <roger@nextmovesoftware.com>

	* config/i386/i386-features.cc (timode_scalar_to_vector_candidate_p):
	Support the first operand of AND, IOR and XOR being MEM_P, i.e. a
	read-modify-write insn.

2024-08-31  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-passes.cc (avr_pass_fuse_add) <clone>: Override.
	* config/avr/avr-passes.def (avr_pass_fuse_add): Run again
	after pass_cprop_hardreg.

2024-08-31  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-protos.h (avr_split_tiny_move): Rename to
	avr_split_fake_addressing_move.
	* config/avr/avr-passes.def: Same.
	* config/avr/avr-passes.cc: Same.
	(avr_pass_data_fuse_add) <tv_id>: Set to TV_MACH_DEP.
	* config/avr/avr.md (split-lpmx): Remove a define_split.  Such
	splits are performed by avr_split_fake_addressing_move.

2024-08-31  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.cc (pa_emit_move_sequence): Remove symbolic
	memory work arounds for TARGET_ELF32.
	(pa_legitimate_address_p): Likewise.  Allow symbolic
	operands.  Adjust comment.
	* config/pa/pa.md: Replace reg_or_0_or_nonsymb_mem_operand
	with reg_or_0_or_mem_operand predicate in various unnamed
	move insns.
	* config/pa/predicates.md (floating_point_store_memory_operand):
	Update comment.  Remove symbolic memory work arounds for
	TARGET_ELF32.
	(nonsymb_mem_operand): Rename to mem_operand.  Allow
	symbolic memory operands.
	(reg_or_0_or_nonsymb_mem_operand): Rename to
	reg_or_0_or_mem_operand.  Allow symbolic memory operands.

2024-08-31  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/116098
	* tree-ssa-phiopt.cc (factor_out_conditional_operation): Ignore
	nops, labels and predicts for heuristic for conversion with a constant.

2024-08-31  Jakub Jelinek  <jakub@redhat.com>

	PR c/116130
	* doc/extend.texi (unsequenced, reproducible): Document new function
	type attributes.
	* calls.cc (flags_from_decl_or_type): Handle "unsequenced noptr" and
	"reproducible noptr" attributes.

2024-08-31  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc: Follow the convention to not add a space
	after comma when printing instructions.

2024-08-31  Alexandre Oliva  <oliva@adacore.com>

	* expr.cc (categorize_ctor_elements_1): Change p_complete to
	int, to distinguish complete initialization in presence or
	absence of uninitialized padding bits.
	(categorize_ctor_elements): Likewise.  Adjust all callers...
	* expr.h (categorize_ctor_elements): ... and declaration.
	(type_has_padding_at_level_p): New.
	* gimple-fold.cc (type_has_padding_at_level_p): New.
	* fold-const.cc (native_encode_constructor): New.
	(native_encode_expr): Call it.
	* gimplify.cc (gimplify_init_constructor): Clear small
	non-addressable non-volatile objects with padding or
	other uninitialized fields as an optimization.

2024-08-30  Alex Coplan  <alex.coplan@arm.com>

	* gdbhooks.py (VEC_KIND_EMBED): New.
	(VEC_KIND_PTR): New.
	(get_vec_kind): New.
	(VecPrinter.children): Also handle vectors with vl_ptr layout.

2024-08-30  Andrew Pinski  <quic_apinski@quicinc.com>

	PR driver/104707
	PR driver/97304
	* gcc.cc (is_directory): Don't not include /usr/lib and /lib
	for library directory pathes. Remove library argument.
	(add_to_obstack): Update call to is_directory.
	(driver_handle_option): Likewise.
	(spec_path): Likewise.

2024-08-30  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/116537
	* tree-core.h (enum tree_index): Remove TI_INTEGER_THREE
	* tree-ssa-loop-prefetch.cc (issue_prefetch_ref): Call build_int_cst
	instead of using integer_three_node.
	* tree.cc (build_common_tree_nodes): Remove initialization
	of integer_three_node.
	* tree.h (integer_three_node): Delete.

2024-08-30  Andrew Pinski  <quic_apinski@quicinc.com>

	* builtins.cc (expand_builtin_prefetch): Rewrite expansion of the optional
	arguments to not expand known constants.

2024-08-30  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (get_group_load_store_type): Check
	known_ne (remain, 0u) before doing constant_multiple_p.
	(vectorizable_load): Likewise.

2024-08-30  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_build_slp_tree_2): Disable SLP
	reassociation for single-lane.

2024-08-30  liuhongt  <hongtao.liu@intel.com>

	PR target/116512
	* config/i386/i386.cc (ix86_check_avx_upper_register): Iterate
	subrtx to scan for avx upper register.
	(ix86_check_avx_upper_stores): Inline old
	ix86_check_avx_upper_register.
	(ix86_avx_u128_mode_needed): Ditto, and replace
	FOR_EACH_SUBRTX with call to new
	ix86_check_avx_upper_register.

2024-08-29  David Malcolm  <dmalcolm@redhat.com>

	PR other/116419
	* diagnostic-event-id.h (diagnostic_event_id_t::zero_based): New.
	* diagnostic-format-sarif.cc: Include "pretty-print-format-impl.h"
	and "pretty-print-urlifier.h".
	(sarif_result::sarif_result): Add param "idx_within_parent".
	(sarif_result::get_index_within_parent): New accessor.
	(sarif_result::m_idx_within_parent): New field.
	(sarif_code_flow::sarif_code_flow): New ctor.
	(sarif_code_flow::get_parent): New accessor.
	(sarif_code_flow::get_index_within_parent): New accessor.
	(sarif_code_flow::m_parent): New field.
	(sarif_code_flow::m_thread_id_map): New field.
	(sarif_code_flow::m_thread_flows_arr): New field.
	(sarif_code_flow::m_all_tfl_objs): New field.
	(sarif_thread_flow::sarif_thread_flow): Add "parent" and
	"idx_within_parent" params.
	(sarif_thread_flow::get_parent): New accessor.
	(sarif_thread_flow::get_index_within_parent): New accessor.
	(sarif_thread_flow::m_parent): New field.
	(sarif_thread_flow::m_idx_within_parent): New field.
	(sarif_thread_flow_location::sarif_thread_flow_location): New
	ctor.
	(sarif_thread_flow_location::get_parent): New accessor.
	(sarif_thread_flow_location::get_index_within_parent): New
	accessor.
	(sarif_thread_flow_location::m_parent): New field.
	(sarif_thread_flow_location::m_idx_within_parent): New field.
	(sarif_builder::get_code_flow_for_event_ids): New accessor.
	(class sarif_builder::sarif_token_printer): New.
	(sarif_builder::m_token_printer): New member.
	(sarif_builder::m_next_result_idx): New field.
	(sarif_builder::m_current_code_flow): New field.
	(sarif_code_flow::get_or_append_thread_flow): New.
	(sarif_code_flow::get_thread_flow): New.
	(sarif_code_flow::add_location): New.
	(sarif_code_flow::get_thread_flow_loc_obj): New.
	(sarif_thread_flow::add_location): Create the new
	sarif_thread_flow_location internally, rather than passing
	it in as a parm so that we can keep track of its index in
	the array.  Return a reference to it.
	(sarif_builder::sarif_builder): Initialize m_token_printer,
	m_next_result_idx, and m_current_code_flow.
	(sarif_builder::on_report_diagnostic): Pass index to
	make_result_object.
	(sarif_builder::make_result_object): Add "idx_within_parent" param
	and pass to sarif_result ctor.  Pass code flow index to call to
	make_code_flow_object.
	(make_sarif_url_for_event): New.
	(sarif_builder::make_code_flow_object): Add "idx_within_parent"
	param and pass it to sarif_code_flow ctor.  Reimplement walking
	of events so that we first create threadFlow objects for each
	thread, then populate them with threadFlowLocation objects, so
	that the IDs work.  Set m_current_code_flow whilst creating the
	latter, so that we can create correct URIs for "%@".
	(sarif_builder::make_thread_flow_location_object): Replace with...
	(sarif_builder::populate_thread_flow_location_object): ...this.
	(sarif_output_format::get_builder): New accessor.
	(sarif_begin_embedded_link): New.
	(sarif_end_embedded_link): New.
	(sarif_builder::sarif_token_printer::print_tokens): New.
	(diagnostic_output_format_init_sarif): Add "fmt" param; use it to
	set the token printer and output format for the context.
	(diagnostic_output_format_init_sarif_stderr): Move responsibility
	for setting the context's output format to within
	diagnostic_output_format_init_sarif.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.
	(test_sarif_diagnostic_context::test_sarif_diagnostic_context):
	Likewise.
	(selftest::test_make_location_object): Provide an idx for the
	result.
	(selftest::get_result_from_log): New.
	(selftest::get_message_from_log): New.
	(selftest::test_message_with_embedded_link): New test.
	(selftest::diagnostic_format_sarif_cc_tests): Call it.
	* pretty-print-format-impl.h: Include "diagnostic-event-id.h".
	(pp_token::kind): Add "event_id".
	(struct pp_token_event_id): New.
	(is_a_helper <pp_token_event_id *>::test): New.
	(is_a_helper <const pp_token_event_id *>::test): New.
	* pretty-print.cc (pp_token::dump): Handle kind::event_id.
	(pretty_printer::format): Update handling of "%@" in phase 2
	so that we add a pp_token_event_id, rather that the text "(N)".
	(default_token_printer): Handle pp_token::kind::event_id by
	printing the text "(N)".

2024-08-29  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic.cc (diagnostic_context::report_diagnostic): Don't
	pass m_urlifier to pp_format, as urlification now happens in
	phase 3.
	* dump-context.h (class dump_pretty_printer): Update leading
	comment.
	(dump_pretty_printer::emit_items): Drop decl.
	(dump_pretty_printer::set_optinfo): New.
	(class dump_pretty_printer::stashed_item): Delete class.
	(class dump_pretty_printer::custom_token_printer): New class.
	(dump_pretty_printer::format_decoder_cb): Convert param from
	const char ** to pp_token_list &.
	(dump_pretty_printer::decode_format): Likewise.
	(dump_pretty_printer::stash_item): Likewise.
	(dump_pretty_printer::emit_any_pending_textual_chunks): Drop decl.
	(dump_pretty_printer::m_stashed_items): Delete field.
	(dump_pretty_printer::m_token_printer): New member data.
	* dumpfile.cc (struct wrapped_optinfo_item): New.
	(dump_pretty_printer::dump_pretty_printer): Update for dropping
	of field m_stashed_items and new field m_token_printer.
	(dump_pretty_printer::emit_items): Delete; we now use
	pp_output_formatted_text..
	(dump_pretty_printer::emit_any_pending_textual_chunks): Delete.
	(dump_pretty_printer::stash_item): Convert param from
	const char ** to pp_token_list &.
	(dump_pretty_printer::format_decoder_cb): Likewise.
	(dump_pretty_printer::decode_format): Likewise.
	(dump_pretty_printer::custom_token_printer::print_tokens): New.
	(dump_pretty_printer::custom_token_printer::emit_any_pending_textual_chunks):
	New.
	(dump_context::dump_printf_va): Call set_optinfo on the
	dump_pretty_printer.  Replace call to emit_items with a call to
	pp_output_formatted_text.
	* opt-problem.cc (opt_problem::opt_problem): Replace call to
	emit_items with call to set_optinfo and call to
	pp_output_formatted_text.
	* pretty-print-format-impl.h (struct pp_token): New.
	(struct pp_token_text): New.
	(is_a_helper <pp_token_text *>::test): New.
	(is_a_helper <const pp_token_text *>::test): New.
	(struct pp_token_begin_color): New.
	(is_a_helper <pp_token_begin_color *>::test): New.
	(is_a_helper <const pp_token_begin_color *>::test): New.
	(struct pp_token_end_color): New.
	(struct pp_token_begin_quote): New.
	(struct pp_token_end_quote): New.
	(struct pp_token_begin_url): New.
	(is_a_helper <pp_token_begin_url*>::test): New.
	(is_a_helper <const pp_token_begin_url*>::test): New.
	(struct pp_token_end_url): New.
	(struct pp_token_custom_data): New.
	(is_a_helper <pp_token_custom_data *>::test): New.
	(is_a_helper <const pp_token_custom_data *>::test): New.
	(class pp_token_list): New.
	(chunk_info::get_args): Drop.
	(chunk_info::get_quoting_info): Drop.
	(chunk_info::get_token_lists): New accessor.
	(chunk_info::append_formatted_chunk): Add obstack & param.
	(chunk_info::dump): New decls.
	(chunk_info::m_args): Convert element type from const char * to
	pp_token_list *.  Rewrite/update comment.
	(chunk_info::m_quotes): Drop field.
	* pretty-print-markup.h (class pp_token_list): New forward decl.
	(pp_markup::context::context): Drop urlifier param; add
	formatted_token_list param.
	(pp_markup::context::push_back_any_text): New decl.
	(pp_markup::context::m_urlifier): Drop field.
	(pp_markup::context::m_formatted_token_list): New field.
	* pretty-print-urlifier.h: Update comment.
	* pretty-print.cc: Define INCLUDE_MEMORY.  Include
	"make-unique.h".
	(default_token_printer): New forward decl.
	(obstack_append_string): Delete.
	(urlify_quoted_string): Delete.
	(pp_token::pp_token): New.
	(pp_token::dump): New.
	(allocate_object): New.
	(class quoting_info): Delete.
	(pp_token::operator new): New.
	(pp_token::operator delete): New.
	(pp_token_list::operator new): New.
	(pp_token_list::operator delete): New.
	(pp_token_list::pp_token_list): New.
	(pp_token_list::~pp_token_list): New.
	(pp_token_list::push_back_text): New.
	(pp_token_list::push_back): New.
	(pp_token_list::push_back_list): New.
	(pp_token_list::pop_front): New.
	(pp_token_list::remove_token): New.
	(pp_token_list::insert_after): New.
	(pp_token_list::replace_custom_tokens): New.
	(pp_token_list::merge_consecutive_text_tokens): New.
	(pp_token_list::apply_urlifier): New.
	(pp_token_list::dump): New.
	(chunk_info::append_formatted_chunk): Add obstack & param and use
	it to reimplement in terms of token lists.
	(chunk_info::pop_from_output_buffer): Drop m_quotes.
	(chunk_info::on_begin_quote): Delete.
	(chunk_info::dump): New.
	(chunk_info::on_end_quote): Delete.
	(push_back_any_text): New.
	(pretty_printer::format): Drop "urlifier" param and quoting_info
	logic.  Convert "formatters" and "args" from const ** to
	pp_token_list **.  Reimplement so that rather than just
	accumulating a text buffer in the chunk_obstack for each arg,
	instead also accumulate a pp_token_list and pp_tokens for each
	arg.
	(auto_obstack::operator obstack &): New.
	(quoting_info::handle_phase_3): Delete.
	(pp_output_formatted_text): Reimplement in terms of manipulations
	of pp_token_lists, rather than char buffers.  Call
	default_token_printer, or m_token_printer's print_tokens vfunc.
	(default_token_printer): New.
	(pretty_printer::pretty_printer): Initialize m_token_printer in
	both ctors.
	(pp_markup::context::begin_quote): Reimplement to use token list.
	(pp_markup::context::end_quote): Likewise.
	(pp_markup::context::begin_highlight_color): Likewise.
	(pp_markup::context::end_highlight_color): Likewise.
	(pp_markup::context::push_back_any_text): New.
	(selftest::test_merge_consecutive_text_tokens): New.
	(selftest::test_custom_tokens_1): New.
	(selftest::test_custom_tokens_2): New.
	(selftest::pp_printf_with_urlifier): Drop "urlifier" param from
	call to pp_format.
	(selftest::test_urlification): Add test of the example from
	pretty-print-format-impl.h.
	(selftest::pretty_print_cc_tests): Call the new selftest
	functions.
	* pretty-print.h (class quoting_info): Drop forward decl.
	(class pp_token_list): New forward decl.
	(printer_fn): Convert final param from const char ** to
	pp_token_list &.
	(class token_printer): New.
	(class pretty_printer): Add pp_output_formatted_text as friend.
	(pretty_printer::set_token_printer): New.
	(pretty_printer::format): Drop urlifier param as this now happens
	in phase 3.
	(pretty_printer::m_format_decoder): Update comment.
	(pretty_printer::m_token_printer): New field.
	(pp_format): Drop urlifier param.
	* tree-diagnostic.cc (default_tree_printer): Convert final param
	from const char ** to pp_token_list &.
	* tree-diagnostic.h: Likewise for decl.

2024-08-29  David Malcolm  <dmalcolm@redhat.com>

	* dumpfile.cc: Include "pretty-print-format-impl.h".
	* pretty-print-format-impl.h: New file, based on material from
	pretty-print.h.
	* pretty-print.cc: Include "pretty-print-format-impl.h".
	* pretty-print.h (chunk_info): Replace full declaration with
	a forward decl, moving full decl to pretty-print-format-impl.h.

2024-08-29  David Malcolm  <dmalcolm@redhat.com>

	* config/aarch64/aarch64.cc: Define INCLUDE_MEMORY.
	* config/arm/arm.cc: Likewise.
	* config/i386/i386.cc: Likewise.
	* config/loongarch/loongarch.cc: Likewise.
	* config/riscv/riscv-vector-costs.cc: Likewise.
	* config/riscv/riscv.cc: Likewise.
	* config/rs6000/rs6000.cc: Likewise.
	* dump-context.h (dump_context::emit_item): Convert "item" param
	from * to const &.
	(dump_pretty_printer::stash_item): Convert "item" param from
	optinfo_ * to std::unique_ptr<optinfo_item>.
	(dump_pretty_printer::emit_item): Likewise.
	* dumpfile.cc: Include "make-unique.h".
	(make_item_for_dump_gimple_stmt): Replace uses of optinfo_item *
	with std::unique_ptr<optinfo_item>.
	(dump_context::dump_gimple_stmt): Likewise.
	(make_item_for_dump_gimple_expr): Likewise.
	(dump_context::dump_gimple_expr): Likewise.
	(make_item_for_dump_generic_expr): Likewise.
	(dump_context::dump_generic_expr): Likewise.
	(make_item_for_dump_symtab_node): Likewise.
	(dump_pretty_printer::emit_items): Likewise.
	(dump_pretty_printer::emit_any_pending_textual_chunks): Likewise.
	(dump_pretty_printer::emit_item): Likewise.
	(dump_pretty_printer::stash_item): Likewise.
	(dump_pretty_printer::decode_format): Likewise.
	(dump_context::dump_printf_va): Fix overlong line.
	(make_item_for_dump_dec): Replace uses of optinfo_item * with
	std::unique_ptr<optinfo_item>.
	(dump_context::dump_dec): Likewise.
	(dump_context::dump_symtab_node): Likewise.
	(dump_context::begin_scope): Likewise.
	(dump_context::emit_item): Likewise.
	* gimple-loop-interchange.cc: Define INCLUDE_MEMORY.
	* gimple-loop-jam.cc: Likewise.
	* gimple-loop-versioning.cc: Likewise.
	* graphite-dependences.cc: Likewise.
	* graphite-isl-ast-to-gimple.cc: Likewise.
	* graphite-optimize-isl.cc: Likewise.
	* graphite-poly.cc: Likewise.
	* graphite-scop-detection.cc: Likewise.
	* graphite-sese-to-poly.cc: Likewise.
	* graphite.cc: Likewise.
	* opt-problem.cc: Likewise.
	* optinfo.cc (optinfo::add_item): Convert "item" param from
	optinfo_ * to std::unique_ptr<optinfo_item>.
	(optinfo::emit_for_opt_problem): Update for change to
	dump_context::emit_item.
	* optinfo.h: Add #error to fail immediately if INCLUDE_MEMORY
	wasn't defined, rather than fail to find std::unique_ptr.
	(optinfo::add_item): Convert "item" param from optinfo_ * to
	std::unique_ptr<optinfo_item>.
	* sese.cc: Define INCLUDE_MEMORY.
	* targhooks.cc: Likewise.
	* tree-data-ref.cc: Likewise.
	* tree-if-conv.cc: Likewise.
	* tree-loop-distribution.cc: Likewise.
	* tree-parloops.cc: Likewise.
	* tree-predcom.cc: Likewise.
	* tree-ssa-live.cc: Likewise.
	* tree-ssa-loop-ivcanon.cc: Likewise.
	* tree-ssa-loop-ivopts.cc: Likewise.
	* tree-ssa-loop-prefetch.cc: Likewise.
	* tree-ssa-loop-unswitch.cc: Likewise.
	* tree-ssa-phiopt.cc: Likewise.
	* tree-ssa-threadbackward.cc: Likewise.
	* tree-ssa-threadupdate.cc: Likewise.
	* tree-vect-data-refs.cc: Likewise.
	* tree-vect-generic.cc: Likewise.
	* tree-vect-loop-manip.cc: Likewise.
	* tree-vect-loop.cc: Likewise.
	* tree-vect-patterns.cc: Likewise.
	* tree-vect-slp-patterns.cc: Likewise.
	* tree-vect-slp.cc: Likewise.
	* tree-vect-stmts.cc: Likewise.
	* tree-vectorizer.cc: Likewise.

2024-08-29  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.cc (load_reg): Don't generate load with
	unscaled index address when !TARGET_NO_SPACE_REGS.
	(pa_legitimate_address_p): Only allow unscaled index
	addresses when TARGET_NO_SPACE_REGS.

2024-08-29  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/116508
	* internal-fn.cc (expand_POPCOUNT): Use OPTAB_WIDEN for PLUS and
	XOR/AND expansion.

2024-08-29  Richard Sandiford  <richard.sandiford@arm.com>

	PR middle-end/116516
	* rtlanal.cc (strip_address_mutations): Allow subregs around
	constant displacements.

2024-08-29  Richard Sandiford  <richard.sandiford@arm.com>

	* dse.cc (find_shift_sequence): Allow smallest_int_mode_for_size
	to failure.
	* optabs.cc (expand_twoval_binop_libfunc): Likewise.

2024-08-29  Georg-Johann Lay  <avr@gjlay.de>

	PR target/115830
	* config/avr/avr-modes.def (CCN, CCZN): New CC_MODEs.
	* config/avr/avr-protos.h (avr_cond_branch): New from
	ret_cond_branch.
	(avr_out_plus_set_N, avr_op8_ZN_operator, avr_cmp0_code)
	(avr_out_op8_set_ZN, avr_len_op8_set_ZN): New protos.
	(ccn_reg_rtx, cczn_reg_rtx): New declarations.
	* config/avr/avr.cc (avr_cond_branch): New from ret_cond_branch.
	(avr_cond_string): Add bool cc_overflow_unusable argument.
	(avr_print_operand) ['L']: Like 'j' but overflow unusable.
	['K']: Like 'k' but overflow unusable.
	(avr_out_plus_set_ZN): Remove handling of QImode.
	(avr_out_plus_set_N, avr_op8_ZN_operator, avr_cmp0_code)
	(avr_out_op8_set_ZN, avr_len_op8_set_ZN): New functions.
	(avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_N]: Hande case.
	(avr_class_max_nregs): All MODE_CCs occupy one hard reg.
	(avr_hard_regno_nregs): Same.
	(avr_hard_regno_mode_ok) [REG_CC]: Allow all MODE_CC.
	(pass_manager.h, context.h, tree-pass.h): Include them.
	(ccn_reg_rtx, cczn_reg_rtx): New GTY variables.
	(avr_init_expanders): Initialize them.
	(avr_option_override): Run peephole2 a second time.
	* config/avr/avr.md (adjust_len) [add_set_N]: New attr value.
	(ALLCC, HI_SI): New mode iterators.
	(CCname): New mode attribute.
	(eqnegtle, cmp_signed, op8_ZN): New code iterators.
	(swap, SWAP): New code attributes.
	(branch): Handle CCNmode and CCZNmode.  Assimilate...
	(difficult_branch): ...this insn.
	(p1m1): Remove.
	(gen_add_for_<code>_<mode>): Adjust to CCNmode and CCZNmode. Use
	HISI as mode iterator.  Extend peephole2s that produce them.
	(*add.for.eqne.<mode>): Extend to *add.for.cc[z]n.<mode>.
	(*ashift.for.ccn.<mode>): New insn and peephole2 to make them.
	(*sub.for.cczn.<mode>, *sub-extend<mode>.for.cczn.<mode>):
	New insns and peephole2s to make them.
	(*op8.for.cczn.<code>): New insn and peephole2 to make them.
	* config/avr/predicates.md (const_1_to_3_operand)
	(abs1_abs2_operand, signed_comparison_operator)
	(op8_ZN_operator): New predicates.

2024-08-29  Arsen Arsenović  <arsen@aarsen.me>

	PR c++/105104
	* coroutine-passes.cc (execute_early_expand_coro_ifns): Don't
	remove any labels.

2024-08-29  Georg-Johann Lay  <avr@gjlay.de>

	* config.gcc (extra_objs) [target=avr]: Add avr-passes.o.
	* config/avr/t-avr (avr-passes.o): New rule to make it.
	* config/avr/avr.cc (#define INCLUDE_VECTOR): Remove.
	(cfganal.h, cfgrtl.h, context.h, tree-pass.h, print-rtl.h): Don't
	include them.
	(avr_strict_signed_p, avr_strict_unsigned_p, avr_2comparisons_rhs)
	(make_avr_pass_recompute_notes, make_avr_pass_casesi)
	(make_avr_pass_ifelse, make_avr_pass_pre_proep, avr_split_tiny_move)
	(emit_move_ccc, emit_move_ccc_after, reg_seen_between_p)
	(avr_maybe_adjust_cfa, avr_redundant_compare_regs)
	(avr_parallel_insn_from_insns, avr_is_casesi_sequence)
	(avr_optimize_casesi, avr_redundant_compare, make_avr_pass_fuse_add)
	(avr_optimize_2ifelse, avr_rest_of_handle_ifelse)
	(avr_casei_sequence_check_operands)
	Move functions...
	(avr_pass_data_fuse_add, avr_pass_data_ifelse)
	(avr_pass_data_casesi, avr_pass_data_recompute_notes)
	(avr_pass_data_pre_proep): Move objects...
	(avr_pass_fuse_add, avr_pass_pre_proep, avr_pass_recompute_notes)
	(avr_pass_ifelse, avr_pass_casesi, AVR_LdSt_Props): Move classes...
	* config/avr/avr-passes.cc: ... to this new C++ module.
	(struct Ranges): Move to...
	* config/avr/ranges.h: ...this new file.
	* config/avr/avr-protos.h: Adjust comments.

2024-08-29  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/116086
	* config/riscv/autovec.md (vec_extract<mode><v_half>): Add
	vector-vector extract for VLS modes.
	* config/riscv/riscv.cc (riscv_can_change_mode_class): Forbid
	VLS modes larger than one vector.
	* config/riscv/vector-iterators.md: Add vector-vector extract
	iterators.

2024-08-29  Roger Sayle  <roger@nextmovesoftware.com>

	* config/i386/i386-features.cc (timode_immed_const_gain): New
	function to determine the gain/cost on a CONST_WIDE_INT.
	(timode_scalar_chain::compute_convert_gain): Fix whitespace.
	<case CONST_WIDE_INT>: Provide more accurate estimates using
	timode_immed_const_gain.
	<case AND>: Handle CONSTANT_SCALAR_INT_P (src).

2024-08-29  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (enum cv_leaf_type): Add LF_MFUNC_ID.
	(write_lf_mfunc_id): New function.
	(add_lf_func_id): New function.
	(add_lf_mfunc_id): New function.
	(add_function): Call add_lf_func_id or add_lf_mfunc_id.

2024-08-29  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (enum cv_leaf_type): Add LF_MFUNCTION,
	LF_METHODLIST, LF_METHOD, and LF_ONEMETHOD.
	(struct codeview_subtype): Add lf_onemethod and lf_method to union.
	(struct lf_methodlist_entry): New type.
	(struct codeview_custom_type): Add lf_mfunc_id, lf_mfunction, and
	lf_methodlist to union.
	(struct codeview_method): New type.
	(struct method_hasher): New type.
	(get_type_num_subroutine_type): Add forward declaration.
	(write_lf_fieldlist): Handle LF_ONEMETHOD and LF_METHOD.
	(write_lf_mfunction): New function.
	(write_lf_methodlist): New function.
	(write_custom_types): Handle LF_MFUNCTION and LF_METHODLIST.
	(add_struct_function): New function.
	(get_mfunction_type): New function.
	(is_templated_func): New function.
	(get_type_num_struct): Handle DW_TAG_subprogram child DIEs.
	(get_type_num_subroutine_type): Add containing_class_type, this_type,
	and this_adjustment params, and handle creating LF_MFUNCTION types as
	well as LF_PROCEDURE.
	(get_type_num): New params for get_type_num_subroutine_type.
	(add_function): New params for get_type_num_subroutine_type.
	* dwarf2codeview.h (CV_METHOD_VANILLA, CV_METHOD_VIRTUAL): Define.
	(CV_METHOD_STATIC, CV_METHOD_FRIEND, CV_METHOD_INTRO): Likewise.
	(CV_METHOD_PUREVIRT, CV_METHOD_PUREINTRO): Likewise.

2024-08-29  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (enum cv_leaf_type): Add LF_STMEMBER.
	(struct codeview_subtype): Add lf_static_member to union.
	(write_lf_fieldlist): Handle LF_STMEMBER.
	(add_struct_member): New function.
	(add_struct_static_member): New function.
	(get_accessibility): New function.
	(get_type_num_struct): Split out into add_struct_member and
	get_accessibility, and handle static members.

2024-08-29  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (enum cf_leaf_type): Add LF_STRING_ID.
	(struct codeview_custom_type): Add lf_string_id to union.
	(struct string_id_hasher): New type.
	(string_id_htab): New global variable.
	(write_lf_string_id): New function.
	(write_custom_types): Call write_lf_string_id.
	(codeview_debug_finish): Free string_id_htab.
	(add_string_id): New function.
	(get_scope_string_id): New function.
	(add_function): Call get_scope_string_id and set scope.

2024-08-29  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (get_name): New function.
	(add_enum_forward_def): Call get_name.
	(get_type_num_enumeration_type): Call get_name.
	(add_struct_forward_def): Call get_name.
	(get_type_num_struct): Call get_name.
	(add_variable): Call get_name.
	(add function): Call get_name.
	* dwarf2out.cc (get_die_parent): Rename to dw_get_die_parent and make
	non-static.
	(generate_type_signature): Handle renamed get_die_parent.
	* dwarf2out.h (dw_get_die_parent): Add declaration.

2024-08-28  Andrew Pinski  <quic_apinski@quicinc.com>

	* internal-fn.cc (expand_POPCOUNT): Dump the costs for
	the two choices.

2024-08-28  Jonathan Wakely  <jwakely@redhat.com>

	* doc/contrib.texi (Contributors): Add Dhruv Matani.

2024-08-28  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (INCLUDE_VECTOR): Define it.
	(cfganal.h): Include it.
	(Ranges): New struct.
	(avr_2comparisons_rhs, avr_redundant_compare_regs)
	(avr_strict_signed_p, avr_strict_unsigned_p): New static functions.
	(avr_redundant_compare): Overhaul: Allow more cases.
	(avr_optimize_2ifelse): New static function, outsourced from...
	(avr_rest_of_handle_ifelse): ...this method.

2024-08-28  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/tuning_models/generic.h (generic_sve_vector_cost):
	Set gather_load_x32_init_cost and gather_load_x64_init_cost to 0.

2024-08-28  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.cc (aarch64_detect_vector_stmt_subtype)
	(aarch64_vector_costs::add_stmt_cost): Use the x64 cost rather
	than x32 cost for all VNx2 modes.

2024-08-28  Richard Sandiford  <richard.sandiford@arm.com>

	* tree.h (ASM_INPUT_P): Fix documentation.

2024-08-28  Filip Kastl  <fkastl@suse.cz>

	PR tree-optimization/116355
	* tree-switch-conversion.cc (can_log2): Add capability to
	suggest converting the operand to a different type.
	(gen_log2): Add capability to generate a conversion in case the
	operand is of a type incompatible with the logarithm operation.
	(can_pow2p): New function.
	(gen_pow2p): Rewrite to use __builtin_popcount instead of
	manually inserting an internal fn call or bitmagic.  Also add
	capability to generate a conversion.
	(switch_conversion::is_exp_index_transform_viable): Call
	can_pow2p.  Store types suggested by can_log2 and gen_log2.
	(switch_conversion::exp_index_transform): Params of gen_pow2p
	and gen_log2 changed so update their calls.
	* tree-switch-conversion.h: Add m_exp_index_transform_log2_type
	and m_exp_index_transform_pow2p_type to switch_conversion class
	to track type conversions needed to generate the "is power of 2"
	and logarithm operations.

2024-08-28  Alex Coplan  <alex.coplan@arm.com>

	PR libstdc++/116140
	* doc/sourcebuild.texi: Document ltrans-rtl value of kind for
	scan-<kind>-dump*.

2024-08-28  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (debug): Add overload for slp_instance.

2024-08-28  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_build_slp_store_interleaving):
	Fix reference counting.
	(vect_build_slp_instance): Release rhs_nodes.

2024-08-28  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_build_slp_store_interleaving): Split
	out from ...
	(vect_build_slp_instance): Here.

2024-08-28  Pan Li  <pan2.li@intel.com>

	* tree-vect-patterns.cc (vect_recog_sat_add_pattern): Add fold
	convert for const_int to the type of operand 0.

2024-08-28  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/vector.md (mode_idx): Add vrol and vror.

2024-08-28  Pan Li  <pan2.li@intel.com>

	* match.pd: Add the matching for signed .SAT_ADD.
	* tree-ssa-math-opts.cc (gimple_signed_integer_sat_add): Add new
	matching func decl.
	(match_unsigned_saturation_add): Try signed .SAT_ADD and rename
	to ...
	(match_saturation_add): ... here.
	(math_opts_dom_walker::after_dom_children): Update the above renamed
	func from caller.

2024-08-27  Andreas Schwab  <schwab@linux-m68k.org>

	PR target/116413
	* config/m68k/m68k.cc (m68k_decompose_index): Accept ASHIFT like
	MULT.
	(m68k_rtx_costs) [PLUS]: Likewise.
	(m68k_legitimize_address): Likewise.

2024-08-27  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/riscv-v.cc (expand_vector_init_insert_elems): Relocate.
	(expand_vector_init_trailing_same_elem): Ditto.

2024-08-27  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/riscv-v.cc (expand_const_vector): Allow non-duplicate
	to fall through other patterns before asserting.

2024-08-27  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/riscv-v.h (valid_vec_immediate_p): Add new helper.
	* config/riscv/riscv-v.cc (valid_vec_immediate_p): Ditto.
	(expand_const_vector): Use new helper.
	* config/riscv/riscv.cc (riscv_const_insns): Handle 0.0 floating-point
	case.

2024-08-27  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/riscv-v.cc (class rvv_builder): Move to riscv-v.h.
	* config/riscv/riscv.cc (riscv_const_insns): Emit placeholder costs for
	bool/stepped const vectors.
	* config/riscv/riscv-v.h: New file.

2024-08-27  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/riscv-v.cc (expand_const_vector): Use tmp register if
	needed.

2024-08-27  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/riscv.cc (riscv_const_insns): Relocate.

2024-08-27  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/riscv-v.cc (expand_const_vector): Fix STEP size in
	expander.

2024-08-27  Christophe Lyon  <christophe.lyon@linaro.org>

	* config/arm/vfp.md (movdi_vfp, thumb2_movdf_vfp): Handle MVE
	case.

2024-08-27  H.J. Lu  <hjl.tools@gmail.com>

	* doc/sourcebuild.texi (check-function-bodies): Add an optional
	argument for matched output lines.

2024-08-27  Michael Matz  <matz@suse.de>

	PR target/116429
	* lra.cc (setup_sp_offset): Start with sp_offset from
	before the new sequence, not from after.

2024-08-27  Michael Matz  <matz@suse.de>

	PR target/116374
	* lra-eliminations.cc (init_elim_table): Use -1 as initializer.
	(update_reg_eliminate): Accept -1 as not-yet-used marker.
	(eliminate_regs_in_insn): Use previous_sp_offset only when
	not first_p.

2024-08-27  Michael Matz  <matz@suse.de>

	PR target/116413
	* final.cc (walk_alter_subreg): Recurse on AHIFT.

2024-08-27  Richard Sandiford  <richard.sandiford@arm.com>

	PR middle-end/116413
	* rtl.h (address_info): Update commentary.
	* rtlanal.cc (valid_base_or_index_term_p): New function, split
	out from...
	(get_base_term, get_index_term): ...here.  Handle elimination PLUSes.

2024-08-27  Richard Sandiford  <richard.sandiford@arm.com>

	PR middle-end/116321
	* lra-constraints.cc (get_hard_regno): Only apply eliminations
	to existing hard registers.
	(get_reg_class): Likewise.

2024-08-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116460
	* tree-ssa-forwprop.cc (pass_forwprop::execute): First do
	simple_dce_from_worklist and then remove stmts in to_remove.
	Track defs to be removed in to_remove_defs.

2024-08-27  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv.cc (riscv_expand_ussub): Gen xmode for the
	second operand, aka y in parameter.
	* config/riscv/riscv.md (ussub<mode>3): Allow const_int for operand 2.

2024-08-26  Hans-Peter Nilsson  <hp@axis.com>

	PR middle-end/115883
	* combine.cc (make_more_copies): Copy attributes from the original
	pseudo to the new copy.

2024-08-26  Arsen Arsenović  <arsen@aarsen.me>

	* coroutine-passes.cc (execute_early_expand_coro_ifns): Emit a
	sorry if a statement is an alloca call.

2024-08-26  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS-libcommon): Add diagnostic-format-text.o.
	* diagnostic-format-json.cc: Include "diagnostic-format.h".
	* diagnostic-format-sarif.cc: Likewise.
	* diagnostic-format-text.cc: New file, using material from
	diagnostics.cc.
	* diagnostic-global-context.cc: Include
	"diagnostic-format.h".
	* diagnostic-format-text.h: New file, using material from
	diagnostics.h.
	* diagnostic-format.h: New file, using material from
	diagnostics.h.
	* diagnostic.cc: Include "diagnostic-format.h" and
	"diagnostic-format-text.h".
	(diagnostic_text_output_format::~diagnostic_text_output_format):
	Move to diagnostic-format-text.cc.
	(diagnostic_text_output_format::on_report_diagnostic): Likewise.
	(diagnostic_text_output_format::on_diagram): Likewise.
	(diagnostic_text_output_format::print_any_cwe): Likewise.
	(diagnostic_text_output_format::print_any_rules): Likewise.
	(diagnostic_text_output_format::print_option_information):
	Likewise.
	* diagnostic.h (class diagnostic_output_format): Move to
	diagnostic-format.h.
	(class diagnostic_text_output_format): Move to
	diagnostic-format-text.h.
	(diagnostic_output_format_init): Move to
	diagnostic-format.h.
	(diagnostic_output_format_init_json_stderr): Likewise.
	(diagnostic_output_format_init_json_file): Likewise.
	(diagnostic_output_format_init_sarif_stderr): Likewise.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.
	* gcc.cc: Include "diagnostic-format.h".
	* opts.cc: Include "diagnostic-format.h".

2024-08-26  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-json.cc
	(json_output_format::on_begin_diagnostic): Delete.
	(json_output_format::on_end_diagnostic): Rename to...
	(json_output_format::on_report_diagnostic): ...this and add call
	to pp_output_formatted_text.
	(diagnostic_output_format_init_json): Drop unnecessary calls
	to disable textual printing of CWEs, rules, and options.
	* diagnostic-format-sarif.cc (sarif_builder::end_diagnostic):
	Rename to...
	(sarif_builder::on_report_diagnostic): ...this and add call to
	pp_output_formatted_text.
	(sarif_output_format::on_begin_diagnostic): Delete.
	(sarif_output_format::on_end_diagnostic): Rename to...
	(sarif_output_format::on_report_diagnostic): ...this and update
	call to m_builder accordingly.
	(diagnostic_output_format_init_sarif): Drop unnecessary calls
	to disable textual printing of CWEs, rules, and options.
	* diagnostic.cc (diagnostic_context::print_any_cwe): Convert to...
	(diagnostic_text_output_format::print_any_cwe): ...this.
	(diagnostic_context::print_any_rules): Convert to...
	(diagnostic_text_output_format::print_any_rules): ...this.
	(diagnostic_context::print_option_information): Convert to...
	(diagnostic_text_output_format::print_option_information):
	...this.
	(diagnostic_context::report_diagnostic): Replace calls to the
	output format's on_begin_diagnostic, to pp_output_formatted_text,
	printing CWE, rules, option info, and the call to the format's
	on_end_diagnostic with a call to the format's
	on_report_diagnostic.
	(diagnostic_text_output_format::on_begin_diagnostic): Delete.
	(diagnostic_text_output_format::on_end_diagnostic): Delete.
	(diagnostic_text_output_format::on_report_diagnostic): New vfunc,
	which effectively does the on_begin_diagnostic, the call to
	pp_output_formatted_text, the calls for printing CWE, rules,
	option info, and the call to the diagnostic_finalizer.
	* diagnostic.h (diagnostic_output_format::on_begin_diagnostic):
	Delete.
	(diagnostic_output_format::on_end_diagnostic): Delete.
	(diagnostic_output_format::on_report_diagnostic): New.
	(diagnostic_text_output_format::on_begin_diagnostic): Delete.
	(diagnostic_text_output_format::on_end_diagnostic): Delete.
	(diagnostic_text_output_format::on_report_diagnostic): New.
	(class diagnostic_context): Add friend class
	diagnostic_text_output_format.
	(diagnostic_context::get_urlifier): New accessor.
	(diagnostic_context::print_any_cwe): Move decl...
	(diagnostic_text_output_format::print_any_cwe): ...to here.
	(diagnostic_context::print_any_rules): Move decl...
	(diagnostic_text_output_format::print_any_rules): ...to here.
	(diagnostic_context::print_option_information): Move decl...
	(diagnostic_text_output_format::print_option_information): ...to
	here.

2024-08-26  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc: Add comments noting that we don't
	yet capture any diagnostic_metadata::rules associated with a
	diagnostic.

2024-08-26  David Malcolm  <dmalcolm@redhat.com>

	* pretty-print.cc (selftest::test_urls): Make static.
	(selftest::test_urls_from_braces): New.
	(selftest::test_null_urls): Make static.
	(selftest::test_urlification): Likewise.
	(selftest::pretty_print_cc_tests): Call test_urls_from_braces.

2024-08-26  David Malcolm  <dmalcolm@redhat.com>

	* json.h: Fix typo in comment about missing INCLUDE_MEMORY.

2024-08-26  Andi Kleen  <ak@gcc.gnu.org>

	* tree-if-conv.cc: Remove unneeded include from last change.

2024-08-26  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	PR debug/116470
	* configure.ac: Add the "nop" instruction for cpu type ft32.
	* configure: Regenerate.
	* dwarf2out.cc (dwarf2out_set_ignored_loc): Use the correct
	line info section.

2024-08-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116460
	* tree-ssa-forwprop.cc (pass_forwprop::execute): Do not
	process blocks in unreachable natural loops.

2024-08-26  Richard Biener  <rguenther@suse.de>

	* tree-ssa-forwprop.cc (simplify_gimple_switch_label_vec):
	Delay removing edges and releasing dominator info, instead
	record into edges_to_remove vector.
	(simplify_gimple_switch): Pass through vector of to remove
	edges.
	(pass_forwprop::execute): Likewise.  Remove queued edges.

2024-08-26  Xi Ruoyao  <xry111@xry111.site>
	    Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116348
	* tree-vect-stmts.cc (supportable_widening_operation): Use
	STMT_VINFO_REDUC_DEF (x) instead of
	STMT_VINFO_DEF_TYPE (x) == vect_reduction_def.

2024-08-26  Pan Li  <pan2.li@intel.com>

	* match.pd: Add int_fits_type_p check for .SAT_ADD imm operand.

2024-08-26  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/116480
	* internal-fn.cc (expand_POPCOUNT): Use the correct mode
	for store flags.

2024-08-26  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/avx10_2-512convertintrin.h
	(_mm512_cvtpbf8_ph): New.
	(_mm512_mask_cvtpbf8_ph): Ditto.
	(_mm512_maskz_cvtpbf8_ph): Ditto.
	* config/i386/avx10_2convertintrin.h
	(_mm_cvtpbf8_ph): Ditto.
	(_mm_mask_cvtpbf8_ph): Ditto.
	(_mm_maskz_cvtpbf8_ph): Ditto.
	(_mm256_cvtpbf8_ph): Ditto.
	(_mm256_mask_cvtpbf8_ph): Ditto.
	(_mm256_maskz_cvtpbf8_ph): Ditto.

2024-08-26  Zhang, Jun  <jun.zhang@intel.com>
	    Haochen Jiang  <haochen.jiang@intel.com>
	    Hongtao Liu  <hongtao.liu@intel.com>

	* config/i386/i386-expand.cc
	(ix86_ssecom_setcc): Mention behavior change on flags.
	(ix86_expand_sse_comi): Handle AVX10.2 behavior.
	(ix86_expand_sse_comi_round): Ditto.
	(ix86_expand_round_builtin): Ditto.
	(ix86_expand_builtin): Change function call.
	* config/i386/i386.md (UNSPEC_COMX): New unspec.
	* config/i386/sse.md
	(avx10_2_v<unord>comx<ssemodesuffix><round_saeonly_name>): New.
	(<sse>_<unord>comi<round_saeonly_name>): Add HFmode.

2024-08-26  Zhang, Jun  <jun.zhang@intel.com>

	* config.gcc: Add avx10_2copyintrin.h.
	* config/i386/i386.md (avx10_2): New isa attribute.
	* config/i386/immintrin.h: Include avx10_2copyintrin.h.
	* config/i386/sse.md
	(sse_movss_<mode>): Add new constraints to handle AVX10.2.
	(vec_set<mode>_0): Ditto.
	(@vec_set<mode>_0): Ditto.
	(vec_set<mode>_0): Ditto.
	(avx512fp16_mov<mode>): Ditto.
	(*vec_set<mode>_0_1): New split.
	* config/i386/avx10_2copyintrin.h: New file.

2024-08-26  Mo, Zewei  <zewei.mo@intel.com>
	    Hu, Lin1  <lin1.hu@intel.com>
	    Haochen Jiang  <haochen.jiang@intel.com>

	* config.gcc: Add avx10_2-512minmaxintrin.h and
	avx10_2minmaxintrin.h.
	* config/i386/i386-builtin-types.def:
	Add DEF_FUNCTION_TYPE (V8BF, V8BF, V8BF, INT, V8BF, UQI),
	(V16BF, V16BF, V16BF, INT, V16BF, UHI),
	(V32BF, V32BF, V32BF, INT, V32BF, USI),
	(V8HF, V8HF, V8HF, INT, V8HF, UQI),
	(V8DF, V8DF, V8DF, INT, V8DF, UQI, INT),
	(V32HF, V32HF, V32HF, INT, V32HF, USI, INT),
	(V16HF, V16HF, V16HF, INT, V16HF, UHI, INT),
	(V16SF, V16SF, V16SF, INT, V16SF, UHI, INT).
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc
	(ix86_expand_args_builtin): Handle V8BF_FTYPE_V8BF_V8BF_INT_V8BF_UQI,
	V16BF_FTYPE_V16BF_V16BF_INT_V16BF_UHI,
	V32BF_FTYPE_V32BF_V32BF_INT_V32BF_USI,
	V8HF_FTYPE_V8HF_V8HF_INT_V8HF_UQI,
	(ix86_expand_round_builtin): Handle V8DF_FTYPE_V8DF_V8DF_INT_V8DF_UQI_INT,
	V32HF_FTYPE_V32HF_V32HF_INT_V32HF_USI_INT,
	V16HF_FTYPE_V16HF_V16HF_INT_V16HF_UHI_INT.
	V16SF_FTYPE_V16SF_V16SF_INT_V16SF_UHI_INT.
	* config/i386/immintrin.h: Include avx10_2-512mixmaxintrin.h and
	avx10_2minmaxintrin.h.
	* config/i386/sse.md (VFH_AVX10_2): New.
	(avx10_2_vminmaxnepbf16_<mode><mask_name>): New define_insn.
	(avx10_2_minmaxp<mode><mask_name><round_saeonly_name>): Ditto.
	(avx10_2_minmaxs<mode><mask_scalar_name><round_saeonly_scalar_name>): Ditto.
	* config/i386/avx10_2-512minmaxintrin.h: New file.
	* config/i386/avx10_2minmaxintrin.h: Ditto.

2024-08-26  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2-512satcvtintrin.h: Add new intrin.
	* config/i386/avx10_2satcvtintrin.h: Ditto.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md (VF1_VF2_AVX10_2): New iterator.
	(VF2_AVX10_2): Ditto.
	(VI8_AVX10_2): Ditto.
	(sat_cvt_sign_prefix): Add new UNSPEC.
	(UNSPEC_SAT_CVT_DS_SIGN_ITER): New iterator.
	(pd2dqssuff): Ditto.
	(avx10_2_vcvtt<castmode>2<sat_cvt_sign_prefix>dqs<mode><mask_name><round_saeonly_name>):
	New.
	(avx10_2_vcvttpd2<sat_cvt_sign_prefix>qqs<mode><mask_name><round_saeonly_name>):
	Ditto.
	(avx10_2_vcvttps2<sat_cvt_sign_prefix>qqs<mode><mask_name><round_saeonly_name>):
	Ditto.
	(avx10_2_vcvttsd2<sat_cvt_sign_prefix>sis<mode><round_saeonly_name>):
	Ditto.
	(avx10_2_vcvttss2<sat_cvt_sign_prefix>sis<mode><round_saeonly_name>):
	Ditto.

2024-08-26  Hu, Lin1  <lin1.hu@intel.com>

	* config.gcc: Add avx10_2satcvtintrin.h and
	avx10_2-512satcvtintrin.h.
	* config/i386/i386-builtin-types.def:
	Add DEF_FUNCTION_TYPE (V8HI, V8BF, V8HI, UQI),
	(V16HI, V16BF, V16HI, UHI), (V32HI, V32BF, V32HI, USI),
	(V16SI, V16SF, V16SI, UHI, INT), (V16HI, V16BF, V16HI, UHI, INT),
	(V32HI, V32BF, V32HI, USI, INT).
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
	V32HI_FTYPE_V32BF_V32HI_USI, V16HI_FTYPE_V16BF_V16HI_UHI,
	V8HI_FTYPE_V8BF_V8HI_UQI.
	(ix86_expand_round_builtin): Handle V32HI_FTYPE_V32BF_V32HI_USI_INT,
	V16SI_FTYPE_V16SF_V16SI_UHI_INT, V16HI_FTYPE_V16BF_V16HI_UHI_INT.
	* config/i386/immintrin.h: Include avx10_2satcvtintrin.h and
	avx10_2-512savcvtintrin.h.
	* config/i386/sse.md:
	(UNSPEC_CVTNE_BF16_IBS_ITER): New iterator.
	(sat_cvt_sign_prefix): Ditto.
	(sat_cvt_trunc_prefix): Ditto.
	(UNSPEC_CVT_PH_IBS_ITER): Ditto.
	(UNSPEC_CVTT_PH_IBS_ITER): Ditto.
	(UNSPEC_CVT_PS_IBS_ITER): Ditto.
	(UNSPEC_CVTT_PS_IBS_ITER): Ditto.
	(avx10_2_cvt<sat_cvt_trunc_prefix>nebf162i<sat_cvt_sign_prefix>bs<mode><mask_name>):
	New define_insn.
	(avx10_2_cvtph2i<sat_cvt_sign_prefix>bs<mode><mask_name><round_name>):
	Ditto.
	(avx10_2_cvttph2i<sat_cvt_sign_prefix>bs<mode><mask_name><round_saeonly_name>):
	Ditto.
	(avx10_2_cvtps2i<sat_cvt_sign_prefix>bs<mode><mask_name><round_name>):
	Ditto.
	(avx10_2_cvttps2i<sat_cvt_sign_prefix>bs<mode><mask_name><round_saeonly_name>):
	Ditto.
	* config/i386/avx10_2-512satcvtintrin.h: New file.
	* config/i386/avx10_2satcvtintrin.h: Ditto.

2024-08-26  konglin1  <lingling.kong@intel.com>
	    Levy Hsu  <admin@levyhsu.com>

	* config/i386/avx10_2-512bf16intrin.h: Add new intrinsics.
	* config/i386/avx10_2bf16intrin.h: Diito.
	* config/i386/i386-builtin-types.def : Add new DEF_FUNCTION_TYPE
	for new type.
	* config/i386/i386-builtin.def (BDESC): Add new buildin.
	* config/i386/i386-expand.cc (ix86_expand_args_builtin):
	Handle new type.
	* config/i386/sse.md (vecmemsuffix): Add vector BF mode.
	(avx10_2_rsqrtpbf16_<mode><mask_name>): New define_insn.
	(avx10_2_sqrtnepbf16_<mode><mask_name>): Ditto.
	(avx10_2_rcppbf16_<mode><mask_name>): Ditto.
	(avx10_2_getexppbf16_<mode><mask_name>): Ditto.
	(BF16IMMOP): New iterator.
	(bf16immop): Ditto.
	(avx10_2_<bf16immop>pbf16_<mode><mask_name>): New define_insn.
	(avx10_2_fpclasspbf16_<mode><mask_scalar_merge_name>): Ditto.
	(avx10_2_cmppbf16_<mode><mask_scalar_merge_name>): Ditto.
	(avx10_2_comsbf16_v8bf): Ditto.

2024-08-26  konglin1  <lingling.kong@intel.com>
	    Levy Hsu  <admin@levyhsu.com>

	* config.gcc: Add avx10_2-512bf16intrin.h and avx10_2bf16intrin.h.
	* config/i386/i386-builtin-types.def : Add new
	DEF_FUNCTION_TYPE for V32BF_FTYPE_V32BF_V32BF,
	V16BF_FTYPE_V16BF_V16BF, V8BF_FTYPE_V8BF_V8BF,
	V8BF_FTYPE_V8BF_V8BF_UQI, V16BF_FTYPE_V16BF_V16BF_UHI,
	V32BF_FTYPE_V32BF_V32BF_USI, V32BF_FTYPE_V32BF_V32BF_V32BF_USI,
	V8BF_FTYPE_V8BF_V8BF_V8BF_UQI and V16BF_FTYPE_V16BF_V16BF_V16BF_UHI.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_args_builtin):
	Handle new DEF_FUNCTION_TYPE.
	* config/i386/immintrin.h: Include avx10_2-512bf16intrin.h and
	avx10_2bf16intrin.h.
	* config/i386/sse.md
	(VBF_AVX10_2): New iterator.
	(avx10_2_scalefpbf16_<mode><mask_name>): New define_insn.
	(avx10_2_<code>nepbf16_<mode><mask_name>): Ditto.
	(avx10_2_<insn>nepbf16_<mode><mask_name>): Ditto.
	(avx10_2_fmaddnepbf16_<mode>_maskz): New expander.
	(avx10_2_fnmaddnepbf16_<mode>_maskz): Ditto.
	(avx10_2_fmsubnepbf16_<mode>_maskz): Ditto.
	(avx10_2_fnmsubnepbf16_<mode>_maskz): Ditto.
	(avx10_2_fmaddnepbf16_<mode><sd_maskz_name>): New define_insn.
	(avx10_2_fmaddnepbf16_<mode>_mask): Ditto.
	(avx10_2_fmaddnepbf16_<mode>_mask3): Ditto.
	(avx10_2_fnmaddnepbf16_<mode><sd_maskz_name>): Ditto.
	(avx10_2_fnmaddnepbf16_<mode>_mask): Ditto.
	(avx10_2_fnmaddnepbf16_<mode>_mask3): Ditto.
	(avx10_2_fmsubnepbf16_<mode><sd_maskz_name>): Ditto.
	(avx10_2_fmsubnepbf16_<mode>_mask): Ditto.
	(avx10_2_fmsubnepbf16_<mode>_mask3): Ditto.
	(avx10_2_fnmsubnepbf16_<mode><sd_maskz_name>): Ditto.
	(avx10_2_fnmsubnepbf16_<mode>_mask): Ditto.
	(avx10_2_fnmsubnepbf16_<mode>_mask3): Ditto.
	* config/i386/avx10_2-512bf16intrin.h: New file.
	* config/i386/avx10_2bf16intrin.h: Ditto.

2024-08-26  Levy Hsu  <admin@levyhsu.com>
	    Kong Lingling  <lingling.kong@intel.com>

	* config.gcc: Add avx10_2-512convertintrin.h and
	avx10_2convertintrin.h.
	* config/i386/i386-builtin-types.def: Add new DEF_POINTER_TYPE
	and DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_args_builtin):
	Handle AVX10.2.
	(ix86_expand_round_builtin): Ditto.
	* config/i386/immintrin.h: Include avx10_2-512convertintrin.h,
	avx10_2convertintrin.h.
	* config/i386/sse.md (VHF_AVX10_2): New iterator.
	(bf16_ph): Add 512 bit mode.
	(avx10_2_cvt2ps2phx_<mode><mask_name<round_name>): New define_insn.
	(ssebvecmode): New iterator.
	(UNSPEC_NECONVERTFP8_PACK): Ditto.
	(neconvertfp8_pack): Ditto.
	(vcvt<neconvertfp8_pack><mode><mask_name>): New define_insn.
	(ssebvecmode_2): New iterator.
	(UNSPEC_VCVTBIASPH2FP8_PACK): Ditto.
	(biasph2fp8_pack): Ditto.
	(vcvt<biasph2fp8_pack>v8hf): New expander.
	(vcvt<biasph2fp8_pack>v8hf_mask): Ditto.
	(*vcvt<biasph2bf8_pack>v8hf): New define_insn.
	(*vcvt<biasph2fp8_pack>v8hf_mask): Ditto.
	(VHF_AVX10_2_2): New iterator.
	(vcvt<biasph2fp8_pack><mode><mask_name>): New define_insn.
	(VHF_256_512): New iterator.
	(ph2fp8suff): Ditto.
	(UNSPEC_NECONVERTPH2FP8_PACK): Ditto.
	(neconvertph2fp8): Ditto.
	(vcvt<neconvertph2fp8>v8hf_mask): New expander.
	(*vcvt<neconvertph2fp8>v8hf): New define_insn.
	(*vcvt<neconvertph2fp8>v8hf_mask): Ditto.
	(vcvt<neconvertph2fp8><mode><mask_name>): Ditto.
	(vcvthf82ph<mode><mask_name>): Ditto.
	* config/i386/avx10_2-512convertintrin.h: New file.
	* config/i386/avx10_2convertintrin.h: Ditto.

2024-08-26  Haochen Jiang  <haochen.jiang@intel.com>
	    Hongyu Wang  <hongyu.wang@intel.com>

	* config/i386/avx10_2-512mediaintrin.h: Add new intrins.
	* config/i386/avx10_2mediaintrin.h: Ditto.
	* config/i386/i386-builtin.def: Add new builtins.
	* config/i386/i386-builtins.cc (def_builtin): Handle shared
	builtins between AVXVNNIINT16 and AVX10.2.
	* config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
	Ditto.
	* config/i386/sse.md (unspec): Add UNSPEC_VDPPHPS.
	(avx10_2_mpsadbw<mask_name>): New define_insn.
	(<mask_codefor><sse4_1_avx2>_mpsadbw<mask_name>): Ditto.
	(vpdp<vpdpwprodtype>_<mode>): Add AVX10_2_256.
	(vpdp<vpdpwprodtype>_v16si): New defin_insn.
	(vpdp<vpdpwprodtype>_<mode>_mask): Ditto.
	(*vpdp<vpdpwprodtype>_<mode>_maskz): Ditto.
	(vpdp<vpdpwprodtype>_<mode>_maskz): New expander.
	(vdpphps_<mode>): New define_insn.
	(vdpphps_<mode>_mask): Ditto.
	(*vdpphps_<mode>_maskz): Ditto.
	(vdpphps_<mode>_maskz): New expander.

2024-08-26  Hongyu Wang  <hongyu.wang@intel.com>
	    Haochen Jiang  <haochen.jiang@intel.com>

	* config.gcc: Add avx10_2mediaintrin.h and
	avx10_2-512mediaintrin.h.
	* config/i386/i386-builtin.def: Add new builtins.
	* config/i386/i386-builtins.cc (def_builtin): Handle shared
	builtins between AVXVNNIINT8 and AVX10.2.
	* config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
	Ditto.
	* config/i386/immintrin.h: Include avx10_2mediaintrin.h and
	avx10_2-512mediaintrin.h
	* config/i386/sse.md: (VI4_AVX10_2): New.
	(vpdp<vpdotprodtype>_<mode>): Add AVX10_2_256.
	(vpdp<vpdotprodtype>_v16si): New define_insn.
	(vpdp<vpdotprodtype>_<mode>_mask): Ditto.
	(*vpdp<vpdotprodtype>_<mode>_maskz): Ditto.
	(vpdp<vpdotprodtype>_<mode>_maskz): New expander.
	* config/i386/avx10_2-512mediaintrin.h: New file.
	* config/i386/avx10_2mediaintrin.h: Ditto.

2024-08-26  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv.cc (riscv_gen_unsigned_xmode_reg): Add new
	func impl to gen xmode rtx reg from operand rtx.
	(riscv_expand_ussub): Gen xmode reg for operand 1.
	* config/riscv/riscv.md: Allow const_int for operand 1.

2024-08-25  demin.han  <demin.han@starfivetech.com>

	* config/riscv/vector.md: Add !FLOAT_MODE_P constraint.

2024-08-25  Xianmiao Qu  <cooper.qu@linux.alibaba.com>

	* lower-subreg.cc (resolve_simple_move): Re-add calling emit_clobber
	immediately before moving a multi-word register by parts.

2024-08-25  Andi Kleen  <ak@gcc.gnu.org>

	PR tree-optimization/115866
	* tree-if-conv.cc (if_convertible_switch_p): New function.
	(if_convertible_stmt_p): Check for switch.
	(get_loop_body_in_if_conv_order): Handle switch.
	(predicate_bbs): Likewise.
	(predicate_statements): Likewise.
	(remove_conditions_and_labels): Likewise.
	(ifcvt_split_critical_edges): Likewise.
	(ifcvt_local_dce): Likewise.

2024-08-25  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (write_optimized_static_local_vars): New function.
	(write_function): Call write_optimized_static_local_vars.

2024-08-25  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (enum cv_sym_type): Add S_FRAMEPROC.
	(write_s_frameproc): New function.
	(write_function): Call write_s_frameproc.

2024-08-25  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (enum cv_sym_type): Add S_DEFRANGE_REGISTER_REL.
	(write_defrange_register_rel): New function.
	(write_optimized_local_variable_loc): Add fbloc param, and call
	write_defrange_register_rel.
	(write_optimized_local_variable): Add fbloc param.
	(write_optimized_function_vars): Add fbloc param.

2024-08-25  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (enum cv_sym_type): Add S_LOCAL and
	S_DEFRANGE_REGISTER.
	(write_s_local): New function.
	(write_defrange_register): New function.
	(write_optimized_local_variable_loc): New function.
	(write_optimized_local_variable): New function.
	(write_optimized_function_vars): New function.
	(write_function): Call write_optimized_function_vars if variable
	tracking enabled.
	* dwarf2out.cc (typedef var_loc_view): Move to dwarf2out.h.
	(struct dw_loc_list_struct): Likewise.
	* dwarf2out.h (typedef var_loc_view): Move from dwarf2out.h.
	(struct dw_loc_list_struct): Likewise.
	* opts.cc (finish_options): Enable variable tracking for CodeView.

2024-08-25  Roger Sayle  <roger@nextmovesoftware.com>
	    Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386-features.cc (compute_convert_gain)
	<case ASHIFTRT>: Update to match ix86_expand_v1ti_ashiftrt.

2024-08-23  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/riscv-v.cc (rvv_builder::can_duplicate_repeating_sequence_p):
	Use encoded_nelts when calling repeating_sequence_p.
	(rvv_builder::is_repeating_sequence): Ditto.
	(rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.

2024-08-23  Manolis Tsamis  <manolis.tsamis@vrull.eu>

	PR rtl-optimization/116372
	PR rtl-optimization/116405
	* ifcvt.cc (noce_convert_multiple_sets): Iterate backwards and track
	target registers.

2024-08-23  Manolis Tsamis  <manolis.tsamis@vrull.eu>

	PR middle-end/116358
	* ifcvt.cc (noce_convert_multiple_sets): Disallow call insns.

2024-08-23  Peter Bergner  <bergner@linux.ibm.com>

	PR target/116415
	* config/rs6000/rs6000.h (TI_OR_PTI_MODE): New define.
	* config/rs6000/rs6000-p8swap.cc (rs6000_analyze_swaps): Use it to
	handle PTImode identically to TImode.

2024-08-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116463
	* tree-complex.cc: Include tree-ssa-dce.h.
	(dce_worklist): New global.
	(update_complex_assignment): Add SSA def to the DCE worklist.
	(tree_lower_complex): Perform DCE.

2024-08-23  Pan Li  <pan2.li@intel.com>

	* match.pd: Add form 4 for unsigned .SAT_TRUNC matching.

2024-08-23  Robin Dapp  <rdapp@ventanamicro.com>

	PR middle-end/115495
	* cfgexpand.cc (expand_debug_expr): Require mode.
	* combine.cc (make_extraction): Ditto.
	* config/aarch64/aarch64.cc (aarch64_expand_cpymem): Ditto.
	(aarch64_expand_setmem): Ditto.
	* config/arc/arc.cc (arc_expand_cpymem): Ditto.
	* config/arm/arm.cc (arm_expand_divmod_libfunc): Ditto.
	* config/i386/i386.cc (ix86_get_mask_mode): Ditto.
	* config/rs6000/predicates.md: Ditto.
	* config/rs6000/rs6000.cc (vspltis_constant): Ditto.
	* config/s390/s390.cc (s390_expand_insv): Ditto.
	* config/sparc/sparc.cc (assign_int_registers): Ditto.
	* coverage.cc (get_gcov_type): Ditto.
	(get_gcov_unsigned_t): Ditto.
	* dse.cc (find_shift_sequence): Ditto.
	* expmed.cc (store_integral_bit_field): Ditto.
	* expr.cc (convert_mode_scalar): Ditto.
	(op_by_pieces_d::smallest_fixed_size_mode_for_size): Ditto.
	(emit_block_move_via_oriented_loop): Ditto.
	(copy_blkmode_to_reg): Ditto.
	(store_field): Ditto.
	* internal-fn.cc (expand_arith_overflow): Ditto.
	* machmode.h (HAVE_MACHINE_MODES): Ditto.
	(smallest_mode_for_size): Use opt_machine_mode.
	(smallest_int_mode_for_size): Use opt_scalar_int_mode.
	* optabs-query.cc (get_best_extraction_insn): Require mode.
	* optabs.cc (expand_twoval_binop_libfunc): Ditto.
	* stor-layout.cc (smallest_mode_for_size): Return
	opt_machine_mode.
	(layout_type): Require mode.
	(initialize_sizetypes): Ditto.
	* tree-ssa-loop-manip.cc (canonicalize_loop_ivs): Ditto.

2024-08-23  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/autovec.md (abs<mode>2): Expand via max (a, -a).

2024-08-23  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/gm2.texi (License): Specifically link to GPL v3.0

2024-08-22  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/116420
	* ext-dce.cc (ext_dce_init): Fix loop iteration when setting up the
	interesting block for DF to analyze.

2024-08-22  Prathamesh Kulkarni  <prathameshk@nvidia.com>

	* lto-streamer-in.cc: (lto_read_tree_1): Set DECL_MODE (expr) to
	TREE_TYPE (TYPE_MODE (expr)) if TREE_TYPE (expr) is aggregate type and
	offloading is enabled.
	* stor-layout.cc (layout_type): Move computation of mode for
	ARRAY_TYPE from ...
	(compute_array_mode): ... to here.
	* stor-layout.h (compute_array_mode): Declare.
	* tree-streamer-in.cc: Include stor-layout.h.
	(unpack_ts_common_value_fields): Call compute_array_mode if offloading
	is enabled.
	* tree-streamer-out.cc (pack_ts_fixed_cst_value_fields): Stream out
	VOIDmode if decl has aggregate type and offloading is enabled.
	(pack_ts_type_common_value_fields): Stream out VOIDmode for aggregate
	type if offloading is enabled.

2024-08-22  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_v_adjust_scalable_frame): Add
	epilogue code for stack-clash and fix prologue cfi note.

2024-08-22  Andrew Pinski  <quic_apinski@quicinc.com>
	    Richard Biener   <rguenther@suse.de>

	PR middle-end/116454
	* fold-const.cc (fold_binary_loc): Fix `a * +-1i`
	by wrapping arg0 with save_expr when it is not COMPLEX_EXPR.

2024-08-22  Jennifer Schmitz  <jschmitz@nvidia.com>

	PR target/116365
	* config/aarch64/aarch64-opts.h
	(enum aarch64_autovec_preference_enum):	New enum.
	* config/aarch64/aarch64.cc (aarch64_cmp_autovec_modes):
	Change numerical to enum values.
	(aarch64_autovectorize_vector_modes): Change numerical to enum
	values.
	(aarch64_vector_costs::record_potential_advsimd_unrolling):
	Change numerical to enum values.
	* config/aarch64/aarch64.opt: Change param type to enum.
	* doc/invoke.texi: Update documentation.

2024-08-22  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	* dwarf2out.cc (dwarf2out_maybe_output_loclist_view_pair,
	output_loc_list): Correct handling of -gno-as-loc-support,
	use ZERO_VIEW_P to output view number as zero value.
	* toplev.cc (process_options): Do not automatically disable
	-gvariable-location-views when -gno-as-loc-support or
	-gno-as-locview-support is used, instead do automatically
	disable -gas-locview-support if -gno-as-loc-support is used.

2024-08-22  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	PR debug/87440
	* dwarf2out.cc (gen_inlined_subroutine_die): Handle the case
	of multiple subranges correctly.

2024-08-22  Jennifer Schmitz  <jschmitz@nvidia.com>

	PR tree-optimization/101390
	* tree-vect-patterns.cc (vect_recog_mod_var_pattern): Add new pattern.

2024-08-22  Alexandre Oliva  <oliva@adacore.com>

	* toplev.cc (dump_final_alias_vcg): New.
	(dump_final_node_vcg): Dump aliases along with node.

2024-08-22  liuhongt  <hongtao.liu@intel.com>

	* config/i386/i386-options.cc (ix86_option_override_internal):
	set ix86_{move_max,store_max} to PVW_AVX256 when TARGET_AVX
	instead of PVW_AVX128.

2024-08-21  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/116437
	* ext-dce.cc (ext_dce_try_optimize_insn): Handle SUBREG and
	ZERO_EXTRACT destinations.

2024-08-21  Richard Sandiford  <richard.sandiford@arm.com>

	PR testsuite/116238
	* config/aarch64/aarch64.cc (aarch64_hard_regno_caller_save_mode):
	Only return SImode if we can convert to and from it.

2024-08-21  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/113042
	* config/aarch64/aarch64.md (popcountti2): New define_expand.

2024-08-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116406
	* tree-ssa-sccvn.cc (vn_reference_eq): Never equate
	float and int when the float mode cannot transfer bits.
	Do not try to anticipate which is the mode we actually load
	from.

2024-08-21  Martin Jambor  <mjambor@suse.cz>

	PR target/58416
	* tree-sra.cc (types_risk_mangled_binary_repr_p): New function.
	(sort_and_splice_var_accesses): Use it.
	(propagate_subaccesses_from_rhs): Likewise.

2024-08-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116380
	* tree-loop-distribution.cc (copy_loop_before): Handle
	out-of-loop defs appropriately.

2024-08-21  Kewen Lin  <linkw@linux.ibm.com>

	* config/rs6000/vsx.md (define_insn *vsx_le_perm_store_{<VSX_D:mode>,
	<VSX_W:mode>,v8hi,v16qi,<VSX_LE_128:mode>}): Remove constraint modifier
	"+" from operand 1.

2024-08-21  Kewen Lin  <linkw@linux.ibm.com>

	* config/rs6000/vsx.md (*vsx_le_perm_store_{<VSX_D:mode>,<VSX_W:mode>,
	v8hi,v16qi,<VSX_LE_128:mode>} !reload_completed splitters): Assert
	can_create_pseudo_p and always generate one new pseudo for operand 1.

2024-08-21  liuhongt  <hongtao.liu@intel.com>

	* config/i386/sse.md (mov<mode>): Align predicates for
	operands[1] between mov<mode> and *mov<mode>_internal.
	* config/i386/mmx.md (mov<mode>): Ditto.

2024-08-21  Andrew Pinski  <quic_apinski@quicinc.com>

	* builtins.cc (fold_builtin_bit_query): Don't expand double
	`unsigned long long` typess if there is an optab entry for that
	type.

2024-08-21  Andrew Pinski  <quic_apinski@quicinc.com>

	PR sanitizer/115205
	* asan.cc (asan_instrument): Call initialize_sanitizer_builtins
	for hwasan.
	(hwasan_finish_file): Likewise.

2024-08-20  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/116412
	* gimple-match-exports.cc (gimple_extract): Return false if op0
	was not a SSA name nor a min invariant for REALPART_EXPR/IMAGPART_EXPR/VCE
	and BIT_FIELD_REF.

2024-08-20  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/116409
	* tree-ssa-phiopt.cc (factor_out_conditional_operation): Move
	maybe_push_res_to_seq before creating the phi node and the debug dump.
	Return false if maybe_push_res_to_seq fails.

2024-08-20  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/install.texi (Specific) <c6x-*-*>: Normalize reference to
	binutils.

2024-08-20  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/103660
	* match.pd (`(a ? b : 0) | (a ? 0 : c)`): New pattern.

2024-08-20  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/103660
	* match.pd (`((a CMP b) ? c : 0) | ((a CMP' b) ? d : 0)`): Extend to support
	XOR and PLUS.

2024-08-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116274
	* tree-vect-slp.cc (vect_bb_slp_scalar_cost): Cost scalar loads
	and stores as simple scalar stmts when they access a non-global,
	not address-taken variable that doesn't have BLKmode assigned.

2024-08-20  Prathamesh Kulkarni  <prathameshk@nvidia.com>

	* optc-save-gen.awk: New array var_target_opt. Use it to generate
	if (!lto_stream_offload_p) check in cl_optimization_stream_out,
	and generate a diagnostic with #error if accelerator backend uses
	Optimization for target-specifc options in cl_optimization_stream_in.

2024-08-19  Andreas Schwab  <schwab@linux-m68k.org>

	PR target/113939
	* config/m68k/m68k.opt (mlra): New target option.
	* config/m68k/m68k.cc (m68k_use_lra_p): New function.
	(TARGET_LRA_P): Use it.
	* config/m68k/m68k.opt.urls: Regenerate.

2024-08-19  Andrew Carlotti  <andrew.carlotti@arm.com>

	PR target/112108
	* config/aarch64/aarch64-builtins.cc (handle_arm_acle_h): Remove
	feature check at initialisation.
	(aarch64_general_check_builtin_call): Check ls64 intrinsics.
	* config/aarch64/arm_acle.h: (data512_t) Make always available.

2024-08-19  Andrew Carlotti  <andrew.carlotti@arm.com>

	PR target/112108
	* config/aarch64/aarch64-builtins.cc (aarch64_init_memtag_builtins):
	Define intrinsic names directly.
	(aarch64_general_init_builtins): Move memtag intialisation...
	(handle_arm_acle_h): ...to here, and remove feature check.
	(aarch64_general_check_builtin_call): Check memtag intrinsics.
	* config/aarch64/arm_acle.h (__arm_mte_create_random_tag)
	(__arm_mte_exclude_tag, __arm_mte_ptrdiff)
	(__arm_mte_increment_tag, __arm_mte_set_tag, __arm_mte_get_tag):
	Remove.

2024-08-19  Andrew Carlotti  <andrew.carlotti@arm.com>

	PR target/112108
	* config/aarch64/aarch64-builtins.cc (aarch64_init_tme_builtins):
	Define intrinsic names directly.
	(aarch64_general_init_builtins): Move tme initialisation...
	(handle_arm_acle_h): ...to here, and remove feature check.
	(aarch64_general_check_builtin_call): Check tme intrinsics.
	* config/aarch64/arm_acle.h (__tstart, __tcommit, __tcancel)
	(__ttest): Remove.
	(_TMFAILURE_*): Define unconditionally.

2024-08-19  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-sve-builtins.cc (check_builtin_call)
	(expand_builtin): Update calls to the below.
	(report_missing_extension, report_missing_registers)
	(check_required_extensions): Move out of aarch64_sve namespace,
	rename, and move into...
	* config/aarch64/aarch64-builtins.cc (aarch64_report_missing_extension)
	(aarch64_report_missing_registers)
	(aarch64_check_required_extensions) ...here.
	* config/aarch64/aarch64-protos.h (aarch64_check_required_extensions):
	Add prototype.

2024-08-19  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-sve-builtins.cc
	(check_required_registers): Remove target check and rename to...
	(report_missing_registers): ...this.
	(check_required_extensions): Refactor.

2024-08-19  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* config/aarch64/tuning_models/neoversev2.h (fp_reassoc_width):
	Set to 4.
	(tune_flags): Add AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA.

2024-08-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* read-rtl.cc (rtx_reader::rtx_alloc_for_name): Allow all attribute
	types to produce code 'values'.
	(check_code_attribute): Rename ...
	(check_attribute_codes): ... to this.  And change comments to refer to
	* doc/md.texi: Add paragraph to document that you can use int and mode
	attributes to produce codes.

2024-08-19  Haochen Gui  <guihaoc@gcc.gnu.org>

	* config/aarch64/aarch64-simd.md (mov<mode> for VSTRUCT_QD):
	Expand 16-byte vector mode const0 store by TImode.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def: Add new builtins.
	* config/i386/sse.md:
	(<avx512>_scalef<mode><mask_name><round_name>): Add condition check.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md:
	(<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
	Add condition check.
	(<avx512>_rndscale<mode><mask_name><round_saeonly_name>): Ditto.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin):
	Handle V8SF_FTYPE_V8SF_V8SF_INT_V8SF_UQI_INT,
	V4DF_FTYPE_V4DF_V4DF_INT_V4DF_UQI_INT.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V8SF_FTYPE_V8SF_V8SF_UQI_INT, V4DF_FTYPE_V4DF_V4DF_UQI_INT,
	V16HF_FTYPE_V16HF_V16HF_UHI_INT, V16HF_FTYPE_V16HF_INT_V16HF_UHI_INT,
	V4DF_FTYPE_V4DF_INT_V4DF_UQI_INT, V8SF_FTYPE_V8SF_INT_V8SF_UQI_INT.
	* config/i386/sse.md:
	(<avx512>_getexp<mode><mask_name><round_saeonly_name>):
	Add condition check.
	(<avx512>_getmant<mode><mask_name><round_saeonly_name>):
	Ditto.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md:
	(<avx512>_fnmsub_<mode>_mask3<round_name>): Add condition check.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md:
	(<avx512>_fmsub_<mode>_mask<round_name>): Add condition check.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md:
	(<avx512>_fmaddsub_<mode>_mask<round_name>): Add condition check.
	(<avx512>_fmaddsub_<mode>_mask3<round_name>): Ditto.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md:
	(<avx512>_fmadd_<mode>_mask3<round_name>): Add condition check.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V16HF_FTYPE_V16HF_V16HF_INT, V16HF_FTYPE_V16HF_V16HF_V16HF_INT,
	V16HF_FTYPE_V16HF_V16HF_V16HF_UQI_INT,
	V4DF_FTYPE_V4DF_V4DF_V4DI_INT_UQI_INT,
	V8SF_FTYPE_V8SF_V8SF_V8SI_INT_UQI_INT.
	* config/i386/sse.md:
	(<avx512>_fixupimm<mode><sd_maskz_name><round_saeonly_name>):
	Add condition check.
	(<avx512>_fixupimm<mode>_mask<round_saeonly_name>): Ditto.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V16HF_FTYPE_V16HI_V16HF_UHI_INT.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md
	(unspec_fix_truncv8sfv8si2<mask_name>): Extend rounding control.
	(<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
	Ditto.
	(<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):
	Add condition check.
	(fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
	Remove round_saeonly_name.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/sse.md (avx512fp16_fix<fixunssuffix>_trunc<mode>2<mask_name>):
	Extend round control for 256bit.
	(unspec_avx512fp16_fix<vcvtt_uns_suffix>_trunc<mode>2<mask_name>):
	Ditto.
	(avx512fp16_fix<fixunssuffix>_trunc<mode>2<mask_name><round_saeonly_name>):
	Add condition check.
	* config/i386/subst.md
	(round_saeonly_mode_condition): Add V16HI check for 256bit.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V4DF_FTYPE_V4DI_V4DF_UQI_INT, V4SF_FTYPE_V4DI_V4SF_UQI_INT,
	V8HF_FTYPE_V4DI_V8HF_UQI_INT.
	* config/i386/sse.md:
	(avx512fp16_vcvt<floatsuffix>qq2ph_v4di_mask_round): New expand.
	(*avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode>_mask):
	Extend round control and add "_1" suffix.
	(float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
	Add condition check.
	(float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
	Ditto.
	(float<floatunssuffix><mode><ssePSmode2lower>2<mask_name><round_name>):
	Limit suffix output.
	(unspec_fix_truncv4dfv4si2<mask_name>): Extend round control.
	(unspec_fixuns_truncv4dfv4si2<mask_name>): Ditto.
	* config/i386/subst.md (round_qq2pssuff): New iterator.
	(round_saeonly_suff): Ditto.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V8SI_FTYPE_V8SF_V8SI_UQI_INT, V4DI_FTYPE_V4SF_V4DI_UQI_INT.
	* config/i386/sse.md
	(<sse2_avx_avx512f>_fix_notrunc<sf2simodelower><mode><mask_name>):
	Extend to round.
	(<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
	Add round condition check.
	* config/i386/subst.md (round_constraint4): New.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V16HI_FTYPE_V16HF_V16HI_UHI_INT, V4DF_FTYPE_V4SF_V4DF_UQI_INT
	V8HF_FTYPE_V8SF_V8HF_UQI_INT.
	* config/i386/sse.md
	(avx512fp16_vcvt<castmode>2ph_<mode><mask_name><round_name>):
	Add round condition check.
	* config/i386/subst.md (round_mode_condition): Add V16HI check for
	256bit.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: New intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V8SF_FTYPE_V8HF_V8SF_UQI_INT, V8SI_FTYPE_V8HF_V8SI_UQI_INT,
	V4DF_FTYPE_V8HF_V4DF_UQI_INT, V4DI_FTYPE_V8HF_V4DI_UQI_INT.
	* config/i386/sse.md:
	(avx512fp16_float_extend_ph<mode>2<mask_name><round_saeonly_name>):
	Add condition check.
	(avx512fp16_vcvtph2<sseintconvertsignprefix><sseintconvert>_<mode>
	<mask_name><round_name>):
	Ditto.
	(avx512fp16_float_extend_ph<mode>2<mask_name>): Extend round saeonly.
	(vcvtph2ps256<mask_name>): Ditto.
	* config/i386/subst.md
	(round_saeonly_applied): New condition.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: Add new intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V4DI_FTYPE_V4DF_V4DI_UQI_INT, V4SI_FTYPE_V4DF_V4SI_UQI_INT.
	* config/i386/sse.md:
	(avx_cvtpd2dq256<mask_name>): Change name to
	avx_cvtpd2dq256<mask_name><round_name> and extend pattern to
	generate 256bit insns.
	(fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
	Add round_mode_condition.
	* config/i386/subst.md (round_pd2udqsuff): New iterator.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avx10_2roundingintrin.h: Add new intrins.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V8SF_FTYPE_V8SI_V8SF_UQI_INT, V4SF_FTYPE_V4DF_V4SF_UQI_INT,
	V8HF_FTYPE_V8SI_V8HF_UQI_INT, V8HF_FTYPE_V4DF_V8HF_UQI_INT.
	* config/i386/sse.md:
	(avx512fp16_vcvt<floatsuffix><sseintconvert>2ph_<mode><mask_name><round_name>):
	Add condition check.
	(avx512fp16_vcvtpd2ph_v4df_mask_round): New expand.
	(*avx512fp16_vcvt<castmode>2ph_<mode>_mask): Change name to
	avx512fp16_vcvt<castmode>2ph_<mode>_mask<round_name>_1
	and extend pattern to generate 256bit insns.
	(avx_cvtpd2ps256<mask_name>): Change name to
	avx_cvtpd2ps256<mask_name><round_name> and extend pattern to
	generate 256bit insns.
	* config/i386/subst.md (round_applied): New condition.
	(round_suff): New iterator.
	(round_mode_condition): Add V32HI check for 512bit.
	(round_saeonly_mode_condition): Ditto.

2024-08-19  Hu, Lin1  <lin1.hu@intel.com>

	* config.gcc: Add avx10_2roundingintrin.h.
	* config/i386/i386-builtin-types.def: Add new DEF_FUNCTION_TYPE.
	* config/i386/i386-builtin.def (BDESC): Add new builtins.
	* config/i386/i386-expand.cc (ix86_expand_round_builtin): Handle
	V4DF_FTYPE_V4DF_V4DF_V4DF_UQI_INT, V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT,
	V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT, UQI_FTYPE_V4DF_V4DF_INT_UQI_INT,
	UHI_FTYPE_V16HF_V16HF_INT_UHI_INT, UQI_FTYPE_V8SF_V8SF_INT_UQI_INT.
	* config/i386/immintrin.h: Include avx10_2roundingintrin.h.
	* config/i386/sse.md: Change subst_attr name due to renaming.
	* config/i386/subst.md:
	(<round_mode512bit_condition>): Add condition check for avx10.2
	rounding control 256bit intrins and renamed to ...
	(<round_mode_condition>): ...this.
	(round_saeonly_mode512bit_condition): Add condition check for
	avx10.2 rounding control 256 bit intris and renamed to ...
	(round_saeonly_mode_condition): ...this.
	* config/i386/avx10_2roundingintrin.h: New file.

2024-08-18  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/115876
	* ext-dce.cc (ext_dce_process_sets): Replace hardcoded 63/64 instances
	with HOST_BITS_PER_WIDE_INT based values.
	(carry_backpropagate): Handle modes with more bits than
	HOST_BITS_PER_WIDE_INT gracefully, avoiding undefined behavior.
	(ext_dce_process_uses): Handle subreg offsets which would result
	in ubsan shifts gracefully, avoiding undefined behavior.

2024-08-18  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/gm2.texi (Contributing): Tweak gm2 mailing list address.

2024-08-18  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-match-exports.cc (gimple_match_op::operands_occurs_in_abnormal_phi):
	New function.
	* gimple-match.h (gimple_match_op): Add operands_occurs_in_abnormal_phi.
	* tree-ssa-phiopt.cc (factor_out_conditional_operation): Use gimple_match_op
	instead of manually extracting from/creating the gimple.

2024-08-18  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.md (*add<mode>3_split) [!reload_completed]:
	Add a scratch:QI to 16-bit additions with constant.

2024-08-18  Georg-Johann Lay  <avr@gjlay.de>

	PR target/116407
	* config/avr/avr.md (*dec-and-branchhi!=-1.l.clobber):
	Increase the additional jump offset to 2 words.

2024-08-18  Georg-Johann Lay  <avr@gjlay.de>

	PR target/116407
	* config/avr/avr-protos.h (avr_jump_mode): Add an int argument.
	* config/avr/avr.cc (avr_jump_mode): Add an int argument to increase
	the computed jump offset of backwards branches.
	* config/avr/avr.md (*dec-and-branchhi!=-1, *dec-and-branchsi!=-1):
	Increase the jump offset used by avr_jump_mode() as needed.

2024-08-18  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-fold.cc (mark_lhs_in_seq_for_dce): New function.
	(replace_stmt_with_simplification): Call mark_lhs_in_seq_for_dce
	right before inserting the sequence.
	(fold_stmt_1): Add dce_worklist argument, update call to
	replace_stmt_with_simplification.
	(fold_stmt): Add dce_worklist argument, update call to fold_stmt_1.
	(fold_stmt_inplace): Update call to fold_stmt_1.
	* gimple-fold.h (fold_stmt): Add bitmap argument.
	* tree-ssa-forwprop.cc (pass_forwprop::execute): Update call to fold_stmt.

2024-08-18  Pan Li  <pan2.li@intel.com>

	* config/riscv/iterators.md (ANYI_QUAD_TRUNC): New iterator for
	quad truncation.
	(ANYI_OCT_TRUNC): New iterator for oct truncation.
	(ANYI_QUAD_TRUNCATED): New attr for truncated quad modes.
	(ANYI_OCT_TRUNCATED): New attr for truncated oct modes.
	(anyi_quad_truncated): Ditto but for lower case.
	(anyi_oct_truncated): Ditto but for lower case.
	* config/riscv/riscv.md (ustrunc<mode><anyi_quad_truncated>2):
	Add new pattern for quad truncation.
	(ustrunc<mode><anyi_oct_truncated>2): Ditto but for oct.

2024-08-18  Pan Li  <pan2.li@intel.com>

	PR target/116278
	* config/riscv/riscv.cc (riscv_gen_zero_extend_rtx): Add new
	func impl to zero extend rtx.
	(riscv_expand_usadd): Leverage above func to cleanup operands 0
	and remove the special handing for SImode in RV64.

2024-08-17  Jeff Law  <jlaw@ventanamicro.com>

	* ext-dce.cc (carry_backpropagate): Cast mask to HOST_WIDE_INT before
	shifting.

2024-08-17  Kevin Kirspel  <Kevin-Kirspel@idexx.com>

	* config/riscv/t-rtems: Add ilp32f multilib.

2024-08-17  Jeff Law  <jlaw@ventanamicro.com>

	* config/v850/v850.md (rotlsi3): Allow more cases for V850E3V5+.

2024-08-17  Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/vector.md: Allow scalar operand to be 0.

2024-08-17  Jeff Law  <jlaw@ventanamicro.com>

	PR target/116282
	* config/riscv/riscv-protos.h (riscv_const_insns): Add new argument.
	* config/riscv/riscv.cc (riscv_build_integer): Add new argument
	ALLOW_NEW_PSEUDOS.  Pass it down to recursive calls and check it
	before using synthesis which allows new registers to be created.
	(riscv_split_integer_cost): Pass new argument to riscv_build_integer.
	(riscv_integer_cost): Add ALLOW_NEW_PSEUDOS argument, pass it down to
	riscv_build_integer.
	(riscv_legitimate_constant_p): Pass new argument to riscv_const_insns.
	(riscv_const_insns): New argment ALLOW_NEW_PSEUDOS.  Pass it down to
	riscv_integer_cost and riscv_const_insns.
	(riscv_split_const_insns): Pass new argument to riscv_const_insns.
	(riscv_move_integer, riscv_rtx_costs): Similarly.
	* config/riscv/riscv.md (shadd with costly constant): Pass new argument
	to riscv_const_insns.
	* config/riscv/bitmanip.md (and with costly constant): Pass new argument
	to riscv_const_insns.

2024-08-17  Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/riscv-protos.h (riscv_vector_float_type_p): New.
	* config/riscv/riscv-vector-builtins.cc (function_instance::any_type_float_p):
	Use riscv_vector_float_type_p instead of FLOAT_MODE_P for judgment.
	* config/riscv/riscv.cc (riscv_vector_int_type_p): Change static to extern.

2024-08-17  Pan Li  <pan2.li@intel.com>

	PR target/116280
	* config/riscv/autovec-opt.md: Add quad truncation to
	align the mode requirement for vwsll.

2024-08-17  Feng Wang  <wangfeng@eswincomputing.com>

	* config/riscv/autovec.md (v<bitmanip_optab><mode>3):
	Add new define_expand pattern for vector rotate shift.

2024-08-17  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/gm2.texi (What is GNU Modula-2): Tweak PIM4 link.

2024-08-17  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/gm2.texi (Community): Tweak link to gm2 list archive.

2024-08-17  Georg-Johann Lay  <avr@gjlay.de>

	PR target/116390
	* config/avr/avr.cc (avr_out_movsi_mr_r_reg_disp_tiny): Fix
	output templates for the reg_base == reg_src and
	reg_src == reg_base - 2 cases.

2024-08-17  曾治金  <zhijin.zeng@spacemit.com>

	PR target/116305
	* config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Take
	BYTES_PER_RISCV_VECTOR for *factor instead of riscv_bytes_per_vector_chunk.

2024-08-16  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (enum cv_sym_type): Add S_REGREL32.
	(write_fbreg_variable): New function.
	(write_unoptimized_local_variable): Add fblock parameter, and handle
	DW_OP_fbreg locations.
	(write_unoptimized_function_vars): Add fbloc parameter.
	(write_function): Extract frame base from DWARF.
	* dwarf2out.cc (convert_cfa_to_fb_loc_list): Output simplified frame
	base information for CodeView.

2024-08-16  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (enum cv_sym_type): Add S_REGISTER.
	(enum cv_x86_register): New type.
	(enum cv_amd64_register): New type.
	(dwarf_reg_to_cv): New function.
	(write_s_register): New function.
	(write_unoptimized_local_variable): Handle parameters and DW_OP_reg*
	location types.

2024-08-16  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (enum cv_sym_type): Add S_END and S_BLOCK32.
	(write_local_s_ldata32): New function.
	(write_unoptimized_local_variable): New function.
	(write_s_block32): New function.
	(write_s_end): New function.
	(write_unoptimized_function_vars): New function.
	(write_function): Call write_unoptimized_function_vars.

2024-08-16  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (get_type_num_enumeration_type): Initialize last_type
	to 0.
	(get_type_num_struct): Likewise.

2024-08-16  Georg-Johann Lay  <avr@gjlay.de>

	Backported from master:
	2024-08-16  Georg-Johann Lay  <avr@gjlay.de>

	PR target/85624
	* config/avr/avr.md (*clrmemqi*): Use HImode for alignment operand.

2024-08-16  Lingling Kong  <lingling.kong@intel.com>

	* config/i386/sse.md (vpmadd52<vpmadd52type><mode>):
	Prohibit egpr for vex version.
	(vpdpbusd_<mode>): Ditto.
	(vpdpbusds_<mode>): Ditto.
	(vpdpwssd_<mode>): Ditto.
	(vpdpwssds_<mode>): Ditto.
	(*vcvtneps2bf16_v4sf): Ditto.
	(*vcvtneps2bf16_v8sf): Ditto.
	(vpdp<vpdotprodtype>_<mode>): Ditto.
	(vbcstnebf162ps_<mode>): Ditto.
	(vbcstnesh2ps_<mode>): Ditto.
	(vcvtnee<bf16_ph>2ps_<mode>): Ditto.
	(vcvtneo<bf16_ph>2ps_<mode>): Ditto.
	(vpdp<vpdpwprodtype>_<mode>): Ditto.

2024-08-16  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/113042
	* config/aarch64/aarch64.md (popcount<mode>2): Update pattern
	to support ALLI modes.

2024-08-16  Andrew Pinski  <pinskia@gmail.com>

	* tree-ssa-phiopt.cc (factor_out_conditional_operation): Update
	comment.

2024-08-15  Vineet Gupta  <vineetg@rivosinc.com>

	* config/riscv/riscv.md: define_insn for fclass insn.
	define_expand for isfinite, isnormal, isinf.

2024-08-15  Roger Sayle  <roger@nextmovesoftware.com>
	    Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (*extendv2di2_highpart_stv_noavx512vl): Split
	to an improved implementation on !TARGET_XOP.  On TARGET_XOP, use
	a new pseudo for the intermediate to simplify register allocation.

2024-08-15  Richard Sandiford  <richard.sandiford@arm.com>

	PR middle-end/116236
	* rtlanal.cc (decompose_normal_address): Try to distinguish
	bases and indices based on mode, before resorting to "baseness".

2024-08-15  Richard Sandiford  <richard.sandiford@arm.com>

	PR testsuite/116343
	* recog.h (insn_propagation::apply_to_note): Declare.
	* recog.cc (insn_propagation::apply_to_note): New function.
	* late-combine.cc (insn_combination::substitute_note): Use
	apply_to_note instead of apply_to_rvalue.
	* rtl-ssa/changes.cc (rtl_ssa::changes_are_worthwhile): Improve
	dumping of costs for noop moves.

2024-08-15  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.md (extendsidi2): Add ("=r", "f")
	alternative and use movfr2gr.s for it.  The spec clearly states
	movfr2gr.s sign extends the value to GRLEN.
	(fclass_<fmt>): Make the result SImode instead of a floating
	mode.  The fclass results are really not FP values.
	(FCLASS_MASK): New define_int_iterator.
	(fclass_optab): New define_int_attr.
	(<FCLASS_MASK:fclass_optab><ANYF:mode>): New define_expand
	template.

2024-08-15  liuhongt  <hongtao.liu@intel.com>

	PR target/116274
	* config/i386/i386-expand.cc (ix86_expand_vector_move):
	Restrict special case TImode to 128-bit vector conversions via
	V2DI under ix86_pre_reload_split ().
	* config/i386/i386.cc (inline_secondary_memory_needed):
	Movement between GENERAL_REGS and SSE_REGS for TImode doesn't
	need secondary reload.
	* config/i386/i386.md (*extendsidi2_rex64): Add a
	define_peephole2 after it.

2024-08-15  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/116371
	* config/aarch64/aarch64-sve-builtins-sve2.h (svpext): Rename to...
	(svpext_lane): ...this.
	* config/aarch64/aarch64-sve-builtins-sve2.cc (svpext_impl): Rename
	to...
	(svpext_lane_impl): ...this and update instantiation accordingly.
	* config/aarch64/aarch64-sve-builtins-sve2.def (svpext): Rename to...
	(svpext_lane): ...this.

2024-08-15  Haochen Gui  <guihaoc@gcc.gnu.org>

	* config/rs6000/rs6000.md (floatti<mode>2, floatunsti<mode>2,
	fix_trunc<mode>ti2): Add guard TARGET_FLOAT128_HW.
	* config/rs6000/vsx.md (xsxexpqp_<IEEE128:mode>_<V2DI_DI:mode>,
	xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>, xsiexpqpf_<mode>,
	xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>, xscmpexpqp_<code>_<mode>,
	*xscmpexpqp, xststdcnegqp_<mode>): Replace guard TARGET_P9_VECTOR
	with TARGET_FLOAT128_HW.
	(xststdc_<mode>, *xststdc_<mode>, isinf<mode>2): Add guard
	TARGET_FLOAT128_HW for the IEEE128 modes.

2024-08-15  Haochen Gui  <guihaoc@gcc.gnu.org>

	PR target/97786
	* config/rs6000/vsx.md (isnormal<mode>2): New expand.

2024-08-15  Haochen Gui  <guihaoc@gcc.gnu.org>

	PR target/97786
	* config/rs6000/vsx.md (isfinite<mode>2): New expand.

2024-08-15  Haochen Gui  <guihaoc@gcc.gnu.org>

	PR target/97786
	* config/rs6000/rs6000.md (constant VSX_TEST_DATA_CLASS_NAN,
	VSX_TEST_DATA_CLASS_POS_INF, VSX_TEST_DATA_CLASS_NEG_INF,
	VSX_TEST_DATA_CLASS_POS_ZERO, VSX_TEST_DATA_CLASS_NEG_ZERO,
	VSX_TEST_DATA_CLASS_POS_DENORMAL, VSX_TEST_DATA_CLASS_NEG_DENORMAL):
	Define.
	(mode_attr sdq, vsx_altivec, wa_v, x): Define.
	(mode_iterator IEEE_FP): Define.
	* config/rs6000/vsx.md (isinf<mode>2): New expand.
	(expand xststdcqp_<mode>, xststdc<sd>p): Combine into...
	(expand xststdc_<mode>): ...this.
	(insn *xststdcqp_<mode>, *xststdc<sd>p): Combine into...
	(insn *xststdc_<mode>): ...this.
	* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Rename
	CODE_FOR_xststdcqp_kf as CODE_FOR_xststdc_kf,
	CODE_FOR_xststdcqp_tf as CODE_FOR_xststdc_tf.
	* config/rs6000/rs6000-builtins.def: Rename xststdcdp as xststdc_df,
	xststdcsp as xststdc_sf, xststdcqp_kf as xststdc_kf.

2024-08-15  Haochen Gui  <guihaoc@gcc.gnu.org>

	* gimple-range-op.cc (class cfn_isfinite): New.
	(op_cfn_finite): New variables.
	(gimple_range_op_handler::maybe_builtin_call): Handle
	CFN_BUILT_IN_ISFINITE.
	* value-range.h (class frange): Declear known_isnormal and
	known_isdenormal_or_zero.
	(frange::known_isnormal): Define.
	(frange::known_isdenormal_or_zero): Define.

2024-08-15  Haochen Gui  <guihaoc@gcc.gnu.org>

	* gimple-range-op.cc (class cfn_isfinite): New.
	(op_cfn_finite): New variables.
	(gimple_range_op_handler::maybe_builtin_call): Handle
	CFN_BUILT_IN_ISFINITE.

2024-08-15  Haochen Gui  <guihaoc@gcc.gnu.org>

	PR target/114678
	* gimple-range-op.cc (class cfn_isinf): New.
	(op_cfn_isinf): New variables.
	(gimple_range_op_handler::maybe_builtin_call): Handle
	CASE_FLT_FN (BUILT_IN_ISINF).

2024-08-14  Marek Polacek  <polacek@redhat.com>

	PR c++/116015
	* gimplify.cc (gimplify_arg): Do not strip a TARGET_EXPR whose
	initializer is a CONSTRUCTOR.

2024-08-14  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/vecintrin.h (vec_vstbrh): Remove.
	(vec_vstbrf): Remove.
	(vec_vstbrg): Remove.
	(vec_vstbrq): Remove.
	(vec_vstbrf_flt): Remove.
	(vec_vstbrg_dbl): Remove.
	(vec_vsterb): Remove.
	(vec_vsterh): Remove.
	(vec_vsterf): Remove.
	(vec_vsterg): Remove.
	(vec_vsterf_flt): Remove.
	(vec_vsterg_dbl): Remove.

2024-08-14  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390-builtin-types.def (BT_FN_UV16QI_UV2DI_UV2DI):
	New.
	(BT_FN_UV16QI_UV2DI_UV2DI_UV16QI): New.
	* config/s390/s390-builtins.def (s390_vgfmg_128): New.
	(s390_vgfmag_128): New.
	* config/s390/vecintrin.h (vec_gfmsum_128): Use s390_vgfmg_128.
	(vec_gfmsum_accum_128): Use s390_vgfmag_128.

2024-08-14  Lingling Kong  <lingling.kong@intel.com>

	PR target/113729
	* config/i386/i386.md (*ashlqi3_1_zext<mode><nf_name>):
	New define_insn.
	(*ashlhi3_1_zext<mode><nf_name>): Ditto.
	(*<insn>qi3_1_zext<mode><nf_name>): Ditto.
	(*<insn>hi3_1_zext<mode><nf_name>): Ditto.

2024-08-14  Lingling Kong  <lingling.kong@intel.com>

	PR target/113729
	* config/i386/i386.md (*andqi_1_zext<mode><nf_name>): New
	define_insn.
	(*andhi_1_zext<mode><nf_name>): Ditto.
	(*<code>qi_1_zext<mode><nf_name>): Ditto.
	(*<code>hi_1_zext<mode><nf_name>): Ditto.
	(*negqi_1_zext<mode><nf_name>): Ditto.
	(*neghi_1_zext<mode><nf_name>): Ditto.
	(*one_cmplqi2_1_zext<mode>): Ditto.
	(*one_cmplhi2_1_zext<mode>): Ditto.

2024-08-14  Lingling Kong  <lingling.kong@intel.com>

	PR target/113729
	* config/i386/i386.md (*subqi_1_zext<mode><nf_name>): New
	define_insn.
	(*subhi_1_zext<mode><nf_name>): Ditto.
	(*addqi3_carry_zext<mode>): Ditto.
	(*addhi3_carry_zext<mode>): Ditto.
	(*addqi3_carry_zext<mode>_0): Ditto.
	(*addhi3_carry_zext<mode>_0): Ditto.
	(*addqi3_carry_zext<mode>_0r): Ditto.
	(*addhi3_carry_zext<mode>_0r): Ditto.
	(*subqi3_carry_zext<mode>): Ditto.
	(*subhi3_carry_zext<mode>): Ditto.
	(*subqi3_carry_zext<mode>_0): Ditto.
	(*subhi3_carry_zext<mode>_0): Ditto.
	(*subqi3_carry_zext<mode>_0r): Ditto.
	(*subhi3_carry_zext<mode>_0r): Ditto.

2024-08-14  Lingling Kong  <lingling.kong@intel.com>

	PR target/113729
	* config/i386/i386.md (*addqi_1_zext<mode><nf_name>): New
	define.
	(*addhi_1_zext<mode><nf_name>): Ditto.

2024-08-14  Xianmiao Qu  <cooper.qu@linux.alibaba.com>

	* genoutput.cc (struct operand_data): Add member 'eq_next' to
	point to the next member with the same hash value in the
	hash table.
	(compare_operands): Move the comparison of the mode to the very
	beginning to accelerate the comparison of the two operands.
	(struct operand_data_hasher): New, a class that takes into account
	the necessary elements for comparing the equality of two operands
	in its hash value.
	(operand_data_hasher::hash): New.
	(operand_data_hasher::equal): New.
	(operand_datas): New, hash table of konwn pattern operands.
	(place_operands): Use a hash table instead of traversing the array
	to find the same operand.
	(main): Add initialization of the hash table 'operand_datas'.

2024-08-14  Jeff Law  <jlaw@ventanamicro.com>

	Revert:
	2024-08-12  Jeff Law  <jlaw@ventanamicro.com>

	* rtlanal.cc (subreg_regno): Update comment.
	* final.cc (alter_subrg): Always use REGNO (SUBREG_REG ()) to get
	the base regsiter for paradoxical subregs.

2024-08-14  liuhongt  <hongtao.liu@intel.com>

	PR target/116174
	* config/i386/i386.cc (ix86_align_loops): Move this to ..
	* config/i386/i386-features.cc (ix86_align_loops): .. here.
	(class pass_align_tight_loops): New class.
	(make_pass_align_tight_loops): New function.
	* config/i386/i386-passes.def: Insert pass_align_tight_loops
	after pass_insert_endbr_and_patchable_area.
	* config/i386/i386-protos.h (make_pass_align_tight_loops): New
	declare.

2024-08-13  Manolis Tsamis  <manolis.tsamis@vrull.eu>

	PR tree-optimization/116353
	* ifcvt.cc (bb_ok_for_noce_convert_multiple_sets): Check
	noce_can_force_operand.

2024-08-13  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/riscv-v.cc (legitimize_move): extrac -> extract.
	(expand_vec_cmp_float): Remove duplicate vmnor.mm.
	* config/riscv/riscv-vector-builtins.cc: ins -> insns.
	* config/riscv/riscv.cc (riscv_init_machine_status): mwrvv -> mrvv.
	* config/riscv/vector-iterators.md: RVVM8QImde -> RVVM8QImode
	* config/riscv/vector.md: Replaced non-existant vsetivl with vsetivli.

2024-08-13  Pan Li  <pan2.li@intel.com>

	PR target/116103
	* internal-fn.cc (type_strictly_matches_mode_p): Add handling
	for vector bool type.

2024-08-13  Kewen Lin  <linkw@linux.ibm.com>

	PR rtl-optimization/116170
	* lra-constraints.cc (curr_insn_transform): Don't emit move back to
	old operand if it's CONSTANT_P.

2024-08-13  Mark Wielaard  <mark@klomp.org>

	* config/avr/avr.opt.urls: Regenerate.

2024-08-12  Peter Bergner  <bergner@linux.ibm.com>

	PR target/114759
	* config/rs6000/rs6000.cc (rs6000_override_options_after_change): Move
	the disabling of shrink-wrapping from here....
	* config/rs6000/rs6000-logue.cc (rs6000_emit_prologue): ...to here.

2024-08-12  Jeff Law  <jlaw@ventanamicro.com>

	* rtlanal.cc (subreg_regno): Update comment.
	* final.cc (alter_subrg): Always use REGNO (SUBREG_REG ()) to get
	the base regsiter for paradoxical subregs.

2024-08-12  Manolis Tsamis  <manolis.tsamis@vrull.eu>

	* ifcvt.cc (need_cmov_or_rewire): Renamed init_noce_multiple_sets_info.
	(init_noce_multiple_sets_info): Initialize noce_multiple_sets_info.
	(noce_convert_multiple_sets_1): Use noce_multiple_sets_info and handle
	rewiring of multiple registers.
	(noce_convert_multiple_sets): Updated to use noce_multiple_sets_info.
	* ifcvt.h (struct noce_multiple_sets_info): Introduce new struct
	noce_multiple_sets_info to store info for noce_convert_multiple_sets.

2024-08-12  Manolis Tsamis  <manolis.tsamis@vrull.eu>

	* ifcvt.cc (try_emit_cmove_seq): Modify comments.
	(noce_convert_multiple_sets_1): Modify comments.
	(bb_ok_for_noce_convert_multiple_sets): Allow more operations.

2024-08-12  Manolis Tsamis  <manolis.tsamis@vrull.eu>

	* ifcvt.cc (check_for_cc_cmp_clobbers): Use modified_in_p instead.
	(noce_convert_multiple_sets_1): Don't use seq2 if it clobbers cc_cmp.
	Punt if seq clobbers cond. Refactor the code that sets read_comparison.

2024-08-12  Georg-Johann Lay  <avr@gjlay.de>

	PR target/85624
	* config/avr/avr.md (setmemhi): Set alignment to 0.

2024-08-12  Joern Rennecke  <joern.rennecke@riscy-ip.com>

	* except.cc (sjlj_emit_function_enter):
	Set fn_begin_outside_block again if encountering a jump instruction.

2024-08-12  Richard Sandiford  <richard.sandiford@arm.com>

	PR other/30920
	* splay-tree-utils.h (rooted_splay_tree::insert_relative)
	(rooted_splay_tree::lookup_le): New functions.
	(rooted_splay_tree::remove_root_and_splay_next): Likewise.
	* splay-tree-utils.tcc (rooted_splay_tree::insert_relative): New
	function, extracted from...
	(rooted_splay_tree::insert): ...here.
	(rooted_splay_tree::lookup_le): New function.
	(rooted_splay_tree::remove_root_and_splay_next): Likewise.
	* tree-ssa-sccvn.cc (pd_range::m_children): New member variable.
	(vn_walk_cb_data::vn_walk_cb_data): Initialize first_range.
	(vn_walk_cb_data::known_ranges): Use a default_splay_tree.
	(vn_walk_cb_data::~vn_walk_cb_data): Remove freeing of known_ranges.
	(pd_range_compare, pd_range_alloc, pd_range_dealloc): Delete.
	(vn_walk_cb_data::push_partial_def): Rewrite splay tree operations
	to use splay-tree-utils.h.
	* rtl-ssa/accesses.cc (function_info::add_use): Use insert_relative.

2024-08-12  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* config/aarch64/aarch64-simd.md
	(aarch64_simd_imm_shl<mode><vczle><vczbe>): Rewrite to new
	syntax.  Add =w,w,vs1 alternative.
	* config/aarch64/constraints.md (vs1): New constraint.

2024-08-12  Haochen Jiang  <haochen.jiang@intel.com>

	* common/config/i386/cpuinfo.h (get_available_features): Handle
	avx10.2.
	* common/config/i386/i386-common.cc
	(OPTION_MASK_ISA2_AVX10_2_256_SET): New.
	(OPTION_MASK_ISA2_AVX10_2_512_SET): Ditto.
	(OPTION_MASK_ISA2_AVX10_1_256_UNSET):
	Add OPTION_MASK_ISA2_AVX10_2_256_UNSET.
	(OPTION_MASK_ISA2_AVX10_1_512_UNSET):
	Add OPTION_MASK_ISA2_AVX10_2_512_UNSET.
	(OPTION_MASK_ISA2_AVX10_2_256_UNSET): New.
	(OPTION_MASK_ISA2_AVX10_2_512_UNSET): Ditto.
	(ix86_handle_option): Handle avx10.2-256 and avx10.2-512.
	* common/config/i386/i386-cpuinfo.h (enum processor_features):
	Add FEATURE_AVX10_2_256 and FEATURE_AVX10_2_512.
	* common/config/i386/i386-isas.h: Add ISA_NAMES_TABLE_ENTRY for
	avx10.2-256 and avx10.2-512.
	* config/i386/i386-c.cc (ix86_target_macros_internal): Define
	__AVX10_2_256__ and __AVX10_2_512__.
	* config/i386/i386-isa.def (AVX10_2): Add DEF_PTA(AVX10_2_256)
	and DEF_PTA(AVX10_2_512).
	* config/i386/i386-options.cc (isa2_opts): Add -mavx10.2-256 and
	-mavx10.2-512.
	(ix86_valid_target_attribute_inner_p): Handle avx10.2-256 and
	avx10.2-512.
	* config/i386/i386.opt: Add option -mavx10.2, -mavx10.2-256 and
	-mavx10.2-512.
	* config/i386/i386.opt.urls: Regenerated.
	* doc/extend.texi: Document avx10.2, avx10.2-256 and avx10.2-512.
	* doc/invoke.texi: Document -mavx10.2, -mavx10.2-256 and
	-mavx10.2-512.
	* doc/sourcebuild.texi: Document target avx10.2, avx10.2-256,
	avx10.2-512.

2024-08-12  Roger Sayle  <roger@nextmovesoftware.com>

	PR target/116275
	* config/i386/i386.md (*extendv2di2_highpart_stv_noavx512vl): New
	define_insn_and_split to handle the STV conversion of the DImode
	pattern *extendsi2_doubleword_highpart.

2024-08-12  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch.md (insn): Added rotatert rotr pairs.
	* config/loongarch/simd.md (rotr<mode>3): Remove to ...
	(<optab><mode>3): This.

2024-08-12  Lulu Cheng  <chenglulu@loongson.cn>

	PR target/114189
	* config/loongarch/lasx.md (vcondu<LASX:mode><ILASX:mode>): Delete.
	(vcond<LASX:mode><LASX_2:mode>): Likewise.
	* config/loongarch/lsx.md (vcondu<LSX:mode><ILSX:mode>): Likewise.
	(vcond<LSX:mode><LSX_2:mode>): Likewise.

2024-08-12  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/lasx.md (xvandn<mode>3): Rename to ...
	(andn<mode>3): This.
	(xvorn<mode>3): Rename to ...
	(iorn<mode>3): This.
	* config/loongarch/loongarch-builtins.cc
	(CODE_FOR_lsx_vandn_v): Defined as the modified name.
	(CODE_FOR_lsx_vorn_v): Likewise.
	(CODE_FOR_lasx_xvandn_v): Likewise.
	(CODE_FOR_lasx_xvorn_v): Likewise.
	(loongarch_expand_builtin_insn): When the builtin function to be
	called is __builtin_lasx_xvandn or __builtin_lsx_vandn, swap the
	two operands.
	* config/loongarch/loongarch.md (<optab>n<mode>): Rename to ...
	(<optab>n<mode>3): This.
	* config/loongarch/lsx.md (vandn<mode>3): Rename to ...
	(andn<mode>3): This.
	(vorn<mode>3): Rename to ...
	(iorn<mode>3): This.

2024-08-11  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.opt (mlra): Set Undocumented flag.

2024-08-11  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (ra_in_progress): New static function.
	(avr_legitimate_address_p, avr_addr_space_legitimate_address_p)
	(extra_constraint_Q): Use it with -mlog=.

2024-08-10  Andi Kleen  <ak@gcc.gnu.org>

	* doc/cfg.texi: Fix references to dom_walker.

2024-08-10  Georg-Johann Lay  <avr@gjlay.de>

	PR target/113934
	* config/avr/avr.opt (-mlra): New target option.
	* config/avr/avr.cc (avr_use_lra_p): New function.
	(TARGET_LRA_P): Use it.
	(avr_hard_regno_mode_ok) [lra]: Don't disallow 4-byte modes for X.

2024-08-09  Jeff Law  <jlaw@ventanamicro.com>

	PR target/116283
	* config/riscv/bitmanip.md (Zbs combiner patterns/splitters): Mask the
	bit position in the split code appropriately.

2024-08-09  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Revert:
	2024-08-08  Surya Kumari Jangala  <jskumari@linux.ibm.com>

	PR rtl-optimization/116028
	* lra-constraints.cc (split_reg): Spill register before call
	insn.
	(latest_call_insn): New variable.
	(inherit_in_ebb): Track the latest call insn.

2024-08-09  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/114855
	* gimple-range-gori.cc (gori_compute::gori_compute): Adjust
	ranger_recompute_depth limit based on the number of BBs.
	(gori_compute::may_recompute_p): Use previosuly calculated value.
	* gimple-range-gori.h (gori_compute::m_recompute_depth): New.

2024-08-09  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/114855
	* gimple-range-cache.cc (ranger_cache::fill_block_cache): Do not
	process equivalencies if the number of blocks is too high.

2024-08-09  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_compute_frame_info): Update
	outgoing args size.
	(riscv_stack_clash_protection_alloca_probe_range): New.
	(TARGET_STACK_CLASH_PROTECTION_ALLOCA_PROBE_RANGE): New.
	* config/riscv/riscv.h
	(STACK_CLASH_MIN_BYTES_OUTGOING_ARGS): New.
	(STACK_DYNAMIC_OFFSET): New.

2024-08-09  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>

	* config/riscv/riscv.cc
	(riscv_allocate_and_probe_stack_loop): New function.
	(riscv_v_adjust_scalable_frame): Add stack-clash protection
	support.
	(riscv_allocate_and_probe_stack_space): Move the probe loop
	implementation to riscv_allocate_and_probe_stack_loop.
	* config/riscv/riscv.h: Define RISCV_STACK_CLASH_VECTOR_CFA_REGNUM.

2024-08-09  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>

	* config/riscv/riscv.cc
	(riscv_option_override): Enforce that interval is the same size as
	guard size.
	(riscv_allocate_and_probe_stack_space): New function.
	(riscv_expand_prologue): Call riscv_allocate_and_probe_stack_space
	to the final allocation of the stack and add stack-clash dump
	information.
	* config/riscv/riscv.h: Define STACK_CLASH_CALLER_GUARD and
	STACK_CLASH_MAX_UNROLL_PAGES.

2024-08-09  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_v_adjust_scalable_frame): Move
	closer to riscv_expand_prologue.

2024-08-09  Raphael Moreira Zinsly  <rzinsly@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_emit_stack_tie): Pass the
	register to be tied to the stack pointer as argument.
	* config/riscv/riscv.md (stack_tie<mode>): Don't match equal
	operands.

2024-08-09  Jakub Jelinek  <jakub@redhat.com>

	PR target/116287
	* config/i386/i386.cc (ix86_fold_builtin) <case IX86_BUILTIN_BEXTR32>:
	When folding into zero without checking whether first argument is
	constant, use omit_one_operand.
	(ix86_fold_builtin) <case IX86_BUILTIN_BZHI32>: Likewise.

2024-08-09  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn.cc (gcn_asm_trampoline_template): Add .align.
	* config/gcn/gcn.h (TRAMPOLINE_SIZE): Increase to 40.

2024-08-09  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.md (*load_<mode>_libgcc, *xload_<mode>_libgcc):
	Tidy up code.

2024-08-09  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* config/aarch64/constraints.md (Dm): Match CONSTM1_RTX rather
	CONST1_RTX.

2024-08-08  Tamar Christina  <tamar.christina@arm.com>

	PR target/116229
	* config/aarch64/aarch64-simd.md (aarch64_fnegv2di2<vczle><vczbe>): New.
	* config/aarch64/aarch64.cc (aarch64_maybe_generate_simd_constant):
	Update call to gen_aarch64_fnegv2di2.
	* config/aarch64/iterators.md: New UNSPEC_FNEG.

2024-08-08  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (Mem_Insn::Mem_Insn): Don't consider MEMs
	that are avr_mem_memx_p or avr_load_libgcc_p.

2024-08-08  Georg-Johann Lay  <avr@gjlay.de>

	* doc/extend.texi (AVR Built-in Functions) <mask1>: Fix a typo.

2024-08-08  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (avr_insn_has_reg_unused_note_p): New function.
	(_reg_unused_after): Use it to recognize more cases.
	(avr_out_lpm_no_lpmx) [POST_INC]: Use reg_unused_after.

2024-08-08  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn.cc (gcn_conditional_register_usage): Fix registers
	remaining after maximum allocation using TARGET_VGPR_GRANULARITY.

2024-08-08  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/constraints.md (th_m_noi): New constraint.
	* config/riscv/riscv.md: Adjust movdf_hardfloat_rv32 for
	XTheadMemIdx.

2024-08-08  Christoph Müllner  <christoph.muellner@vrull.eu>

	PR target/116131
	* config/riscv/thead.cc (th_memidx_classify_address_index):
	Recognize all possible XTheadMemIdx memory operand structures.
	(th_fmemidx_output_index): Do strict classification.
	* config/riscv/thead.md (*th_memidx_operand): Remove.
	(TARGET_XTHEADMEMIDX): Likewise.
	(TARGET_HARD_FLOAT && TARGET_XTHEADFMEMIDX): Likewise.
	(!TARGET_64BIT && TARGET_XTHEADMEMIDX): Likewise.
	(*th_memidx_I_a): Likewise.
	(*th_memidx_I_b): Likewise.
	(*th_memidx_I_c): Likewise.
	(*th_memidx_US_a): Likewise.
	(*th_memidx_US_b): Likewise.
	(*th_memidx_US_c): Likewise.
	(*th_memidx_UZ_a): Likewise.
	(*th_memidx_UZ_b): Likewise.
	(*th_memidx_UZ_c): Likewise.
	(*th_fmemidx_movsf_hardfloat): Likewise.
	(*th_fmemidx_movdf_hardfloat_rv64): Likewise.
	(*th_fmemidx_I_a): Likewise.
	(*th_fmemidx_I_c): Likewise.
	(*th_fmemidx_US_a): Likewise.
	(*th_fmemidx_US_c): Likewise.
	(*th_fmemidx_UZ_a): Likewise.
	(*th_fmemidx_UZ_c): Likewise.

2024-08-08  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-vect-patterns.cc (NUM_PATTERNS): Delete.
	(vect_pattern_recog_1): Constify and change
	recog_func to a reference.
	(vect_pattern_recog): Use range-based loop over
	vect_vect_recog_func_ptrs.

2024-08-08  Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/riscv.h (RISCV_DWARF_VLENB): Delete.

2024-08-08  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn.cc (gcn_trampoline_init): Re-enable trampolines.

2024-08-08  Jeff Law  <jlaw@ventanamicro.com>

	PR target/116240
	* config/riscv/riscv.cc (riscv_rtx_costs): Ensure object is a
	comparison before looking at its arguments.

2024-08-08  Manolis Tsamis  <manolis.tsamis@vrull.eu>

	PR tree-optimization/98138
	* tree-vect-slp.cc: Avoid duplicates in two_operators nodes.

2024-08-08  Roger Sayle  <roger@nextmovesoftware.com>

	* config/i386/i386.cc (ix86_mode_can_transfer_bits): Use E_?Fmode
	enumeration constants in switch statement.

2024-08-08  Surya Kumari Jangala  <jskumari@linux.ibm.com>

	PR rtl-optimization/116028
	* lra-constraints.cc (split_reg): Spill register before call
	insn.
	(latest_call_insn): New variable.
	(inherit_in_ebb): Track the latest call insn.

2024-08-08  Jiawei  <jiawei@iscas.ac.cn>

	* common/config/riscv/riscv-common.cc: New extension.
	* config/riscv/riscv.opt: New mask.

2024-08-07  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/116237
	* config/darwin.h (SUBTARGET_DRIVER_SELF_SPECS): Add a spec for
	weak_framework.
	* config/darwin.opt: Handle weak_framework driver option.

2024-08-07  Prathamesh Kulkarni  <prathameshk@nvidia.com>

	PR ipa/96265
	PR ipa/111937
	* data-streamer-in.cc (streamer_read_poly_uint64): Remove code for
	streaming, and call poly_int_read_common instead.
	(streamer_read_poly_int64): Likewise.
	* data-streamer.cc (host_num_poly_int_coeffs): Conditionally define
	new variable if ACCEL_COMPILER is defined.
	* data-streamer.h (host_num_poly_int_coeffs): Declare.
	(poly_int_read_common): New function template.
	(bp_unpack_poly_value): Remove code for streaming and call
	poly_int_read_common instead.
	* lto-streamer-in.cc (lto_input_mode_table): Stream-in host
	NUM_POLY_INT_COEFFS into host_num_poly_int_coeffs if ACCEL_COMPILER
	is defined.
	* lto-streamer-out.cc (lto_write_mode_table): Stream out
	NUM_POLY_INT_COEFFS if offloading is enabled.
	* poly-int.h (MAX_NUM_POLY_INT_COEFFS_BITS): New macro.
	* tree-streamer-in.cc (lto_input_ts_poly_tree_pointers): Adjust
	streaming-in of poly_int.

2024-08-07  Jakub Jelinek  <jakub@redhat.com>

	PR c++/116219
	* gimple-expr.cc (remove_suffix): Formatting fixes.
	(create_tmp_var_name): Don't call clean_symbol_name.
	* gimplify.cc (gimplify_init_constructor): When promoting automatic
	DECL_NAMELESS vars to static, don't preserve their DECL_NAME.

2024-08-07  Julian Brown  <julian@codesourcery.com>
	    Tobias Burnus  <tobias@baylibre.com>

	* builtins.def (DEF_GOMP_BUILTIN_COMPILER): Define
	DEF_GOMP_BUILTIN_COMPILER to handle the non-prefix version.
	* gimple-fold.cc (gimple_fold_builtin_omp_is_initial_device): New.
	(gimple_fold_builtin): Call it.
	* omp-builtins.def (BUILT_IN_OMP_IS_INITIAL_DEVICE): Define.
	* tree.cc (get_file_function_name): Support names for on-target
	constructor/destructor functions.

2024-08-07  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/altivec.md (vs<SLDB_lr>db_<mode>): Change
	define_insn iterator to VEC_IC.
	* config/rs6000/rs6000-builtins.def (__builtin_altivec_vsldoi_v1ti,
	__builtin_vsx_xxsldwi_v1ti, __builtin_altivec_vsldb_v1ti,
	__builtin_altivec_vsrdb_v1ti): New builtin definitions.
	* config/rs6000/rs6000-overload.def (vec_sld, vec_sldb, vec_sldw,
	vec_sll, vec_slo, vec_srdb, vec_srl, vec_sro): New overloaded
	definitions.
	* doc/extend.texi (vec_sld, vec_sldb, vec_sldw, vec_sll, vec_slo,
	vec_srdb, vec_srl, vec_sro): Add documentation for new overloaded
	built-ins.

2024-08-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116258
	* tree-vect-generic.cc (expand_vector_operations_1): Do not
	lower PAREN_EXPR.

2024-08-07  Xi Ruoyao  <xry111@xry111.site>
	    Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116142
	* tree-vect-stmts.cc (supportable_widening_operation): Remove an
	redundant and incorrect vect_reduction_def check, and fix the
	operand of another vect_reduction_def check.

2024-08-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116166
	* tree-ssa-threadedge.h (jump_threader::thread_around_empty_blocks):
	Add limit parameter.
	(jump_threader::thread_through_normal_block): Likewise.
	* tree-ssa-threadedge.cc (jump_threader::thread_around_empty_blocks):
	Honor and decrement limit parameter.
	(jump_threader::thread_through_normal_block): Likewise.
	(jump_threader::thread_across_edge): Initialize limit from
	param_max_jump_thread_paths and pass it down to workers.

2024-08-07  Pan Li  <pan2.li@intel.com>

	PR target/116202
	* tree-vect-patterns.cc (vect_recog_sat_trunc_pattern): Add the
	type_has_mode_precision_p check for the lhs type.

2024-08-07  Patrick Palka  <ppalka@redhat.com>

	PR c++/116064
	* diagnostic.cc (diagnostic_context::initialize): Set
	m_adjust_diagnostic_info.
	(diagnostic_context::report_diagnostic): Call
	m_adjust_diagnostic_info.
	* diagnostic.h (diagnostic_context::m_adjust_diagnostic_info):
	New data member.
	* doc/invoke.texi (-Wno-template-body): Document.
	(-fpermissive): Mention -Wtemplate-body.

2024-08-06  David Malcolm  <dmalcolm@redhat.com>

	PR other/116177
	* diagnostic-format-sarif.cc (sarif_invocation::prepare_to_flush):
	If the diagnostics would lead to us exiting with a failure code,
	then emit "executionSuccessful": False (SARIF v2.1.0 section
	§3.20.14).
	* diagnostic.cc (diagnostic_context::execution_failed_p): New.
	* diagnostic.h (diagnostic_context::execution_failed_p): New decl.
	* toplev.cc (toplev::main): Use it for determining returned value.

2024-08-06  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-protos.h (struct sve_vec_cost): Add
	gather_load_x32_init_cost and gather_load_x64_init_cost.
	* config/aarch64/aarch64.cc (aarch64_vector_costs): Add
	m_sve_gather_scatter_init_cost.
	(aarch64_vector_costs::add_stmt_cost): Use them.
	(aarch64_vector_costs::finish_cost): Likewise.
	* config/aarch64/tuning_models/a64fx.h: Update.
	* config/aarch64/tuning_models/cortexx925.h: Update.
	* config/aarch64/tuning_models/generic.h: Update.
	* config/aarch64/tuning_models/generic_armv8_a.h: Update.
	* config/aarch64/tuning_models/generic_armv9_a.h: Update.
	* config/aarch64/tuning_models/neoverse512tvb.h: Update.
	* config/aarch64/tuning_models/neoversen2.h: Update.
	* config/aarch64/tuning_models/neoversen3.h: Update.
	* config/aarch64/tuning_models/neoversev1.h: Update.
	* config/aarch64/tuning_models/neoversev2.h: Update.
	* config/aarch64/tuning_models/neoversev3.h: Update.
	* config/aarch64/tuning_models/neoversev3ae.h: Update.

2024-08-06  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/gm2.texi (Limitations): Rephrase. Remove invalid link.

2024-08-06  John David Anglin  <danglin@gcc.gnu.org>

	PR target/113384
	* config/pa/pa.cc (hppa_legitimize_address): Add check to
	ensure constant is an integral multiple of shift the value.

2024-08-06  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/riscv-target-attr.cc (num_occurences_in_str): Rename...
	(num_occurrences_in_str): here.
	(riscv_process_target_attr): Update num_occurences_in_str callsite.
	* config/riscv/riscv-v.cc (emit_vec_widden_cvt_x_f): widden -> widen.
	(emit_vec_widen_cvt_x_f): Ditto.
	(emit_vec_widden_cvt_f_f): Ditto.
	(emit_vec_widen_cvt_f_f): Ditto.
	(emit_vec_rounding_to_integer): Update *widden* callsites.
	* config/riscv/riscv-vector-builtins.cc (expand_builtin): Update
	required_ext_to_isa_name callsite and fix xtheadvector typo.
	* config/riscv/riscv-vector-builtins.h (reqired_ext_to_isa_name): Rename...
	(required_ext_to_isa_name): here.
	* config/riscv/riscv_th_vector.h: Fix endif label.
	* config/riscv/vector-crypto.md: boardcast_scalar -> broadcast_scalar.
	* config/riscv/vector.md: Ditto.

2024-08-06  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/arch-canonicalize: Fix typos in comments.
	* config/riscv/autovec.md: Ditto.
	* config/riscv/riscv-avlprop.cc (avl_can_be_propagated_p): Ditto.
	(pass_avlprop::get_vlmax_ta_preferred_avl): Ditto.
	* config/riscv/riscv-modes.def (ADJUST_FLOAT_FORMAT): Ditto.
	(VLS_MODES): Ditto.
	* config/riscv/riscv-opts.h (TARGET_ZICOND_LIKE): Ditto.
	(enum rvv_vector_bits_enum): Ditto.
	* config/riscv/riscv-protos.h (enum insn_flags): Ditto.
	(enum insn_type): Ditto.
	* config/riscv/riscv-sr.cc (riscv_sr_match_epilogue): Ditto.
	* config/riscv/riscv-string.cc (expand_block_move): Ditto.
	* config/riscv/riscv-v.cc (rvv_builder::is_repeating_sequence): Ditto.
	(rvv_builder::single_step_npatterns_p): Ditto.
	(calculate_ratio): Ditto.
	(expand_const_vector): Ditto.
	(shuffle_merge_patterns): Ditto.
	(shuffle_compress_patterns): Ditto.
	(expand_select_vl): Ditto.
	* config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
	* config/riscv/riscv-vector-builtins.cc (function_builder::add_function): Ditto.
	(resolve_overloaded_builtin): Ditto.
	* config/riscv/riscv-vector-builtins.def (vbool1_t): Ditto.
	(vuint8m8_t): Ditto.
	(vuint16m8_t): Ditto.
	(vfloat16m8_t): Ditto.
	(unsigned_vector): Ditto.
	* config/riscv/riscv-vector-builtins.h (enum required_ext): Ditto.
	* config/riscv/riscv-vector-costs.cc (get_store_value): Ditto.
	(costs::analyze_loop_vinfo): Ditto.
	(costs::add_stmt_cost): Ditto.
	* config/riscv/riscv.cc (riscv_build_integer): Ditto.
	(riscv_vector_type_p): Ditto.
	* config/riscv/thead.cc (th_mempair_output_move): Ditto.
	* config/riscv/thead.md: Ditto.
	* config/riscv/vector-iterators.md: Ditto.
	* config/riscv/vector.md: Ditto.
	* config/riscv/zc.md: Ditto.

2024-08-06  Roger Sayle  <roger@nextmovesoftware.com>

	* config/i386/i386-expand.cc (ix86_expand_v2di_ashiftrt): New
	function refactored from define_expand ashrv2di3.
	* config/i386/i386-features.cc (general_scalar_to_vector_candidate_p)
	<case ASHIFTRT>: Handle like other shifts and rotates.
	* config/i386/i386-protos.h (ix86_expand_v2di_ashiftrt): Prototype.
	* config/i386/sse.md (ashrv2di3): Call ix86_expand_v2di_ashiftrt.
	(*ashrv2di3): New define_insn_and_split to enable creation by stv2
	pass, and splitting during split1 reusing ix86_expand_v2di_ashiftrt.

2024-08-06  Patrick O'Neill  <patrick@rivosinc.com>
	    Jakub Jelinek  <jakub@redhat.com>

	PR target/116152
	* config/riscv/riscv.cc (riscv_option_override): Fix url
	formatting.

2024-08-06  Filip Kastl  <fkastl@suse.cz>

	* gimple-ssa-sccopy.cc (class scc_copy_prop): New class.
	(replace_scc_by_value): Put into...
	(scc_copy_prop::replace_scc_by_value): ...scc_copy_prop.
	(sccopy_visit_op): Put into...
	(scc_copy_prop::visit_op): ...scc_copy_prop.
	(sccopy_propagate): Put into...
	(scc_copy_prop::propagate): ...scc_copy_prop.
	(init_sccopy): Replace by...
	(scc_copy_prop::scc_copy_prop): ...the construtor.
	(finalize_sccopy): Replace by...
	(scc_copy_prop::~scc_copy_prop): ...the destructor.
	(pass_sccopy::execute): Use scc_copy_prop.

2024-08-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116241
	* tree-vect-loop.cc (vect_create_epilog_for_reduction): Handle
	non-COND_EXPR nodes in SLP reduction chain following.

2024-08-06  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/116224
	* wide-int.cc (wi::mul_internal): If prec isn't multiple of
	HOST_BITS_PER_WIDE_INT, for need_overflow checking only look at
	the least significant prec bits starting with r[half_blocks_needed].

2024-08-06  Richard Biener  <rguenther@suse.de>

	PR middle-end/111821
	* expmed.cc (store_integral_bit_field): Terminate the
	word-wise copy loop when we get out of the destination
	and do a forward copy.  Skip the word if it would be
	outside of the destination in case of a backward copy.

2024-08-06  Haochen Gui  <guihaoc@gcc.gnu.org>

	* config/rs6000/predicates.md (any_operand): Add const_vector.

2024-08-06  Feng Xue  <fxue@os.amperecomputing.com>

	PR tree-optimization/115228
	* tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Add
	missed opcodes that involve widening operation.

2024-08-06  Feng Xue  <fxue@os.amperecomputing.com>

	PR tree-optimization/115707
	* tree-vect-patterns.cc (vect_look_through_possible_promotion): Allow
	unsigned-to-signed promotion.

2024-08-06  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/116189
	* config/sh/sh.cc (sh_recog_treg_set_expr): Don't call make_insn_raw,
	make the insn with a fake uid.

2024-08-05  Patrick O'Neill  <patrick@rivosinc.com>

	PR target/116152
	* config/riscv/riscv.cc (riscv_option_override): Add deprecation
	warning.

2024-08-05  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (get_type_num_const_type): Handle missing
	DW_AT_type attribute.
	(get_type_num_volatile_type): Likewise.

2024-08-05  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/bpf/atomic.md ("atomic_add<AMO:mode>"): Remove insn.
	("atomic_and<AMO:mode>"): Likewise
	("atomic_or<AMO:mode>"): Likewise.
	("atomic_xor<AMO:mode>"): Likewise.

2024-08-05  Jennifer Schmitz  <jschmitz@nvidia.com>

	* config/aarch64/aarch64.md (*and<mode>_compare0): Change attribute.

2024-08-05  Filip Kastl  <fkastl@suse.cz>

	* gimple-ssa-sccopy.cc: Move a misplaced comment.

2024-08-05  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR tree-optimization/116139
	* tree-ssa-reassoc.cc (get_reassociation_width): Move width_mult
	<= width comparison to if condition rather than assert.

2024-08-05  Richard Sandiford  <richard.sandiford@arm.com>

	Revert:
	2024-08-02  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/116145
	* rtlanal.cc (may_trap_p_1): Trust MEM_NOTRAP_P even for code
	movement if MEM_READONLY_P is also true.

2024-08-05  Alex Coplan  <alex.coplan@arm.com>

	* gdbhooks.py: Add attempted call to "on-gcc-hooks-load" once
	we've finished loading the hooks.

2024-08-05  Alex Coplan  <alex.coplan@arm.com>

	* gdbhooks.py (GCCDotCmd): New.
	(gcc_dot_cmd): New. Use it ...
	(DotFn.invoke): ... here.

2024-08-05  Andrew Pinski  <quic_apinski@quicinc.com>

	PR rtl-optimization/116179
	* ira.cc (split_live_ranges_for_shrink_wrap): For the uses loop,
	only look at non-debug insns.

2024-08-04  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/116199
	* reload.cc (operands_match_p): Verify subreg is expressable before
	trying to simplify and match it to another operand.

2024-08-02  Marek Polacek  <polacek@redhat.com>

	* doc/invoke.texi: Document that -Wdangling-reference is
	enabled by -Wextra.

2024-08-02  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/116058
	* genemit.cc (struct clobber_pat): Change pattern to be rtvec.
	Add code field.
	(gen_insn): Look through an explicit parallel if there was one.
	Update store to new clobber_pat.
	(output_add_clobbers): Update call to gen_exp for the changed
	clobber_pat.

2024-08-02  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/sync-rvwmo.md: Add conditional length attributes.
	* config/riscv/sync-ztso.md: Ditto.
	* config/riscv/sync.md: Fix incorrect insn length attributes and
	reformat existing conditional checks.

2024-08-02  Jennifer Schmitz  <jschmitz@nvidia.com>

	* config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Implement
	fusion logic.
	* config/aarch64/aarch64-fusion-pairs.def (cmp+csel): New entry.
	(cmp+cset): Likewise.
	* config/aarch64/tuning_models/neoversev2.h: Enable logic in
	field fusible_ops.

2024-08-02  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/116145
	* rtlanal.cc (may_trap_p_1): Trust MEM_NOTRAP_P even for code
	movement if MEM_READONLY_P is also true.

2024-08-02  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/116156
	* tree-ssa-forwprop.cc (pass_forwprop::execute): Don't add
	uses if the statement was a debug statement.

2024-08-02  Lingling Kong  <lingling.kong@intel.com>

	* config/i386/constraints.md: Fixed the comment/naming for je/jM/jO.
	* config/i386/predicates.md (apx_ndd_memory_operand): Renamed and
	fixed the comment.
	(apx_evex_memory_operand): New name.
	(apx_ndd_add_memory_operand): Ditto.
	(apx_evex_add_memory_operand): Ditto.

2024-08-02  Lingling Kong  <lingling.kong@intel.com>

	* config/i386/i386.md (nf_mem_constraint): Fixed the constraint
	for the define_subst_attr.
	(nf_mem_constraint): Added new define_subst_attr.
	(*add<mode>_1<nf_name>): Fixed the constraint.

2024-08-02  Yang Yujie  <yangyujie@loongson.cn>

	* config/loongarch/genopts/gen-evolution.awk: Do not use
	"length()" to compute the size of an array.

2024-08-02  Pengxuan Zheng  <quic_pzheng@quicinc.com>

	PR target/113860
	* config/aarch64/aarch64-simd.md (popcount<mode>2): Add TARGET_SVE
	support.
	* config/aarch64/aarch64-sve.md (@aarch64_pred_<optab><mode>): Use new
	iterator SVE_VDQ_I.
	* config/aarch64/iterators.md (SVE_VDQ_I): New mode iterator.
	(VPRED): Add V8QI, V16QI, V4HI, V8HI and V2SI.

2024-08-01  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/116149
	* config/riscv/vector.md: Fix mode_idx attribute of scalar
	widen add/sub variants.

2024-08-01  Patrick O'Neill  <patrick@rivosinc.com>

	PR target/116111
	* config/riscv/riscv.cc (riscv_option_override): Add error.

2024-08-01  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-cores.def (cortex-x925): New.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* config/aarch64/tuning_models/cortexx925.h: New file.
	* config/aarch64/aarch64.cc: Use it.
	* doc/invoke.texi: Document it.

2024-08-01  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/tuning_models/neoversen2.h: Update costs.

2024-08-01  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/tuning_models/generic_armv9_a.h: Update costs.

2024-08-01  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-cores.def (neoverse-n3, cortex-a725): New.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* config/aarch64/tuning_models/neoversen3.h: New file.
	* config/aarch64/aarch64.cc: Use it.
	* doc/invoke.texi: Document it.

2024-08-01  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-cores.def (neoverse-v3ae): New.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* config/aarch64/tuning_models/neoversev3ae.h: New file.
	* config/aarch64/aarch64.cc: Use it.
	* doc/invoke.texi: Document it.

2024-08-01  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-cores.def (cortex-x4): Update.
	(neoverse-v3): New.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* config/aarch64/tuning_models/neoversev3.h: New file.
	* config/aarch64/aarch64.cc: Use it.
	* doc/invoke.texi: Document it.

2024-08-01  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-cores.def (cortex-x3): Use Neoverse-V2 costs.
	* config/aarch64/tuning_models/neoversev2.h: Update costs.

2024-08-01  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/116120
	* match.pd (`(a ? x : y) eq/ne (b ? x : y)`): Add test for `x != y`
	in result.
	(`(a ? x : y) eq/ne (b ? y : x)`): Add test for `x == y` in result.

2024-08-01  liuhongt  <hongtao.liu@intel.com>

	PR target/116096
	* config/i386/constraints.md (Wc): New constraint for integer
	1 or -1.
	* config/i386/i386.md (ashl<mode>3_doubleword): Refine
	constraint with Wc.

2024-08-01  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114659
	* tree-ssa-sccvn.cc (visit_reference_op_load): Do not
	prevent punning from modes with padding here, but ...
	(vn_reference_eq): ... ensure this here, also honoring
	types with modes that cannot act as bit container.

2024-08-01  Richard Biener  <rguenther@suse.de>

	* config/i386/i386.cc (TARGET_MODE_CAN_TRANSFER_BITS): Define.
	(ix86_mode_can_transfer_bits): New function.

2024-08-01  Richard Biener  <rguenther@suse.de>

	* target.def (mode_can_transfer_bits): New target hook.
	* target.h (mode_can_transfer_bits): New function wrapping the
	hook and providing default behavior.
	* doc/tm.texi.in: Update.
	* doc/tm.texi: Re-generate.

2024-08-01  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.md (cbranch<mode>4_insn): Split to a test of the
	high part against 0 if possible.

2024-08-01  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/constraints.md (YMM): New constraint.
	* config/avr/avr.md (cmp<mode>3, *cmp<mode>3)
	(cbranch<mode>4_insn): Allow YMM where M is allowed.

2024-08-01  Jakub Jelinek  <jakub@redhat.com>

	PR target/115981
	* config/i386/sse.md
	(*<extract_type>_vinsert<shuffletype><extract_suf>_0): Swap the
	first two VEC_MERGE operands, renumber match_operands and test
	for 0xF or 0x3 rather than 0xFFF0 or 0xFC immediate.

2024-08-01  Tobias Burnus  <tburnus@baylibre.com>
	    Richard Biener  <rguenther@suse.de

	PR middle-end/115637
	* gimplify.cc (gimplify_body): Fix macro name in the comment.
	* omp-offload.cc (find_link_var_op): Rename to ...
	(process_link_var_op): ... this. Replace value expr.
	(pass_omp_target_link::execute): Update walk_gimple_stmt call.

2024-08-01  Lingling Kong  <lingling.kong@intel.com>
	    Hu, Lin1  <lin1.hu@intel.com>

	PR target/113744
	* config/i386/i386.md (*add<mode>_4): Remove ndd support.
	(*adddi_4): Ditto.

2024-08-01  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (get_type_num_struct): Fix NULL pointer dereference.

2024-08-01  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-path.cc
	(thread_event_printer::print_swimlane_for_event_range): Gracefully
	handle logical_location::get_name_for_path_output returning null.

2024-08-01  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc
	(sarif_location_manager::worklist_item::unlabelled_secondary_location):
	New enum value.
	(sarif_location_manager::m_unlabelled_secondary_locations): New
	field.
	(sarif_location_manager::process_worklist_item): Handle unlabelled
	secondary locations.
	(sarif_builder::make_location_object): Generalize code to handle
	ranges within a rich_location so as well as using annotations for
	those with labels, we now add related locations for those without
	labels.

2024-08-01  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc (sarif_builder::sarif_builder): Assert
	that m_line_maps is nonnull.
	(diagnostic_output_format_init_sarif_stderr): Add "line_maps"
	param and pass to format ctor.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.
	* diagnostic.cc (diagnostic_output_format_init): Pass "line_table"
	as line_maps param to the above.
	* diagnostic.h (diagnostic_output_format_init_sarif_stderr): Add
	"line_maps" param.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.

2024-08-01  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc: Tweak ASCII art in comment
	to show edges for both directions in the digraph.

2024-07-31  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/116134
	* match.pd (`(a ? x : y) eq/ne (b ? x : y)`): Check that
	a and b types match.
	(`(a ? x : y) eq/ne (b ? y : x)`): Likewise.

2024-07-31  Jeff Law  <jlaw@ventanamicro.com>

	* ext-dce.cc (carry_backpropagate): Change more guards of [U]INTVAL to
	test CONST_INT_P rather than CONSTANT_P, fixing rtl-checking failures.

2024-07-31  Dimitar Dimitrov  <dimitar@dinux.eu>

	* common/config/pru/pru-common.cc
	(TARGET_OPTION_OPTIMIZATION_TABLE): New definition.
	* config/pru/pru.cc (TARGET_MIN_ANCHOR_OFFSET): Set minimal
	anchor offset.
	(TARGET_MAX_ANCHOR_OFFSET): Set maximum anchor offset.

2024-07-31  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/116136
	* simplify-rtx.cc (simplify_context::simplify_subreg): Check
	that we're working with the lowpart offset rather than byte 0.

2024-07-31  Claudio Bantaloukas  <claudio.bantaloukas@arm.com>

	* config.gcc (extra_headers): Install arm_private_fp8.h.
	* config/aarch64/arm_neon.h: Include arm_private_fp8.h.
	* config/aarch64/arm_sve.h: Likewise.
	* config/aarch64/arm_private_fp8.h: New file
	(fpm_t): New type representing fpmr values.
	(enum __ARM_FPM_FORMAT): New enum representing valid fp8 formats.
	(enum __ARM_FPM_OVERFLOW): New enum representing how some fp8
	calculations work.
	(__arm_fpm_init): New.
	(__arm_set_fpm_src1_format): Likewise.
	(__arm_set_fpm_src2_format): Likewise.
	(__arm_set_fpm_dst_format): Likewise.
	(__arm_set_fpm_overflow_cvt): Likewise.
	(__arm_set_fpm_overflow_mul): Likewise.
	(__arm_set_fpm_lscale): Likewise.
	(__arm_set_fpm_lscale2): Likewise.
	(__arm_set_fpm_nscale): Likewise.

2024-07-31  Claudio Bantaloukas  <claudio.bantaloukas@arm.com>

	* config/aarch64/aarch64.cc (aarch64_hard_regno_nregs): Add
	support for MOVEABLE_SYSREGS class.
	(aarch64_hard_regno_mode_ok): Allow reads and writes to fpmr.
	(aarch64_regno_regclass): Support MOVEABLE_SYSREGS class.
	(aarch64_class_max_nregs): Likewise.
	* config/aarch64/aarch64.h (FIXED_REGISTERS): add fpmr.
	(CALL_REALLY_USED_REGISTERS): Likewise.
	(REGISTER_NAMES): Likewise.
	(enum reg_class): Add MOVEABLE_SYSREGS class.
	(REG_CLASS_NAMES): Likewise.
	(REG_CLASS_CONTENTS): Update class bitmaps to deal with fpmr,
	the new MOVEABLE_REGS class and renumbering of registers.
	* config/aarch64/aarch64.md: (FPM_REGNUM): added new register
	number, reusing old value.
	(FFR_REGNUM): Renumber.
	(FFRT_REGNUM): Likewise.
	(LOWERING_REGNUM): Likewise.
	(TPIDR2_BLOCK_REGNUM): Likewise.
	(SME_STATE_REGNUM): Likewise.
	(TPIDR2_SETUP_REGNUM): Likewise.
	(ZA_FREE_REGNUM): Likewise.
	(ZA_SAVED_REGNUM): Likewise.
	(ZA_REGNUM): Likewise.
	(ZT0_REGNUM): Likewise.
	(*mov<mode>_aarch64): Add support for moveable sysregs.
	(*movsi_aarch64): Likewise.
	(*movdi_aarch64): Likewise.
	* config/aarch64/constraints.md (MOVEABLE_SYSREGS): New constraint.

2024-07-31  Claudio Bantaloukas  <claudio.bantaloukas@arm.com>

	* config/aarch64/aarch64-option-extensions.def (fp8): New.
	* config/aarch64/aarch64.h (TARGET_FP8): Likewise.
	* doc/invoke.texi (AArch64 Options): Document new -march flags
	and extensions.

2024-07-31  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.md (UNSPEC_REVB_2H, UNSPEC_REVB_4H,
	UNSPEC_REVH_D): Remove UNSPECs.
	(revb_4h, revh_d): Remove define_insn.
	(revb_2h): Define as (rotatert:SI (bswap:SI x) 16) instead of
	an UNSPEC.
	(revb_2h_extend, revb_2w, *bswapsi2, bswapdi2): New define_insn.
	(bswapsi2): Change to define_expand.  Only expand to revb.2h +
	rotri.w if !TARGET_64BIT.
	(bswapdi2): Change to define_insn of which the output is just a
	revb.d instruction.

2024-07-31  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/predicates.md (ins_zero_bitmask_operand):
	Cover more cases that bstrins can benefit.
	(high_bitmask_operand): Remove.
	* config/loongarch/constraints.md (Yy): Remove.
	* config/loongarch/loongarch.md (and<mode>3_align): Remove.

2024-07-31  Richard Biener  <rguenther@suse.de>

	PR middle-end/101478
	* gimplify.cc (gimplify_addr_expr): Check we still have an
	ADDR_EXPR before calling recompute_tree_invariant_for_addr_expr.

2024-07-31  Hongyu Wang  <hongyu.wang@intel.com>

	PR target/116065
	* config/i386/i386.opt (munroll-only-small-loops): Mark as
	Optimization instead of Save.

2024-07-31  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/115881
	* recog.cc: Include rtl-iter.h.
	(insn_propagation::apply_to_rvalue_1): Check that the result
	of simplify_subreg does not include nested subregs.

2024-07-31  Kewen Lin  <linkw@linux.ibm.com>

	PR target/105359
	* config/rs6000/rs6000.md (@extenddf<FLOAT128:mode>2): Don't check
	TARGET_LONG_DOUBLE_128 for FLOAT128_IEEE_P modes.
	(extendsf<FLOAT128:mode>2): Likewise.
	(trunc<FLOAT128:mode>df2): Likewise.
	(trunc<FLOAT128:mode>sf2): Likewise.
	(floatsi<FLOAT128:mode>2): Likewise.
	(fix_trunc<FLOAT128:mode>si2): Likewise.

2024-07-31  Kewen Lin  <linkw@linux.ibm.com>

	* config/rs6000/altivec.md (p9_vadu<mode>3): Rename to ...
	(uabd<mode>3): ... this.  Update RTL pattern with umin and umax rather
	than UNSPEC_VADU.
	(vadu<mode>3): Remove.
	(UNSPEC_VADU): Remove.
	(usadv16qi): Replace gen_p9_vaduv16qi3 with gen_uabdv16qi3.
	(usadv8hi): Replace gen_p9_vaduv8hi3 with gen_uabdv8hi3.
	* config/rs6000/rs6000-builtins.def (__builtin_altivec_vadub): Replace
	expander with uabdv16qi3.
	(__builtin_altivec_vaduh): Adjust expander with uabdv8hi3.
	(__builtin_altivec_vaduw): Adjust expander with uabdv4si3.

2024-07-31  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.md (optab): Add (rotatert "rotr").
	(<optab:any_shift><mode>3, <optab:any_div><mode>3,
	sub<mode>3, rotr<mode>3, mul<mode>3): Add a "*" to the insn name
	so we can redefine the names with define_expand.
	(*<optab:any_shift>si3_extend): Remove "*" so we can use them
	in expanders.
	(*subsi3_extended, *mulsi3_extended): Likewise, also remove the
	trailing "ed" for consistency.
	(*<optab:any_div>si3_extended): Add mode for sign_extend to
	prevent an ICE using it in expanders.
	(shift_w, arith_w): New define_code_iterator.
	(<optab:any_w><mode>3): New define_expand.  Expand with
	<optab:any_w>si3_extend for SImode if TARGET_64BIT.
	(<optab:arith_w><mode>3): Likewise.
	(mul<mode>3): Expand to mulsi3_extended for SImode if
	TARGET_64BIT and ISA_HAS_DIV32.
	(<optab:any_div><mode>3): Expand to <optab:any_div>si3_extended
	for SImode if TARGET_64BIT.
	(rotl<mode>3): Expand to rotrsi3_extend for SImode if
	TARGET_64BIT.
	(bytepick_w_<bytepick_imm>): Add mode for lshiftrt and ashift.
	(bitsize, bytepick_imm, bytepick_w_ashift_amount): New
	define_mode_attr.
	(bytepick_w_<bytepick_imm>_extend): Adjust for the RTL change
	caused by 32-bit shift expanding.  Now bytepick_imm only covers
	2 and 3, separate one remaining case to ...
	(bytepick_w_1_extend): ... here, new define_insn.

2024-07-30  Edwin Lu  <ewlu@rivosinc.com>

	* common/config/riscv/riscv-common.cc (riscv_subset_list::to_string):
	Skip b in march string
	* config.in: Regenerate.
	* configure: Regenerate.
	* configure.ac: Add B assembler check

2024-07-30  Filip Kastl  <fkastl@suse.cz>

	* tree-switch-conversion.cc (can_log2): New static function to
	check if gen_log2 can be used on current target.
	(gen_log2): New static function to generate efficient GIMPLE
	code for taking an exact base 2 log.
	(gen_pow2p): New static function to generate efficient GIMPLE
	code for checking if a value is a power of 2.
	(switch_conversion::switch_conversion): Track if the
	transformation happened.
	(switch_conversion::is_exp_index_transform_viable): New function
	to decide whether the transformation should be applied.
	(switch_conversion::exp_index_transform): New function to
	execute the transformation.
	(switch_conversion::gen_inbound_check): Don't remove the default
	BB if the transformation happened.
	(switch_conversion::expand): Execute the transform if it is
	viable.  Skip the "sufficiently small case range" test if the
	transformation is going to be executed.
	* tree-switch-conversion.h: Add is_exp_index_transform_viable
	and exp_index_transform.

2024-07-30  Gianluca Guida  <gianluca@rivosinc.com>
	    Patrick O'Neill  <patrick@rivosinc.com>

	* common/config/riscv/riscv-common.cc: Add zacas extension.
	* config/riscv/arch-canonicalize: Make zacas imply zaamo.
	* config/riscv/riscv.opt: Add zacas.
	* config/riscv/sync.md (zacas_atomic_cas_value<mode>): New pattern.
	(atomic_compare_and_swap<mode>): Use new pattern for compare-and-swap ops.
	(zalrsc_atomic_cas_value_strong<mode>): Rename atomic_cas_value_strong.
	* doc/sourcebuild.texi: Add Zacas documentation.

2024-07-30  Patrick O'Neill  <patrick@rivosinc.com>

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::to_string): Remove zabha configure check
	handling and clarify zaamo/zalrsc comment.
	* config.in: Regenerate.
	* configure: Regenerate.
	* configure.ac: Remove zabha configure check.

2024-07-30  Jennifer Schmitz  <jschmitz@nvidia.com>

	* config/aarch64/aarch64-sve-builtins-base.cc (svdiv_impl::fold):
	Implement strength reduction.

2024-07-30  Georg-Johann Lay  <avr@gjlay.de>

	* doc/extend.texi (AVR Function Attributes): Propose to use
	attribute signal(n) via AVR-LibC's ISR_N from avr/interrupt.h

2024-07-30  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv.cc (riscv_expand_ussub): Promote to Xmode
	instead of Pmode.

2024-07-30  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (xtensa_insn_cost):
	Add a case statement for TYPE_FARITH.

2024-07-30  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.md (movsf_internal):
	Reorder alternative that corresponds to L32R machine instruction,
	and prefix alternatives that correspond to LSI/SSI instructions
	with the constraint character '^' so that they are disparaged by
	reload/LRA.

2024-07-30  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa-protos.h (xtensa_expand_call):
	Remove the third argument.
	* config/xtensa/xtensa.cc (xtensa_expand_call):
	Remove the third argument and the code that uses it.
	* config/xtensa/xtensa.md (call, call_value, sibcall, sibcall_value):
	Remove each Boolean constant specified in the third argument of
	xtensa_expand_call.
	(sibcall_epilogue): Add emitting '(use A0_REG)' after calling
	xtensa_expand_epilogue.

2024-07-30  liuhongt  <hongtao.liu@intel.com>

	PR target/116043
	* config/i386/constraints.md (Bk): Refine to
	define_special_memory_constraint.

2024-07-30  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/prfchiintrin.h
	(_m_prefetchit0): Add macro for non-optimized option.
	(_m_prefetchit1): Ditto.

2024-07-30  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/predicates.md
	(fix_scaling_operand, float_scaling_operand): New predicates.
	* config/xtensa/xtensa.md
	(any_fix/m_fix/s_fix, any_float/m_float/s_float):
	New code iterators and their attributes.
	(fix<s_fix>_truncsfsi2): Change from "fix_truncsfsi2".
	(*fix<s_fix>_truncsfsi2_2x, *fix<s_fix>_truncsfsi2_scaled):
	New insn definitions.
	(float<s_float>sisf2): Change from "floatsisf2".
	(*float<s_float>sisf2_scaled): New insn definition.

2024-07-30  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc
	(gen_int_relational, gen_float_relational): Replace tempvar-based
	value-swapping codes with std::swap.
	* config/xtensa/xtensa.md (movdi_internal, movdf_internal):
	Ditto.

2024-07-29  Jeff Law  <jlaw@ventanamicro.com>

	PR target/116104
	* ext-dce.cc (carry_backpropagate): Fix test guarding UINTVAL
	extraction of shift count.

2024-07-29  Jonathan Wakely  <jwakely@redhat.com>

	* doc/invoke.texi (Diagnostic Message Formatting Options):
	Replace hyphen with a new sentence. Replace "the former" with
	the actual value.

2024-07-29  Max Filippov  <jcmvbkbc@gmail.com>

	* config/xtensa/xtensa.cc (xtensa_option_override_after_change):
	New function.
	(TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE): Define as
	xtensa_option_override_after_change.
	(xtensa_option_override): Call
	xtensa_option_override_after_change.

2024-07-29  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (avr_set_current_function): Fix typo in
	error message.

2024-07-29  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/vector.md: Add comment for the VEC_IC
	define_mode_iterator.

2024-07-29  Pan Li  <pan2.li@intel.com>

	* tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children):
	Try .SAT_SUB for PLUS_EXPR case.

2024-07-29  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/116055
	* ipa-modref.cc (analyze_function): Do not ICE when flags regress.

2024-07-29  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern): Only call
	single_imm_use if statement is not generated from pattern recognition.

2024-07-29  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/avx512dqintrin.h
	(_mm_mask_fpclass_ss_mask): Correct operand order.
	(_mm_mask_fpclass_sd_mask): Ditto.
	(_mm256_maskz_reduce_round_ss): Use __builtin_ia32_reducess_mask_round
	instead of __builtin_ia32_reducesd_mask_round.
	(_mm_reduce_round_sd): Use -1 as mask since it is non-mask.
	(_mm_reduce_round_ss): Ditto.
	* config/i386/avx512vlbwintrin.h
	(_mm256_mask_alignr_epi8): Correct operand usage.
	(_mm_mask_alignr_epi8): Ditto.
	* config/i386/avx512vlintrin.h (_mm_mask_alignr_epi64): Ditto.

2024-07-28  Jonathan Wakely  <jwakely@redhat.com>

	* exec-tool.in: Exit with an error if $original is empty.

2024-07-28  Georg-Johann Lay  <avr@gjlay.de>

	PR target/116056
	* config/avr/avr.h (machine_function) <is_noblock>: New field.
	* config/avr/avr-c.cc (avr_cpu_cpp_builtins) <__HAVE_SIGNAL_N__>: New
	built-in macro.
	* config/avr/avr.cc (avr_declare_function_name): New function.
	(avr_attribute_table) <noblock>: New function attribute>.
	<signal, interrupt>: Allow any number of args.
	(avr_insert_attributes): Check validity of "signal" and "interrupt"
	arguments.
	(avr_foreach_function_attribute, avr_interrupt_signal_function)
	(avr_isr_number, avr_asm_isr_alias, avr_handle_isr_attribute)
	(avr_noblock_function_p): New static functions.
	(avr_interrupt_function): New from avr_interrupt_function_p.
	Adjust callers.
	(avr_signal_function): New from avr_signal_function_p.
	Adjust callers.
	(avr_set_current_function): Only diagnose non-__vector ISR names
	when "signal" or "interrupt" attribute has no args. Set
	cfun->machine->is_noblock.  Warn about "noblock" in non-ISR functions.
	(struct avr_fun_cookie): New.
	(avr_expand_prologue, avr_asm_function_end_prologue): Handle "noblock".
	* config/avr/elf.h (ASM_DECLARE_FUNCTION_NAME): New define.
	* config/avr/avr-protos.h (avr_declare_function_name): New proto.
	* doc/extend.texi (AVR Function Attributes): Document
	signal(num) and interrupt(num).
	* doc/invoke.texi (AVR Built-in Macros) <__HAVE_SIGNAL_N__>: Document.

2024-07-27  Roger Sayle  <roger@nextmovesoftware.com>
	    Andrew Pinski  <quic_apinski@quicinc.com>

	* match.pd (ctz (-X) => ctz (X)): New simplification.
	(ctz (abs (X)) => ctz (X)): Likewise.

2024-07-27  Pan Li  <pan2.li@intel.com>

	* match.pd: Add case 9 and case 10 for .SAT_SUB when one
	of the op is IMM.

2024-07-27  David Malcolm  <dmalcolm@redhat.com>

	PR middle-end/107941
	* diagnostic-format-sarif.cc: Define INCLUDE_LIST and INCLUDE_MAP.
	(enum class location_relationship_kind): New.
	(diagnostic_artifact_role::scanned_file): New value.
	(class sarif_location_manager): New.
	(class sarif_result): Derive from sarif_location_manager rather
	than directly from sarif_object.
	(sarif_result::add_related_location): Convert to vfunc
	implementation.
	(sarif_location::m_relationships_map): New field.
	(class sarif_location_relationship): New.
	(class sarif_ice_notification): Derive from sarif_location_manager
	rather than directly from sarif_object.
	(sarif_builder::take_current_result): New.
	(sarif_builder::m_line_maps): New field.
	(sarif_builder::m_cur_group_result): Convert to std::unique_ptr.
	(sarif_artifact::add_role): Skip scanned_file.
	(get_artifact_role_string): Handle scanned_file.
	(sarif_location_manager::add_relationship_to_worklist): New.
	(sarif_location_manager::process_worklist): New.
	(sarif_location_manager::process_worklist_item): New.
	(sarif_result::on_nested_diagnostic): Pass *this to
	make_location_object.
	(sarif_location::lazily_add_id): New.
	(sarif_location::get_id): New.
	(get_string_for_location_relationship_kind): New.
	(sarif_location::lazily_add_relationship): New.
	(sarif_location::lazily_add_relationship_object): New.
	(sarif_location::lazily_add_relationships_array): New.
	(sarif_ice_notification::sarif_ice_notification): Fix overlong line.
	Pass *this to make_locations_arr.
	(sarif_ice_notification::add_related_location): New.
	(sarif_location_relationship::sarif_location_relationship): New.
	(sarif_location_relationship::get_target_id): New.
	(sarif_location_relationship::lazily_add_kind): New.
	(sarif_builder::sarif_builder): Add "line_maps" param and use it
	to initialize m_line_maps.
	(sarif_builder::end_diagnostic): Update for m_cur_group_result
	becoming a std::unique_ptr.  Don't append to m_results_array yet.
	(sarif_builder::end_group): Append m_cur_group_result to
	m_results_array here, rather than in end_diagnostic.
	(sarif_builder::make_result_object): Pass result_obj to
	make_locations_arr and to make_code_flow_object.
	(sarif_builder::make_locations_arr): Add "loc_mgr" param and pass
	it to make_location_object.
	(sarif_builder::make_location_object): For two overloads, add
	"loc_mgr" param and call add_any_include_chain on the location.
	(sarif_builder::add_any_include_chain): New.
	(sarif_builder::make_location_object): New overload.
	(sarif_builder::make_code_flow_object): Add "result" param and
	pass it to make_thread_flow_location_object.
	(sarif_builder::make_thread_flow_location_object): Add "result"
	param and pass it to make_location_object.
	(sarif_builder::get_or_create_artifact): Handle scanned_file.
	(sarif_output_format::~sarif_output_format): Assert that there
	isn't a pending result.
	(sarif_output_format::sarif_output_format): Add "line_maps" param
	and pass it to m_builder's ctor.
	(sarif_stream_output_format::sarif_stream_output_format): Add
	"line_maps" param and pass it to base class ctor.
	(sarif_file_output_format::sarif_file_output_format): Likewise.
	(diagnostic_output_format_init_sarif_stderr): Pass "line_table"
	global to format.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.
	(test_sarif_diagnostic_context::test_sarif_diagnostic_context):
	Likewise.
	(buffered_output_format::buffered_output_format): Likewise.
	(selftest::test_make_location_object): Likewise.
	(selftest::test_make_location_object): Create a sarif_result for
	use when calling make_location_object.
	* diagnostic.cc (diagnostic_context::finish): End any active
	diagnostic groups.
	(diagnostic_context::report_diagnostic): Assert that we're within
	a diagnostic group.
	* diagnostic.h (diagnostic_report_diagnostic): Add
	begin_group/end_group pair around call to
	diagnostic_context::report_diagnostic.
	* selftest-diagnostic.cc (test_diagnostic_context::report): Add
	begin_group/end_group pair around diagnostic_impl call.

2024-07-26  Jeff Law  <jlaw@ventanamicro.com>

	PR target/116085
	* config/riscv/bitmanip.md (minmax extension avoidance splitter):
	Rewrite as a simpler define_split.  Adjust the opcode appropriately.
	Avoid emitting sign extension if it's clearly not needed.
	* config/riscv/iterators.md (minmax_optab): Rename to uminmax_optab
	and map everything to unsigned variants.

2024-07-26  Siddhesh Poyarekar  <siddhesh@gotplt.org>

	* gimple-ssa-sprintf.cc (format_string): Fix type in range check
	for UNLIKELY for wide chars.

2024-07-26  Andrew Pinski  <quic_apinski@quicinc.com>

	* config/aarch64/aarch64-sve-builtins-base.cc (svbic_impl::expand): Update
	to use andn optab instead of using code_for_aarch64_bic.
	* config/aarch64/aarch64-sve.md (@aarch64_bic<mode>): Rename to ...
	(andn<mode>3): This.

2024-07-26  Andrew Pinski  <quic_apinski@quicinc.com>

	* config/aarch64/aarch64.md (*<NLOGICAL:optab>_one_cmpl<mode>3): Rename to ...
	(<NLOGICAL:optab>n<mode>3): This.
	(*<NLOGICAL:optab>_one_cmplsidi3_ze): Rename to ...
	(*<NLOGICAL:optab>nsidi3_ze): This.

2024-07-26  Andrew Pinski  <quic_apinski@quicinc.com>

	* config/aarch64/aarch64-simd.md
	(bic<mode>3<vczle><vczbe>): Rename to ...
	(andn<mode>3<vczle><vczbe>): This. Also swap operands.
	(orn<mode>3<vczle><vczbe>): Rename to ...
	(iorn<mode>3<vczle><vczbe>): This. Also swap operands.
	(vec_cmp<mode><v_int_equiv>): Update orn call to iorn
	and swap the last two arguments.

2024-07-26  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/116065
	* config/aarch64/aarch64.opt (mearly-ra=): Mark as Optimization rather
	than Save.

2024-07-26  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/116101
	* gimple-isel.cc (maybe_duplicate_comparison): Don't
	do anything for -O0 or -fno-tree-ter.

2024-07-26  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-isel.cc (duplicate_comparison): Rename to ...
	(maybe_duplicate_comparison): This. Add check for use here
	rather than in its caller.
	(pass_gimple_isel::execute): Don't check how many uses the
	comparison had and call maybe_duplicate_comparison instead of
	duplicate_comparison.

2024-07-26  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-isel.cc (pass_gimple_isel::execute): Factor out
	duplicate comparisons out to ...
	(duplicate_comparison): New function.

2024-07-26  Andi Kleen  <ak@gcc.gnu.org>

	PR c++/116019
	* tree-tailcall.cc (find_tail_calls): Change tail call
	error message.

2024-07-26  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_override_options_internal):
	Reword error string without apostrophe.

2024-07-26  Tamar Christina  <tamar.christina@arm.com>

	PR target/116074
	* tree-vect-patterns.cc (vect_recog_cond_store_pattern): Check vector mode.

2024-07-26  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/i386-expand.cc (ix86_expand_builtin): Change
	from XImode to BLKmode.
	* config/i386/i386.md (ldtilecfg): Change XI to BLK.
	(sttilecfg): Ditto.

2024-07-26  Nathaniel Shead  <nathanieloshead@gmail.com>

	PR c++/115757
	* tree.h (put_warning_spec_at): Declare new function.
	(has_warning_spec): Likewise.
	(get_warning_spec): Likewise.
	(put_warning_spec): Likewise.
	* diagnostic-spec.h (nowarn_spec_t::from_bits): New function.
	* diagnostic-spec.cc (put_warning_spec_at): New function.
	* warning-control.cc (has_warning_spec): New function.
	(get_warning_spec): New function.
	(put_warning_spec): New function.

2024-07-25  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtin.cc (get_element_number,
	altivec_expand_vec_set_builtin): Remove functions.
	(rs6000_expand_builtin): Remove the if statement to call
	altivec_expand_vec_set_builtin.
	* config/rs6000/rs6000-builtins.def (__builtin_vsx_set_1ti,
	__builtin_vsx_set_2df, __builtin_vsx_set_2di): Remove the
	built-in definitions.
	* config/rs6000/rs6000-gen-builtins.cc (struct attrinfo):
	Remove the isset variable from the structure.
	(parse_bif_attrs): Remove the uses of the isset variable.

2024-07-25  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vec_set_v1ti,
	__builtin_vec_set_v2df, __builtin_vec_set_v2di): Remove built-in
	definitions.
	* config/rs6000/rs6000-c.cc (resolve_vec_insert): Remove the
	handling for constant vec_insert position with
	VECTOR_UNIT_VSX_P V1TImode, V2DFmode and V2DImode modes.

2024-07-25  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcmpeqsp,
	__builtin_vsx_xvcmpgesp, __builtin_vsx_xvcmpgtsp): Remove
	definitions.

2024-07-25  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/116039
	* ext-dce.cc (ext_dce_process_uses): Add some comments about concerns
	with current code.  Mark additional bit groups as live when we have
	an extension of a suitably promoted subreg.

2024-07-25  Christoph Müllner  <christoph.muellner@vrull.eu>

	PR target/116033
	* config/riscv/thead.cc (th_memidx_classify_address_modify):
	Fix mode test.

2024-07-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116083
	* tree-vect-slp.cc (vect_build_slp_tree): Do not allocate
	a discovery fail node when we reached the discovery limit.
	(vect_build_slp_instance): Terminate early when the
	discovery limit is reached.

2024-07-25  Richard Sandiford  <richard.sandiford@arm.com>

	* doc/rtl.texi: Document the need to define INCLUDE_ARRAY before
	including rtl-ssa.h.
	* rtl-ssa.h: Likewise (in comment).
	* config/aarch64/aarch64-cc-fusion.cc: Add INCLUDE_ARRAY.
	* config/aarch64/aarch64-early-ra.cc: Likewise.
	* config/riscv/riscv-avlprop.cc: Likewise.
	* config/riscv/riscv-vsetvl.cc: Likewise.
	* fwprop.cc: Likewise.
	* late-combine.cc: Likewise.
	* pair-fusion.cc: Likewise.
	* rtl-ssa/accesses.cc: Likewise.
	* rtl-ssa/blocks.cc: Likewise.
	* rtl-ssa/changes.cc: Likewise.
	* rtl-ssa/functions.cc: Likewise.
	* rtl-ssa/insns.cc: Likewise.
	* rtl-ssa/movement.cc: Likewise.

2024-07-25  Sam James  <sam@gentoo.org>

	PR middle-end/114855
	* doc/invoke.texi (Optimize options): Mention machine-generated
	code for -O1.

2024-07-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116081
	* tree-vect-loop.cc (get_initial_defs_for_reduction):
	Use operand_equal_p for comparing the element with the
	neutral op.

2024-07-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116079
	* tree-ssa-loop-im.cc (hoist_memory_references): Clear
	VDEF of elided clobbers.

2024-07-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116081
	* tree-vect-stmts.cc (vect_get_vector_types_for_stmt):
	Properly compare types.

2024-07-25  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/116036
	* config/riscv/riscv.cc (riscv_override_options_internal): Error
	with TARGET_VECTOR && !TARGET_MUL.

2024-07-25  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv.cc (riscv_legitimize_move): Fix poly_int dest generation.

2024-07-25  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/116044
	* rtl-ssa/functions.h (function_info::split_clobber_group): Return
	an array of two clobber_groups.
	* rtl-ssa/accesses.cc (function_info::split_clobber_group): Return
	the new clobber groups.  Don't modify the splay tree here.
	(function_info::add_def): Update call accordingly.  Generalize
	the splay tree insertion code so that the new definition can be
	inserted as a child of any existing node, not just the root.
	Fix the insertion used after calling split_clobber_group.

2024-07-25  Jennifer Schmitz  <jschmitz@nvidia.com>

	* config/aarch64/aarch64-sve-builtins.cc
	(gimple_folder::redirect_call): Update return type.
	* config/aarch64/aarch64-sve-builtins.h: Likewise.
	* config/aarch64/aarch64-sve-builtins-sve2.cc (svqshl_impl::fold):
	Remove cast to gcall.
	(svrshl_impl::fold): Likewise.

2024-07-25  Richard Biener  <rguenther@suse.de>

	* tree-ssa-structalias.cc (constraint_equal): Take const
	reference to constraints.
	(constraint_vec_find): Similar.
	(solve_graph): Keep constraint vector sorted and verify
	sorting with checking.

2024-07-25  Lingling Kong  <lingling.kong@intel.com>

	PR target/115749
	* config/i386/x86-tune-costs.h (struct processor_costs):
	Adjust rtx_cost of imulq and imulw for COST_N_INSNS (4)
	to COST_N_INSNS (3).

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc (sarif_builder::make_locations_arr):
	Don't add entirely empty location objects, such as for
	UNKNOWN_LOCATION.
	(test_sarif_diagnostic_context::test_sarif_diagnostic_context):
	Add param "main_input_filename".
	(selftest::test_simple_log): Provide above param.  Verify that
	"locations" is empty.
	(selftest::test_simple_log_2): New.
	(selftest::diagnostic_format_sarif_cc_tests): Call it.

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc (sarif_builder::flush_to_object):
	New, using code moved from...
	(sarif_builder::end_group): ...here.
	(class selftest::test_sarif_diagnostic_context): New.
	(selftest::test_simple_log): New.
	(selftest::diagnostic_format_sarif_cc_tests): Call it.
	* json.h (json::object::is_empty): New.
	* selftest-diagnostic.cc (test_diagnostic_context::report): New.
	* selftest-diagnostic.h (test_diagnostic_context::report): New
	decl.
	* selftest-json.cc (selftest::assert_json_string_eq): New.
	(selftest::expect_json_object_with_string_property): New.
	(selftest::assert_json_string_property_eq): New.
	* selftest-json.h (selftest::assert_json_string_eq): New decl.
	(ASSERT_JSON_STRING_EQ): New macro.
	(selftest::expect_json_object_with_string_property): New decl.
	(EXPECT_JSON_OBJECT_WITH_STRING_PROPERTY): New macro.

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc
	(sarif_builder::make_location_object): Add "annotations" property if
	there are any labelled ranges (§3.28.6).
	(selftest::test_make_location_object): Verify annotations are added
	to location_obj.
	* json.h (json::array::size): New.
	(json::array::operator[]): New.
	* selftest-json.cc
	(selftest::expect_json_object_with_array_property): New.
	* selftest-json.h
	(selftest::expect_json_object_with_array_property): New decl.
	(EXPECT_JSON_OBJECT_WITH_ARRAY_PROPERTY): New macro.

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc
	(make_date_time_string_for_current_time): New.
	(sarif_invocation::sarif_invocation): Set "startTimeUtc"
	property (§3.20.7).
	(sarif_invocation::prepare_to_flush): Set "endTimeUtc"
	property (§3.20.8).

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc (sarif_invocation::sarif_invocation):
	Add "original_argv" param and use it to populate "arguments"
	property (§3.20.2).
	(sarif_builder::sarif_builder): Pass argv to m_invocation_obj's
	ctor.
	* diagnostic.cc (diagnostic_context::initialize): Initialize
	m_original_argv.
	(diagnostic_context::finish): Clean up m_original_argv.
	(diagnostic_context::set_original_argv): New.
	* diagnostic.h: Include "unique-argv.h".
	(diagnostic_context::set_original_argv): New decl.
	(diagnostic_context::get_original_argv): New decl.
	(diagnostic_context::m_original_argv): New field.
	* toplev.cc: Include "unique-argv.h".
	(general_init): Add "original_argv" param and move it to global_dc.
	(toplev::main): Stash a copy of the original argv before expansion,
	and pass it to general_init for use by SARIF output.
	* unique-argv.h: New file.

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc
	(sarif_builder::make_artifact_location_object): Make public.
	(sarif_invocation::sarif_invocation): Add param "builder".
	Use it to potentially populate the "workingDirectory" property
	with the result of pwd (§3.20.19).
	(sarif_builder::sarif_builder): Pass *this to m_invocation_obj's
	ctor.

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* text-range-label.h: New file, taking class text_range_label from
	gcc-rich-location.h.

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS-libcommon): Add selftest-json.o.
	* diagnostic-format-sarif.cc: Include "selftest.h",
	"selftest-diagnostic.h", "selftest-diagnostic-show-locus.h",
	"selftest-json.h", and "text-range-label.h".
	(class content_renderer): New.
	(sarif_builder::m_rules_arr): Convert to std::unique_ptr.
	(sarif_builder::make_location_object): Add class
	escape_nonascii_renderer.  If rich_loc.escape_on_output_p (),
	pass a nonnull escape_nonascii_renderer to
	maybe_make_physical_location_object as its snippet_renderer, and
	add a property bag property "gcc/escapeNonAscii" to the SARIF
	location object.  For other overloads of make_location_object,
	pass nullptr for the snippet_renderer.
	(sarif_builder::maybe_make_region_object_for_context): Add
	"snippet_renderer" param and pass it to
	maybe_make_artifact_content_object.
	(sarif_builder::make_tool_object): Drop "const".
	(sarif_builder::make_driver_tool_component_object): Likewise.
	Use typesafe unique_ptr variant of object::set for setting "rules"
	property on driver_obj.
	(sarif_builder::maybe_make_artifact_content_object): Add param "r"
	and use it to potentially set the "rendered" property (§3.3.4).
	(selftest::test_make_location_object): New.
	(selftest::diagnostic_format_sarif_cc_tests): New.
	* diagnostic-show-locus.cc: Include "text-range-label.h" and
	"selftest-diagnostic-show-locus.h".
	(selftests::diagnostic_show_locus_fixture::diagnostic_show_locus_fixture):
	New.
	(selftests::test_layout_x_offset_display_utf8): Use
	diagnostic_show_locus_fixture to simplify and consolidate setup
	code.
	(selftests::test_diagnostic_show_locus_one_liner): Likewise.
	(selftests::test_one_liner_colorized_utf8): Likewise.
	(selftests::test_diagnostic_show_locus_one_liner_utf8): Likewise.
	* gcc-rich-location.h (class text_range_label): Move to new file
	text-range-label.h.
	* selftest-diagnostic-show-locus.h: New file, based on material in
	diagnostic-show-locus.cc.
	* selftest-json.cc: New file.
	* selftest-json.h: New file.
	* selftest-run-tests.cc (selftest::run_tests): Call
	selftest::diagnostic_format_sarif_cc_tests.
	* selftest.h (selftest::diagnostic_format_sarif_cc_tests): New decl.

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-json.cc: Include "make-unique.h".
	(json_output_format::m_toplevel_array): Convert to
	std::unique_ptr.
	(json_output_format::json_output_format): Update accordingly.
	(json_output_format::~json_output_format): Remove manual
	"delete" of field.
	(json_from_expanded_location): Convert return type to
	std::unique_ptr.
	(json_from_location_range): Likewise.  Use nullptr rather than
	NULL.
	(json_from_fixit_hint): Convert return type to std::unique_ptr.
	(json_from_metadata): Likewise.
	(make_json_for_path): Likewise.
	(json_output_format::on_end_diagnostic): Use std::unique_ptr
	throughout.
	(json_file_output_format::~json_file_output_format): Use nullptr.
	(selftest::test_unknown_location): Update to use std::unique_ptr.
	(selftest::test_bad_endpoints): Likewise.  Replace NULL with
	nullptr.

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc: Include "make-unique.h".  Convert
	raw pointers to std::unique_ptr throughout to indicate ownership,
	adding comments in the few places where pointers are borrowed.
	Use typesafe unique_ptr variants of json::object::set and
	json::array::append throughout to make types of properties more
	explicit, whilst using "auto" to reduce typing.
	Use "nullptr" rather than "NULL" throughout.
	* diagnostic-format-sarif.h (make_sarif_logical_location_object):
	Use std::unique_ptr for return type.

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-json.cc: Define INCLUDE_MEMORY.
	* diagnostic-format-sarif.cc: Likewise.
	* dumpfile.cc: Likewise.
	* gcov.cc: Likewise.
	* json.cc: Likewise.  Include "make-unique.h".
	(selftest::test_formatting): Exercise overloads of
	array::append and object::set that use unique_ptr.
	* json.h: Require INCLUDE_MEMORY to have been defined.
	(json::object::set): Add a template to add a family of overloads
	taking a std::unique_ptr<JsonType>
	(json::array::append): Likewise.
	* optinfo-emit-json.cc: Define INCLUDE_MEMORY.
	* optinfo.cc: Likewise.
	* timevar.cc: Likewise.
	* toplev.cc: Likewise.
	* tree-diagnostic-client-data-hooks.cc: Likewise.

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-json.cc (json_from_expanded_location): Make
	"static". Pass param "context" by reference, as it cannot be null.
	(json_from_location_range): Likewise for param "context".
	(json_from_fixit_hint): Likewise.
	(make_json_for_path): Likewise.
	(json_output_format::on_end_diagnostic): Update for above changes.
	(diagnostic_output_format_init_json::diagnostic_output_format_init_json):
	Pass param "context" by reference, as it cannot be null.
	(diagnostic_output_format_init_json_stderr): Likewise.
	(diagnostic_output_format_init_json_file): Likewise.
	(selftest::test_unknown_location): Update for above changes.
	(selftest::test_bad_endpoints): Likewise.
	* diagnostic-format-sarif.cc (sarif_builder::m_context): Convert
	from pointer to reference.
	(sarif_invocation::add_notification_for_ice): Convert both params
	from pointers to references.
	(sarif_invocation::prepare_to_flush): Likewise for "context".
	(sarif_result::on_nested_diagnostic): Likewise for "context" and
	"builder".
	(sarif_result::on_diagram): Likewise.
	(sarif_ice_notification::sarif_ice_notification): Likewise.
	(sarif_builder::sarif_builder): Likewise for "context".
	(sarif_builder::end_diagnostic): Likewise.
	(sarif_builder::emit_diagram): Likewise.
	(sarif_builder::make_result_object): Likewise.
	(make_reporting_descriptor_object_for_warning): Likewise.
	(sarif_builder::make_locations_arr): Update for change to m_context.
	(sarif_builder::get_sarif_column): Likewise.
	(sarif_builder::make_message_object_for_diagram): Convert "context"
	from pointer to reference.
	(sarif_builder::make_tool_object): Likewise for "m_context".
	(sarif_builder::make_driver_tool_component_object): Likewise.
	(sarif_builder::get_or_create_artifact): Likewise.
	(sarif_builder::maybe_make_artifact_content_object): Likewise.
	(sarif_builder::get_source_lines): Likewise.
	(sarif_output_format::on_end_diagnostic): Update for above changes.
	(sarif_output_format::on_diagram): Likewise.
	(sarif_output_format::sarif_output_format): Likewise.
	(diagnostic_output_format_init_sarif): Convert param "context"
	from pointer to reference.
	(diagnostic_output_format_init_sarif_stderr): Likewise.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.
	* diagnostic.cc (diagnostic_output_format_init): Likewise.
	* diagnostic.h (diagnostic_output_format_init): Likewise.
	(diagnostic_output_format_init_json_stderr): Likewise.
	(diagnostic_output_format_init_json_file): Likewise.
	(diagnostic_output_format_init_sarif_stderr): Likewise.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.
	(json_from_expanded_location): Delete decl.
	* gcc.cc (driver_handle_option): Update for change to
	diagnostic_output_format_init.
	* opts.cc (common_handle_option): Likewise.

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc: Introduce subclasses of sarif_object
	for all aspects of the spec that we're using.  Replace almost all
	usage of json::object with uses of these subclasses, the only
	remaining use of json::object being for originalUriBaseIds, as per
	SARIF 2.1.0 §3.14.14.  This stronger typing makes it considerably
	easier to maintain validity against the schema.
	* diagnostic-format-sarif.h (class sarif_logical_location): New.
	(make_sarif_logical_location_object): Convert return type from
	json::object * to sarif_logical_location *.

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* gcov.cc (output_intermediate_json_line): Use
	json::object::set_integer to avoid naked "new".

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc (sarif_artifact::populate_roles):
	Avoid naked "new" by using json::array::append_string.
	(sarif_builder::maybe_make_kinds_array): Likewise.
	* json.cc (json::array::append_string): New.
	(selftest::test_writing_arrays): Use it.
	* json.h (json::array::append_string): New decl.
	* optinfo-emit-json.cc (optrecord_json_writer::pass_to_json):
	Avoid naked "new" by using json::array::append_string.
	(optrecord_json_writer::optinfo_to_json): Likewise.

2024-07-24  David Malcolm  <dmalcolm@redhat.com>

	* json.cc (value::dump): New overload, taking no params.
	* json.h (value::dump): New decl.

2024-07-24  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/116037
	* ext-dce.cc (ext_dce_process_sets): Note if we ever skip a dest
	and return that info explicitly.
	(ext_dce_process_uses): If a set was skipped, then consider all bits
	in every input as live.  Do not try to optimize away an extension if
	we skipped processing a destination in the same insn.  Restore code
	to make shift/rotate count fully live.
	(ext_dce_process_bb): Handle API changes for ext_dce_process_sets.

2024-07-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* common/config/aarch64/aarch64-common.cc
	(aarch64_set_asm_isa_flags): Store a second uint64_t value.
	* config/aarch64/aarch64-opts.h
	(aarch64_feature_flags): Switch typedef to bbitmap<2>.
	* config/aarch64/aarch64.cc
	(aarch64_set_current_function): Extract isa mode from val[0].
	* config/aarch64/aarch64.h
	(aarch64_get_asm_isa_flags): Load a second uint64_t value.
	(aarch64_get_isa_flags): Ditto.
	(aarch64_asm_isa_flags): Ditto.
	(aarch64_isa_flags): Ditto.
	(HANDLE): Use bbitmap<2>::from_index to initialise flags.
	(AARCH64_FL_ISA_MODES): Do arithmetic on integer type.
	(AARCH64_ISA_MODE): Extract value from bbitmap<2> array.
	* config/aarch64/aarch64.opt
	(aarch64_asm_isa_flags_1): New variable.
	(aarch64_isa_flags_1): Ditto.

2024-07-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* bbitmap.h: New file.

2024-07-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-feature-deps.h
	(get_flags_off): Construct aarch64_feature_flags (0) explicitly.

2024-07-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-c.cc
	(aarch64_define_unconditional_macros): Use TARGET_V8R macro.
	(aarch64_update_cpp_builtins): Use TARGET_* macros.
	* config/aarch64/aarch64.h (AARCH64_HAVE_ISA): New macro.
	(AARCH64_ISA_SM_OFF, AARCH64_ISA_SM_ON, AARCH64_ISA_ZA_ON)
	(AARCH64_ISA_V8A, AARCH64_ISA_V8_1A, AARCH64_ISA_CRC)
	(AARCH64_ISA_FP, AARCH64_ISA_SIMD, AARCH64_ISA_LSE)
	(AARCH64_ISA_RDMA, AARCH64_ISA_V8_2A, AARCH64_ISA_F16)
	(AARCH64_ISA_SVE, AARCH64_ISA_SVE2, AARCH64_ISA_SVE2_AES)
	(AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3)
	(AARCH64_ISA_SVE2_SM4, AARCH64_ISA_SME, AARCH64_ISA_SME_I16I64)
	(AARCH64_ISA_SME_F64F64, AARCH64_ISA_SME2, AARCH64_ISA_V8_3A)
	(AARCH64_ISA_DOTPROD, AARCH64_ISA_AES, AARCH64_ISA_SHA2)
	(AARCH64_ISA_V8_4A, AARCH64_ISA_SM4, AARCH64_ISA_SHA3)
	(AARCH64_ISA_F16FML, AARCH64_ISA_RCPC, AARCH64_ISA_RCPC8_4)
	(AARCH64_ISA_RNG, AARCH64_ISA_V8_5A, AARCH64_ISA_TME)
	(AARCH64_ISA_MEMTAG, AARCH64_ISA_V8_6A, AARCH64_ISA_I8MM)
	(AARCH64_ISA_F32MM, AARCH64_ISA_F64MM, AARCH64_ISA_BF16)
	(AARCH64_ISA_SB, AARCH64_ISA_RCPC3, AARCH64_ISA_V8R)
	(AARCH64_ISA_PAUTH, AARCH64_ISA_V8_7A, AARCH64_ISA_V8_8A)
	(AARCH64_ISA_V8_9A, AARCH64_ISA_V9A, AARCH64_ISA_V9_1A)
	(AARCH64_ISA_V9_2A, AARCH64_ISA_V9_3A, AARCH64_ISA_V9_4A)
	(AARCH64_ISA_MOPS, AARCH64_ISA_LS64, AARCH64_ISA_CSSC)
	(AARCH64_ISA_D128, AARCH64_ISA_THE, AARCH64_ISA_GCS): Remove.
	(TARGET_BASE_SIMD, TARGET_SIMD, TARGET_FLOAT)
	(TARGET_NON_STREAMING, TARGET_STREAMING, TARGET_ZA, TARGET_SHA2)
	(TARGET_SHA3, TARGET_AES, TARGET_SM4, TARGET_F16FML)
	(TARGET_CRC32, TARGET_LSE, TARGET_FP_F16INST)
	(TARGET_SIMD_F16INST, TARGET_DOTPROD, TARGET_SVE, TARGET_SVE2)
	(TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3)
	(TARGET_SVE2_SM4, TARGET_SME, TARGET_SME_I16I64)
	(TARGET_SME_F64F64, TARGET_SME2, TARGET_ARMV8_3, TARGET_JSCVT)
	(TARGET_FRINT, TARGET_TME, TARGET_RNG, TARGET_MEMTAG)
	(TARGET_I8MM, TARGET_SVE_I8MM, TARGET_SVE_F32MM)
	(TARGET_SVE_F64MM, TARGET_BF16_FP, TARGET_BF16_SIMD)
	(TARGET_SVE_BF16, TARGET_PAUTH, TARGET_BTI, TARGET_MOPS)
	(TARGET_LS64, TARGET_CSSC, TARGET_SB, TARGET_RCPC, TARGET_RCPC2)
	(TARGET_RCPC3, TARGET_SIMD_RDMA, TARGET_ARMV9_4, TARGET_D128)
	(TARGET_THE, TARGET_GCS): Redefine using AARCH64_HAVE_ISA.
	(TARGET_V8R, TARGET_V9A): New.
	* config/aarch64/aarch64.md (arch_enabled): Use TARGET_RCPC2.
	* config/aarch64/iterators.md (GPI_I16): Use TARGET_FP_F16INST.
	(GPF_F16): Ditto.
	* config/aarch64/predicates.md
	(aarch64_rcpc_memory_operand): Use TARGET_RCPC2.

2024-07-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64.cc
	(aarch64_valid_sysreg_name_p): Add bool cast.

2024-07-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* common/config/aarch64/aarch64-common.cc
	(aarch64_set_asm_isa_flags): Reorder, and add suffix to names.
	* config/aarch64/aarch64.h
	(aarch64_get_asm_isa_flags): Add "_0" suffix.
	(aarch64_get_isa_flags): Ditto.
	(aarch64_asm_isa_flags): Redefine using renamed uint64_t value.
	(aarch64_isa_flags): Ditto.
	* config/aarch64/aarch64.opt:
	(aarch64_asm_isa_flags): Rename to...
	(aarch64_asm_isa_flags_0): ...this, and change to uint64_t.
	(aarch64_isa_flags): Rename to...
	(aarch64_isa_flags_0): ...this, and change to uint64_t.

2024-07-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* common/config/aarch64/aarch64-common.cc
	(aarch64_handle_option): Use new macro.
	* config/aarch64/aarch64.cc
	(aarch64_override_options_internal): Ditto.
	(aarch64_option_print): Ditto.
	(aarch64_set_current_function): Ditto.
	(aarch64_can_inline_p): Ditto.
	(aarch64_declare_function_name): Ditto.
	(aarch64_start_file): Ditto.
	* config/aarch64/aarch64.h (aarch64_get_asm_isa_flags): New
	(aarch64_get_isa_flags): New.
	(aarch64_asm_isa_flags): Use new macro.
	(aarch64_isa_flags): Ditto.

2024-07-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-opts.h: Add aarch64_isa_mode typedef.
	* config/aarch64/aarch64-protos.h
	(aarch64_gen_callee_cookie): Use aarch64_isa_mode parameter.
	(aarch64_sme_vq_immediate): Ditto.
	* config/aarch64/aarch64.cc
	(aarch64_fntype_pstate_sm): Use aarch64_isa_mode values.
	(aarch64_fntype_pstate_za): Ditto.
	(aarch64_fndecl_pstate_sm): Ditto.
	(aarch64_fndecl_pstate_za): Ditto.
	(aarch64_fndecl_isa_mode): Ditto.
	(aarch64_cfun_incoming_pstate_sm): Ditto.
	(aarch64_cfun_enables_pstate_sm): Ditto.
	(aarch64_call_switches_pstate_sm): Ditto.
	(aarch64_gen_callee_cookie): Ditto.
	(aarch64_callee_isa_mode): Ditto.
	(aarch64_insn_callee_abi): Ditto.
	(aarch64_sme_vq_immediate): Ditto.
	(aarch64_add_offset_temporaries): Ditto.
	(aarch64_add_offset): Ditto.
	(aarch64_add_sp): Ditto.
	(aarch64_sub_sp): Ditto.
	(aarch64_guard_switch_pstate_sm): Ditto.
	(aarch64_switch_pstate_sm): Ditto.
	(aarch64_init_cumulative_args): Ditto.
	(aarch64_allocate_and_probe_stack_space): Ditto.
	(aarch64_expand_prologue): Ditto.
	(aarch64_expand_epilogue): Ditto.
	(aarch64_start_call_args): Ditto.
	(aarch64_expand_call): Ditto.
	(aarch64_end_call_args): Ditto.
	(aarch64_set_current_function): Ditto, with added conversions.
	(aarch64_handle_attr_arch): Avoid macro with changed type.
	(aarch64_handle_attr_cpu): Ditto.
	(aarch64_handle_attr_isa_flags): Ditto.
	(aarch64_switch_pstate_sm_for_landing_pad):
	Use arch64_isa_mode values.
	(aarch64_switch_pstate_sm_for_jump): Ditto.
	(pass_switch_pstate_sm::gate): Ditto.
	* config/aarch64/aarch64.h
	(AARCH64_ISA_MODE_{SM_ON|SM_OFF|ZA_ON}): New macros.
	(AARCH64_FL_SM_STATE): Mark as possibly unused.
	(AARCH64_ISA_MODE_SM_STATE): New aarch64_isa_mode mask.
	(AARCH64_DEFAULT_ISA_MODE): New aarch64_isa_mode value.
	(AARCH64_FL_DEFAULT_ISA_MODE): Define using above value.
	(AARCH64_ISA_MODE): Change type to aarch64_isa_mode.
	(arm_pcs): Use aarch64_isa_mode value.

2024-07-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64.cc
	(aarch64_override_options): Remove temporary variable.

2024-07-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64.h (DEF_AARCH64_ISA_MODE): Move to...
	* config/aarch64/aarch64-opts.h (DEF_AARCH64_ISA_MODE): ...here.

2024-07-24  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64.cc
	(aarch64_tune_flags): Remove unused global variable.
	(aarch64_override_options_internal): Remove dead assignment.

2024-07-24  Andrew Pinski  <quic_apinski@quicinc.com>

	* config/rs6000/rs6000-builtins.def: s/iorc/iorn/. s/andc/andn/
	for the code.
	* config/rs6000/rs6000-string.cc (expand_cmp_vec_sequence): Update
	to iorn.
	* config/rs6000/rs6000.md (andc<mode>3): Rename to ...
	(andn<mode>3): This.
	(iorc<mode>3): Rename to ...
	(iorn<mode>3): This.
	* doc/md.texi: Update documentation for the rename.
	* internal-fn.def (BIT_ANDC): Rename to ...
	(BIT_ANDN): This.
	(BIT_IORC): Rename to ...
	(BIT_IORN): This.
	* optabs.def (andc_optab): Rename to ...
	(andn_optab): This.
	(iorc_optab): Rename to ...
	(iorn_optab): This.
	* gimple-isel.cc (gimple_expand_vec_cond_expr): Update for the
	renamed internal functions, ANDC/IORC to ANDN/IORN.

2024-07-24  Gaius Mulley  <gaiusmod2@gmail.com>

	* doc/install.texi (GM2-prerequisite): Add GNU flex.

2024-07-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116057
	* tree-ssa-ccp.cc (likely_value): Also walk CTORs in stmt
	operands to look for constants.

2024-07-24  Kyrylo Tkachov  <ktkachov@nvidia.com>

	Revert:
	2024-07-24  Jennifer Schmitz  <jschmitz@nvidia.com>

	* config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Implement
	fusion logic.
	* config/aarch64/aarch64-fusion-pairs.def (cmp+csel): New entry.
	(cmp+cset): Likewise.
	* config/aarch64/tuning_models/neoversev2.h: Enable logic in
	field fusible_ops.

2024-07-24  Jennifer Schmitz  <jschmitz@nvidia.com>

	* config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Implement
	fusion logic.
	* config/aarch64/aarch64-fusion-pairs.def (cmp+csel): New entry.
	(cmp+cset): Likewise.
	* config/aarch64/tuning_models/neoversev2.h: Enable logic in
	field fusible_ops.

2024-07-24  Christoph Müllner  <christoph.muellner@vrull.eu>

	PR target/116035
	* config/riscv/bitmanip.md: Disable zero_extendsidi2_bitmanip
	for XTheadMemIdx.

2024-07-24  Lingling Kong  <lingling.kong@intel.com>

	PR target/115978
	* config/i386/driver-i386.cc (host_detect_local_cpu):  Enable
	APX_F only for 64-bit codegen.
	* config/i386/i386-options.cc (DEF_PTA):  Skip PTA_APX_F if
	not in 64-bit mode.

2024-07-24  Pan Li  <pan2.li@intel.com>

	PR target/115961
	* internal-fn.cc (type_strictly_matches_mode_p): Add new func
	impl to check type strictly matches mode or not.
	(type_pair_strictly_matches_mode_p): Ditto but for tree type
	pair.
	(direct_internal_fn_supported_p): Add above check for the tree
	type pair.

2024-07-23  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (get_type_num_reference_type): Handle rvalue refs.
	(get_type_num_array_type): Add DW_TAG_rvalue_reference_type to switch.
	(get_type_num): Handle DW_TAG_rvalue_reference_type DIEs.
	* dwarf2codeview.h (CV_PTR_MODE_RVREF): Define.

2024-07-23  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (get_type_num_reference_type): New function.
	(get_type_num_array_type): Add DW_TAG_reference_type to switch.
	(get_type_num): Handle DW_TAG_reference_type DIEs.
	* dwarf2codeview.h (CV_PTR_MODE_LVREF): Define.

2024-07-23  Vineet Gupta  <vineetg@rivosinc.com>

	* config/riscv/bitmanip.md: Fix splitter.

2024-07-23  Marek Polacek  <polacek@redhat.com>

	* doc/extend.texi: Add missing @option.

2024-07-23  Andi Kleen  <ak@linux.intel.com>

	PR c/83324
	* doc/extend.texi: Document [[musttail]]

2024-07-23  Tobias Burnus  <tburnus@baylibre.com>

	* doc/install.texi (amdgcn-x-amdhsa): Suggest newer git version
	for newlib.

2024-07-23  Jiufu Guo  <guojiufu@linux.ibm.com>

	PR target/96866
	* config/rs6000/rs6000.cc (print_operand_address): Emit message for
	unsupported operand.

2024-07-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/116002
	* tree-ssa-structalias.cc (topo_visit): Also consider
	SCALAR = SCALAR complex constraints as edges.

2024-07-23  Jakub Jelinek  <jakub@redhat.com>
	    Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/116034
	* tree-ssa.cc (maybe_rewrite_mem_ref_base): Only use IMAGPART_EXPR
	if MEM_REF offset is equal to element type size.

2024-07-23  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/116002
	* cselib.cc (cselib_hash_rtx): Use inchash to get proper mixing.
	Consistently avoid a zero return value when hashing successfully.
	Consistently treat a zero hash value from recursing as fatal.
	Use hashval_t where appropriate.
	(cselib_hash_plus_const_int): Likewise.
	(new_cselib_val): Use hashval_t.
	(cselib_lookup_1): Likewise.

2024-07-23  liuhongt  <hongtao.liu@intel.com>

	* config/i386/i386.cc (ix86_hardreg_mov_ok): Relax mov subreg
	to hard register after split1.

2024-07-23  Kewen Lin  <linkw@linux.ibm.com>

	PR target/115713
	* config/rs6000/rs6000.cc (rs6000_inner_target_options): Update option
	set information for rs6000_opt_vars.

2024-07-23  Kewen Lin  <linkw@linux.ibm.com>

	PR target/115713
	* config/rs6000/rs6000.cc (rs6000_inner_target_options): Avoid to
	enable altivec or disable avoid-indexed-addresses automatically
	when they get specified explicitly.

2024-07-23  Kewen Lin  <linkw@linux.ibm.com>

	PR target/115713
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Emit error
	messages when explicit VSX encounters explicit soft-float, no-altivec
	or avoid-indexed-addresses.

2024-07-23  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/i386.md (prefetchi): Change to %a.

2024-07-23  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/115877
	* ext-dce.cc (ext_dce_process_sets): Reasonably handle input/output
	operands.
	(ext_dce_rd_transfer_n): Drop bogus assertion.

2024-07-23  Pan Li  <pan2.li@intel.com>

	* config/riscv/iterators.md (ANYI_DOUBLE_TRUNC): Add new iterator
	for int double truncation.
	(ANYI_DOUBLE_TRUNCATED): Add new attr for int double truncation.
	(anyi_double_truncated): Ditto but for lowercase.
	* config/riscv/riscv-protos.h (riscv_expand_ustrunc): Add new
	func decl for expanding ustrunc
	* config/riscv/riscv.cc (riscv_expand_ustrunc): Add new func
	impl to expand ustrunc.
	* config/riscv/riscv.md (ustrunc<mode><anyi_double_truncated>2): Impl
	the new pattern ustrunc<m><n>2 for int.

2024-07-22  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/109985
	* ipa-modref.cc (modref_summary::useful_p): Fix handling of ECF_NOVOPS.
	(modref_access_analysis::process_fnspec): Likevise.
	(modref_access_analysis::analyze_call): Likevise.
	(propagate_unknown_call): Likevise.
	(modref_propagate_in_scc): Likevise.
	(modref_propagate_flags_in_scc): Likewise.
	(ipa_merge_modref_summary_after_inlining): Likewise.

2024-07-22  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/111613
	* ipa-modref.cc (analyze_parms): Do not preserve EAF_NO_DIRECT_READ and
	EAF_NO_INDIRECT_READ from past flags.

2024-07-22  Michael Meissner  <meissner@linux.ibm.com>

	* config.gcc (powerpc*-*-*): Add support for power11.
	* config/rs6000/aix71.h (ASM_CPU_SPEC): Add support for -mcpu=power11.
	* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
	* config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
	* config/rs6000/driver-rs6000.cc (asm_names): Likewise.
	* config/rs6000/ppc-auxv.h (PPC_PLATFORM_POWER11): New define.
	* config/rs6000/rs6000-builtin.cc (cpu_is_info): Add power11.
	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
	_ARCH_PWR11 if -mcpu=power11.
	* config/rs6000/rs6000-cpus.def (POWER11_MASKS_SERVER): New define.
	(POWERPC_MASKS): Add power11.
	(power11 cpu): Add power11 definition.
	* config/rs6000/rs6000-opts.h (PROCESSOR_POWER11): Add power11 processor.
	* config/rs6000/rs6000-string.cc (expand_compare_loop): Likewise.
	* config/rs6000/rs6000-tables.opt: Regenerate.
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Add power11
	support.
	(rs6000_machine_from_flags): Likewise.
	(rs6000_reassociation_width): Likewise.
	(rs6000_adjust_cost): Likewise.
	(rs6000_issue_rate): Likewise.
	(rs6000_sched_reorder): Likewise.
	(rs6000_sched_reorder2): Likewise.
	(rs6000_register_move_cost): Likewise.
	(rs6000_opt_masks): Likewise.
	* config/rs6000/rs6000.h (ASM_CPU_SPEC): Likewise.
	* config/rs6000/rs6000.md (cpu attribute): Add power11.
	* config/rs6000/rs6000.opt (-mpower11): Add internal power11 flag.
	* doc/invoke.texi (RS/6000 and PowerPC Options): Document -mcpu=power11.
	* config/rs6000/power10.md (all reservations): Add power11 support.

2024-07-22  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/115877
	* ext-dce.cc (ext_dce_process_sets): More correctly handle SUBREG
	destinations.

2024-07-22  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/115033
	* ipa-modref.cc (modref_eaf_analysis::analyze_ssa_name): Fix checking of
	EAF flags when analysing values dereferenced as function parameters.

2024-07-22  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/114207
	* ipa-prop.cc (unadjusted_ptr_and_unit_offset): Fix accounting of offsets in ADDR_EXPR.

2024-07-22  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/115277
	* ipa-icf-gimple.cc (func_checker::compare_loops): compare loop
	bounds.

2024-07-22  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/116009
	* rtl-ssa/accesses.cc (function_info::add_def): Set the root
	local variable after removing the old clobber group.

2024-07-22  Richard Sandiford  <richard.sandiford@arm.com>

	* rtl-ssa/accesses.h (rtl_ssa::pp_def_splay_tree): Declare.
	(dump, debug): Add overloads for def_splay_tree.
	* rtl-ssa/accesses.cc (rtl_ssa::pp_def_splay_tree): New function.
	(dump, debug): Add overloads for def_splay_tree.

2024-07-22  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/115969
	* config/aarch64/aarch64.cc (aarch64_simd_mem_operand_p): Require
	the operand to be a legitimate memory_operand.

2024-07-22  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/115877
	* ext-dce.cc (group_limit): New function.
	(mark_reg_live): Likewise.
	(ext_dce_process_sets): Use new functions.
	(ext_dce_process_uses): Likewise.
	(ext_dce_init): Likewise.

2024-07-22  Richard Biener  <rguenther@suse.de>

	* fold-const.cc (operand_compare::hash_operand): Fix hash
	of WIDEN_*_EXPR.

2024-07-22  Richard Biener  <rguenther@suse.de>

	* inchash.h (inchash::end): Make const.
	(inchash::merge): Take const reference hash argument.
	(inchash::add_commutative): Likewise.

2024-07-22  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/115531
	* config/aarch64/aarch64.cc
	(aarch64_conditional_operation_is_expensive): New.
	(TARGET_VECTORIZE_CONDITIONAL_OPERATION_IS_EXPENSIVE): New.

2024-07-22  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/115531
	* tree-vect-patterns.cc (vect_cond_store_pattern_same_ref): New.
	(vect_recog_cond_store_pattern): New.
	(vect_vect_recog_func_ptrs): Use it.
	* target.def (conditional_operation_is_expensive): New.
	* doc/tm.texi: Regenerate.
	* doc/tm.texi.in: Document it.
	* targhooks.cc (default_conditional_operation_is_expensive): New.
	* targhooks.h (default_conditional_operation_is_expensive): New.

2024-07-21  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/115877
	* ext-dce.cc (safe_for_live_propagation): Handle RTX_CONST_OBJ.

2024-07-21  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/115877
	* ext-dce.cc (ext_dce_process_uses): Restore the value of DST_MASK
	for reach operand.

2024-07-21  Sam James  <sam@gentoo.org>

	* Makefile.in (NOCOMMON_FLAG): Delete.
	(GCC_WARN_CFLAGS): Drop NOCOMMON_FLAG.
	(GCC_WARN_CXXFLAGS): Drop NOCOMMON_FLAG.
	* configure.ac: Ditto.
	* configure: Regenerate.

2024-07-21  Oleg Endo  <olegendo@gcc.gnu.org>

	* config/sh/sh.md (mov_neg_si_t): Allow insn and split after
	register allocation.
	(*treg_noop_move): New insn.

2024-07-20  Andi Kleen  <ak@gcc.gnu.org>

	Revert:
	2024-07-20  Andi Kleen  <ak@linux.intel.com>

	PR c/83324
	* doc/extend.texi: Document [[musttail]]

2024-07-20  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (enum cv_sym_type): Add new values.
	(struct codeview_symbol): Add function to union.
	(struct codeview_custom_type): Add lf_func_id to union.
	(write_function): New function.
	(write_codeview_symbols): Call write_function.
	(write_lf_func_id): New function.
	(write_custom_types): Call write_lf_func_id.
	(add_function): New function.
	(codeview_debug_early_finish): Call add_function.

2024-07-20  André Maroneze  <andre.maroneze@cea.fr>

	* doc/invoke.texi (Spec Files): Remove documentation of obsolete
	spec strings "predefines" and "signed_char".

2024-07-20  Siddhesh Poyarekar  <siddhesh@gotplt.org>

	* opt-suggestions.cc
	(option_proposer::build_option_suggestions): Pull OPTB
	definition out of the innermost loop.

2024-07-20  Andi Kleen  <ak@linux.intel.com>

	PR c/83324
	* doc/extend.texi: Document [[musttail]]

2024-07-20  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch-protos.h
	(loongarch_split_128bit_move): Delete.
	(loongarch_split_128bit_move_p): Delete.
	(loongarch_split_256bit_move): Delete.
	(loongarch_split_256bit_move_p): Delete.
	(loongarch_split_vector_move): Add a function declaration.
	* config/loongarch/loongarch.cc
	(loongarch_vector_costs::finish_cost): Adjust the code
	formatting.
	(loongarch_split_vector_move_p): Merge
	loongarch_split_128bit_move_p and loongarch_split_256bit_move_p.
	(loongarch_split_move_p): Merge code.
	(loongarch_split_move): Likewise.
	(loongarch_split_128bit_move_p): Delete.
	(loongarch_split_256bit_move_p): Delete.
	(loongarch_split_128bit_move): Delete.
	(loongarch_split_vector_move): Merge loongarch_split_128bit_move
	and loongarch_split_256bit_move.
	(loongarch_split_256bit_move): Delete.
	(loongarch_global_init): Remove the extra semicolon at the
	end of the function.
	* config/loongarch/loongarch.md (*movdf_softfloat):  Added a new
	condition TARGET_64BIT.

2024-07-19  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/116003
	* value-relation.cc (equiv_oracle::register_initial_def): Check
	if SSA_NAME is in the IL before registering.

2024-07-19  Thomas Schwinge  <tschwinge@baylibre.com>

	* passes.def: Rewrite usage comment at the top.

2024-07-19  Richard Sandiford  <richard.sandiford@arm.com>

	PR middle-end/115406
	* fold-const.cc (native_encode_vector_part): For vector booleans,
	check whether an element is nonzero and, if so, set all of the
	correspending bits in the target image.
	* simplify-rtx.cc (native_encode_rtx): Likewise.

2024-07-19  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/builtins.def (MASK1): New DEF_BUILTIN.
	* config/avr/avr.cc (avr_rtx_costs_1): Handle rtx costs for
	expressions like __builtin_avr_mask1.
	(avr_init_builtins) <uintQI_ftype_uintQI_uintQI>: New tree type.
	(avr_expand_builtin) [AVR_BUILTIN_MASK1]: Diagnose unexpected forms.
	(avr_fold_builtin) [AVR_BUILTIN_MASK1]: Handle case.
	* config/avr/avr.md (gen_mask1): New expand helper.
	(mask1_0x01_split, mask1_0x80_split, mask1_0xfe_split): New
	insn-and-split.
	(*mask1_0x01, *mask1_0x80, *mask1_0xfe): New insns.
	* doc/extend.texi (AVR Built-in Functions) <__builtin_avr_mask1>:
	Document new built-in function.

2024-07-19  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* config/bpf/atomic.md (atomic_compare_and_swap,
	atomic_exchange): Add operand modifier %M to the first
	operand.
	* config/bpf/bpf.cc (no_parentheses_mem_operand): Create
	variable.
	(bpf_print_operand): Set no_parentheses_mem_operand variable if
	%M operand is used.
	(bpf_print_operand_address): Conditionally output parentheses.

2024-07-19  Pan Li  <pan2.li@intel.com>

	PR target/115863
	* match.pd: Add single_use check for .SAT_TRUNC form 2.

2024-07-18  René Rebe  <rene@exactcode.de>
	    Peter Bergner  <bergner@linux.ibm.com>

	PR target/97367
	* config/rs6000/rs6000.cc (rs6000_machine_from_flags): Do not consider
	OPTION_MASK_ALTIVEC.
	(emit_asm_machine): For Altivec compiles, emit a ".machine altivec".

2024-07-18  Marek Polacek  <polacek@redhat.com>
	    Jakub Jelinek   <jakub@redhat.com>

	PR c++/115865
	* tree-eh.cc (get_eh_else): Check that the result of
	gimple_seq_first_stmt is non-null.

2024-07-18  LIU Hao  <lh_mouse@126.com>

	PR rtl-optimization/115049
	* varasm.cc (decl_binds_to_current_def_p): Add a check for COMDAT
	declarations too, like weak ones.

2024-07-18  Richard Biener  <rguenther@suse.de>

	PR middle-end/115641
	* fold-const.cc (decode_field_reference): If the inner
	reference isn't something we can take the address of, fail.

2024-07-18  Pan Li  <pan2.li@intel.com>

	* doc/md.texi: Add Standard-Names ustrunc and sstrunc.

2024-07-18  Rubin Gerritsen  <rubin.gerritsen@gmail.com>

	* gimple-fold.cc (dump_transformation): Moved definition.
	(replace_call_with_call_and_fold): Calls dump_transformation.
	(gimple_fold_builtin_stxcpy_chk): Removes call to
	dump_transformation, now in replace_call_with_call_and_fold.
	(gimple_fold_builtin_stxncpy_chk): Removes call to
	dump_transformation, now in replace_call_with_call_and_fold.

2024-07-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/104515
	* tree-ssa-loop-im.cc (execute_sm_exit): Add clobbers_to_prune
	parameter and handle re-materializing of clobbers.
	(sm_seq_valid_bb): end-of-storage/object clobbers are OK inside
	an ordered sequence of stores.
	(sm_seq_push_down): Refuse to push down clobbers.
	(hoist_memory_references): Prune clobbers from the loop body
	we re-materialized on an exit.

2024-07-18  Roger Sayle  <roger@nextmovesoftware.com>

	* match.pd ((FTYPE) N CMP CST): Only worry about exceptions with
	flag_trapping_math, and about signaling NaNs with HONOR_SNANS.

2024-07-18  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* doc/invoke.texi (AArch64 Options): Document rewriting of
	-march=native to -mcpu=native.

2024-07-18  liuhongt  <hongtao.liu@intel.com>

	PR target/115843
	* config/i386/predicates.md (const0_or_m1_operand): New
	predicate.
	* config/i386/sse.md (*<avx512>_store<mode>_mask_1): New
	pre_reload define_insn_and_split.
	(V): Add V32BF,V16BF,V8BF.
	(V4SF_V8BF): Rename to ..
	(V24F_128): .. this.
	(*vec_concat<mode>): Adjust with V24F_128.
	(*vec_concat<mode>_0): Ditto.

2024-07-18  Andi Kleen  <ak@linux.intel.com>

	PR c/83324
	* calls.cc (initialize_argument_information): Mark messages
	for translation.
	(can_implement_as_sibling_call_p): Dito.
	(expand_call): Dito.

2024-07-18  Andi Kleen  <ak@linux.intel.com>

	PR c/83324
	* tree-tailcall.cc (maybe_error_musttail): New function.
	(suitable_for_tail_opt_p): Report error reason.
	(suitable_for_tail_call_opt_p): Report error reason.
	(find_tail_calls): Accept basic blocks with abnormal edges.
	Delay reporting of errors until the call is discovered.
	Move top level suitability checks to here.
	(tree_optimize_tail_calls_1): Remove top level checks.

2024-07-18  Andi Kleen  <ak@linux.intel.com>

	PR c/83324
	* function.h (struct function): Add has_musttail.
	* lto-streamer-in.cc (input_struct_function_base): Stream
	has_musttail.
	* lto-streamer-out.cc (output_struct_function_base): Dito.
	* passes.def (pass_musttail): Add.
	* tree-cfg.cc (notice_special_calls): Record has_musttail.
	(clear_special_calls): Clear has_musttail.
	* tree-pass.h (make_pass_musttail): Add.
	* tree-tailcall.cc (find_tail_calls): Handle only_musttail
	argument.
	(tree_optimize_tail_calls_1): Pass on only_musttail.
	(execute_tail_calls): Pass only_musttail as false.
	(class pass_musttail): Add.
	(make_pass_musttail): Add.

2024-07-18  Andi Kleen  <ak@linux.intel.com>

	PR target/115255
	* function.cc (thread_prologue_and_epilogue_insns): Check
	cfun->tail_call_marked for sibcalls too.
	(rest_of_handle_thread_prologue_and_epilogue): Dito.

2024-07-18  Andi Kleen  <ak@linux.intel.com>

	PR c/83324
	* calls.cc (maybe_complain_about_tail_call): Clear must tail
	flag on error.
	(expand_call): Give error messages for all musttail failures.

2024-07-17  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/115929
	* rtl-ssa/movement.h (canonicalize_move_range): Check for null prev
	and next insns and create an invalid move range for them.

2024-07-17  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/115928
	* rtl-ssa/accesses.h (clobber_group): Add a new constructor that
	takes the first, last and root clobbers.
	* rtl-ssa/internals.inl (clobber_group::clobber_group): Define it.
	* rtl-ssa/accesses.cc (function_info::split_clobber_group): Use it.
	Allocate a new group for both sides and invalidate the previous group.
	(function_info::add_def): After calling split_clobber_group,
	remove the old group from the splay tree.

2024-07-17  Richard Sandiford  <richard.sandiford@arm.com>

	* genattrtab.cc (attr_desc::cxx_type): New field.
	(write_attr_get, write_attr_value): Use it.
	(gen_attr, find_attr, make_internal_attr): Initialize it,
	dropping enum tags.

2024-07-17  Eikansh Gupta  <quic_eikagupt@quicinc.com>

	PR tree-optimization/111150
	* match.pd (`(a ? x : y) eq/ne (b ? x : y)`): New pattern.
	(`(a ? x : y) eq/ne (b ? y : x)`): New pattern.

2024-07-17  Andrew Pinski  <quic_apinski@quicinc.com>

	* dbgcnt.def (ext_dce): New debug counter.
	* ext-dce.cc (ext_dce_try_optimize_insn): Reject the insn
	if the debug counter says so.
	(ext_dce): Rename to ...
	(ext_dce_execute): This.
	(pass_ext_dce::execute): Update for the name of ext_dce.

2024-07-17  Uros Bizjak  <ubizjak@gmail.com>

	PR target/115526
	* config/alpha/alpha.md (movdi_er_high_g): Add cannot_copy attribute.
	(movdi_er_tlsgd): Ditto.
	(movdi_er_tlsldm): Ditto.
	(call_value_osf_<tls>): Ditto.

2024-07-17  Georg-Johann Lay  <avr@gjlay.de>

	PR target/90616
	* config/avr/predicates.md (const_0mod256_operand): New predicate.
	* config/avr/constraints.md (Cp8): New constraint.
	* config/avr/avr.md (*aligned_add_symbol): New insn.
	* config/avr/avr.cc (avr_out_plus_symbol) [HImode]:
	When op2 is a multiple of 256, there is no need to add / subtract
	the lo8 part.
	(avr_rtx_costs_1) [PLUS && HImode]: Return expected costs for
	new insn *aligned_add_symbol as it applies.

2024-07-17  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/115887
	* gimple-lower-bitint.cc (gimple_lower_bitint): Use gsi_insert_on_edge
	instead of gsi_insert_on_edge_immediate and set edge_insertions to
	true.

2024-07-17  Jakub Jelinek  <jakub@redhat.com>

	* varasm.cc (default_elf_asm_output_ascii): Use ASM_OUTPUT_SKIP instead
	of 2 or more default_elf_asm_output_limited_string (f, "") calls and
	adjust base64 heuristics correspondingly.

2024-07-17  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/115936
	* tree-scalar-evolution.cc (simple_iv_with_niters): Use sizetype for
	pointers.

2024-07-17  Feng Xue  <fxue@os.amperecomputing.com>

	PR tree-optimization/114440
	* tree-vectorizer.h (struct _stmt_vec_info): Add a new field
	reduc_result_pos.
	* tree-vect-loop.cc (vect_transform_reduction): Generate lane-reducing
	statements in an optimized order.

2024-07-17  Feng Xue  <fxue@os.amperecomputing.com>

	PR tree-optimization/114440
	* tree-vectorizer.h (vectorizable_lane_reducing): New function
	declaration.
	* tree-vect-stmts.cc (vect_analyze_stmt): Call new function
	vectorizable_lane_reducing to analyze lane-reducing operation.
	* tree-vect-loop.cc (vect_model_reduction_cost): Remove cost computation
	code related to	emulated_mixed_dot_prod.
	(vectorizable_lane_reducing): New function.
	(vectorizable_reduction): Allow multiple lane-reducing operations in
	loop reduction. Move some original lane-reducing related code to
	vectorizable_lane_reducing.
	(vect_transform_reduction): Adjust comments with updated example.

2024-07-17  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vect-loop.cc (vect_reduction_update_partial_vector_usage):
	Calculate effective vector stmts number with generic
	vect_get_num_copies.
	(vect_transform_reduction): Insert copies for lane-reducing so as to
	fix over-estimated vector stmts number.
	(vect_transform_cycle_phi): Calculate vector PHI number only based on
	output vectype.
	* tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Remove
	adjustment on vector stmts number specific to slp reduction.

2024-07-17  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vectorizer.h (vect_get_num_copies): New overload function.
	* tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Calculate
	number of vector stmts for slp node with vect_get_num_copies.
	(vect_slp_analyze_node_operations): Calculate number of vector elements
	for constant/external slp node with vect_get_num_copies.

2024-07-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115959
	* tree-vect-loop.cc (vect_create_epilog_for_reduction):
	Get at the REDUC_IDX child in a safer way for COND_EXPR
	nodes.

2024-07-17  Jakub Jelinek  <jakub@redhat.com>

	PR other/115958
	* varasm.cc (default_elf_asm_output_ascii): Cast t - s to unsigned
	to avoid -Wsign-compare warnings.

2024-07-17  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/115527
	* gimple-fold.cc (clear_padding_flush): Introduce endsize
	variable and use it instead of wordsize when comparing it against
	nonzero_last.
	(clear_padding_type): Increment off by sz.

2024-07-17  Haochen Gui  <guihaoc@gcc.gnu.org>

	* config/rs6000/rs6000.md (mov<mode>cc, *mov<mode>cc_p10,
	*mov<mode>cc_invert_p10, *fpmask<mode>, *xxsel<mode>,
	@ieee_128bit_vsx_abs<mode>2, *ieee_128bit_vsx_nabs<mode>2,
	add<mode>3, sub<mode>3, mul<mode>3, div<mode>3, sqrt<mode>2,
	copysign<mode>3, copysign<mode>3_hard, copysign<mode>3_soft,
	@neg<mode>2_hw, @abs<mode>2_hw, *nabs<mode>2_hw, fma<mode>4_hw,
	*fms<mode>4_hw, *nfma<mode>4_hw, *nfms<mode>4_hw,
	extend<SFDF:mode><IEEE128:mode>2_hw, trunc<mode>df2_hw,
	trunc<mode>sf2_hw, fix<uns>_<IEEE128:mode><SDI:mode>2_hw,
	fix<uns>_trunc<IEEE128:mode><QHI:mode>2,
	*fix<uns>_trunc<IEEE128:mode><QHSI:mode>2_mem,
	float_<mode>di2_hw, float_<mode>si2_hw,
	float<QHI:mode><IEEE128:mode>2, floatuns_<mode>di2_hw,
	floatuns_<mode>si2_hw, floatuns<QHI:mode><IEEE128:mode>2,
	floor<mode>2, ceil<mode>2, btrunc<mode>2, round<mode>2,
	add<mode>3_odd, sub<mode>3_odd, mul<mode>3_odd, div<mode>3_odd,
	sqrt<mode>2_odd, fma<mode>4_odd, *fms<mode>4_odd, *nfma<mode>4_odd,
	*nfms<mode>4_odd, trunc<mode>df2_odd, *cmp<mode>_hw for IEEE128):
	Remove guard FLOAT128_IEEE_P.
	(@extenddf<mode>2_fprs, @extenddf<mode>2_vsx,
	trunc<mode>df2_internal1, trunc<mode>df2_internal2,
	fix_trunc_helper<mode>, neg<mode>2, *cmp<mode>_internal1,
	*cmp<IBM128:mode>_internal2 for IBM128): Remove guard FLOAT128_IBM_P.

2024-07-17  Kewen Lin  <linkw@linux.ibm.com>

	* config/rs6000/rs6000.cc (init_float128_ieee): Use trunc_optab rather
	than sext_optab for converting FLOAT128_IBM_P mode to FLOAT128_IEEE_P
	mode, and use sext_optab rather than trunc_optab for converting
	FLOAT128_IEEE_P mode to FLOAT128_IBM_P mode.
	(rs6000_expand_float128_convert): Likewise.

2024-07-17  Kewen Lin  <linkw@linux.ibm.com>

	PR target/112993
	* tree.cc (build_common_tree_nodes): Drop the workaround for rs6000
	KFmode precision adjustment.

2024-07-17  Kewen Lin  <linkw@linux.ibm.com>

	PR target/112993
	* value-range.h (range_compatible_p): Remove the workaround on
	different type precision between _Float128 and long double.

2024-07-17  Kewen Lin  <linkw@linux.ibm.com>

	PR target/112993
	* config/rs6000/rs6000-modes.def (IFmode, KFmode, TFmode): Define
	with FLOAT_MODE instead of FRACTIONAL_FLOAT_MODE, don't use special
	precisions any more.
	(rs6000-modes.h): Remove include.
	* config/rs6000/rs6000-modes.h: Remove.
	* config/rs6000/rs6000.h (rs6000-modes.h): Remove include.
	* config/rs6000/t-rs6000: Remove rs6000-modes.h include.
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace
	all uses of FLOAT_PRECISION_TFmode with 128.
	(rs6000_c_mode_for_floating_type): Likewise.
	* config/rs6000/rs6000.md (define_expand extendiftf2): Remove.
	(define_expand extendifkf2): Remove.
	(define_expand extendtfkf2): Remove.
	(define_expand trunckftf2): Remove.
	(define_expand trunctfif2): Remove.
	(define_expand extendtfif2): Add new assertion.
	(define_expand expandkftf2): New.
	(define_expand trunciftf2): Add new assertion.
	(define_expand trunctfkf2): New.
	(define_expand truncifkf2): Change with gcc_unreachable.
	(define_expand expandkfif2): New.
	(define_insn_and_split extendkftf2): Rename to  ...
	(define_insn_and_split *extendkftf2): ... this.
	(define_insn_and_split trunctfkf2): Rename to ...
	(define_insn_and_split *extendtfkf2): ... this.

2024-07-17  Kewen Lin  <linkw@linux.ibm.com>

	PR target/112993
	* expr.cc (convert_mode_scalar): Allow same precision conversion
	between scalar floating point modes if whose underlying format is
	ibm_extended_format or ieee_quad_format, and refactor assertion
	with new lambda function acceptable_same_precision_modes.  Use
	trunc_optab rather than sext_optab for ibm128 to ieee128 conversion.
	* optabs-libfuncs.cc (gen_trunc_conv_libfunc): Use trunc_optab rather
	than sext_optab for ibm128 to ieee128 conversion.

2024-07-17  Peter Bergner  <bergner@linux.ibm.com>

	PR target/114759
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Disallow
	CPUs and ABIs that do no support the ROP protection insns.
	* config/rs6000/rs6000-logue.cc (rs6000_stack_info): Remove now
	unneeded tests.
	(rs6000_emit_prologue): Likewise.
	Remove unneeded gcc_assert.
	(rs6000_emit_epilogue): Likewise.
	* config/rs6000/rs6000.md: Likewise.

2024-07-17  Peter Bergner  <bergner@linux.ibm.com>

	PR target/114759
	* config/rs6000/rs6000-logue.cc (rs6000_stack_info): Use TARGET_POWER8.
	(rs6000_emit_prologue): Likewise.
	* config/rs6000/rs6000.md (hashchk): Likewise.
	(hashst): Likewise.
	Fix whitespace.

2024-07-16  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/115951
	* range-op-ptr.cc (operator_equal::fold_range): Return a boolean
	range with the requested type.
	(operator_not_equal::fold_range): Likewise.
	(operator_lt::fold_range): Likewise.
	(operator_le::fold_range): Likewise.
	(operator_gt::fold_range): Likewise.
	(operator_ge::fold_range): Likewise.

2024-07-16  Iain Sandoe  <iain@sandoe.co.uk>

	PR c++/115434
	PR c++/110871
	PR c++/110872
	* gimplify.cc (struct gimplify_ctx): Add a flag to show we are
	expending a handler.
	(gimplify_expr): When we are expanding a handler, and the body
	transforms might have re-written DECL_RESULT into a gimple var,
	ensure that hander references to DECL_RESULT are also re-written
	to refer to the gimple var.  When we are processing an EH_ELSE
	expression, then add it if either of the cleanup slots is in
	use.

2024-07-16  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/115929
	* rtl-ssa/insns.cc (function_info::remove_insn): Remove an
	order_node from the instruction as well as from the splay tree.

2024-07-16  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/115901
	* recog.cc (insn_propagation::apply_to_rvalue_1): Restrict
	paradoxical mode punning to cases where "to" is constant.

2024-07-16  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/115891
	* rtl-ssa/changes.cc (find_clobbered_access): New function.
	(recog_level2): Use it to check for overlap between input
	registers and hard-coded clobbers.  Conditionally reset
	recog_data.insn after changing the insn code.

2024-07-16  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (avr_out_minus): Assimilate into...
	(avr_out_plus_ext): ...this new function.
	(avr_adjust_insn_length) [ADJUST_LEN_PLUS_EXT]: Handle case.
	(avr_rtx_costs_1) [PLUS, MINUS]: Adjust RTX costs.
	* config/avr/avr.md (adjust_len) <plus_ext>: Add new attribute value.
	(*addpsi3_zero_extend.hi_split): Assimilate...
	(*addpsi3_zero_extend.qi_split): Assimilate...
	(*addsi3_zero_extend_split): Assimilate...
	(*addsi3_zero_extend.hi_split): Assimilate...
	(*addpsi3_sign_extend.hi_split): Assimilate...
	(*addhi3.sign_extend1_split): Assimilate...
	(*add<PSISI:mode>3.<code>.<QIPSI:mode>_split): ...into this
	new insn-and-split.
	(*addpsi3_zero_extend.hi): Assimilate...
	(*addpsi3_zero_extend.qi): Assimilate...
	(*addsi3_zero_extend): Assimilate...
	(*addsi3_zero_extend.hi): Assimilate...
	(*addpsi3_sign_extend.hi): Assimilate...
	(*addhi3.sign_extend1): Assimilate...
	(*add<PSISI:mode>3.<code>.<QIPSI:mode>): ...into this new insn.
	(*subpsi3_sign_extend.hi_split): Assimilate...
	(*subhi3.sign_extend2_split): Assimilate...
	(*sub<HISI:mode>3.zero_extend.<QIPSI:mode>_split): Assimilate...
	(*sub<HISI:mode>3.<code><QIPSI:mode>_split): ...into this new
	insn-and-split.
	(*subpsi3_sign_extend.hi): Assimilate...
	(*subhi3.sign_extend2): Assimilate...
	(*sub<HISI:mode>3.zero_extend.<QIPSI:mode>): Assimilate...
	(*sub<HISI:mode>3.<code>.<QIPSI:mode>): ...into this new insn.
	(*sub<HISI:mode>3.zero_extend.<QIPSI:mode>): Use avr_out_plus_ext
	for asm out.
	* config/avr/avr-protos.h (avr_out_minus): Remove.
	(avr_out_plus_ext): New proto.

2024-07-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115841
	* tree-vect-loop.cc (vect_transform_cycle_phi): Correctly
	place the partial vector reduction for the accumulator
	re-use when the main loop cannot be skipped but the
	epilogue can.

2024-07-16  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-protos.h (avr_emit_xior_with_shift): New proto.
	* config/avr/avr.cc (avr_emit_xior_with_shift): New function.
	* config/avr/avr.md (any_lshift): New code iterator.
	(*<xior:code><mode>.<any_lshift:code>): New insn-and-split.
	(<code><HISI:mode><QIPSI:mode>.0): Replaces...
	(*<code_stdname><mode>qi.byte0): ...this one.
	(*<xior:code><HISI:mode><QIPSI:mode>.<any_lshift:code>): Replaces...
	(*<code_stdname><mode>qi.byte1-3): ...this one.

2024-07-16  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/3931.md (vlbr, vstbr): Remove.
	* config/s390/s390.md (xdee): Add FPRX2 mapping.
	* config/s390/vector.md (bhfgq): Add TF mapping.

2024-07-16  Richard Biener  <rguenther@suse.de>

	* config/i386/x86-tune-costs.h (znver5_cost): Update unaligned
	load and store cost from the aligned costs.

2024-07-16  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	PR target/114189
	* config/s390/vector.md (V_HW2): Remove.
	(vcond<V_HW:mode><V_HW2:mode>): Remove.
	(vcondu<V_HW:mode><V_HW2:mode>): Remove.

2024-07-16  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/vector.md: Enable vcond_mask for 128-bit ops.

2024-07-16  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/vector.md (V_HW): Enable V1TI unconditionally and
	add TI.
	(vec_cmpu<VIT_HW:mode><VIT_HW:mode>): Add 128-bit integer
	variants.
	(*vec_cmpeq<mode><mode>_nocc_emu): Emulate operation.
	(*vec_cmpgt<mode><mode>_nocc_emu): Emulate operation.
	(*vec_cmpgtu<mode><mode>_nocc_emu): Emulate operation.

2024-07-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115843
	* tree-vect-loop-manip.cc
	(vect_set_loop_condition_partial_vectors_avx512): Properly
	bias the shift of the initial mask for alignment peeling.

2024-07-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115843
	* config/i386/x86-tune-costs.h (znver4_cost): Update unaligned
	load and store cost from the aligned costs.

2024-07-16  Roger Sayle  <roger@nextmovesoftware.com>
	    Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114661
	* match.pd ((X*C1)|(X*C2) to X*(C1+C2)): Allow optional useless
	type conversions around multiplications, such as those inserted
	by this transformation.

2024-07-16  Hu, Lin1  <lin1.hu@intel.com>

	PR target/107432
	* config/i386/sse.md
	(PMOV_SRC_MODE_3_AVX2): Add TARGET_AVX2 for V4DI and V8SI.
	(PMOV_SRC_MODE_4): Add TARGET_AVX2 for V4DI.
	(trunc<mode><pmov_dst_3_lower>2): Change constraint from TARGET_AVX2 to
	TARGET_SSSE3.
	(trunc<mode><pmov_dst_4_lower>2): Ditto.
	(truncv2div2si2): Change constraint from TARGET_AVX2 to TARGET_SSE.

2024-07-16  Jeff Law  <jlaw@ventanamicro.com>

	* ext-dce.cc (ext_dce_process_uses): Simplify control flow and fix
	liveness computation for shift/rotate counts.

2024-07-15  Jeff Law  <jlaw@ventanamicro.com>

	* ext-dce.cc (carry_backpropagate): Make return type unsigned as well.
	Cast to signed for right shift to preserve sign bit.

2024-07-15  Christoph Müllner  <christoph.muellner@vrull.eu>

	Revert:
	2024-07-15  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
	Replace new + std::unique_ptr by alloca().
	(riscv_process_one_target_attr): Likewise.
	(riscv_process_target_attr): Likewise.

2024-07-15  Christoph Müllner  <christoph.muellner@vrull.eu>

	* common/config/riscv/riscv-common.cc (riscv_subset_list::add):
	Allow adding enabled extension if m_allow_adding_dup is set.
	* config/riscv/riscv-subset.h: Add m_allow_adding_dup and setter.
	* config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
	Allow adding enabled extensions.

2024-07-15  Christoph Müllner  <christoph.muellner@vrull.eu>

	PR target/115554
	PR target/115562
	* common/config/riscv/riscv-common.cc (struct riscv_func_target_info):
	Remove.
	(struct riscv_func_target_hasher): Likewise.
	(riscv_func_decl_hash): Likewise.
	(riscv_func_target_hasher::hash): Likewise.
	(riscv_func_target_hasher::equal): Likewise.
	(riscv_current_subset_list): Likewise.
	(riscv_cmdline_subset_list): Remove obsolete space.
	(riscv_func_target_table_lazy_init): Remove.
	(riscv_func_target_get): Likewise.
	(riscv_func_target_put): Likewise.
	(riscv_func_target_remove_and_destory): Likewise.
	(riscv_arch_str): Generate from cmdline_subset_list.
	(riscv_set_arch_by_subset_list): Don't set current_subset_list.
	(riscv_parse_arch_string): Remove current_subset_list.
	* config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
	Get subset list via riscv_cmdline_subset_list().
	* config/riscv/riscv-subset.h (riscv_current_subset_list):
	Remove prototype.
	(riscv_func_target_get): Likewise.
	(riscv_func_target_put): Likewise.
	(riscv_func_target_remove_and_destory): Likewise.
	* config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
	Build base arch string from existing target options, if any.
	(riscv_target_attr_parser::update_settings): Store new arch
	string in target options.
	(riscv_process_one_target_attr): Whitespace fix.
	(riscv_process_target_attr): Drop opts argument.
	(riscv_option_valid_attribute_p): Properly save, change and restore
	target options.
	* config/riscv/riscv.cc (get_arch_str): New function.
	(riscv_declare_function_name): Get arch string for option-arch
	directive from function's target options.
	* config/riscv/riscv.opt: Add riscv_arch_string variable to
	march option.

2024-07-15  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
	Replace new + std::unique_ptr by alloca().
	(riscv_process_one_target_attr): Likewise.
	(riscv_process_target_attr): Likewise.

2024-07-15  Alexandre Oliva  <oliva@adacore.com>

	PR target/113719
	* config/i386/i386-options.cc (ix86_option_override_internal):
	Move flag_omit_frame_pointer final overrider...
	(ix86_recompute_optlev_based_flags): ... here.

2024-07-15  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.md: Simplify mode usage.
	(GET_MODE_SIZE (<MODE>mode)): Use <SIZE> instead.
	(GET_MODE_BITSIZE (<MODE>mode) - 1): Use <MSB> instead.
	(GET_MODE_MASK (QImode)): Use 0xff instead.
	* config/avr/avr-fixed.md: Same.

2024-07-15  Jakub Jelinek  <jakub@redhat.com>

	* configure.ac (HAVE_GAS_BASE64): New check.
	* config/elfos.h (BASE64_ASM_OP): Define if HAVE_GAS_BASE64 is
	defined.
	* varasm.cc (assemble_string): Bump maximum from 2000 to 16384 if
	BASE64_ASM_OP is defined.
	(default_elf_asm_output_limited_string): Emit opening '"' together
	with STRING_ASM_OP.
	(default_elf_asm_output_ascii): Use BASE64_ASM_OP if defined and
	beneficial.  Remove UB when last_null is NULL.
	* configure: Regenerate.
	* config.in: Regenerate.

2024-07-15  liuhongt  <hongtao.liu@intel.com>

	PR target/115872
	* tree-ssa-ccp.cc (convert_atomic_bit_not): Remove use_stmt after use_nop_stmt is removed.
	(optimize_atomic_bit_test_and): Ditto.

2024-07-15  Hongyu Wang  <hongyu.wang@intel.com>

	* config/i386/i386.md (has_nf): New define_attr, add to all
	nf related patterns.
	* config/i386/i386-features.cc (apx_nf_convert): New function
	to convert Non-NF insns to their NF counterparts.
	(class pass_apx_nf_convert): New pass class.
	(make_pass_apx_nf_convert): New.
	* config/i386/i386-passes.def: Add pass_apx_nf_convert after
	rtl_ifcvt.
	* config/i386/i386-protos.h (make_pass_apx_nf_convert): Declare.

2024-07-15  Monk Chiang  <monk.chiang@sifive.com>

	* config/riscv/riscv.cc (riscv_print_operand): Add 'L' letter
	to print zihintntl instructions string.
	* config/riscv/riscv.md (prefetch): Add zihintntl instructions.

2024-07-15  Feng Wang  <wangfeng@eswincomputing.com>

	* config/riscv/generic-vector-ooo.md: Add def_insn_reservation for vector BFloat16.
	* config/riscv/riscv.md: Add new insn name for vector BFloat16.
	* config/riscv/vector-iterators.md: Add some iterators for vector BFloat16.
	* config/riscv/vector.md: Add some attribute for vector BFloat16.
	* config/riscv/vector-bfloat16.md: New file. Add insn pattern vector BFloat16.

2024-07-15  Feng Wang  <wangfeng@eswincomputing.com>

	* config/riscv/riscv-vector-builtins-bases.cc (class vfncvtbf16_f):
	Add 'Zvfbfmin' intrinsic in bases.
	(class vfwcvtbf16_f): Ditto.
	(class vfwmaccbf16): Add 'Zvfbfwma' intrinsic in bases.
	(BASE): Add BASE macro for 'Zvfbfmin' and 'Zvfbfwma'.
	* config/riscv/riscv-vector-builtins-bases.h: Add declaration for 'Zvfbfmin' and 'Zvfbfwma'.
	* config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
	Add builtins def for 'Zvfbfmin' and 'Zvfbfwma'.
	(vfncvtbf16_f): Ditto.
	(vfncvtbf16_f_frm): Ditto.
	(vfwcvtbf16_f): Ditto.
	(vfwmaccbf16): Ditto.
	(vfwmaccbf16_frm): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.cc (supports_vectype_p):
	Add vector intrinsic build judgment for BFloat16.
	(build_all): Ditto.
	(BASE_NAME_MAX_LEN): Adjust max length.
	* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_F32_OPS):
	Add new operand type for BFloat16.
	(vfloat32mf2_t): Ditto.
	(vfloat32m1_t): Ditto.
	(vfloat32m2_t): Ditto.
	(vfloat32m4_t): Ditto.
	(vfloat32m8_t): Ditto.
	* config/riscv/riscv-vector-builtins.cc (DEF_RVV_F32_OPS): Ditto.
	(validate_instance_type_required_extensions):
	Add required_ext checking for 'Zvfbfmin' and 'Zvfbfwma'.
	* config/riscv/riscv-vector-builtins.h (enum required_ext):
	Add required_ext declaration for 'Zvfbfmin' and 'Zvfbfwma'.
	(reqired_ext_to_isa_name): Ditto.
	(required_extensions_specified): Ditto.
	(struct function_group_info): Add match case for 'Zvfbfmin' and 'Zvfbfwma'.
	* config/riscv/riscv.cc (riscv_validate_vector_type):
	Add required_ext checking for 'Zvfbfmin' and 'Zvfbfwma'.

2024-07-15  Hongyu Wang  <hongyu.wang@intel.com>

	PR target/115889
	* config/i386/predicates.md (vcvtne2ps2bf_parallel): Remove.
	* config/i386/sse.md (hi_cvt_bf): Remove.
	(HI_CVT_BF): Likewise.
	(vpermt2_sepcial_bf16_shuffle_<mode>):Likewise.

2024-07-15  Feng Wang  <wangfeng@eswincomputing.com>

	* config/riscv/genrvv-type-indexer.cc (bfloat16_type):
	Generate bf16 vector_type and scalar_type in DEF_RVV_TYPE_INDEX.
	(bfloat16_wide_type): Ditto.
	(same_ratio_eew_bf16_type): Ditto.
	(main): Ditto.
	* config/riscv/riscv-modes.def (ADJUST_BYTESIZE):
	Add vector type for BFloat16.
	(RVV_WHOLE_MODES): Add vector type for BFloat16.
	(RVV_FRACT_MODE): Ditto.
	(RVV_NF4_MODES): Ditto.
	(RVV_NF8_MODES): Ditto.
	(RVV_NF2_MODES): Ditto.
	* config/riscv/riscv-vector-builtins-types.def (vbfloat16mf4_t):
	Add builtin vector type for BFloat16.
	(vbfloat16mf2_t): Add builtin vector type for BFloat16.
	(vbfloat16m1_t): Ditto.
	(vbfloat16m2_t): Ditto.
	(vbfloat16m4_t): Ditto.
	(vbfloat16m8_t): Ditto.
	(vbfloat16mf4x2_t): Ditto.
	(vbfloat16mf4x3_t): Ditto.
	(vbfloat16mf4x4_t): Ditto.
	(vbfloat16mf4x5_t): Ditto.
	(vbfloat16mf4x6_t): Ditto.
	(vbfloat16mf4x7_t): Ditto.
	(vbfloat16mf4x8_t): Ditto.
	(vbfloat16mf2x2_t): Ditto.
	(vbfloat16mf2x3_t): Ditto.
	(vbfloat16mf2x4_t): Ditto.
	(vbfloat16mf2x5_t): Ditto.
	(vbfloat16mf2x6_t): Ditto.
	(vbfloat16mf2x7_t): Ditto.
	(vbfloat16mf2x8_t): Ditto.
	(vbfloat16m1x2_t): Ditto.
	(vbfloat16m1x3_t): Ditto.
	(vbfloat16m1x4_t): Ditto.
	(vbfloat16m1x5_t): Ditto.
	(vbfloat16m1x6_t): Ditto.
	(vbfloat16m1x7_t): Ditto.
	(vbfloat16m1x8_t): Ditto.
	(vbfloat16m2x2_t): Ditto.
	(vbfloat16m2x3_t): Ditto.
	(vbfloat16m2x4_t): Ditto.
	(vbfloat16m4x2_t): Ditto.
	* config/riscv/riscv-vector-builtins.cc (check_required_extensions):
	Add required_ext checking for BFloat16.
	* config/riscv/riscv-vector-builtins.def (vbfloat16mf4_t):
	Add vector_type for BFloat16 in builtins.def.
	(vbfloat16mf4x2_t): Ditto.
	(vbfloat16mf4x3_t): Ditto.
	(vbfloat16mf4x4_t): Ditto.
	(vbfloat16mf4x5_t): Ditto.
	(vbfloat16mf4x6_t): Ditto.
	(vbfloat16mf4x7_t): Ditto.
	(vbfloat16mf4x8_t): Ditto.
	(vbfloat16mf2_t): Ditto.
	(vbfloat16mf2x2_t): Ditto.
	(vbfloat16mf2x3_t): Ditto.
	(vbfloat16mf2x4_t): Ditto.
	(vbfloat16mf2x5_t): Ditto.
	(vbfloat16mf2x6_t): Ditto.
	(vbfloat16mf2x7_t): Ditto.
	(vbfloat16mf2x8_t): Ditto.
	(vbfloat16m1_t): Ditto.
	(vbfloat16m1x2_t): Ditto.
	(vbfloat16m1x3_t): Ditto.
	(vbfloat16m1x4_t): Ditto.
	(vbfloat16m1x5_t): Ditto.
	(vbfloat16m1x6_t): Ditto.
	(vbfloat16m1x7_t): Ditto.
	(vbfloat16m1x8_t): Ditto.
	(vbfloat16m2_t): Ditto.
	(vbfloat16m2x2_t): Ditto.
	(vbfloat16m2x3_t): Ditto.
	(vbfloat16m2x4_t): Ditto.
	(vbfloat16m4_t): Ditto.
	(vbfloat16m4x2_t): Ditto.
	(vbfloat16m8_t): Ditto.
	(double_trunc_bfloat_scalar): Add scalar_type def for BFloat16.
	(double_trunc_bfloat_vector): Add vector_type def for BFloat16.
	* config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_BF_16):
	Add required defination of BFloat16 ext.
	* config/riscv/riscv-vector-switch.def (ENTRY):
	Add vector_type information for BFloat16.
	(TUPLE_ENTRY): Add tuple vector_type information for BFloat16.

2024-07-14  Roger Sayle  <roger@nextmovesoftware.com>

	* config/i386/i386-expand.cc (ix86_expand_fp_absneg_operator):
	Use E_?Fmode enumeration constants in switch statement.
	(ix86_expand_copysign): Likewise.
	(ix86_expand_xorsign): Likewise.

2024-07-14  Alejandro Colomar  <alx@kernel.org>

	PR c/115185
	* doc/invoke.texi: Document the new
	-Wunterminated-string-initialization.

2024-07-14  Hans-Peter Nilsson  <hp@axis.com>

	* config/cris/cris.cc (cris_option_override_after_change): Fix up
	comment regarding disabling late_combine.

2024-07-14  Hans-Peter Nilsson  <hp@axis.com>

	* config/cris/cris.cc (cris_option_override_after_change): New
	function.  Disable late-combine by default.
	(cris_option_override): Call the new function.

2024-07-13  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (write_lf_modifier): Expand upon comment.

2024-07-13  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (write_data_symbol): Add alignment directive.

2024-07-13  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (enum cv_leaf_type): Add padding constants.
	(write_cv_padding): Use names for padding constants.

2024-07-13  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (S_LDATA32, S_GDATA32, S_COMPILE3): Undefine.
	(enum cv_sym_type): Define.
	(struct codeview_symbol): Use enum cv_sym_type.
	(write_codeview_symbols): Add default to switch.

2024-07-13  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (enum cv_leaf_type): Define.
	(struct codeview_subtype): Use enum cv_leaf_type.
	(struct codeview_custom_type): Use enum cv_leaf_type.
	(write_lf_fieldlist): Add default to switch.
	(write_custom_types): Add default to switch.
	* dwarf2codeview.h (LF_MODIFIER, LF_POINTER): Undefine.
	(LF_PROCEDURE, LF_ARGLIST, LF_FIELDLIST, LF_BITFIELD): Likewise.
	(LF_INDEX, LF_ENUMERATE, LF_ARRAY, LF_CLASS): Likewise.
	(LF_STRUCTURE, LF_UNION, LF_ENUM, LF_MEMBER, LF_CHAR): Likewise.
	(LF_SHORT, LF_USHORT, LF_LONG, LF_ULONG, LF_QUADWORD): Likewise.
	(LF_UQUADWORD): Likewise.

2024-07-13  David Malcolm  <dmalcolm@redhat.com>

	* common.opt (fdiagnostics-show-highlight-colors): New option.
	* common.opt.urls: Regenerate.
	* coretypes.h (pp_markup::element): New forward decl.
	(pp_element): New typedef.
	* diagnostic-color.cc (gcc_color_defaults): Add "highlight-a"
	and "highlight-b".
	* diagnostic-format-json.cc (diagnostic_output_format_init_json):
	Disable highlight colors.
	* diagnostic-format-sarif.cc (diagnostic_output_format_init_sarif):
	Likewise.
	* diagnostic-highlight-colors.h: New file.
	* diagnostic-path.cc (struct event_range): Pass nullptr for
	highlight color of m_rich_loc.
	* diagnostic-show-locus.cc (colorizer::set_range): Handle ranges
	with m_highlight_color.
	(colorizer::STATE_NAMED_COLOR): New.
	(colorizer::m_richloc): New field.
	(colorizer::colorizer): Add richloc param for initializing
	m_richloc.
	(colorizer::set_named_color): New.
	(colorizer::begin_state): Add case STATE_NAMED_COLOR.
	(layout::layout): Pass richloc to m_colorizer's ctor.
	(selftest::test_one_liner_labels): Pass nullptr for new param of
	gcc_rich_location ctor for labels.
	(selftest::test_one_liner_labels_utf8): Likewise.
	* diagnostic.h (diagnostic_context::set_show_highlight_colors):
	New.
	* doc/invoke.texi: Add option -fdiagnostics-show-highlight-colors
	and highlight-a and highlight-b color caps.
	* doc/ux.texi
	(Use color consistently when highlighting mismatches): New
	subsection.
	* gcc-rich-location.cc (gcc_rich_location::add_expr): Add
	"highlight_color" param.
	(gcc_rich_location::maybe_add_expr): Likewise.
	* gcc-rich-location.h (gcc_rich_location::gcc_rich_location):
	Split out into a pair of ctors, where if a range_label is supplied
	the caller must also supply a highlight color.
	(gcc_rich_location::add_expr): Add "highlight_color" param.
	(gcc_rich_location::maybe_add_expr): Likewise.
	* gcc.cc (driver_handle_option): Handle
	OPT_fdiagnostics_show_highlight_colors.
	* lto-wrapper.cc (merge_and_complain): Likewise.
	(append_compiler_options): Likewise.
	(append_diag_options): Likewise.
	(run_gcc): Likewise.
	* opts-common.cc (decode_cmdline_options_to_array): Add comment
	about -fno-diagnostics-show-highlight-colors.
	* opts-global.cc (init_options_once): Preserve
	pp_show_highlight_colors in case the global_dc's printer is
	recreated.
	* opts.cc (common_handle_option): Handle
	OPT_fdiagnostics_show_highlight_colors.
	(gen_command_line_string): Likewise.
	* pretty-print-markup.h: New file.
	* pretty-print.cc: Include "pretty-print-markup.h" and
	"diagnostic-highlight-colors.h".
	(pretty_printer::format): Handle %e.
	(pretty_printer::pretty_printer): Handle new field
	m_show_highlight_colors.
	(pp_string_n): New.
	(pp_markup::context::begin_quote): New.
	(pp_markup::context::end_quote): New.
	(pp_markup::context::begin_color): New.
	(pp_markup::context::end_color): New.
	(highlight_colors::expected): New.
	(highlight_colors::actual): New.
	(highlight_colors::lhs): New.
	(highlight_colors::rhs): New.
	(class selftest::test_element): New.
	(selftest::test_pp_format): Add tests of %e.
	(selftest::test_urlification): Likewise.
	* pretty-print.h (pp_markup::context): New forward decl.
	(class chunk_info): Add friend class pp_markup::context.
	(class pretty_printer): Add friend pp_show_highlight_colors.
	(pretty_printer::m_show_highlight_colors): New field.
	(pp_show_highlight_colors): New inline function.
	(pp_string_n): New decl.
	* substring-locations.cc: Include "diagnostic-highlight-colors.h".
	(format_string_diagnostic_t::highlight_color_format_string): New.
	(format_string_diagnostic_t::highlight_color_param): New.
	(format_string_diagnostic_t::emit_warning_n_va): Use highlight
	colors.
	* substring-locations.h
	(format_string_diagnostic_t::highlight_color_format_string): New.
	(format_string_diagnostic_t::highlight_color_param): New.
	* toplev.cc (general_init): Initialize global_dc's
	show_highlight_colors.
	* tree-pretty-print-markup.h: New file.

2024-07-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115868
	* tree-vect-stmts.cc (vectorizable_simd_clone_call): Correctly
	compute the number of mask copies required for vect_record_loop_mask.

2024-07-12  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/gm2.texi (Community): Update lists.nongnu.org and
	lists.gnu.org links.

2024-07-12  Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/115876
	* ext-dce.cc (carry_backpropagate): Make mask and mmask unsigned.

2024-07-12  Marek Polacek  <polacek@redhat.com>

	* doc/invoke.texi: Remove @opindex and @itemx for -fconcepts-ts.

2024-07-12  Daniel Bertalan  <dani@danielbertalan.dev>

	* value-pointer-equiv.cc: Change NULL to nullptr.

2024-07-12  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/115785
	* rtl-ssa/insns.h (insn_info::prev_insn_or_last_debug_insn)
	(insn_info::next_nondebug_or_debug_insn): Remove typedefs.
	(insn_info::m_prev_insn_or_last_debug_insn): Rename to...
	(insn_info::m_prev_sametype_or_last_debug_insn): ...this.
	* rtl-ssa/internals.inl (insn_info::insn_info): Update after
	above renaming.
	(insn_info::copy_prev_from): Likewise.
	(insn_info::set_prev_sametype_insn): Likewise.
	(insn_info::set_last_debug_insn): Likewise.
	(insn_info::clear_insn_links): Likewise.
	(insn_info::has_insn_links): Likewise.
	* rtl-ssa/member-fns.inl (insn_info::prev_nondebug_insn): Likewise.
	(insn_info::prev_any_insn): Fix moves from non-debug to debug insns.

2024-07-12  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv-string.cc (emit_memcmp_scalar_load_and_compare):
	Set RESULT directly rather than using a temporary.
	(emit_memcmp_scalar_result_calculation): Similarly.
	(riscv_expand_block_compare_scalar): Use CONST0_RTX rather than
	generating new RTL.
	* config/riscv/riscv.md (cmpmemsi): Pass an X mode temporary to the
	expansion routines.  If necessary extract low part of the word to store
	in final result location.

2024-07-12  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/2964.md: Remove extended mnemonics for vgm.
	* config/s390/3906.md: Remove extended mnemonics for vgm.
	* config/s390/3931.md: Remove extended mnemonics for vgm.
	* config/s390/8561.md: Remove extended mnemonics for vgm.
	* config/s390/constraints.md (jKK): Remove constraint.
	(jzz): Add constraint.
	* config/s390/s390-protos.h (s390_contiguous_bitmask_vector_p):
	Add prototype.
	(s390_constant_via_vgm_p): Add prototype.
	(s390_constant_via_vrepi_p): Add prototype.
	* config/s390/s390.cc (s390_contiguous_bitmask_vector_p): New
	function.
	(s390_constant_via_vgm_vrepi_helper): New function.
	(s390_constant_via_vgm_p): New function.
	(s390_constant_via_vgbm_p): For the sake of symmetry rename
	s390_bytemask_vector_p into s390_constant_via_vgbm_p.
	(s390_bytemask_vector_p): Deal with non-integer and partial
	vectors.
	(s390_constant_via_vrepi_p): New function.
	(s390_legitimate_constant_p): Allow partial vectors.
	(legitimate_reload_constant_p): Fix indentation.
	(legitimate_reload_vector_constant_p): Restrict to constraints
	j00, jm1, jxx, jyy, jzz only, i.e., allow partial vectors.
	(s390_expand_vec_init): Also make use of vrepi if possible.
	(print_operand): Add q,p,r for vgm,vrepi,vgbm, respectively.
	Remove e,s,t for constant vectors.
	* config/s390/s390.md (movti): Add variants utilizing
	vgbm,vgm,vrepi.
	* config/s390/vector.md (mov<mode><tf_vr>): Adapt variants
	for vgbm,vgm,vrepi for the new scheme.
	(mov<mode>): Adapt variants for vgbm,vgm for the new
	scheme and add vrepi variant for modes V_8,V_16,V_32,V_64.

2024-07-12  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/vector.md (mov<mode>): Fix output template for
	movv1qi.

2024-07-12  Roger Sayle  <roger@nextmovesoftware.com>
	    Hongtao Liu  <hongtao.liu@intel.com>

	* config/i386/i386-expand.cc (ix86_broadcast_from_constant):
	Use CONST_VECTOR_P instead of comparison against GET_CODE.
	(ix86_gen_bcst_mem): Likewise.
	(ix86_ternlog_leaf_p): Likewise.
	(ix86_ternlog_operand_p): ix86_ternlog_leaf_p is always true for
	vector_all_ones_operand.
	(ix86_expand_ternlog_bin_op): Use CONST_VECTOR_P instead of
	equality comparison against GET_CODE.  Replace call to force_reg
	with gen_reg_rtx and emit_move_insn (for VEC_DUPLICATE broadcast).
	Check for !register_operand instead of memory_operand.
	Support CONST_VECTORs by calling force_const_mem.
	(ix86_expand_ternlog): Fix indentation whitespace.
	Allow ix86_ternlog_leaf_p as ix86_expand_ternlog_andnot's second
	operand. Use CONST_VECTOR_P instead of equality against GET_CODE.
	Use gen_reg_rtx and emit_move_insn for ~a, ~b and ~c cases.

2024-07-12  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	* config/s390/s390.md (*icjump_64): Allow raw CC comparisons,
	i.e., any constant integer between 0 and 15 for CC comparisons.

2024-07-12  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.cc (aarch64_process_one_target_attr)
	(aarch64_process_target_attr): Avoid alloca.

2024-07-12  Alexandre Oliva  <oliva@adacore.com>

	PR target/115459
	* config/alpha/alpha.cc (alpha_expand_block_move): Adjust
	MEMs to match inferred alignment.

2024-07-12  YunQiang Su  <yunqiang@isrc.iscas.ac.cn>

	PR target/115840
	* config/riscv/riscv.cc(riscv_preferred_else_value): Mark
	tmp_var as NO_WARNING.

2024-07-12  xuli  <xuli1@eswincomputing.com>

	PR target/115862
	* config/riscv/riscv.cc (riscv_slow_unaligned_access): Disable vector misalign.

2024-07-12  Kito Cheng  <kito.cheng@sifive.com>

	* common/config/riscv/riscv-common.cc (riscv_implied_info): Add xsfvcp.
	(riscv_ext_version_table): Add xsfvcp, xsfcease.
	(riscv_ext_flag_table): Ditto.
	* config/riscv/riscv.opt (riscv_sifive_subext): New.
	(XSFVCP): New.
	(XSFCEASE): New.

2024-07-12  Kewen Lin  <linkw@linux.ibm.com>

	PR target/115659
	* config/rs6000/rs6000-protos.h (rs6000_emit_vector_cond_expr): Remove.
	* config/rs6000/rs6000.cc (rs6000_emit_vector_cond_expr): Add static
	qualifier as it is only called by rs6000_emit_swsqrt now.
	* config/rs6000/vector.md (vcond<VEC_F:mode><VEC_F:mode>): Remove.
	(vcond<VEC_I:mode><VEC_I:mode>): Remove.
	(vcondv4sfv4si): Likewise.
	(vcondv4siv4sf): Likewise.
	(vcondv2dfv2di): Likewise.
	(vcondv2div2df): Likewise.
	(vcondu<VEC_I:mode><VEC_I:mode>): Likewise.
	(vconduv4sfv4si): Likewise.
	(vconduv2dfv2di): Likewise.

2024-07-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115867
	* tree-vect-stmts.cc (vectorizable_simd_clone_call): Properly
	guess the number of mask elements for integer mode masks.

2024-07-12  Jeff Law  <jlaw@ventanamicro.com>

	* config/m68k/m68k.md (extendsidi2): Add missing early clobbers.

2024-07-12  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch.cc
	(loongarch_split_move): Delete.
	(loongarch_hard_regno_mode_ok_uncached): Likewise.
	* config/loongarch/loongarch.md
	(move_doubleword_fpr<mode>): Likewise.
	(load_low<mode>): Likewise.
	(load_high<mode>): Likewise.
	(store_word<mode>): Likewise.
	(movgr2frh<mode>): Likewise.
	(movfrh2gr<mode>): Likewise.

2024-07-12  Lulu Cheng  <chenglulu@loongson.cn>

	PR target/115752
	* config/loongarch/loongarch.cc
	(loongarch_hard_regno_mode_ok_uncached): Replace
	UNITS_PER_FPVALUE with UNITS_PER_HWFPVALUE.
	* config/loongarch/loongarch.h (UNITS_PER_FPVALUE): Delete.

2024-07-11  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv-string.cc
	(emit_strcmp_scalar_compare_byte): Set RESULT directly rather
	than using a new temporary.
	(emit_strcmp_scalar_result_calculation_nonul): Likewise.
	(emit_strcmp_scalar_result_calculation): Likewise.
	(riscv_expand_strcmp_scalar): Use CONST0_RTX rather than
	generating a new node.
	(expand_strcmp): Copy directly from SUB to RESULT.
	* config/riscv/riscv.md (cmpstrnsi, cmpstrsi): Pass an X
	mode temporary to the expansion routines.  If necessary
	extract low part of the word to store in final result location.

2024-07-11  Andrew Pinski  <quic_apinski@quicinc.com>

	* value-range.h (class int_range): Mark as final.
	(class prange): Likewise.
	(class frange): Likewise.

2024-07-11  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR target/115611
	* config/arm/mve.md (mve_vec_setv2di_internal): Fix printing of input
	scalar register pair when lane = 1.

2024-07-11  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/115782
	* recog.cc (validate_change_1): Suppress early exit for no-op
	changes that are part of a group.

2024-07-11  Eric Botcazou  <ebotcazou@adacore.com>

	* gimplify.cc (gimplify_scalar_mode_aggregate_compare): Add support
	for ordering comparisons.
	(gimplify_expr) <default>: Call gimplify_scalar_mode_aggregate_compare
	only for integral scalar modes.

2024-07-11  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-protos.h (avr_out_minus): New prototype.
	* config/avr/avr.cc (avr_out_minus): New function.
	* config/avr/avr.md (*sub<HISI:mode>3.zero_extend.<QIPSI:mode>)
	(*sub<HISI:mode>3.zero_extend.<QIPSI:mode>_split): New insns.
	(*subpsi3_zero_extend.qi_split): Remove isns_and_split.
	(*subpsi3_zero_extend.hi_split): Remove insn_and_split.
	(*subhi3_zero_extend1_split): Remove insn_and_split.
	(*subsi3_zero_extend_split): Remove insn_and_split.
	(*subsi3_zero_extend.hi_split): Remove insn_and_split.
	(*subpsi3_zero_extend.qi): Remove insn.
	(*subpsi3_zero_extend.hi): Remove insn.
	(*subhi3_zero_extend1): Remove insn.
	(*subsi3_zero_extend): Remove insn.
	(*subsi3_zero_extend.hi): Remove insn.

2024-07-11  Jørgen Kvalsvik  <j@lambda.is>

	* doc/gcov.texi: Add --include, --exclude, --match-on-demangled
	documentation.
	* gcov.cc (struct fnfilter): New.
	(print_usage): Add --include, --exclude, -M,
	--match-on-demangled.
	(process_args): Likewise.
	(release_structures): Release filters.
	(read_graph_file): Only add function_infos matching filters.
	(output_lines): Likewise.

2024-07-11  Jørgen Kvalsvik  <j@lambda.is>

	* gcov.cc (process_all_functions): Ensure fn.end_line is
	included source[fn].lines.

2024-07-11  Fei Gao  <gaofei@eswincomputing.com>

	* common/config/riscv/riscv-common.cc:
	c implies zca, and conditionally zcf & zcd.

2024-07-10  Pan Li  <pan2.li@intel.com>

	* tree-vect-patterns.cc (vect_recog_sat_sub_pattern_transform):
	Add new func impl to perform the truncation distribution.
	(vect_recog_sat_sub_pattern): Perform above optimize before
	generate .SAT_SUB call.

2024-07-10  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (ustruncdi<mode>2): Swap compare operands.
	(ustruncsi<mode>2): Ditto.
	(ustrunchiqi2): Ditto.

2024-07-10  Marek Polacek  <polacek@redhat.com>

	* doc/invoke.texi: Mention that -fconcepts-ts was removed.

2024-07-10  Edwin Lu  <ewlu@rivosinc.com>

	* common/config/riscv/riscv-common.cc: Add imply rules for B extension
	* config/riscv/arch-canonicalize: Ditto

2024-07-10  Richard Sandiford  <richard.sandiford@arm.com>

	* internal-fn.cc (create_call_lhs_operand, assign_call_lhs): New
	functions, split out from...
	(expand_fn_using_insn): ...here.
	(expand_load_lanes_optab_fn): Use them.
	(expand_GOMP_SIMT_ENTER_ALLOC): Likewise.
	(expand_GOMP_SIMT_LAST_LANE): Likewise.
	(expand_GOMP_SIMT_ORDERED_PRED): Likewise.
	(expand_GOMP_SIMT_VOTE_ANY): Likewise.
	(expand_GOMP_SIMT_XCHG_BFLY): Likewise.
	(expand_GOMP_SIMT_XCHG_IDX): Likewise.
	(expand_partial_load_optab_fn): Likewise.
	(expand_vec_cond_optab_fn): Likewise.
	(expand_vec_cond_mask_optab_fn): Likewise.
	(expand_RAWMEMCHR): Likewise.
	(expand_gather_load_optab_fn): Likewise.
	(expand_while_optab_fn): Likewise.
	(expand_SPACESHIP): Likewise.

2024-07-10  Richard Sandiford  <richard.sandiford@arm.com>

	* recog.cc (insn_propagation::apply_to_rvalue_1): Handle simple
	cases of hardreg propagation in which the register is set and
	used in different modes.

2024-07-10  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/115785
	* rtl-ssa/functions.h (function_info::replace_nondebug_insn): Declare.
	* rtl-ssa/insns.h (insn_info::order_node::set_uid): New function.
	(insn_info::remove_note): Declare.
	* rtl-ssa/insns.cc (insn_info::remove_note): New function.
	(function_info::replace_nondebug_insn): Likewise.
	* rtl-ssa/changes.cc (function_info::change_insns): Use
	replace_nondebug_insn instead of remove_insn + add_insn.

2024-07-10  Uros Bizjak  <ubizjak@gmail.com>

	PR middle-end/115836
	* expmed.cc (emit_store_flag_1): Move calculation of
	scode just before its only usage site.

2024-07-10  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm-protos.h (arm_dllexport_name_p): Remove prototype.
	(arm_dllimport_name_p): Likewise.
	(arm_pe_unique_section): Likewise.
	(arm_pe_encode_section_info): Likewise.
	(arm_dllexport_p): Likewise.
	(arm_dllimport_p): Likewise.
	(arm_mark_dllexport): Likewise.
	(arm_mark_dllimport): Likewise.
	(arm_change_mode_p): Likewise.
	* config/arm/arm.cc (arm_gnu_attributes): Remove attributes for ARM_PE.
	(TARGET_ENCODE_SECTION_INFO): Remove setting for ARM_PE.
	(is_called_in_ARM_mode): Remove ARM_PE conditional code.
	(thumb1_output_interwork): Remove obsolete ARM_PE code.
	(arm_encode_section_info): Remove surrounding #ifndef.

2024-07-10  Prathamesh Kulkarni  <prathameshk@nvidia.com>

	PR lto/115394
	* lto-streamer.h: Remove streamer_debugging definition.
	* lto-streamer-out.cc (stream_write_tree_ref): Remove use of streamer_debugging.
	(lto_output_tree): Likewise.
	* tree-streamer-in.cc (streamer_read_tree_bitfields): Likewise.
	(streamer_get_pickled_tree): Likewise.
	* tree-streamer-out.cc (pack_ts_base_value_fields): Likewise.

2024-07-10  Pan Li  <pan2.li@intel.com>

	* match.pd: Add form 2 for .SAT_TRUNC.
	* tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children):
	Add new case NOP_EXPR,  and try to match SAT_TRUNC.

2024-07-10  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/115721
	* tree-complex.cc (expand_complex_comparison): Remove
	support for GIMPLE_RETURN.

2024-07-10  Fei Gao  <gaofei@eswincomputing.com>

	PR target/113715
	* config/riscv/riscv.cc (riscv_zcmp_can_use_popretz): Removed.
	(riscv_gen_multi_pop_insn): Remove generation of cm.popretz.

2024-07-09  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtin.cc (altivec_expand_vec_init_builtin):
	Remove the function.
	(rs6000_expand_builtin): Remove the if bif_is_int check to call
	the altivec_expand_vec_init_builtin function.
	* config/rs6000/rs6000-builtins.def: Remove the attribute string
	comment for init.
	(__builtin_vec_init_v16qi,
	__builtin_vec_init_v4sf, __builtin_vec_init_v4si,
	__builtin_vec_init_v8hi, __builtin_vec_init_v1ti,
	__builtin_vec_init_v2df, __builtin_vec_init_v2di,
	__builtin_vec_set_v16qi, __builtin_vec_set_v4sf,
	__builtin_vec_set_v4si, __builtin_vec_set_v8hi): Remove
	built-in definitions.
	* config/rs6000/rs6000-gen-builtins.cc: Remove comment for init
	attribute string.
	(struct attrinfo): Remove isinit entry.
	(parse_bif_attrs): Remove the if statement to check for attribute
	init.
	(ifdef DEBUG): Remove print for init attribute string.
	(write_decls): Remove print for define bif_init_bit and
	define for bif_is_init.
	(write_bif_static_init): Remove if bifp->attrs.isinit statement.

2024-07-09  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcmpeqsp_p):
	Remove built-in definition.

2024-07-09  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-overload.def (vec_xxpermdi): Add new
	overloaded built-in instances of vector signed and unsigned
	int128.
	* doc/extend.texi: Add documentation for built-in instances of
	vector signed and unsigned int128.

2024-07-09  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vsx_xvnegdp,
	__builtin_vsx_xvnegsp): Remove built-in definitions.

2024-07-09  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vsx_vperm_16qi_uns,
	__builtin_vsx_vperm_1ti, __builtin_vsx_vperm_1ti_uns,
	__builtin_vsx_vperm_2df, __builtin_vsx_vperm_2di,
	__builtin_vsx_vperm_2di_uns, __builtin_vsx_vperm_4sf,
	__builtin_vsx_vperm_4si, __builtin_vsx_vperm_4si_uns): Remove
	built-in definitions and comments.

2024-07-09  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vsx_xxsel_16qi,
	__builtin_vsx_xxsel_16qi_uns, __builtin_vsx_xxsel_2df,
	__builtin_vsx_xxsel_2di,	__builtin_vsx_xxsel_2di_uns,
	__builtin_vsx_xxsel_4sf, 	__builtin_vsx_xxsel_4si,
	__builtin_vsx_xxsel_4si_uns, 	__builtin_vsx_xxsel_8hi,
	__builtin_vsx_xxsel_8hi_uns): Remove 	built-in definitions.

2024-07-09  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vsx_xxsel_1ti,
	__builtin_vsx_xxsel_1ti_uns): Remove built-in definitions.
	* config/rs6000/rs6000-overload.def (vec_sel): Add new
	overloaded vector signed, unsigned and bool 128-bit definitions.
	* doc/extend.texi (vec_sel): Add documentation for new instances
	with signed, unsigned and bool 129-bit bool arguments.

2024-07-09  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vsx_xxmrghw,
	__builtin_vsx_xxmrghw_4si, __builtin_vsx_xxmrglw,
	__builtin_vsx_xxmrglw_4si, __builtin_vsx_xxsel_16qi): Remove
	built-in definition.
	* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin):
	remove case entries RS6000_BIF_XXMRGLW_4SI,
	RS6000_BIF_XXMRGLW_4SF, RS6000_BIF_XXMRGHW_4SI,
	RS6000_BIF_XXMRGHW_4SF.
	* config/rs6000/vsx.md (vsx_xxmrghw_<mode>, vsx_xxmrglw_<mode>):
	Remove unused define_expands.

2024-07-09  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcvspdp,
	__builtin_vsx_xvcvdpsp, __builtin_vsx_xvcvsxwdp,
	__builtin_vsx_xvcvuxddp_uns): Remove.

2024-07-09  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcvspsxds,
	__builtin_vsx_xvcvspuxds): Rename to __builtin_vsignede_v4sf,
	__builtin_vunsignede_v4sf respectively.
	(XVCVSPSXDS, XVCVSPUXDS): Rename to VEC_VSIGNEDE_V4SF,
	VEC_VUNSIGNEDE_V4SF respectively.
	(__builtin_vsignedo_v4sf, __builtin_vunsignedo_v4sf): New
	built-in definitions.
	* config/rs6000/rs6000-overload.def (vec_signede, vec_signedo,
	vec_unsignede, vec_unsignedo): Add new overloaded specifications.
	* config/rs6000/vsx.md (vsignede_v4sf, vsignedo_v4sf,
	vunsignede_v4sf, vunsignedo_v4sf): New define_expands.
	* doc/extend.texi (vec_signedo, vec_signede, vec_unsignedo,
	vec_unsignede): Add documentation for new overloaded built-ins to
	convert vector float to vector {un,}signed long long.

2024-07-09  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vsx_vunsigned_v2df,
	__builtin_vsx_vunsigned_v4sf, __builtin_vsx_vunsignede_v2df,
	__builtin_vsx_vunsignedo_v2df): Change the result type to unsigned.

2024-07-09  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcvspsxws,
	__builtin_vsx_xvcvdpuxds_uns, __builtin_vsx_xvcvspuxws,
	__builtin_vsx_xvcvdpsxws, __builtin_vsx_xvcvdpuxws): Remove
	built-in definitions.

2024-07-09  Carl Love  <cel@linux.ibm.com>

	* config/rs6000/rs6000-builtin.cc (RS6000_BIF_CMPLE_16QI,
	RS6000_BIF_CMPLE_U16QI, RS6000_BIF_CMPLE_8HI,
	RS6000_BIF_CMPLE_U8HI, RS6000_BIF_CMPLE_4SI, RS6000_BIF_CMPLE_U4SI,
	RS6000_BIF_CMPLE_2DI, RS6000_BIF_CMPLE_U2DI, RS6000_BIF_CMPLE_1TI,
	RS6000_BIF_CMPLE_U1TI): Remove case statements.
	* config/rs6000/rs6000-builtins.def (__builtin_vsx_cmple_16qi,
	__builtin_vsx_cmple_2di, __builtin_vsx_cmple_4si,
	__builtin_vsx_cmple_8hi, __builtin_vsx_cmple_u16qi,
	__builtin_vsx_cmple_u2di, __builtin_vsx_cmple_u4si,
	__builtin_vsx_cmple_u8hi): Remove buit-in definitions.

2024-07-09  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (@cmp<mode>_1): Use SWI mode iterator.
	(ustruncdi<mode>2): New expander.
	(ustruncsi<mode>2): Ditto.
	(ustrunchiqi2): Ditto.

2024-07-09  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-path.cc: Replace "const diagnostic_path *" with
	"const diagnostic_path &" throughout, and "diagnostic_context *"
	with "diagnostic context &".
	* diagnostic.cc (diagnostic_context::show_any_path): Pass
	reference in call to print_path.
	* diagnostic.h (diagnostic_context::print_path): Convert param
	to a reference.

2024-07-09  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm.cc (fp_consts_initited): Delete variable.
	(value_fp0): Likewise.
	(init_fp_table): Delete function.
	(fp_const_from_val): Likewise.
	(arm_const_double_rtx): Rework to avoid converting to REAL_VALUE_TYPE.
	(arm_print_operand, case 'N'): Make use of this case an error.

2024-07-09  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv-target-attr.cc (riscv_process_target_attr):
	Fix comments and variable names.

2024-07-09  Christoph Müllner  <christoph.muellner@vrull.eu>

	* common/config/riscv/riscv-common.cc (riscv_set_arch_by_subset_list):
	Fix overlong line.
	(riscv_parse_arch_string): Replace duplicated code by a call to
	riscv_set_arch_by_subset_list.

2024-07-09  Haochen Jiang  <haochen.jiang@intel.com>

	* common/config/i386/cpuinfo.h (get_available_features): Correct
	AVX10 CPUID emulation to specify ecx value.

2024-07-09  liuhongt  <hongtao.liu@intel.com>

	PR target/115796
	* config/i386/emmintrin.h (__float_u): Rename to ..
	(__x86_float_u): .. this.
	(_mm_load_sd): Ditto.
	(_mm_store_sd): Ditto.
	(_mm_loadh_pd): Ditto.
	(_mm_loadl_pd): Ditto.
	* config/i386/xmmintrin.h (__double_u): Rename to ..
	(__x86_double_u): .. this.
	(_mm_load_ss): Ditto.
	(_mm_store_ss): Ditto.

2024-07-08  Jeff Law  <jlaw@ventanamicro.com>

	* Makefile.in (OBJS): Add ext-dce.o
	* common.opt (ext-dce): Document new option.
	* df-scan.cc (df_get_ext_block_use_set): Delete prototype and
	make extern.
	* df.h (df_get_exit_block_use_set): Prototype.
	* ext-dce.cc: New file/pass.
	* opts.cc (default_options_table): Handle ext-dce at -O2 or higher.
	* passes.def: Add ext-dce before combine.
	* tree-pass.h (make_pass_ext_dce): Prototype.

2024-07-08  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (x86_mov<mode>cc_0_m1_neg splitter to SImode):
	New splitter.
	(NEG and NOT splitter to SImode): Remove optimize_insn_for_size_p
	predicate from insn condition.

2024-07-08  Patrick O'Neill  <patrick@rivosinc.com>

	* doc/invoke.texi: Remove trailing whitespace.

2024-07-08  Levy Hsu  <admin@levyhsu.com>

	* config/i386/i386-expand.cc (ix86_expand_fp_absneg_operator): Add VBF modes.
	(ix86_expand_copysign): Ditto.
	(ix86_expand_xorsign): Ditto.
	* config/i386/i386.cc (ix86_build_const_vector): Ditto.
	(ix86_build_signbit_mask): Ditto.
	* config/i386/sse.md: Ditto.

2024-07-08  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>

	PR target/110040
	* config/rs6000/vsx.md (split pattern for V1TI to DI move): New define.

2024-07-08  Pan Li  <pan2.li@intel.com>

	* config/riscv/autovec.md (ustrunc<mode><v_double_trunc>2): Add
	new pattern for double truncation.
	(ustrunc<mode><v_quad_trunc>2): Ditto but for quad truncation.
	(ustrunc<mode><v_oct_trunc>2): Ditto but for oct truncation.
	* config/riscv/riscv-protos.h (expand_vec_double_ustrunc): Add
	new func decl to expand double vec ustrunc.
	(expand_vec_quad_ustrunc): Ditto but for quad.
	(expand_vec_oct_ustrunc): Ditto but for oct.
	* config/riscv/riscv-v.cc (expand_vec_double_ustrunc): Add new
	func impl to expand vector double ustrunc.
	(expand_vec_quad_ustrunc): Ditto but for quad.
	(expand_vec_oct_ustrunc): Ditto but for oct.

2024-07-08  Fei Gao  <gaofei@eswincomputing.com>

	* common/config/riscv/riscv-common.cc (riscv_subset_list::riscv_subset_list):
	init m_subset_num to 0.
	(riscv_subset_list::add): increase m_subset_num once a subset added.
	(riscv_subset_list::finalize): call handle_implied_ext repeatly
	until no change in m_subset_num.
	* config/riscv/riscv-subset.h: add m_subset_num member.

2024-07-08  Kewen Lin  <linkw@linux.ibm.com>

	PR tree-optimization/115659
	* config/rs6000/rs6000-builtins.def: Update some bif expanders by
	replacing orc<mode>3 with iorc<mode>3.
	* config/rs6000/rs6000-string.cc (expand_cmp_vec_sequence): Update gen
	function by replacing orc<mode>3 with iorc<mode>3.
	* config/rs6000/rs6000.md (orc<mode>3): Rename to ...
	(iorc<mode>3): ... this.

2024-07-08  Kewen Lin  <linkw@linux.ibm.com>

	PR tree-optimization/115659
	* doc/md.texi: Document andcm3 and iorcm3.
	* gimple-isel.cc (gimple_expand_vec_cond_expr): Add more foldings for
	patterns x CMP y ? 0 : z and x CMP y ? z : -1.
	* internal-fn.def (BIT_ANDC): New internal function.
	(BIT_IORC): Likewise.
	* optabs.def (andc, iorc): New optab.

2024-07-08  Kewen Lin  <linkw@linux.ibm.com>

	PR target/115688
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Consider
	explicit VSX when masking off ALTIVEC.

2024-07-08  H.J. Lu  <hjl.tools@gmail.com>

	* config/i386/i386.cc (ix86_print_operand): Always generate
	branch hint for conditional branches.
	* config/i386/i386.h (TARGET_BRANCH_PREDICTION_HINTS): Split
	into ..
	(TARGET_BRANCH_PREDICTION_HINTS_TAKEN): .. this, and ..
	(TARGET_BRANCH_PREDICTION_HINTS_NOT_TAKEN): .. this.
	* config/i386/x86-tune.def (X86_TUNE_BRANCH_PREDICTION_HINTS):
	Split into ..
	(X86_TUNE_BRANCH_PREDICTION_HINTS_TAKEN): .. this, and ..
	(X86_TUNE_BRANCH_PREDICTION_HINTS_NOT_TAKEN): .. this.

2024-07-07  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/bugreport.texi (Bug Criteria): Remove dubious example.

2024-07-06  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md (bset splitters): Turn into define_and_splits.
	Don't depend on combine splitting the "andn with constant" form.
	(bset, binv, bclr with masked bit position): New patterns.

2024-07-06  Jeff Law  <jlaw@ventanamicro.com>

	* config/sh/sh.md (adddi3): Only allow matching when we can
	still create new pseudos.
	(subdi3, *rotcl, *rotcr, *rotcr_neg_t, negdi2): Likewise.
	(abs<mode>2, negabs<mode>2, negdi_cond): Likewise.
	(*swapbisi2_and_shl8, *swapbhisi2, *movsi_index_disp_load): Likewise.
	(*movhi_index_disp_load, *mov<mode>index_disp_store): Likewise.
	(*mov_t_msb_neg, *negt_msb, clipu_one): Likewise.

2024-07-06  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.md: Also split with avr_split_tiny_move()
	for non-AVR_TINY.
	* config/avr/avr.cc (avr_split_tiny_move): Don't change memory
	references with base regs that can do PLUS addressing.
	(avr_out_lpm_no_lpmx) [POST_INC]: Don't output final ADIW when the
	address register is unused after.

2024-07-06  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/115591
	* config/riscv/riscv.cc (riscv_valid_lo_sum_p): Add missing test on
	tree_fits_uhwi_p before calling tree_to_uhwi.

2024-07-06  Roger Sayle  <roger@nextmovesoftware.com>

	PR target/115751
	* config/i386/i386-expand.cc (ix86_expand_ternlog): Avoid use of
	force_reg to "reload" non-register operands, as these may contain
	vec_duplicate (broadcast) operands that aren't supported by
	force_reg.  Use (safer) gen_reg_rtx and emit_move instead.

2024-07-05  Iain Sandoe  <iain@sandoe.co.uk>

	* config/i386/i386.cc (ix86_cannot_copy_insn_p): New.
	(TARGET_CANNOT_COPY_INSN_P): New.

2024-07-05  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	PR target/115153
	* config/arm/arm.cc (arm_legitimate_index_p): Move LDRD case before
	NEON.
	(thumb2_legitimate_index_p): Update comments.
	(output_move_neon): Use DFmode for vldr/vstr and non-checking
	adjust_address.

2024-07-05  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/autovec.md: Add TU policy.
	* config/riscv/riscv-protos.h (enum insn_type): Define
	SCALAR_MOVE_MERGED_OP_TU.

2024-07-05  Georg-Johann Lay  <avr@gjlay.de>

	PR target/87376
	* config/avr/avr-dimode.md: Use "nop_general_operand" instead
	of "general_operand" as predicate for all input operands.

2024-07-05  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64.cc (struct expand_vec_perm_d): Add zero_op0_p
	and zero_op_p1.
	(aarch64_evpc_tbl): Implement register value remapping.
	(aarch64_vectorize_vec_perm_const): Detect if operand is a zero dup
	before it's forced to a reg.

2024-07-05  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-simd.md
	(aarch64_simd_vec_unpack<su>_lo_<mode>): Remove.
	(vec_unpack<su>_lo_<mode): Simplify.
	* config/aarch64/aarch64.cc (aarch64_gen_shareable_zero): Update
	comment.

2024-07-05  Alex Coplan  <alex.coplan@arm.com>

	* dominance.cc (dot_dominance_tree): New.

2024-07-05  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/sse.md (ssedoublemode): Remove mappings to twice
	the number of same-sized elements. Add mappings to the same
	number of double-sized elements.
	(define_split for vec_concat_minus_plus): Change mode_attr from
	ssedoublemode to ssedoublevecmode.
	(define_split for vec_concat_plus_minus): Ditto.
	(<mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>):
	Ditto.
	(avx512f_shuf_<shuffletype>64x2_1<mask_name>): Ditto.
	(avx512vl_shuf_<shuffletype>32x4_1<mask_name>): Ditto.
	(avx512f_shuf_<shuffletype>32x4_1<mask_name>): Ditto.

2024-07-05  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips-protos.h: New function mips_msa_shf_i8.
	* config/mips/mips-msa.md(MSA_WHB_W): Not used anymore;
	(msa_shf_<msafmt_f>): Use mips_msa_shf_i8.
	* config/mips/mips.cc(mips_const_vector_shuffle_set_p):
	Support more cases try to use alien mode instruction;
	(mips_msa_shf_i8): New function to get the correct MSA SHF
	instruction and IMM.

2024-07-05  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_build_slp_instance): Special case
	three input permute with the same number of lanes in store
	permute lowering.

2024-07-04  Siarhei Volkau  <lis8215@gmail.com>

	* config/arm/arm.cc (thumb_load_double_from_address): Emit ldmia
	when address reg rewritten by load.
	* config/arm/thumb1.md (peephole2 to rewrite DI/DF load): New.
	(peephole2 to rewrite DI/DF store): New.
	* config/arm/iterators.md (DIDF): New.

2024-07-04  Alfie Richards  <alfie.richards@arm.com>

	PR target/114890
	* config/aarch64/aarch64-simd.md: Remove bigendian operand swap.

2024-07-04  Richard Biener  <rguenther@suse.de>

	PR middle-end/115426
	* gimplify.cc (gimplify_asm_expr): Handle "rm" output
	constraint gimplified to a register (operation).

2024-07-04  Roger Sayle  <roger@nextmovesoftware.com>

	* config/i386/i386.md (bswaphisi2_lowpart peephole2): New
	peephole2 variant to eliminate register shuffling.

2024-07-04  Jeff Law  <jlaw@ventanamicro.com>

	* config/rx/rx.cc (rx_expand_prologue): Mark the copy from FP to SP
	as frame related.
	(rx_expand_epilogue): Mark the stack pointer adjustment as frame
	related.

2024-07-04  Hongyu Wang  <hongyu.wang@intel.com>

	* config/i386/i386.cc (ix86_expand_prologue): Set apx_ppx_used
	flag in m.fs with TARGET_APX_PPX && !crtl->calls_eh_return.
	(ix86_emit_save_regs): Emit ppx is available only when
	TARGET_APX_PPX && !crtl->calls_eh_return.
	(ix86_expand_epilogue): Don't restore reg using mov when
	apx_ppx_used flag is true.
	* config/i386/i386.h (struct machine_frame_state):
	Add apx_ppx_used flag.

2024-07-04  Hu, Lin1  <lin1.hu@intel.com>

	PR tree-optimization/115753
	* tree-vect-stmts.cc (supportable_indirect_convert_operation): Add
	TYPE_CODE check before SSA_NAME_RANGE_INFO.

2024-07-03  Jeff Law  <jlaw@ventanamicro.com>

	* reorg.cc (relax_delay_slots): Do not optimize a conditional
	jump around an unconditional jump/return in the presence of
	a text section switch.

2024-07-03  John David Anglin  <danglin@gcc.gnu.org>

	Revert:
	2023-10-05  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.

2024-07-03  Palmer Dabbelt  <palmer@rivosinc.com>

	* doc/invoke.texi: Describe -march behavior for dependent extensions on
	RISC-V.

2024-07-03  Gianluca Guida  <gianluca@rivosinc.com>
	    Patrick O'Neill  <patrick@rivosinc.com>

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::to_string): Skip zabha when not supported by
	the assembler.
	* config.in: Regenerate.
	* config/riscv/arch-canonicalize: Make zabha imply zaamo.
	* config/riscv/iterators.md (amobh): Add iterator for amo
	byte/halfword.
	* config/riscv/riscv.opt: Add zabha.
	* config/riscv/sync.md (atomic_<atomic_optab><mode>): Add
	subword atomic op pattern.
	(zabha_atomic_fetch_<atomic_optab><mode>): Add subword
	atomic_fetch op pattern.
	(lrsc_atomic_fetch_<atomic_optab><mode>): Prefer zabha over lrsc
	for subword atomic ops.
	(zabha_atomic_exchange<mode>): Add subword atomic exchange
	pattern.
	(lrsc_atomic_exchange<mode>): Prefer zabha over lrsc for subword
	atomic exchange ops.
	* configure: Regenerate.
	* configure.ac: Add zabha assembler check.
	* doc/sourcebuild.texi: Add zabha documentation.

2024-07-03  Pan Li  <pan2.li@intel.com>

	PR target/115763
	* config/riscv/vector.md (*pred_broadcast<mode>): Split into
	zvfh and zvfhmin part.
	(*pred_broadcast<mode>_zvfh): New define_insn for zvfh part.
	(*pred_broadcast<mode>_zvfhmin): Ditto but for zvfhmin.

2024-07-03  Pan Li  <pan2.li@intel.com>

	* match.pd: Allow any otype is less than itype truncation.

2024-07-03  Pan Li  <pan2.li@intel.com>

	* tree-vect-patterns.cc (gimple_unsigned_integer_sat_trunc): Add
	new decl generated by match.
	(vect_recog_sat_trunc_pattern): Add new func impl to recog the
	.SAT_TRUNC pattern.

2024-07-03  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vectorizable_slp_permutation_1): Remove
	redundant dump.

2024-07-03  Jennifer Schmitz  <jschmitz@nvidia.com>

	* match.pd: Fold x/sqrt(x) to sqrt(x).

2024-07-03  Alexandre Oliva  <oliva@adacore.com>

	* dwarf2out.cc (modified_type_die): Follow name's debug type.

2024-07-03  Alexandre Oliva  <oliva@adacore.com>

	PR target/113719
	* config/i386/i386-options.cc
	(ix86_override_options_after_change_1): Add opts and opts_set
	parms, operate on them, after factoring out of...
	(ix86_override_options_after_change): ... this.  Restore calls
	of ix86_default_align and ix86_recompute_optlev_based_flags.
	(ix86_option_override_internal): Call the factored-out bits.

2024-07-03  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR target/115475
	* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins):
	Define __ARM_FEATURE_SVE_BF16 for TARGET_SVE_BF16.

2024-07-03  Kyrylo Tkachov  <ktkachov@nvidia.com>

	PR target/115457
	* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins):
	Define __ARM_FEATURE_BF16 for TARGET_BF16_FP.

2024-07-03  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (bst_traits::hash): Handle NULL elements
	in SLP_TREE_SCALAR_STMTS.
	(vect_print_slp_tree): Likewise.
	(vect_mark_slp_stmts): Likewise.
	(vect_mark_slp_stmts_relevant): Likewise.
	(vect_find_last_scalar_stmt_in_slp): Likewise.
	(vect_bb_slp_mark_live_stmts): Likewise.
	(vect_slp_prune_covered_roots): Likewise.
	(vect_bb_partition_graph_r): Likewise.
	(vect_remove_slp_scalar_calls): Likewise.
	(vect_slp_gather_vectorized_scalar_stmts): Likewise.
	(vect_bb_slp_scalar_cost): Likewise.
	(vect_contains_pattern_stmt_p): Likewise.
	(vect_slp_convert_to_external): Likewise.
	(vect_find_first_scalar_stmt_in_slp): Likewise.
	(vect_optimize_slp_pass::remove_redundant_permutations): Likewise.
	(vect_slp_analyze_node_operations_1): Likewise.
	(vect_schedule_slp_node): Likewise.
	* tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
	(vectorizable_shift): Likewise.
	* tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
	Handle NULL elements in SLP_TREE_SCALAR_STMTS.

2024-07-03  Georg-Johann Lay  <avr@gjlay.de>

	PR target/98762
	* config/avr/avr.cc (avr_out_movqi_r_mr_reg_disp_tiny): Properly
	restore the base register when it is partially clobbered.

2024-07-03  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/114932
	* tree-ssa-loop-ivopts.cc (constant_multiple_of): Use
	aff_combination_constant_multiple_p instead.

2024-07-03  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/114932
	* tree-affine.cc (wide_int_constant_multiple_p): Support 0 and 0 being
	multiples.

2024-07-03  Richard Sandiford  <richard.sandiford@arm.com>

	* df.h (DF_LR_DCE): New df_problem_id.
	(df_lr_dce): New macro.
	* df-core.cc (rest_of_handle_df_finish): Check for a null free_fun.
	* df-problems.cc (df_lr_finalize): Split out fast DCE handling to...
	(df_lr_dce_finalize): ...this new function.
	(problem_LR_DCE): New df_problem.
	(df_lr_add_problem): Register LR_DCE rather than LR itself.
	* dce.cc (fast_dce): Clear df_lr_dce->solutions_dirty.

2024-07-02  Pengxuan Zheng  <quic_pzheng@quicinc.com>

	PR target/113859
	* config/aarch64/aarch64-simd.md (aarch64_<su>addlp<mode>): Rename to...
	(@aarch64_<su>addlp<mode>): ... This.
	(popcount<mode>2): New define_expand.

2024-07-02  Andrew Pinski  <quic_apinski@quicinc.com>

	* passes.def (expand_pow): Renamed from expand_powcabs.
	* timevar.def (TV_TREE_POWCABS): Remove.
	(TV_TREE_POW): Add
	* tree-pass.h (make_pass_expand_powcabs): Rename to ...
	(make_pass_expand_pow): This.
	* tree-ssa-math-opts.cc (class pass_expand_powcabs): Rename to ...
	(class pass_expand_pow): This.
	(pass_expand_powcabs::execute): Rename to ...
	(pass_expand_pow::execute): This.
	(make_pass_expand_powcabs): Rename to ...
	(make_pass_expand_pow): This.

2024-07-02  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-complex.cc (gimple_expand_builtin_cabs): Add
	`cabs(a+ai)`, `cabs(x+0i)` and `cabs(0+xi)` optimizations.

2024-07-02  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/115710
	* tree-complex.cc (init_dont_simulate_again): Handle CABS.
	(gimple_expand_builtin_cabs): New function, moved mostly
	from tree-ssa-math-opts.cc.
	(expand_complex_operations_1): Call gimple_expand_builtin_cabs.
	* tree-ssa-math-opts.cc (gimple_expand_builtin_cabs): Remove.
	(build_and_insert_binop): Remove.
	(pass_data_expand_powcabs): Update comment.
	(pass_expand_powcabs::execute): Don't handle CABS.

2024-07-02  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-complex.cc (expand_complex_addition): If both
	operands have the same real and imag parts, only
	add the addition once.

2024-07-02  David Faust  <david.faust@oracle.com>

	* common.opt.urls: Regenerate.

2024-07-02  David Faust  <david.faust@oracle.com>
	    Cupertino Miranda  <cupertino.miranda@oracle.com>

	* btfout.cc (btf_mark_type_used): New.
	* ctfc.h (btf_mark_type_used): Declare it here.
	* config/bpf/bpf.cc (bpf_option_override): Enable -gprune-btf
	by default if -gbtf is enabled.
	* config/bpf/core-builtins.cc (extra_fn): New typedef.
	(compute_field_expr): Add callback parameter, and call it if supplied.
	Fix computation for MEM_REF.
	(mark_component_type_as_used): New.
	(bpf_mark_types_as_used): Likewise.
	(bpf_expand_core_builtin): Call here.
	* doc/invoke.texi (Debugging Options): Note that -gprune-btf is
	enabled by default for BPF target when generating BTF.

2024-07-02  David Faust  <david.faust@oracle.com>

	* btfout.cc (btf_used_types): New hash set.
	(struct btf_fixup): New.
	(fixups, forwards): New vecs.
	(btf_output): Calculate num_types depending on debug_prune_btf.
	(btf_early_finsih): New initialization for debug_prune_btf.
	(btf_add_used_type): New function.
	(btf_used_type_list_cb): Likewise.
	(btf_collect_pruned_types): Likewise.
	(btf_add_vars): Handle special case for variables in ".maps" section
	when generating BTF for BPF CO-RE target.
	(btf_late_finish): Use btf_collect_pruned_types when debug_prune_btf
	is in effect.  Move some initialization to btf_early_finish.
	(btf_finalize): Additional deallocation for debug_prune_btf.
	* common.opt (gprune-btf): New flag.
	* ctfc.cc (init_ctf_strtable): Make non-static.
	* ctfc.h (init_ctf_strtable, ctfc_delete_strtab): Make extern.
	* doc/invoke.texi (Debugging Options): Document -gprune-btf.

2024-07-02  David Faust  <david.faust@oracle.com>

	* btfout.cc (struct btf_datasec_entry): New.
	(struct btf_datasec): Add `id' member.  Change `entries' to use
	new struct btf_datasec_entry.
	(func_map): New hash_map.
	(max_translated_id): New.
	(btf_var_ids, btf_id_map, holes, voids, num_vars_added)
	(num_types_added, num_types_created): Delete.
	(btf_absolute_var_id, btf_relative_var_id, btf_absolute_func_id)
	(btf_relative_func_id, btf_absolute_datasec_id, init_btf_id_map)
	(get_btf_id, set_btf_id, btf_emit_id_p): Delete.
	(btf_removed_type_p): Delete.
	(btf_dtd_kind, btf_emit_type_p): New helpers.
	(btf_fwd_to_enum_p, btf_calc_num_vbytes): Use them.
	(btf_collect_datasec): Delete.
	(btf_dtd_postprocess_cb, btf_dvd_emit_preprocess_cb)
	(btf_dtd_emit_preprocess_cb, btf_emit_preprocess): Delete.
	(btf_dmd_representable_bitfield_p): Adapt to type reference changes
	and delete now-unused ctfc argument.
	(btf_asm_datasec_type_ref): Delete.
	(btf_asm_type_ref): Adapt to type reference changes, simplify.
	(btf_asm_type): Likewise. Mark struct/union types with bitfield
	members.
	(btf_asm_array): Adapt to data structure changes.
	(btf_asm_varent): Likewise.
	(btf_asm_sou_member): Likewise. Ensure non-bitfield members are
	correctly re-encoded if struct or union contains any bitfield.
	(btf_asm_func_arg, btf_asm_func_type, btf_asm_datasec_entry)
	(btf_asm_datasec_type): Adapt to data structure changes.
	(output_btf_header): Adapt to other changes, simplify type
	length calculation, add info to assembler comments.
	(output_btf_vars): Adapt to other changes.
	(output_btf_strs): Fix overlong lines.
	(output_asm_btf_sou_fields, output_asm_btf_enum_list)
	(output_asm_btf_func_args_list, output_asm_btf_vlen_bytes)
	(output_asm_btf_type, output_btf_types, output_btf_func_types)
	(output_btf_datasec_types): Adapt to other changes.
	(btf_init_postprocess): Delete.
	(btf_output): Change to only perform output.
	(btf_add_const_void, btf_add_func_records): New.
	(btf_early_finish): Use them here. New.
	(btf_datasec_push_entry): Adapt to data structure changes.
	(btf_datasec_add_func, btf_datasec_add_var): New.
	(btf_add_func_datasec_entries): New.
	(btf_emit_variable_p): New helper.
	(btf_add_vars): Use it here. New.
	(btf_type_list_cb, btf_collect_translated_types): New.
	(btf_assign_func_ids, btf_late_assign_var_ids)
	(btf_assign_datasec_ids): New.
	(btf_finish): Remove unused argument. Call new btf_late*
	functions and btf_output.
	(btf_finalize): Adapt to data structure changes.
	* ctfc.h (struct ctf_dtdef): Convert existing boolean flags to
	BOOL_BITFIELD and reorder.
	(struct ctf_dvdef): Add dvd_id member.
	(btf_finish): Remove argument from prototype.
	(get_btf_id): Delete prototype.
	(funcs_traverse_callback, traverse_btf_func_types): Add an
	explanatory comment.
	* dwarf2ctf.cc (ctf_debug_finish): Remove unused argument.
	* dwarf2ctf.h: Analogous change.
	* dwarf2out.cc: Likewise.

2024-07-02  David Faust  <david.faust@oracle.com>

	* btfout.cc (BTF_VOID_TYPEID, BTF_INIT_TYPEID): Move defines to
	include/btf.h.
	(btf_dvd_emit_preprocess_cb, btf_emit_preprocess)
	(btf_dmd_representable_bitfield_p, btf_asm_array, btf_asm_varent)
	(btf_asm_sou_member, btf_asm_func_arg, btf_init_postprocess):
	Adapt to structural changes in ctf_* structs.
	* ctfc.h (struct ctf_dtdef): Add forward declaration.
	(ctf_dtdef_t, ctf_dtdef_ref): Move typedefs earlier.
	(struct ctf_arinfo, struct ctf_funcinfo, struct ctf_sliceinfo)
	(struct ctf_itype, struct ctf_dmdef, struct ctf_func_arg)
	(struct ctf_dvdef): Use pointers instead of type IDs for
	references to other types and use typedefs where appropriate.
	(struct ctf_dtdef): Add ref_type member.
	(ctf_type_exists): Use pointer instead of type ID.
	(ctf_add_reftype, ctf_add_enum, ctf_add_slice, ctf_add_float)
	(ctf_add_integer, ctf_add_unknown, ctf_add_pointer)
	(ctf_add_array, ctf_add_forward, ctf_add_typedef)
	(ctf_add_function, ctf_add_sou, ctf_add_enumerator)
	(ctf_add_variable): Likewise. Return pointer instead of ID.
	(ctf_lookup_tree_type): Return pointer to type instead of ID.
	* ctfc.cc: Analogous changes.
	* ctfout.cc (ctf_asm_type, ctf_asm_slice, ctf_asm_varent)
	(ctf_asm_sou_lmember, ctf_asm_sou_member, ctf_asm_func_arg)
	(output_ctf_objt_info): Adapt to changes.
	* dwarf2ctf.cc (gen_ctf_type, gen_ctf_void_type)
	(gen_ctf_unknown_type, gen_ctf_base_type, gen_ctf_pointer_type)
	(gen_ctf_subrange_type, gen_ctf_array_type, gen_ctf_typedef)
	(gen_ctf_modifier_type, gen_ctf_sou_type, gen_ctf_function_type)
	(gen_ctf_enumeration_type, gen_ctf_variable, gen_ctf_function)
	(gen_ctf_type, ctf_do_die): Likewise.
	* config/bpf/btfext-out.cc (struct btf_ext_core_reloc): Use
	pointer instead of type ID.
	(bpf_core_reloc_add, bpf_core_get_sou_member_index)
	(output_btfext_core_sections): Adapt to above changes.
	* config/bpf/core-builtins.cc (process_type): Likewise.

2024-07-02  David Faust  <david.faust@oracle.com>

	* btfout.cc (btf_init_postprocess): Rename to...
	(btf_early_finish): ...this.
	(btf_output): Rename to...
	(btf_finish): ...this.
	* ctfc.h: Analogous changes.
	* dwarf2ctf.cc (ctf_debug_early_finish): Conditionally call
	btf_early_finish, or ctf_finalize as appropriate.  Emit BTF
	here for LTO builds.
	(ctf_debug_finish): Always call btf_finish here if generating
	BTF info in non-LTO builds.
	(ctf_debug_finalize, ctf_debug_init_postprocess): Delete.
	* dwarf2out.cc (dwarf2out_early_finish): Remove call to
	ctf_debug_init_postprocess.

2024-07-02  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	PR target/115188
	* config/arm/arm.md (unaligned_loadsi): Use 'Uw' constraint and
	'mem_and_no_t1_wback_op'.
	(unaligned_loadhiu): Likewise.
	(unaligned_storesi): Likewise.
	(unaligned_storehi): Likewise.
	* config/arm/predicates.md (mem_and_no_t1_wback_op): Add new predicate.
	* config/arm/sync.md (arm_atomic_load<mode>): Use 'Uw' constraint.
	(arm_atomic_store<mode>): Likewise.

2024-07-02  Matthew Malcomson  <matthew.malcomson@arm.com>

	* doc/tm.texi: Regenerated.
	* target.def (function_attribute_inlinable_p,
	unspec_may_trap_p): Update documentation.

2024-07-02  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115741
	* tree-vect-stmts.cc (get_group_load_store_type): Also
	handle VMAT_CONTIGUOUS_REVERSE when determining overrun.

2024-07-02  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn-opts.h (TARGET_GLOBAL_ADDRSPACE): New.
	(TARGET_AVGPRS): New.
	(TARGET_AVGPR_MEMOPS): New.
	(TARGET_AVGPR_COMBINED): New.
	(TARGET_FLAT_OFFSETS): New.
	(TARGET_11BIT_GLOBAL_OFFSET): New.
	(TARGET_CDNA2_MEM_COSTS): New.
	(TARGET_WAVE64_COMPAT): New.
	(TARGET_DPP_FULL): New.
	(TARGET_DPP16): New.
	(TARGET_DPP8): New.
	(TARGET_AVGPR_CDNA1_NOPS): New.
	(TARGET_VGPR_GRANULARITY): New.
	(TARGET_ARCHITECTED_FLAT_SCRATCH): New.
	(TARGET_EXPLICIT_CARRY): New.
	(TARGET_MULTIPLY_IMMEDIATE): New.
	(TARGET_SDWA): New.
	(TARGET_WBINVL1_CACHE): New.
	(TARGET_GLn_CACHE): New.
	* config/gcn/gcn-valu.md (throughout): Change TARGET_GCN*,
	TARGET_CDNA* and TARGET_RDNA* to use TARGET_<feature> instead.
	* config/gcn/gcn.cc (throughout): Likewise.
	* config/gcn/gcn.md (throughout): Likewise.

2024-07-02  Lingling Kong  <lingling.kong@intel.com>

	* config/i386/i386.md (*imulhi<mode>zu): Added APX
	NF support.
	(*imulhi<mode>zu<nf_name>): New define_insn.
	(*mulsi3_1_zext<nf_name>): Ditto.
	(*mul<mode><dwi>3_1<nf_name>): Ditto.
	(*<u>mulqihi3_1<nf_name>): Ditto.
	(*mul<mode>3_1<nf_name>): Added APX NDD support.
	(*mulv<mode>4): Ditto.
	(*mulvhi4): Ditto.

2024-07-02  Kewen Lin  <linkw@linux.ibm.com>

	PR target/115739
	* config/sparc/vxworks.h (SPARC_LONG_DOUBLE_TYPE_SIZE): New define.

2024-07-02  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch.cc (loongarch_insn_cost):
	New function.
	(TARGET_INSN_COST): New macro.

2024-07-02  Kewen Lin  <linkw@linux.ibm.com>

	PR tree-optimization/115659
	* gimple-isel.cc (gimple_expand_vec_cond_expr): Add more foldings for
	patterns x CMP y ? -1 : z and x CMP y ? z : 0.

2024-07-01  Richard Biener  <rguenther@suse.de>

	* tree-ssa-forwprop.cc (fwprop_set_lattice_val): Preserve
	SSA info.
	* tree-ssa-propagate.cc
	(substitute_and_fold_dom_walker::before_dom_children): Likewise.

2024-07-01  Roger Sayle  <roger@nextmovesoftware.com>

	* config/i386/i386.md (peephole2): Transform two consecutive
	additions into a 3-component lea if !TARGET_AVOID_LEA_FOR_ADDR.

2024-07-01  Georg-Johann Lay  <avr@gjlay.de>

	PR target/88236
	PR target/115726
	* config/avr/avr.md (mov<mode>) [avr_mem_memx_p]: Expand in such a
	way that the destination does not overlap with any hard register
	clobbered / used by xload8qi_A resp. xload<mode>_A.
	* config/avr/avr.cc (avr_out_xload): Avoid early-clobber
	situation for Z by executing just one load when the output register
	overlaps with Z.

2024-07-01  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115723
	* tree-vect-loop.cc (check_reduction_path): For a .COND_ADD
	verify the else value also refers to the reduction chain op.

2024-07-01  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115694
	* tree-ssa-forwprop.cc (pass_forwprop::execute): Check the
	store is complex before rewriting it.

2024-07-01  liuhongt  <hongtao.liu@intel.com>

	PR target/115517
	* config/i386/mmx.md (vcond<mode>v2sf): Removed.
	(vcond<MMXMODE124:mode><MMXMODEI:mode>): Ditto.
	(vcond<mode><mode>): Ditto.
	(vcondu<MMXMODE124:mode><MMXMODEI:mode>): Ditto.
	(vcondu<mode><mode>): Ditto.
	* config/i386/sse.md (vcond<V_512:mode><VF_512:mode>): Ditto.
	(vcond<V_256:mode><VF_256:mode>): Ditto.
	(vcond<V_128:mode><VF_128:mode>): Ditto.
	(vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>): Ditto.
	(vcond<V_512:mode><VI_AVX512BW:mode>): Ditto.
	(vcond<V_256:mode><VI_256:mode>): Ditto.
	(vcond<V_128:mode><VI124_128:mode>): Ditto.
	(vcond<VI8F_128:mode>v2di): Ditto.
	(vcondu<V_512:mode><VI_AVX512BW:mode>): Ditto.
	(vcondu<V_256:mode><VI_256:mode>): Ditto.
	(vcondu<V_128:mode><VI124_128:mode>): Ditto.
	(vcondu<VI8F_128:mode>v2di): Ditto.
	(vcondeq<VI8F_128:mode>v2di): Ditto.

2024-07-01  liuhongt  <hongtao.liu@intel.com>

	PR target/115517
	* config/i386/sse.md ("*ashr<mode>3_1"): New
	define_insn_and_split.
	(*avx512_ashr<mode>3_1): Ditto.
	(*avx2_lshr<mode>3_1): Ditto.
	(*avx2_lshr<mode>3_2): Ditto and add 2 combine splitter after
	it.
	* config/i386/mmx.md (mmxscalarsize): New mode attribute.
	(*mmw_ashr<mode>3_1): New define_insn_and_split.
	("mmx_<insn><mode>3): Add a combine spiltter after it.
	(*mmx_ashrv2hi3_1): New define_insn_and_plit, also add a
	combine splitter after it.

2024-07-01  liuhongt  <hongtao.liu@intel.com>

	PR target/115517
	* config/i386/sse.md
	(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt_avx512): New
	define_insn_and_split.
	(*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt_avx512):
	Ditto.
	(*<sse2_avx2>_pmovmskb_lt_avx512): Ditto.
	(*<sse2_avx2>_pmovmskb_zext_lt_avx512): Ditto.
	(*sse2_pmovmskb_ext_lt_avx512): Ditto.
	(*pmovsk_kmask_v16qi_avx512): Ditto.
	(*pmovsk_mask_v32qi_avx512): Ditto.
	(*pmovsk_mask_cmp_<mode>_avx512): Ditto.
	(*pmovsk_ptest_<mode>_avx512): Ditto.

2024-07-01  liuhongt  <hongtao.liu@intel.com>

	PR target/115517
	* config/i386/sse.md (*minmax<mode>3_1): New pre_reload
	define_insn_and_split.
	(*minmax<mode>3_2): Ditto.

2024-07-01  liuhongt  <hongtao.liu@intel.com>

	PR target/115517
	* config/i386/sse.md
	(*<avx512>_cvtmask2<ssemodesuffix><mode>_not): New pre_reload
	splitter.
	(*<avx512>_cvtmask2<ssemodesuffix><mode>_not): Ditto.
	(*avx2_pcmp<mode>3_6): Ditto.
	(*avx2_pcmp<mode>3_7): Ditto.

2024-07-01  liuhongt  <hongtao.liu@intel.com>

	PR target/115517
	* config/i386/sse.md
	(*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_gt): New
	define_insn_and_split.
	(*<sse4_1>_blendv<ssefltmodesuffix><avxsizesuffix>_gtint):
	Ditto.
	(*<sse4_1>_blendv<ssefltmodesuffix><avxsizesuffix>_not_gtint):
	Ditto.
	(*<sse4_1_avx2>_pblendvb_gt): Ditto.
	(*<sse4_1_avx2>_pblendvb_gt_subreg_not): Ditto.

2024-07-01  liuhongt  <hongtao.liu@intel.com>

	* config/i386/i386-features.cc (ix86_rpad_gate): New function.
	* config/i386/i386-options.cc (ix86_override_options_after_change):
	Don't disable flate_combine.
	* config/i386/i386-passes.def: Move pass_stv2 and pass_rpad
	after pre_reload pas_late_combine.
	* config/i386/i386-protos.h (ix86_rpad_gate): New declare.
	* config/i386/i386.cc (ix86_insn_cost): New function.
	(TARGET_INSN_COST): Define.

2024-07-01  liuhongt  <hongtao.liu@intel.com>

	PR target/115610
	* config/i386/i386.md (<*insnsi3_zext): Add alternative ?k,
	enable it only for lshiftrt and under avx512bw.
	* config/i386/sse.md (*klshrsi3_1_zext): New define_insn, and
	add corresponding define_split after it.

2024-06-30  John David Anglin  <danglin@gcc.gnu.org>

	PR target/115691
	* config/pa/pa.md: Remove incorrect xmpyu patterns.

2024-06-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115701
	* tree-ssanames.cc (maybe_duplicate_ssa_info_at_copy):
	Only copy info from within the same BB.

2024-06-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115701
	* tree-ssanames.h (maybe_duplicate_ssa_info_at_copy): Declare.
	* tree-ssanames.cc (maybe_duplicate_ssa_info_at_copy): New
	function, split out from ...
	* tree-ssa-copy.cc (fini_copy_prop): ... here.
	* tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): ...
	and here.

2024-06-30  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_build_slp_tree_1): Compare
	STMT_VINFO_REDUC_IDX.
	(vect_build_slp_tree_2): Prevent operand swapping for
	all stmts participating in a reduction.

2024-06-30  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vect-loop.cc (vectorizable_reduction): Determine input vectype
	during traversal of reduction statements.

2024-06-30  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vect-stmts.cc (vectorizable_shift): Allow shift-by-induction
	for single-lane slp node.

2024-06-29  Maciej W. Rozycki  <macro@orcam.me.uk>

	PR rtl-optimization/115565
	* cse.cc (record_jump_cond): Use INT_MIN rather than -1 for
	`comparison_qty' if !REG_P.

2024-06-29  Sergei Lewis  <slewis@rivosinc.com>

	* config/riscv/riscv.md (movmem<mode>): New expander.

2024-06-29  Pan Li  <pan2.li@intel.com>

	* match.pd: Add imm form for .SAT_ADD matching.
	* tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children):
	Add .SAT_ADD matching under PLUS_EXPR.

2024-06-29  Jeff Law  <jlaw@ventanamicro.com>

	* config/mcore/mcore.md  (zero_extendqihi2): Clobber CC in expander
	and matching insn.
	(zero_extendqisi2): Likewise.

2024-06-28  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ssa_lazy_cache::ssa_lazy_cache): Relocate here.
	Check for provided obstack.
	(ssa_lazy_cache::~ssa_lazy_cache): Relocate here.  Free bitmap or obstack.
	* gimple-range-cache.h (ssa_lazy_cache::ssa_lazy_cache): Move.
	(ssa_lazy_cache::~ssa_lazy_cache): Move.
	(ssa_lazy_cache::m_ob): New.
	* gimple-range.cc (dom_ranger::dom_ranger): Iniitialize obstack.
	(dom_ranger::~dom_ranger): Release obstack.
	(dom_ranger::pre_bb): Create ssa_lazy_cache using obstack.
	* gimple-range.h (m_bitmaps): New.

2024-06-28  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386-expand.cc (ix86_expand_move): Remove extra
	assignment to tmp variable, reuse tmp variable instead of
	declaring new temporary variable and remove tmp variable shadowing.

2024-06-28  Jørgen Kvalsvik  <j@lambda.is>

	* tree-profile.cc (find_conditions): Use auto_vec without
	embedded storage.

2024-06-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115652
	* tree-vect-slp.cc (vect_schedule_slp_node): Handle the case
	where the outer loop header block is empty.

2024-06-28  Evgeny Karpov  <Evgeny.Karpov@microsoft.com>

	PR bootstrap/115635
	PR target/115643
	PR target/115661
	* config/aarch64/cygming.h
	(PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Rename to
	PE_COFF_LEGITIMIZE_EXTERN_DECL.
	(PE_COFF_LEGITIMIZE_EXTERN_DECL): Likewise.
	* config/i386/cygming.h (GOT_ALIAS_SET): Remove the diffinition to
	reuse it from i386.h.
	(PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Rename to
	PE_COFF_LEGITIMIZE_EXTERN_DECL.
	(PE_COFF_LEGITIMIZE_EXTERN_DECL): Likewise.
	* config/i386/i386-expand.cc (ix86_expand_move): Return
	ix86_GOT_alias_set.
	* config/i386/i386-expand.h (ix86_GOT_alias_set): Likewise.
	* config/i386/i386.cc (ix86_GOT_alias_set): Likewise.
	* config/i386/i386.h (GOT_ALIAS_SET): Likewise.
	* config/mingw/winnt-dll.cc (get_dllimport_decl): Use
	GOT_ALIAS_SET.
	(legitimize_pe_coff_symbol): Rename to
	PE_COFF_LEGITIMIZE_EXTERN_DECL.
	* config/mingw/winnt-dll.h (ix86_GOT_alias_set): Declare
	ix86_GOT_alias_set.

2024-06-28  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-ptr.cc (class hybrid_and_operator): Remove.
	(class hybrid_or_operator): Same.
	(class hybrid_min_operator): Same.
	(class hybrid_max_operator): Same.

2024-06-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115640
	* tree-vect-stmts.cc (vectorizable_load): With an inner
	loop SLP access to not apply a gap adjustment.

2024-06-28  Andrew Stubbs  <ams@baylibre.com>

	PR target/115640
	* config/gcn/gcn.cc (gcn_vectorize_vec_perm_const): Modify RDNA checks.

2024-06-28  Roger Sayle  <roger@nextmovesoftware.com>

	* config/i386/i386.md (*concat<mode><dwi>3_3): Change zero_extend
	to any_extend in first operand to left shift by mode precision.
	(*concat<mode><dwi>3_4): Likewise.
	(*concat<mode><dwi>3_6): Likewise.

2024-06-28  Roger Sayle  <roger@nextmovesoftware.com>

	* config/i386/i386-expand.cc (ix86_ternlog_idx) <case VEC_DUPLICATE>:
	Add a "goto do_mem_operand" as this need not match memory_operand.
	<case CONST_VECTOR>: Only args[2] may be volatile memory operand.
	Allow MEM/VEC_DUPLICATE/CONST_VECTOR as args[0] and args[1].

2024-06-27  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/115677
	* late-combine.cc (pass_late_combine::gate): New function.

2024-06-27  Stefan Schulze Frielinghaus  <stefansf@gcc.gnu.org>

	PR target/115634
	* config/s390/s390.cc (s390_decompose_addrstyle_without_index):
	Check for ADDR_REGS in s390_decompose_addrstyle_without_index.

2024-06-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115669
	* tree-vect-slp.cc (vect_build_slp_tree_2): Do not reassociate
	chains that participate in a reduction.

2024-06-27  Aldy Hernandez  <aldyh@redhat.com>

	* gimple-range-cache.cc (update_list::update_list): Add m_bitmaps.
	(update_list::~update_list): Initialize m_bitmaps.
	* gimple-range-cache.h (ssa_lazy_cache): Add m_bitmaps.
	* gimple-range.cc (enable_ranger): Remove global bitmap
	initialization.
	(disable_ranger): Remove global bitmap release.

2024-06-27  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/sse.md
	(float<floatunssuffix><sselongvecmodelower><mode>2<mask_name>
	<round_name>): Refactor the pattern.
	(unspec_fix<vcvtt_uns_suffix>_trunc<mode><sselongvecmodelower>2
	<mask_name><round_saeonly_name>): Ditto.
	(fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name>
	<round_saeonly_name>): Ditto.
	* config/i386/subst.md (round_modev8sf_condition): Remove.
	(round_saeonly_modev8sf_condition): Ditto.

2024-06-27  Hu, Lin1  <lin1.hu@intel.com>

	PR target/107432
	* config/i386/i386-expand.cc (ix86_expand_trunc_with_avx2_noavx512f):
	New function for generate a series of suitable insn.
	* config/i386/i386-protos.h (ix86_expand_trunc_with_avx2_noavx512f):
	Define new function.
	* config/i386/sse.md: Extend trunc<mode><mode>2 for x86-64-v3.
	(ssebytemode) Add V8HI.
	(PMOV_DST_MODE_2_AVX2): New mode iterator.
	(PMOV_SRC_MODE_3_AVX2): Ditto.
	* config/i386/mmx.md
	(trunc<mode><mmxhalfmodelower>2): Ditto.
	(avx512vl_trunc<mode><mmxhalfmodelower>2): Ditto.
	(truncv2si<mode>2): Ditto.
	(avx512vl_truncv2si<mode>2): Ditto.
	(mmxbytemode): New mode attr.

2024-06-27  Hu, Lin1  <lin1.hu@intel.com>

	PR target/107432
	* config/i386/mmx.md
	(VI2_32_64): New mode iterator.
	(mmxhalfmode): New mode atter.
	(mmxhalfmodelower): Ditto.
	(truncv2hiv2qi2): Extend mode v4hi and change name from
	truncv2hiv2qi to trunc<mode><mmxhalfmodelower>2.

2024-06-27  Hu, Lin1  <lin1.hu@intel.com>

	PR target/107432
	* tree-vect-generic.cc
	(expand_vector_conversion): Support convert for int -> int,
	float -> float and int <-> float.
	* tree-vect-stmts.cc (vectorizable_conversion): Wrap the
	indirect convert part.
	(supportable_indirect_convert_operation): New function.
	* tree-vectorizer.h (supportable_indirect_convert_operation):
	Define the new function.

2024-06-27  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.cc (loongarch_print_operand_reloc):
	Dedup and sort the comment describing modifiers.

2024-06-27  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.cc:
	(loongarch_use_bstrins_for_ior_with_mask): Split the main logic
	into ...
	(loongarch_use_bstrins_for_ior_with_mask_1): ... here.
	(loongarch_rtx_costs): Special case for IOR those can be
	implemented with bstrins.

2024-06-27  liuhongt  <hongtao.liu@intel.com>

	PR target/115462
	* config/i386/i386.cc (ix86_rtx_costs): Make cost of MEM (reg +
	disp) just a little bit more than MEM (reg).

2024-06-27  Pan Li  <pan2.li@intel.com>

	* internal-fn.def (SAT_TRUNC): Add new signed IFN sat_trunc as
	unary_convert.
	* match.pd: Add new matching pattern for unsigned int sat_trunc.
	* optabs.def (OPTAB_CL): Add unsigned and signed optab.
	* tree-ssa-math-opts.cc (gimple_unsigend_integer_sat_trunc): Add
	new decl for the matching pattern generated func.
	(match_unsigned_saturation_trunc): Add new func impl to match
	the .SAT_TRUNC.
	(math_opts_dom_walker::after_dom_children): Add .SAT_TRUNC match
	function under BIT_IOR_EXPR case.

2024-06-27  Pan Li  <pan2.li@intel.com>

	* match.pd: Add convert description for minus and capture.
	* tree-vect-patterns.cc (vect_recog_build_binary_gimple_call): Add
	new logic to handle in_type is incompatibile with out_type,  as
	well as rename from.
	(vect_recog_build_binary_gimple_stmt): Rename to.
	(vect_recog_sat_add_pattern): Leverage above renamed func.
	(vect_recog_sat_sub_pattern): Ditto.

2024-06-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115652
	* tree-vect-slp.cc (vect_schedule_slp_node): Only insert
	at the start of the block if that strictly dominates
	the discovered dependent stmt.

2024-06-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115493
	* tree-vect-loop.cc (vect_create_epilog_for_reduction): Use
	first scalar result.

2024-06-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115629
	* tree-ssa-tail-merge.cc (gimple_equal_p): Handle
	memory references better.
	(deps_ok_for_redirect): Handle the case not both blocks
	are considered a valid prevailing block.

2024-06-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115652
	* tree-vect-slp.cc (vect_schedule_slp_node): Advance the
	iterator based on last_stmt only for vector defs.

2024-06-26  Jørgen Kvalsvik  <j@lambda.is>

	* gcov-io.h (GCOV_ARC_TRUE): New.
	(GCOV_ARC_FALSE): New.
	* gcov.cc (struct arc_info): Add true_value, false_value.
	(read_graph_file): Read true_value, false_value.
	* profile.cc (branch_prob): Write GCOV_ARC_TRUE, GCOV_ARC_FALSE.

2024-06-26  Jørgen Kvalsvik  <j@lambda.is>

	* gcov.cc (print_usage): Reference masking MC/DC.

2024-06-26  Jørgen Kvalsvik  <j@lambda.is>

	* doc/gcov.texi: Add MC/DC section.

2024-06-26  Jørgen Kvalsvik  <j@lambda.is>

	* tree-profile.cc (find_conditions): Use auto_vec.

2024-06-26  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/arm/arm.cc (arm_predict_doloop_p): Reject loops with function
	calls that are not builtins.

2024-06-26  Kyrylo Tkachov  <ktkachov@nvidia.com>

	* config/aarch64/aarch64-cores.def (grace): New entry.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* doc/invoke.texi (AArch64 Options): Document the above.

2024-06-26  Evgeny Karpov  <Evgeny.Karpov@microsoft.com>

	* config/i386/i386.cc (legitimize_dllimport_symbol): Remove unused
	functions.
	(legitimize_pe_coff_extern_decl): Likewise.

2024-06-26  Kewen Lin  <linkw@linux.ibm.com>
	    Xionghu Luo  <xionghuluo@tencent.com>

	PR target/106069
	PR target/115355
	* config/rs6000/altivec.md (altivec_vmrghh_direct): Rename to ...
	(altivec_vmrghh_direct_be): ... this.  Add condition BYTES_BIG_ENDIAN.
	(altivec_vmrghh_direct_le): New define_insn.
	(altivec_vmrglh_direct): Rename to ...
	(altivec_vmrglh_direct_be): ... this.  Add condition BYTES_BIG_ENDIAN.
	(altivec_vmrglh_direct_le): New define_insn.
	(altivec_vmrghh): Adjust by calling gen_altivec_vmrghh_direct_be
	for BE and gen_altivec_vmrglh_direct_le for LE.
	(altivec_vmrglh): Adjust by calling gen_altivec_vmrglh_direct_be
	for BE and gen_altivec_vmrghh_direct_le for LE.
	(vec_widen_umult_hi_v16qi): Adjust the call to
	gen_altivec_vmrghh_direct by gen_altivec_vmrghh for BE
	and by gen_altivec_vmrglh for LE.
	(vec_widen_smult_hi_v16qi): Likewise.
	(vec_widen_umult_lo_v16qi): Adjust the call to
	gen_altivec_vmrglh_direct by gen_altivec_vmrglh for BE
	and by gen_altivec_vmrghh for LE.
	(vec_widen_smult_lo_v16qi): Likewise.
	* config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Replace
	CODE_FOR_altivec_vmrghh_direct by
	CODE_FOR_altivec_vmrghh_direct_be for BE and
	CODE_FOR_altivec_vmrghh_direct_le for LE.  And replace
	CODE_FOR_altivec_vmrglh_direct by
	CODE_FOR_altivec_vmrglh_direct_be for BE and
	CODE_FOR_altivec_vmrglh_direct_le for LE.

2024-06-26  Kewen Lin  <linkw@linux.ibm.com>
	    Xionghu Luo  <xionghuluo@tencent.com>

	PR target/106069
	PR target/115355
	* config/rs6000/altivec.md (altivec_vmrghb_direct): Rename to ...
	(altivec_vmrghb_direct_be): ... this.  Add condition BYTES_BIG_ENDIAN.
	(altivec_vmrghb_direct_le): New define_insn.
	(altivec_vmrglb_direct): Rename to ...
	(altivec_vmrglb_direct_be): ... this.  Add condition BYTES_BIG_ENDIAN.
	(altivec_vmrglb_direct_le): New define_insn.
	(altivec_vmrghb): Adjust by calling gen_altivec_vmrghb_direct_be
	for BE and gen_altivec_vmrglb_direct_le for LE.
	(altivec_vmrglb): Adjust by calling gen_altivec_vmrglb_direct_be
	for BE and gen_altivec_vmrghb_direct_le for LE.
	* config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Replace
	CODE_FOR_altivec_vmrghb_direct by
	CODE_FOR_altivec_vmrghb_direct_be for BE and
	CODE_FOR_altivec_vmrghb_direct_le for LE.  And replace
	CODE_FOR_altivec_vmrglb_direct by
	CODE_FOR_altivec_vmrglb_direct_be for BE and
	CODE_FOR_altivec_vmrglb_direct_le for LE.

2024-06-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115646
	* tree-call-cdce.cc (check_pow): Check for bit_sz values
	as allowed by transform.

2024-06-26  Haochen Gui  <guihaoc@gcc.gnu.org>

	* builtins.cc (interclass_mathfn_icode): Set optab to isnormal_optab
	for isnormal builtin.
	* optabs.def (isnormal_optab): New.
	* doc/md.texi (isnormal): Document.

2024-06-26  Haochen Gui  <guihaoc@gcc.gnu.org>

	* builtins.cc (interclass_mathfn_icode): Set optab to isfinite_optab
	for isfinite builtin.
	* optabs.def (isfinite_optab): New.
	* doc/md.texi (isfinite): Document.

2024-06-26  liuhongt  <hongtao.liu@intel.com>

	PR target/114189
	* match.pd: Simplify a < 0 ? -1 : 0 to (signed) >> 31 and a <
	0 ? 1 : 0 to (unsigned) a >> 31 for vector integer type.

2024-06-26  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (struct codeview_custom_type): Add lf_procedure
	and lf_arglist to union.
	(write_lf_procedure, write_lf_arglist): New functions.
	(write_custom_types): Call write_lf_procedure and write_lf_arglist.
	(get_type_num_subroutine_type): New function.
	(get_type_num): Handle DW_TAG_subroutine_type DIEs.
	* dwarf2codeview.h (LF_PROCEDURE, LF_ARGLIST): Define.

2024-06-26  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (struct codeview_custom_type): Add lf_bitfield to
	union.
	(write_lf_bitfield): New function.
	(write_custom_types): Call write_lf_bitfield.
	(create_bitfield): New function.
	(get_type_num_struct): Handle bitfields.
	* dwarf2codeview.h (LF_BITFIELD): Define.

2024-06-26  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS-libcommon): Add diagnostic-global-context.o.
	* diagnostic-global-context.cc: New file, taken from material in
	diagnostic.cc.
	* diagnostic.cc (global_diagnostic_context): Move to
	diagnostic-global-context.cc.
	(global_dc): Likewise.
	(verbatim): Likewise.
	(emit_diagnostic): Likewise.
	(emit_diagnostic_valist): Likewise.
	(emit_diagnostic_valist_meta): Likewise.
	(inform): Likewise.
	(inform_n): Likewise.
	(warning): Likewise.
	(warning_at): Likewise.
	(warning_meta): Likewise.
	(warning_n): Likewise.
	(pedwarn): Likewise.
	(permerror): Likewise.
	(permerror_opt): Likewise.
	(error): Likewise.
	(error_n): Likewise.
	(error_at): Likewise.
	(error_meta): Likewise.
	(sorry): Likewise.
	(sorry_at): Likewise.
	(seen_error): Likewise.
	(fatal_error): Likewise.
	(internal_error): Likewise.
	(internal_error_no_backtrace): Likewise.
	(fnotice): Likewise.
	(auto_diagnostic_group::auto_diagnostic_group): Likewise.
	(auto_diagnostic_group::~auto_diagnostic_group): Likewise.

2024-06-26  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-path.cc (class path_label): Add m_path field,
	and use it to replace all uses of global_dc.
	(event_range::event_range): Add "ctxt" param and use it to
	construct m_path_label.
	(event_range::maybe_add_event): Add "ctxt" param and pass it to
	gcc_rich_location::add_location_if_nearby.
	(path_summary::path_summary): Add "ctxt" param and pass it to
	event_range::maybe_add_event.
	(diagnostic_context::print_path): Pass *this to path_summary ctor.
	(selftest::test_empty_path): Use "dc" when constructing
	path_summary rather than implicitly using global_dc.
	(selftest::test_intraprocedural_path): Likewise.
	(selftest::test_interprocedural_path_1): Likewise.
	(selftest::test_interprocedural_path_2): Likewise.
	(selftest::test_recursion): Likewise.
	(selftest::test_control_flow_1): Likewise.
	(selftest::test_control_flow_2): Likewise.
	(selftest::test_control_flow_3): Likewise.
	(selftest::assert_cfg_edge_path_streq): Likewise.
	(selftest::test_control_flow_5): Likewise.
	(selftest::test_control_flow_6): Likewise.
	(selftest::diagnostic_path_cc_tests): Eliminate use of global_dc.
	* diagnostic-show-locus.cc
	(gcc_rich_location::add_location_if_nearby): Add "ctxt" param and
	use it instead of implicitly using global_dc.
	(selftest::test_add_location_if_nearby): Use
	test_diagnostic_context rather than implicitly using global_dc.
	* diagnostic.cc (pedantic_warning_kind): Delete macro.
	(permissive_error_kind): Delete macro.
	(permissive_error_option): Delete macro.
	(diagnostic_context::diagnostic_enabled): Remove use of
	permissive_error_option.
	(diagnostic_context::report_diagnostic): Remove use of
	pedantic_warning_kind.
	(diagnostic_impl): Convert to...
	(diagnostic_context::diagnostic_impl): ...this.
	(diagnostic_n_impl): Convert to...
	(diagnostic_context::diagnostic_n_impl): ...this.
	(emit_diagnostic): Explicitly use global_dc for method call.
	(emit_diagnostic_valist): Likewise.
	(emit_diagnostic_valist_meta): Likewise.
	(inform): Likewise.
	(inform_n): Likewise.
	(warning): Likewise.
	(warning_at): Likewise.
	(warning_meta): Likewise.
	(warning_n): Likewise.
	(pedwarn): Likewise.
	(permerror): Likewise.
	(permerror_opt): Likewise.
	(error): Likewise.
	(error_n): Likewise.
	(error_at): Likewise.
	(error_meta): Likewise.
	(sorry): Likewise.
	(sorry_at): Likewise.
	(fatal_error): Likewise.
	(internal_error): Likewise.
	(internal_error_no_backtrace): Likewise.
	* diagnostic.h (diagnostic_context::diagnostic_impl): New decl.
	(diagnostic_context::diagnostic_n_impl): New decl.
	* gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
	Add "ctxt" param.

2024-06-26  David Malcolm  <dmalcolm@redhat.com>

	PR testsuite/109360
	* doc/install.texi (Python3 modules): Update SARIF validation
	requirement to use check-jsonschema rather than jsonschema.

2024-06-25  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (struct codeview_custom_type): Add lf_array to
	union.
	(write_lf_array): New function.
	(write_custom_types): Call write_lf_array.
	(get_type_num_array_type): New function.
	(get_type_num): Handle DW_TAG_array_type DIEs.
	* dwarf2codeview.h (LF_ARRAY): Define.

2024-06-25  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (write_lf_union): New function.
	(write_custom_types): Call write_lf_union.
	(add_struct_forward_def): Handle DW_TAG_union_type DIEs.
	(get_type_num_struct): Handle unions.
	(get_type_num): Handle DW_TAG_union_type DIEs.
	* dwarf2codeview.h (LF_UNION): Define.

2024-06-25  Sergei Lewis  <slewis@rivosinc.com>

	* config/riscv/riscv-protos.h (riscv_vector::expand_vec_cmpmem): New
	function declaration.
	* config/riscv/riscv-string.cc (riscv_vector::expand_vec_cmpmem): New
	function.
	* config/riscv/riscv.md (cmpmemsi): Try riscv_vector::expand_vec_cmpmem
	for constant lengths.

2024-06-25  Andrew MacLeod  <amacleod@redhat.com>

	* doc/invoke.texi (vrp-block-limit): Document.
	* params.opt (param=vrp-block-limit): New.
	* tree-vrp.cc (fvrp_folder::execute): Invoke fast_vrp if block
	count exceeds limit.

2024-06-25  Surya Kumari Jangala  <jskumari@linux.ibm.com>

	PR rtl-optimization/111673
	* ira-color.cc (assign_hard_reg): Scale save/restore costs of
	callee save registers with block frequency.

2024-06-25  Jeff Law  <jlaw@ventanamicro.com>

	* config/fr30/constraints.md (Q): Remove unused constraint.
	* config/fr30/predicates.md (call_operand): Remove unused predicate.
	* config/fr30/fr30.md (call, vall_value): Turn into expanders and
	force the call address into a register.
	(*call, *call_value): Adjust to only allow indirect calls.  Adjust
	output template accordingly.

2024-06-25  Richard Sandiford  <richard.sandiford@arm.com>

	* late-combine.cc (insn_combination::substitute_nondebug_use):
	Reject second and subsequent uses if targetm.cannot_copy_insn_p
	disallows copying.

2024-06-25  Richard Biener  <rguenther@suse.de>

	* gimple-range-gori.cc (gori_compute::may_recompute_p):
	Call is_export_p with NULL bb.

2024-06-25  Xi Ruoyao  <xry111@xry111.site>

	* doc/rtl.texi (jump_table_data): Fix typos.

2024-06-25  Richard Sandiford  <richard.sandiford@arm.com>

	* dbgcnt.def (late_combine): New debug counter.
	* late-combine.cc (insn_combination::run): Use it.

2024-06-25  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/115608
	* config/sparc/linux64.h (CC1_SPEC): Pass -m32 for -mv8plus.

2024-06-25  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/106594
	PR target/115622
	PR target/115633
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Move
	default-disable of late-combine passes from here...
	(rs6000_override_options_after_change): ... to here.

2024-06-25  Richard Sandiford  <richard.sandiford@arm.com>

	* expmed.cc (store_bit_field_using_insv): Revert earlier change
	to use force_subreg instead of simplify_gen_subreg.

2024-06-25  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips.cc(mips_expand_vec_cond_expr): Add extra
	argument to info that opernads[3] is cmp_res already.
	* config/mips/mips-protos.h(mips_expand_vec_cond_expr): Ditto.
	* config/mips/mips-msa.md(vcond_mask): Define new expand.
	(vcondu): Use mips_expand_vec_cond_expr with 4th argument.
	(vcond): Ditto.

2024-06-25  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips.md(conditional_trap_reg): Output $0 instead
	of 0 if !ISA_HAS_COND_TRAPI.

2024-06-25  Evgeny Karpov  <Evgeny.Karpov@microsoft.com>

	* config.gcc: Add winnt-dll.o, which contains the DLL
	import/export implementation.
	* config/aarch64/aarch64.cc (aarch64_load_symref_appropriately):
	Add dllimport implementation.
	(aarch64_expand_call): Likewise.
	(aarch64_legitimize_address): Likewise.
	* config/aarch64/cygming.h (SYMBOL_FLAG_DLLIMPORT): Modify MinGW
	environment to support DLL import/export.
	(SYMBOL_FLAG_DLLEXPORT): Likewise.
	(SYMBOL_REF_DLLIMPORT_P): Likewise.
	(SYMBOL_FLAG_STUBVAR): Likewise.
	(SYMBOL_REF_STUBVAR_P): Likewise.
	(TARGET_VALID_DLLIMPORT_ATTRIBUTE_P): Likewise.
	(TARGET_ASM_FILE_END): Likewise.
	(SUB_TARGET_RECORD_STUB): Likewise.
	(GOT_ALIAS_SET): Likewise.
	(PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Likewise.
	(HAVE_64BIT_POINTERS): Likewise.

2024-06-25  Evgeny Karpov  <Evgeny.Karpov@microsoft.com>

	* config/i386/cygming.h
	(PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Declare whether an
	external declaration should be legitimized.
	(HAVE_64BIT_POINTERS): Define whether the target supports 64-bit
	pointers.
	* config/mingw/mingw32.h (defined): Use the correct
	DllMainCRTStartup entry function.
	* config/mingw/winnt-dll.cc (defined): Exclude ix86-related code.

2024-06-25  Evgeny Karpov  <Evgeny.Karpov@microsoft.com>

	* config/aarch64/aarch64.cc: Extend the aarch64 attributes list.
	* config/aarch64/cygming.h (SUBTARGET_ATTRIBUTE_TABLE): Define the
	selectany attribute.

2024-06-25  Evgeny Karpov  <Evgeny.Karpov@microsoft.com>

	* config/i386/cygming.h (mingw_pe_record_stub): Rename functions
	in mingw folder which will be reused for aarch64.
	(TARGET_ASM_FILE_END): Update to new target-independent name.
	(SUBTARGET_ATTRIBUTE_TABLE): Likewise.
	(TARGET_VALID_DLLIMPORT_ATTRIBUTE_P): Likewise.
	(SUB_TARGET_RECORD_STUB): Likewise.
	* config/i386/i386-protos.h (ix86_handle_selectany_attribute):
	Likewise.
	(mingw_handle_selectany_attribute): Likewise.
	(i386_pe_valid_dllimport_attribute_p): Likewise.
	(mingw_pe_valid_dllimport_attribute_p): Likewise.
	(i386_pe_file_end): Likewise.
	(mingw_pe_file_end): Likewise.
	(i386_pe_record_stub): Likewise.
	(mingw_pe_record_stub): Likewise.
	* config/mingw/winnt.cc (ix86_handle_selectany_attribute):
	Likewise.
	(mingw_handle_selectany_attribute): Likewise.
	(i386_pe_valid_dllimport_attribute_p): Likewise.
	(mingw_pe_valid_dllimport_attribute_p): Likewise.
	(i386_pe_record_stub): Likewise.
	(mingw_pe_record_stub): Likewise.
	(i386_pe_file_end): Likewise.
	(mingw_pe_file_end): Likewise.
	* config/mingw/winnt.h (mingw_handle_selectany_attribute): Declate
	functionality that will be reused by multiple targets.
	(mingw_pe_file_end): Likewise.
	(mingw_pe_record_stub): Likewise.
	(mingw_pe_valid_dllimport_attribute_p): Likewise.

2024-06-25  Evgeny Karpov  <Evgeny.Karpov@microsoft.com>

	* config.gcc: Add winnt-dll.o, which contains the DLL
	import/export implementation.
	* config/i386/cygming.h (SUB_TARGET_RECORD_STUB): Remove the
	old implementation. Rename the required function to MinGW.
	Use MinGW implementation for COFF and nothing otherwise.
	(GOT_ALIAS_SET): Likewise.
	* config/i386/i386-expand.cc (ix86_expand_move): Likewise.
	* config/i386/i386-expand.h (ix86_GOT_alias_set): Likewise.
	(legitimize_pe_coff_symbol): Likewise.
	* config/i386/i386-protos.h (i386_pe_record_stub): Likewise.
	* config/i386/i386.cc (is_imported_p): Likewise.
	(legitimate_pic_address_disp_p): Likewise.
	(ix86_GOT_alias_set): Likewise.
	(legitimize_pic_address): Likewise.
	(legitimize_tls_address): Likewise.
	(struct dllimport_hasher): Likewise.
	(GTY): Likewise.
	(get_dllimport_decl): Likewise.
	(legitimize_pe_coff_extern_decl): Likewise.
	(legitimize_dllimport_symbol): Likewise.
	(legitimize_pe_coff_symbol): Likewise.
	(ix86_legitimize_address): Likewise.
	* config/i386/i386.h (GOT_ALIAS_SET): Likewise.
	* config/mingw/winnt.cc (i386_pe_record_stub): Likewise.
	(mingw_pe_record_stub): Likewise.
	* config/mingw/winnt.h (mingw_pe_record_stub): Likewise.
	* config/mingw/t-cygming: Add the winnt-dll.o compilation.
	* config/mingw/winnt-dll.cc: New file.
	* config/mingw/winnt-dll.h: New file.

2024-06-25  Evgeny Karpov  <Evgeny.Karpov@microsoft.com>

	* config.gcc: Move mingw_* declations to mingw.
	* config/aarch64/aarch64-protos.h
	(mingw_pe_maybe_record_exported_symbol): Likewise.
	(mingw_pe_section_type_flags): Likewise.
	(mingw_pe_unique_section): Likewise.
	(mingw_pe_encode_section_info): Likewise.
	* config/aarch64/cygming.h
	(mingw_pe_asm_named_section): Likewise.
	(mingw_pe_declare_function_type): Likewise.
	* config/i386/i386-protos.h
	(mingw_pe_unique_section): Likewise.
	(mingw_pe_declare_function_type): Likewise.
	(mingw_pe_maybe_record_exported_symbol): Likewise.
	(mingw_pe_encode_section_info): Likewise.
	(mingw_pe_section_type_flags): Likewise.
	(mingw_pe_asm_named_section): Likewise.
	* config/mingw/winnt.h: New file.

2024-06-25  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (struct codeview_type): Add is_fwd_ref member.
	(struct codeview_subtype): Add lf_member to union.
	(struct codeview_custom_type): Add lf_structure to union.
	(struct codeview_deferred_type): New structure.
	(deferred_types, last_deferred_type): New variables.
	(get_type_num): Add new args to prototype.
	(write_lf_fieldlist): Handle LF_MEMBER subtypes.
	(write_lf_structure): New function.
	(write_custom_types): Call write_lf_structure.
	(get_type_num_pointer_type): Add in_struct argument.
	(get_type_num_const_type): Likewise.
	(get_type_num_volatile_type): Likewise.
	(add_enum_forward_def): Fix get_type_num call.
	(get_type_num_enumeration_type): Add in-struct argument.
	(add_deferred_type, flush_deferred_types): New functions.
	(add_struct_forward_def, get_type_num_struct): Likewise.
	(get_type_num): Handle self-referential structs.
	(add_variable): Fix get_type_num call.
	(codeview_debug_early_finish): Call flush_deferred_types.
	* dwarf2codeview.h (LF_CLASS, LF_STRUCTURE, LF_MEMBER): Define.

2024-06-25  Kewen Lin  <linkw@linux.ibm.com>

	* coretypes.h (enum tree_index): Forward declaration.
	* defaults.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* doc/rtl.texi: Update document by replacing {FLOAT,DOUBLE}_TYPE_SIZE
	with C type {float,double}.
	* doc/tm.texi.in: Document new hook mode_for_floating_type, remove
	document entries for {FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE and
	update document for WIDEST_HARDWARE_FP_SIZE.
	* doc/tm.texi: Regenerate.
	* emit-rtl.cc (init_emit_once): Replace DOUBLE_TYPE_SIZE by
	calling targetm.c.mode_for_floating_type with TI_DOUBLE_TYPE.
	* real.h (REAL_VALUE_TO_TARGET_LONG_DOUBLE): Use TYPE_PRECISION of
	long_double_type_node to replace LONG_DOUBLE_TYPE_SIZE.
	* system.h (FLOAT_TYPE_SIZE): Poison.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* target.def (mode_for_floating_type): New hook.
	* targhooks.cc (default_mode_for_floating_type): New function.
	(default_scalar_mode_supported_p): Update macros
	{FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE by calling
	targetm.c.mode_for_floating_type with
	TI_{FLOAT,DOUBLE,LONG_DOUBLE}_TYPE.
	* targhooks.h (default_mode_for_floating_type): New declaration.
	* tree-core.h (enum tree_index): Specify underlying type unsigned
	to sync with forward declaration in coretypes.h.
	(NUM_FLOATN_TYPES): Explicitly convert to int.
	(NUM_FLOATNX_TYPES): Likewise.
	(NUM_FLOATN_NX_TYPES): Likewise.
	* tree.cc (build_common_tree_nodes): Update macros
	{FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE by calling
	targetm.c.mode_for_floating_type with
	TI_{FLOAT,DOUBLE,LONG_DOUBLE}_TYPE and set type mode accordingly.
	* config/arc/arc.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/bpf/bpf.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/epiphany/epiphany.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/fr30/fr30.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/frv/frv.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/ft32/ft32.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/gcn/gcn.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/iq2000/iq2000.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/lm32/lm32.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/m32c/m32c.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/m32r/m32r.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/microblaze/microblaze.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/mmix/mmix.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/moxie/moxie.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/msp430/msp430.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/nds32/nds32.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/nios2/nios2.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/nvptx/nvptx.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/or1k/or1k.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/pdp11/pdp11.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/pru/pru.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/stormy16/stormy16.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/visium/visium.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/xtensa/xtensa.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/rs6000/rs6000.cc (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	(rs6000_c_mode_for_floating_type): New function.
	* config/rs6000/rs6000.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/aarch64/aarch64.cc (aarch64_c_mode_for_floating_type):
	New function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	* config/aarch64/aarch64.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/alpha/alpha.cc (alpha_c_mode_for_floating_type): New
	function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	* config/alpha/alpha.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/avr/avr.cc (avr_c_mode_for_floating_type): New
	function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	* config/avr/avr.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/i386/i386.cc (ix86_c_mode_for_floating_type): New
	function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	* config/i386/i386.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/ia64/ia64.cc (ia64_c_mode_for_floating_type): New
	function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	* config/ia64/ia64.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/riscv/riscv.cc (riscv_c_mode_for_floating_type): New function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	* config/riscv/riscv.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/rl78/rl78.cc (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	(rl78_c_mode_for_floating_type): New function.
	* config/rl78/rl78.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/rx/rx.cc (rx_c_mode_for_floating_type): New function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	* config/rx/rx.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/s390/s390.cc (s390_c_mode_for_floating_type): New function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	* config/s390/s390.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/sh/sh.cc (sh_c_mode_for_floating_type): New function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	* config/sh/sh.h (LONG_DOUBLE_TYPE_SIZE): Remove.
	* config/h8300/h8300.cc (h8300_c_mode_for_floating_type): New
	function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	* config/h8300/h8300.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Remove.
	(LONG_DOUBLE_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_MODE): New macro.
	* config/h8300/linux.h (DOUBLE_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_MODE): New macro.
	* config/loongarch/loongarch.cc (loongarch_c_mode_for_floating_type):
	New function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	* config/loongarch/loongarch.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Remove.
	(LONG_DOUBLE_TYPE_SIZE): Rename to ...
	(LA_LONG_DOUBLE_TYPE_SIZE): ... this.
	(UNITS_PER_FPVALUE): Replace LONG_DOUBLE_TYPE_SIZE with
	LA_LONG_DOUBLE_TYPE_SIZE.
	(MAX_FIXED_MODE_SIZE): Likewise.
	(STRUCTURE_SIZE_BOUNDARY): Likewise.
	(BIGGEST_ALIGNMENT): Likewise.
	* config/m68k/m68k.cc (m68k_c_mode_for_floating_type): New function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	* config/m68k/m68k.h (LONG_DOUBLE_TYPE_SIZE): Remove.
	(LONG_DOUBLE_TYPE_MODE): New macro.
	* config/m68k/netbsd-elf.h (LONG_DOUBLE_TYPE_SIZE): Remove.
	(LONG_DOUBLE_TYPE_MODE): New macro.
	* config/mips/mips.cc (mips_c_mode_for_floating_type): New function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	* config/mips/mips.h (UNITS_PER_FPVALUE): Replace LONG_DOUBLE_TYPE_SIZE
	with MIPS_LONG_DOUBLE_TYPE_SIZE.
	(MAX_FIXED_MODE_SIZE): Likewise.
	(STRUCTURE_SIZE_BOUNDARY): Likewise.
	(BIGGEST_ALIGNMENT): Likewise.
	(FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Remove.
	(LONG_DOUBLE_TYPE_SIZE): Rename to ...
	(MIPS_LONG_DOUBLE_TYPE_SIZE): ... this.
	* config/mips/n32-elf.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
	(MIPS_LONG_DOUBLE_TYPE_SIZE): ... this.
	* config/pa/pa.cc (pa_c_mode_for_floating_type): New function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	(pa_scalar_mode_supported_p): Rename FLOAT_TYPE_SIZE to
	PA_FLOAT_TYPE_SIZE, rename DOUBLE_TYPE_SIZE to PA_DOUBLE_TYPE_SIZE
	and rename LONG_DOUBLE_TYPE_SIZE to PA_LONG_DOUBLE_TYPE_SIZE.
	* config/pa/pa.h (PA_FLOAT_TYPE_SIZE): New macro.
	(PA_DOUBLE_TYPE_SIZE): Likewise.
	(PA_LONG_DOUBLE_TYPE_SIZE): Likewise.
	* config/pa/pa-64.h (FLOAT_TYPE_SIZE): Rename to ...
	(PA_FLOAT_TYPE_SIZE): ... this.
	(DOUBLE_TYPE_SIZE): Rename to ...
	(PA_DOUBLE_TYPE_SIZE): ... this.
	(LONG_DOUBLE_TYPE_SIZE): Rename to ...
	(PA_LONG_DOUBLE_TYPE_SIZE): ... this.
	* config/pa/pa-hpux.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
	(PA_LONG_DOUBLE_TYPE_SIZE): ... this.
	* config/sparc/sparc.cc (sparc_c_mode_for_floating_type): New function.
	(TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
	(FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Likewise.
	(LONG_DOUBLE_TYPE_SIZE): Likewise.
	(sparc_type_code): Replace FLOAT_TYPE_SIZE with TYPE_PRECISION of
	float_type_node.
	* config/sparc/sparc.h (FLOAT_TYPE_SIZE): Remove.
	(DOUBLE_TYPE_SIZE): Remove.
	* config/sparc/freebsd.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
	(SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
	* config/sparc/linux.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
	(SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
	* config/sparc/linux64.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
	(SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
	* config/sparc/netbsd-elf.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
	(SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
	* config/sparc/openbsd64.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
	(SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
	* config/sparc/sol2.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
	(SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
	* config/sparc/sp-elf.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
	(SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
	* config/sparc/sp64-elf.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
	(SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
	* config/bfin/bfin.h (FLOAT_TYPE_SIZE): Rename to ...
	(BFIN_FLOAT_TYPE_SIZE): ... this.
	(DOUBLE_TYPE_SIZE): Rename to ...
	(BFIN_DOUBLE_TYPE_SIZE): ... this.
	(LONG_DOUBLE_TYPE_SIZE): Remove.
	(UNITS_PER_FLOAT): Replace FLOAT_TYPE_SIZE with BFIN_FLOAT_TYPE_SIZE.
	(UNITS_PER_DOUBLE): Replace DOUBLE_TYPE_SIZE with
	BFIN_DOUBLE_TYPE_SIZE.

2024-06-25  Kewen Lin  <linkw@linux.ibm.com>

	* config/vms/vms.cc (vms_patch_builtins): Use TYPE_PRECISION of
	long_double_type_node to replace LONG_DOUBLE_TYPE_SIZE.

2024-06-25  Andrew MacLeod  <amacleod@redhat.com>

	* tree-vrp.cc (execute_fast_vrp): Do not use transitive relations.
	* value-query.cc (range_query::create_relation_oracle): Add
	parameter to enable transitive relations.
	* value-query.h (range_query::create_relation_oracle): Likewise.
	* value-relation.h (dom_oracle::dom_oracle): Likewise.
	* value-relation.cc (dom_oracle::dom_oracle): Likewise.
	(dom_oracle::register_transitives): Check transitive flag.

2024-06-24  Sergei Lewis  <slewis@rivosinc.com>

	* config/riscv/riscv-protos.h (riscv_vector::expand_vec_setmem): New
	function declaration.
	* config/riscv/riscv-string.cc (riscv_vector::expand_vec_setmem): New
	function: this generates an inline vectorised memory set, if and only if
	we know the entire operation can be performed in a single vector store.
	* config/riscv/riscv.md (setmem<mode>): Try riscv_vector::expand_vec_setmem
	for constant lengths.  Do not require operand 2 to be a constant.

2024-06-24  Patrick O'Neill  <patrick@rivosinc.com>

	* doc/sourcebuild.texi (dg-remove-option): Add documentation.
	(dg-add-option): Add documentation for riscv_{a,zaamo,zalrsc,ztso}

2024-06-24  Roger Sayle  <roger@nextmovesoftware.com>
	    Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113673
	* gimple-ssa-store-merging.cc (find_bswap_or_nop_load): Make static.
	(find_bswap_or_nop_1): Avoid transformations (load merging) when
	stmt_can_throw_internal indicates that a statement can trap.

2024-06-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115602
	* tree-vect-slp.cc (vect_cse_slp_nodes): Delay populating the
	bst-map to avoid cycles.

2024-06-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115528
	* tree-vect-data-refs.cc (vect_compute_data_ref_alignment):
	Make sure to look at both the inner and outer loop step
	behavior.

2024-06-24  Pali Rohár  <pali@kernel.org>

	* config/i386/mingw-w64.h (CPP_SPEC): Add missing -mcrtdll=
	cases: msvcr40*, msvcrtd*.
	* config/mingw/mingw32.h (CPP_SPEC): Add missing -mcrtdll=
	cases: msvcr40*, msvcrtd*.
	* doc/invoke.texi: Add missing -mcrtdll= cases: msvcr40*,
	msvcrtd*, msvcr71*. Express wildcards with *. Document _UCRT.

2024-06-24  Richard Sandiford  <richard.sandiford@arm.com>

	* common.opt.urls: Regenerate.

2024-06-24  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/106594
	PR rtl-optimization/114515
	PR rtl-optimization/114575
	PR rtl-optimization/114996
	PR rtl-optimization/115104
	* Makefile.in (OBJS): Add late-combine.o.
	* common.opt (flate-combine-instructions): New option.
	* doc/invoke.texi: Document it.
	* opts.cc (default_options_table): Enable it by default at -O2
	and above.
	* tree-pass.h (make_pass_late_combine): Declare.
	* late-combine.cc: New file.
	* passes.def: Add two instances of late_combine.
	* doc/passes.texi: Document the new passes.
	* config/i386/i386-options.cc (ix86_override_options_after_change):
	Disable late-combine by default.
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Likewise.
	* config/xtensa/xtensa.cc (xtensa_option_override): Likewise.

2024-06-24  Richard Sandiford  <richard.sandiford@arm.com>

	* rtl-ssa.h: Include predicates.h.
	* rtl-ssa/predicates.h: New file.
	* rtl-ssa/access-utils.h (prev_call_clobbers_ignoring): Rename to...
	(prev_call_clobbers): ...this and treat the ignore parameter as an
	object with the same interface as ignore_nothing.
	(next_call_clobbers_ignoring): Rename to...
	(next_call_clobbers): ...this and treat the ignore parameter as an
	object with the same interface as ignore_nothing.
	(first_nondebug_insn_use_ignoring): Rename to...
	(first_nondebug_insn_use): ...this and treat the ignore parameter as
	an object with the same interface as ignore_nothing.
	(last_nondebug_insn_use_ignoring): Rename to...
	(last_nondebug_insn_use): ...this and treat the ignore parameter as
	an object with the same interface as ignore_nothing.
	(last_access_ignoring): Rename to...
	(last_access): ...this and treat the ignore parameter as an object
	with the same interface as ignore_nothing.  Conditionally skip
	definitions.
	(prev_access_ignoring): Rename to...
	(prev_access): ...this and treat the ignore parameter as an object
	with the same interface as ignore_nothing.
	(first_def_ignoring): Replace with...
	(first_access): ...this new function.
	(next_access_ignoring): Rename to...
	(next_access): ...this and treat the ignore parameter as an object
	with the same interface as ignore_nothing.  Conditionally skip
	definitions.
	* rtl-ssa/change-utils.h (insn_is_changing): Delete.
	(restrict_movement_ignoring): Rename to...
	(restrict_movement): ...this and treat the ignore parameter as an
	object with the same interface as ignore_nothing.
	(recog_ignoring): Rename to...
	(recog): ...this and treat the ignore parameter as an object with
	the same interface as ignore_nothing.
	* rtl-ssa/changes.h (insn_is_changing_closure): Delete.
	* rtl-ssa/functions.h (function_info::add_regno_clobber): Treat
	the ignore parameter as an object with the same interface as
	ignore_nothing.
	* rtl-ssa/insn-utils.h (insn_is): Delete.
	* rtl-ssa/insns.h (insn_is_closure): Delete.
	* rtl-ssa/member-fns.inl
	(insn_is_changing_closure::insn_is_changing_closure): Delete.
	(insn_is_changing_closure::operator()): Likewise.
	(function_info::add_regno_clobber): Treat the ignore parameter
	as an object with the same interface as ignore_nothing.
	(ignore_changing_insns::ignore_changing_insns): New function.
	(ignore_changing_insns::should_ignore_insn): Likewise.
	* rtl-ssa/movement.h (restrict_movement_for_dead_range): Treat
	the ignore parameter as an object with the same interface as
	ignore_nothing.
	(restrict_movement_for_defs_ignoring): Rename to...
	(restrict_movement_for_defs): ...this and treat the ignore parameter
	as an object with the same interface as ignore_nothing.
	(restrict_movement_for_uses_ignoring): Rename to...
	(restrict_movement_for_uses): ...this and treat the ignore parameter
	as an object with the same interface as ignore_nothing.  Conditionally
	skip definitions.
	* doc/rtl.texi: Update for above name changes.  Use
	ignore_changing_insns instead of insn_is_changing.
	* config/aarch64/aarch64-cc-fusion.cc (cc_fusion::parallelize_insns):
	Likewise.
	* pair-fusion.cc (no_ignore): Delete.
	(latest_hazard_before, first_hazard_after): Update for above name
	changes.  Use ignore_nothing instead of no_ignore.
	(pair_fusion_bb_info::fuse_pair): Update for above name changes.
	Use ignore_changing_insns instead of insn_is_changing.
	(pair_fusion::try_promote_writeback): Likewise.

2024-06-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115599
	* tree-ssa-reassoc.cc (compare_repeat_factors): Use explicit
	compares to avoid truncations.

2024-06-24  Haochen Gui  <guihaoc@gcc.gnu.org>

	PR target/113325
	* config/rs6000/vsx.md (vsx_stxvd2x4_le_const_<mode>): New.

2024-06-24  Haochen Gui  <guihaoc@gcc.gnu.org>

	* fwprop.cc (try_fwprop_subst_pattern): Invoke change_is_worthwhile
	to judge if a replacement is worthwhile.  Remove single_set check
	and add is_debug_insn check.
	* recog.cc (swap_change): Invalidate recog_data when the cached INSN
	is swapped out.
	* rtl-ssa/changes.cc (rtl_ssa::changes_are_worthwhile): Check if the
	insn cost of new rtl is unknown and fail the replacement.

2024-06-24  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (MAX_FIELDLIST_SIZE): Define.
	(struct codeview_integer): New structure.
	(struct codeview_subtype): Likewise
	(struct codeview_custom_type): Add lf_fieldlist and lf_enum to union.
	(write_cv_integer, cv_integer_len): New functions.
	(write_lf_fieldlist, write_lf_enum): Likewise.
	(write_custom_types): Call write_lf_fieldlist and write_lf_enum.
	(add_enum_forward_def): New function.
	(get_type_num_enumeration_type): Likewise.
	(get_type_num): Handle DW_TAG_enumeration_type DIEs.
	* dwarf2codeview.h (LF_FIELDLIST, LF_INDEX, LF_ENUMERATE): Define.
	(LF_ENUM, LF_CHAR, LF_SHORT, LF_USHORT, LF_LONG): Likewise.
	(LF_ULONG, LF_QUADWORD, LF_UQUADWORD): Likewise.
	(CV_ACCESS_PRIVATE, CV_ACCESS_PROTECTED): Likewise.
	(CV_ACCESS_PUBLIC, CV_PROP_FWDREF): Likewise.

2024-06-24  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc
	(struct codeview_custom_type): Add lf_modifier to union.
	(write_cv_padding, write_lf_modifier): New functions.
	(write_custom_types): Call write_lf_modifier.
	(get_type_num_const_type): New function.
	(get_type_num_volatile_type): Likewise.
	(get_type_num): Handle DW_TAG_const_type and DW_TAG_volatile_type DIEs.
	* dwarf2codeview.h (MOD_const, MOD_volatile): Define.
	(LF_MODIFIER): Likewise.

2024-06-24  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (FIRST_TYPE): Define.
	(struct codeview_custom_type): New structure.
	(custom_types, last_custom_type): New variables.
	(get_type_num): Prototype.
	(write_lf_pointer, write_custom_types): New functions.
	(codeview_debug_finish): Call write_custom_types.
	(add_custom_type, get_type_num_pointer_type): New functions.
	(get_type_num): Handle DW_TAG_pointer_type DIEs.
	* dwarf2codeview.h (T_VOID): Define.
	(CV_POINTER_32, CV_POINTER_64): Likewise.
	(T_32PVOID, T_64PVOID): Likewise.
	(CV_PTR_NEAR32, CV_PTR64, LF_POINTER): Likewise.

2024-06-24  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (get_type_num): Handle typedefs.

2024-06-24  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (struct codeview_type): New structure.
	(struct die_hasher): Likewise.
	(types_htab): New variable.
	(codeview_debug_finish): Free types_htab if allocated.
	(get_type_num_base_type, get_type_num): New function.
	(add_variable): Call get_type_num.
	* dwarf2codeview.h (T_CHAR, T_SHORT, T_LONG, T_QUAD): Define.
	(T_UCHAR, T_USHORT, T_ULONG, T_UQUAD, T_BOOL08): Likewise.
	(T_REAL32, T_REAL64, T_REAL80, T_REAL128, T_RCHAR): Likewise.
	(T_WCHAR, T_INT4, T_UINT4, T_CHAR16, T_CHAR32, T_CHAR8): Likewise.

2024-06-23  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (S_LDATA32, S_GDATA32): Define.
	(struct codeview_symbol): New structure.
	(sym, last_sym): New variables.
	(write_data_symbol): New function.
	(write_codeview_symbols): Call write_data_symbol.
	(add_variable, codeview_debug_early_finish): New functions.
	* dwarf2codeview.h (codeview_debug_early_finish): Prototype.
	* dwarf2out.cc
	(dwarf2out_early_finish): Call codeview_debug_early_finish.

2024-06-23  Artemiy Volkov  <Artemiy.Volkov@synopsys.com>

	* config/riscv/riscv.cc (riscv_expand_conditional_move): Add a
	CONST0_RTX check.

2024-06-23  Jeff Law  <jlaw@ventanamicro.com>

	PR target/114139
	* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Verify object
	is a CONST_INT before looking at INTVAL.

2024-06-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115597
	* tree-vect-slp.cc (vect_cse_slp_nodes): Allow to CSE
	VEC_PERM nodes.

2024-06-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115579
	* tree-ssa-loop-im.cc (execute_sm): Return the auxiliary data
	created.
	(hoist_memory_references): Record the flag var that's eventually
	created and re-use it when all stores are in the same BB.

2024-06-23  Collin Funk  <collin.funk1@gmail.com>

	PR target/115409
	* config/i386/avx512fp16intrin.h (_mm512_conj_pch): Make the
	constant unsigned before shifting.
	* config/i386/avx512fp16vlintrin.h (_mm256_conj_pch): Likewise.
	(_mm_conj_pch): Likewise.

2024-06-23  demin.han  <demin.han@starfivetech.com>

	* config/riscv/predicates.md (comparison_except_eqge_operator): Only
	exclude ge.
	(comparison_except_ge_operator): Ditto.
	* config/riscv/riscv-string.cc (expand_rawmemchr): Use cmp pattern.
	(expand_strcmp): Ditto.
	* config/riscv/riscv-vector-builtins-bases.cc: Remove eqne cond.
	* config/riscv/vector.md (@pred_eqne<mode>_scalar): Remove eqne
	patterns.
	(*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
	(*pred_eqne<mode>_scalar): Ditto.
	(*pred_eqne<mode>_scalar_narrow): Ditto.
	(*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
	(*pred_eqne<mode>_extended_scalar): Ditto.
	(*pred_eqne<mode>_extended_scalar_narrow): Ditto.

2024-06-21  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-json.cc
	(json_output_format::on_end_diagnostic): Use
	get_diagnostic_kind_text rather than embedding a duplicate copy of
	the table.
	* diagnostic-format-sarif.cc
	(make_rule_id_for_diagnostic_kind): Likewise.
	* diagnostic.cc (get_diagnostic_kind_text): New.
	* diagnostic.h (get_diagnostic_kind_text): New decl.

2024-06-21  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-path.cc (diagnostic_event::meaning::dump_to_pp): Move
	here from diagnostic.cc.
	(diagnostic_event::meaning::maybe_get_verb_str): Likewise.
	(diagnostic_event::meaning::maybe_get_noun_str): Likewise.
	(diagnostic_event::meaning::maybe_get_property_str): Likewise.
	(diagnostic_path::get_first_event_in_a_function): Likewise.
	(diagnostic_path::interprocedural_p): Likewise.
	(debug): Likewise for diagnostic_path * overload.
	* diagnostic.cc (diagnostic_event::meaning::dump_to_pp): Move from
	here to diagnostic-path.cc.
	(diagnostic_event::meaning::maybe_get_verb_str): Likewise.
	(diagnostic_event::meaning::maybe_get_noun_str): Likewise.
	(diagnostic_event::meaning::maybe_get_property_str): Likewise.
	(diagnostic_path::get_first_event_in_a_function): Likewise.
	(diagnostic_path::interprocedural_p): Likewise.
	(debug): Likewise for diagnostic_path * overload.

2024-06-21  Jeff Law  <jlaw@ventanamicro.com>

	* config/stormy16/stormy16.md (swpn_zext): New pattern.

2024-06-21  Richard Sandiford  <richard.sandiford@arm.com>

	* config/stormy16/predicates.md (xs_hi_nonmemory_operand): Handle
	symbol_ref and label_ref.

2024-06-21  Richard Sandiford  <richard.sandiford@arm.com>

	* config/iq2000/iq2000.cc (iq2000_print_operand): Make %p handle 1<<31.
	* config/iq2000/iq2000.md: Remove "I" constraints on
	power_of_2_operands.

2024-06-21  Richard Sandiford  <richard.sandiford@arm.com>

	* rtl-ssa/changes.cc (rtl_ssa::changes_are_worthwhile): Don't
	cost no-op moves.
	* rtl-ssa/insns.cc (insn_info::calculate_cost): Likewise.

2024-06-21  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range.cc (gimple_ranger::register_inferred_ranges): Do not
	dump global range info after set_range_info.
	(gimple_ranger::register_transitive_inferred_ranges): Likewise.
	(dom_ranger::range_of_stmt): Likewise.
	* tree-ssanames.cc (set_range_info): If global range info
	changes, maybe print new range to dump_file.
	* tree-vrp.cc (remove_unreachable::handle_early): Do not
	dump global range info after set_range_info.
	(remove_unreachable::remove): Likewise.
	(remove_unreachable::remove_and_update_globals): Likewise.
	(pass_assumptions::execute): Likewise.

2024-06-21  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range.cc (dom_ranger::dom_ranger): Create a block
	vector.
	(dom_ranger::~dom_ranger): Dispose of the block vector.
	(dom_ranger::edge_range): Delete.
	(dom_ranger::range_on_edge): Combine range in src BB with any
	range gori_nme_on_edge returns.
	(dom_ranger::range_in_bb): Combine global range with any active
	contextual range for an ssa-name.
	(dom_ranger::range_of_stmt): Fix non-ssa LHS case, use
	fur_depend for folding so relations can be registered.
	(dom_ranger::maybe_push_edge): Delete.
	(dom_ranger::pre_bb): Create incoming contextual range vector.
	(dom_ranger::post_bb): Free contextual range vector.
	* gimple-range.h (dom_ranger::edge_range): Delete.
	(dom_ranger::m_e0): Delete.
	(dom_ranger::m_e1): Delete.
	(dom_ranger::m_bb): New.
	(dom_ranger::m_pop_list): Delete.
	* tree-vrp.cc (execute_fast_vrp): Enable relation oracle.

2024-06-21  Andrew MacLeod  <amacleod@redhat.com>

	* tree-vrp.cc (remove_unreachable::remove): Export global range
	if builtin_unreachable dominates all uses.
	(remove_unreachable::remove_and_update_globals): Do not reset SCEV.
	(execute_ranger_vrp): Reset SCEV here instead.
	(fvrp_folder::fvrp_folder): Take final pass flag
	and create a remove_unreachable object when specified.
	(fvrp_folder::pre_fold_stmt): Register GIMPLE_CONDs with
	the remove_unreachcable object.
	(fvrp_folder::m_unreachable): New.
	(execute_fast_vrp): Process remove_unreachable object.
	(pass_vrp::execute): Add final_p flag to execute_fast_vrp.

2024-06-21  David Malcolm  <dmalcolm@redhat.com>

	PR testsuite/109360
	* doc/install.texi: Mention optional usage of "jsonschema" tool.

2024-06-21  David Malcolm  <dmalcolm@redhat.com>

	PR testsuite/109360
	* diagnostic-format-sarif.cc
	(sarif_builder::make_location_object): Pass any column override
	from rich_loc to maybe_make_physical_location_object.
	(sarif_builder::maybe_make_physical_location_object): Add
	"column_override" param and pass it to maybe_make_region_object.
	(sarif_builder::maybe_make_region_object): Add "column_override"
	param and use it when the location has 0 for a column.  Don't
	add "startLine", "startColumn", "endLine", or "endColumn" if
	the values aren't positive.
	(sarif_builder::maybe_make_region_object_for_context): Don't
	add "startLine" or "endLine" if the values aren't positive.

2024-06-21  Richard Sandiford  <richard.sandiford@arm.com>

	* config/sh/sh.md (*minus_plus_one): Add constraints.

2024-06-21  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/68855
	* tree-complex.cc (init_dont_simulate_again): Handle PAREN_EXPR
	like NEGATE_EXPR.
	(complex_propagate::visit_stmt): Likewise.
	(expand_complex_move): Don't handle PAREN_EXPR.
	(expand_complex_paren): New function.
	(expand_complex_operations_1): Handle PAREN_EXPR like
	NEGATE_EXPR. And call expand_complex_paren for PAREN_EXPR.

2024-06-21  Richard Biener  <rguenther@suse.de>

	* doc/passes.texi: Remove references to no longer existing
	passes.

2024-06-21  YunQiang Su  <syq@gcc.gnu.org>

	* configure.ac: Set gcc_cv_as_mips_explicit_relocs if
	gcc_cv_as_mips_explicit_relocs_pcrel.
	* configure: Regenerate.

2024-06-21  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips.cc(mips_rtx_costs): Set condmove cost.
	* config/mips/mips.md(mov<GPR:mode>_on_<MOVECC:mode>,
	mov<GPR:mode>_on_<MOVECC:mode>_mips16e2,
	mov<GPR:mode>_on_<GPR2:mode>_ne
	mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Define name by
	remove starting *, so that we can use CODE_FOR_.

2024-06-21  Kewen Lin  <linkw@linux.ibm.com>
	    Xionghu Luo  <xionghuluo@tencent.com>

	PR target/106069
	PR target/115355
	* config/rs6000/altivec.md (altivec_vmrghw_direct_<VSX_W:mode>): Rename
	to ...
	(altivec_vmrghw_direct_<VSX_W:mode>_be): ... this.  Add the condition
	BYTES_BIG_ENDIAN.
	(altivec_vmrghw_direct_<VSX_W:mode>_le): New define_insn.
	(altivec_vmrglw_direct_<VSX_W:mode>): Rename to ...
	(altivec_vmrglw_direct_<VSX_W:mode>_be): ... this.  Add the condition
	BYTES_BIG_ENDIAN.
	(altivec_vmrglw_direct_<VSX_W:mode>_le): New define_insn.
	(altivec_vmrghw): Adjust by calling gen_altivec_vmrghw_direct_v4si_be
	for BE and gen_altivec_vmrglw_direct_v4si_le for LE.
	(altivec_vmrglw): Adjust by calling gen_altivec_vmrglw_direct_v4si_be
	for BE and gen_altivec_vmrghw_direct_v4si_le for LE.
	(vec_widen_umult_hi_v8hi): Adjust the call to
	gen_altivec_vmrghw_direct_v4si by gen_altivec_vmrghw for BE
	and by gen_altivec_vmrglw for LE.
	(vec_widen_smult_hi_v8hi): Likewise.
	(vec_widen_umult_lo_v8hi): Adjust the call to
	gen_altivec_vmrglw_direct_v4si by gen_altivec_vmrglw for BE
	and by gen_altivec_vmrghw for LE
	(vec_widen_smult_lo_v8hi): Likewise.
	* config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Replace
	CODE_FOR_altivec_vmrghw_direct_v4si by
	CODE_FOR_altivec_vmrghw_direct_v4si_be for BE and
	CODE_FOR_altivec_vmrghw_direct_v4si_le for LE.  And replace
	CODE_FOR_altivec_vmrglw_direct_v4si by
	CODE_FOR_altivec_vmrglw_direct_v4si_be for BE and
	CODE_FOR_altivec_vmrglw_direct_v4si_le for LE.
	* config/rs6000/vsx.md (vsx_xxmrghw_<VSX_W:mode>): Adjust by calling
	gen_altivec_vmrghw_direct_v4si_be for BE and
	gen_altivec_vmrglw_direct_v4si_le for LE.
	(vsx_xxmrglw_<VSX_W:mode>): Adjust by calling
	gen_altivec_vmrglw_direct_v4si_be for BE and
	gen_altivec_vmrghw_direct_v4si_le for LE.

2024-06-20  Roger Sayle  <roger@nextmovesoftware.com>

	* config/i386/i386-expand.cc (ix86_ternlog_idx): Allow any SUBREG
	that matches register_operand.  Use rtx_equal_p to compare REG
	or SUBREG "leaf" operands.

2024-06-20  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md (<bit_optab><mode>): New unified
	pattern for bset/binv using a code iterator.
	(<bit_optab>i<mode>): Likewise.
	(<bit_optab><mode>_mask): Likewise.  Support XOR via any_or.
	(<bit_optab>isidi): Likewise.
	* config/riscv/iterators.md (bit_optab): New iterator.

2024-06-20  Hongyu Wang  <hongyu.wang@intel.com>

	* config/i386/i386-options.cc (ix86_option_override_internal):
	Use TARGET_*_P (opts->x_ix86_isa_flags*) instead of TARGET_*
	for UINTR, LAM and APX_F.

2024-06-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114413
	* tree-vect-slp.cc (release_scalar_stmts_to_slp_tree_map):
	New function, split out from ...
	(vect_analyze_slp): ... here.  Call it.
	(vect_cse_slp_nodes): New function.
	(vect_optimize_slp): Call it.

2024-06-20  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vect-loop.cc (vect_transform_reduction): Change assertion to
	cover all lane-reducing ops.

2024-06-20  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vect-loop.cc (vect_transform_reduction): Replace vec_oprnds0/1/2
	with one new array variable vec_oprnds[3].

2024-06-20  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vect-loop.cc (vectorizable_reduction): Remove v_reduc_type, and
	replace it to another local variable reduction_type.

2024-06-20  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vect-loop.cc (vectorizable_reduction): Remove the duplicated
	check.

2024-06-20  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vectorizer.h (lane_reducing_stmt_p): New function.
	* tree-vect-slp.cc (vect_analyze_slp): Use new function
	lane_reducing_stmt_p to check statement.

2024-06-19  YunQiang Su  <syq@gcc.gnu.org>

	Revert:
	2024-06-19  Collin Funk  <collin.funk1@gmail.com>

	* configure.ac: Add missing quotation of variable
	gcc_cv_as_mips_explicit_relocs.
	* configure: Regenerate.

2024-06-19  demin.han  <demin.han@starfivetech.com>

	* config/riscv/riscv-vector-builtins-bases.cc: Remove eqne cond
	* config/riscv/vector.md (@pred_eqne<mode>_scalar): Remove patterns
	(*pred_eqne<mode>_scalar_merge_tie_mask): Ditto
	(*pred_eqne<mode>_scalar): Ditto
	(*pred_eqne<mode>_scalar_narrow): Ditto

2024-06-19  Patrick O'Neill  <patrick@rivosinc.com>

	* common/config/riscv/riscv-common.cc: Add 'a' extension to
	riscv_combine_info.

2024-06-19  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/115544
	* gimple-lower-bitint.cc (gimple_lower_bitint): Disable optimizing
	loads used by COMPLEX_EXPR operands.

2024-06-19  mayshao  <mayshao-oc@zhaoxin.com>

	* common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Recognize shijidadao.
	* common/config/i386/i386-common.cc: Add shijidadao.
	* common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
	Add ZHAOXIN_FAM7H_SHIJIDADAO.
	* config.gcc: Add shijidadao.
	* config/i386/driver-i386.cc (host_detect_local_cpu):
	Let -march=native recognize shijidadao processors.
	* config/i386/i386-c.cc (ix86_target_macros_internal): Add shijidadao.
	* config/i386/i386-options.cc (m_ZHAOXIN): Add m_SHIJIDADAO.
	(m_SHIJIDADAO): New definition.
	* config/i386/i386.h (enum processor_type): Add PROCESSOR_SHIJIDADAO.
	* config/i386/x86-tune-costs.h (struct processor_costs):
	Add shijidadao_cost.
	* config/i386/x86-tune-sched.cc (ix86_issue_rate): Add shijidadao.
	(ix86_adjust_cost): Ditto.
	* config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Add m_SHIJIDADAO.
	(X86_TUNE_USE_GATHER_4PARTS): Ditto.
	(X86_TUNE_USE_GATHER_8PARTS): Ditto.
	(X86_TUNE_AVOID_128FMA_CHAINS): Ditto.
	* doc/extend.texi: Add details about shijidadao.
	* doc/invoke.texi: Ditto.

2024-06-19  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (print_operand):
	When outputting MEMW before the instruction, check if the previous
	instruction is already that.

2024-06-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
	    Stam Markianos-Wright  <stam.markianos-wright@arm.com>

	* config/arm/arm-protos.h (arm_target_bb_ok_for_lob): Change
	declaration to pass basic_block.
	(arm_attempt_dlstp_transform): New declaration.
	* config/arm/arm.cc (TARGET_LOOP_UNROLL_ADJUST): Define targethook.
	(TARGET_PREDICT_DOLOOP_P): Likewise.
	(arm_target_bb_ok_for_lob): Adapt condition.
	(arm_mve_get_vctp_lanes): New function.
	(arm_dl_usage_type): New internal enum.
	(arm_get_required_vpr_reg): New function.
	(arm_get_required_vpr_reg_param): New function.
	(arm_get_required_vpr_reg_ret_val): New function.
	(arm_mve_get_loop_vctp): New function.
	(arm_mve_insn_predicated_by): New function.
	(arm_mve_across_lane_insn_p): New function.
	(arm_mve_load_store_insn_p): New function.
	(arm_mve_impl_pred_on_outputs_p): New function.
	(arm_mve_impl_pred_on_inputs_p): New function.
	(arm_last_vect_def_insn): New function.
	(arm_mve_impl_predicated_p): New function.
	(arm_mve_check_reg_origin_is_num_elems): New function.
	(arm_mve_dlstp_check_inc_counter): New function.
	(arm_mve_dlstp_check_dec_counter): New function.
	(arm_mve_loop_valid_for_dlstp): New function.
	(arm_predict_doloop_p): New function.
	(arm_loop_unroll_adjust): New function.
	(arm_emit_mve_unpredicated_insn_to_seq): New function.
	(arm_attempt_dlstp_transform): New function.
	* config/arm/arm.opt (mdlstp): New option.
	* config/arm/iterators.md (dlstp_elemsize, letp_num_lanes,
	letp_num_lanes_neg, letp_num_lanes_minus_1): New attributes.
	(DLSTP, LETP): New iterators.
	* config/arm/mve.md (predicated_doloop_end_internal<letp_num_lanes>,
	dlstp<dlstp_elemsize>_insn): New insn patterns.
	* config/arm/thumb2.md (doloop_end): Adapt to support tail-predicated
	loops.
	(doloop_begin): Likewise.
	* config/arm/types.md (mve_misc): New mve type to represent
	predicated_loop_end insn sequences.
	* config/arm/unspecs.md:
	(DLSTP8, DLSTP16, DLSTP32, DSLTP64,
	LETP8, LETP16, LETP32, LETP64): New unspecs for DLSTP and LETP.

2024-06-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>
	    Stam Markianos-Wright  <stam.markianos-wright@arm.com>

	* df-core.cc (df_bb_regno_only_def_find): New helper function.
	* df.h (df_bb_regno_only_def_find): Declare new function.
	* loop-doloop.cc (doloop_condition_get): Add support for detecting
	predicated vectorized hardware loops.
	(doloop_modify): Add support for GTU condition checks.
	(doloop_optimize): Update costing computation to support alterations to
	desc->niter_expr by the backend.

2024-06-19  Collin Funk  <collin.funk1@gmail.com>

	* configure.ac: Add missing quotation of variable
	gcc_cv_as_mips_explicit_relocs.
	* configure: Regenerate.

2024-06-19  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa-protos.h (xtensa_constantsynth):
	Change the second argument from HOST_WIDE_INT to rtx.
	* config/xtensa/xtensa.cc (#include):
	Add "context.h" and "pass_manager.h".
	(machine_function): Add a new hash_map field "litpool_usage".
	(xtensa_constantsynth): Make "src" (the second operand) accept
	RTX literal instead of its value, and treat both bare and pooled
	SI/SFmode literals equally by bit-exact canonicalization into
	CONST_INT RTX internally.  And then, make avoid synthesis if
	such multiple identical canonicalized literals are found in same
	function when optimizing for size.  Finally, for literals where
	synthesis is not possible or has been avoided, re-emit "move"
	RTXes with canonicalized ones to increase the chances of sharing
	literal pool entries.
	* config/xtensa/xtensa.md (split patterns for constant synthesis):
	Change to simply invoke xtensa_constantsynth() as mentioned above,
	and add new patterns for when TARGET_AUTO_LITPOOLS is enabled.

2024-06-18  Edwin Lu  <ewlu@rivosinc.com>
	    Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/riscv-v.cc: Move assert out of conditional block

2024-06-18  Edwin Lu  <ewlu@rivosinc.com>
	    Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/autovec-opt.md: Fix mode mismatch

2024-06-18  Andrew Pinski  <quic_apinski@quicinc.com>

	* config/aarch64/aarch64-cores.def: Add comment
	saying thunderxt81/t83 are aliases of octeontx81/83.

2024-06-18  Andrew Pinski  <quic_apinski@quicinc.com>

	* config/aarch64/aarch64-cores.def (thunderxt88p1): Make an alias of thunderxt88 and
	move below thunderxt88.
	* config/aarch64/aarch64-tune.md: Regenerate.

2024-06-18  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS): Move selftest-diagnostic-path.o,
	selftest-logical-location.o, and tree-diagnostic-path.o to...
	(OBJS-libcommon): ...here, renaming tree-diagnostic-path.o to
	diagnostic-path.o.
	* tree-diagnostic-path.cc: Rename to...
	* diagnostic-path.cc: ...this.  Drop include of "tree.h".
	(tree_diagnostic_path_cc_tests): Rename to...
	(diagnostic_path_cc_tests): ...this.
	* selftest-run-tests.cc (selftest::run_tests): Update for above
	renaming.
	* selftest.h (tree_diagnostic_path_cc_tests): Rename decl to...
	(diagnostic_path_cc_tests): ...this.

2024-06-18  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-json.cc (diagnostic_output_format_init_json):
	Replace clearing of diagnostic_context::m_print_path callback with
	setting the path format to DPF_NONE.
	* diagnostic-format-sarif.cc
	(diagnostic_output_format_init_sarif): Likewise.
	* diagnostic.cc (diagnostic_context::show_any_path): Replace call
	to diagnostic_context::m_print_path callback with a direct call to
	diagnostic_context::print_path.
	* diagnostic.h (diagnostic_context::print_path): New decl.
	(diagnostic_context::m_print_path): Delete callback.
	* tree-diagnostic-path.cc (default_tree_diagnostic_path_printer):
	Convert to...
	(diagnostic_context::print_path): ...this.
	* tree-diagnostic.cc (tree_diagnostics_defaults): Delete
	initialization of m_print_path.
	* tree-diagnostic.h (default_tree_diagnostic_path_printer): Delete
	decl.

2024-06-18  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-macro-unwinding.cc: New file, with material taken
	from tree-diagnostic.cc.
	* diagnostic-macro-unwinding.h: New file, with material taken
	from tree-diagnostic.h.
	* tree-diagnostic-path.cc: Repalce include of "tree-diagnostic.h"
	with "diagnostic-macro-unwinding.h".
	* tree-diagnostic.cc (struct loc_map_pair): Move to
	diagnostic-macro-unwinding.cc.
	(maybe_unwind_expanded_macro_loc): Likewise.
	(virt_loc_aware_diagnostic_finalizer): Likewise.
	* tree-diagnostic.h (virt_loc_aware_diagnostic_finalizer): Move
	decl to diagnostic-macro-unwinding.h.
	(maybe_unwind_expanded_macro_loc): Likewise.

2024-06-18  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS): Add diagnostic-macro-unwinding.o.

2024-06-18  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-json.cc: Include "diagnostic-path.h" and
	"logical-location.h".
	(make_json_for_path): Move tree-diagnostic-path.cc's
	default_tree_make_json_for_path here, renaming it and making it
	static.
	(json_output_format::on_end_diagnostic): Replace call of
	m_context's m_make_json_for_path callback with a direct call to
	make_json_for_path.
	* diagnostic.h (diagnostic_context::m_make_json_for_path): Drop
	field.
	* tree-diagnostic-path.cc: Drop include of "json.h".
	(default_tree_make_json_for_path): Rename to make_json_for_path
	and move to diagnostic-format-json.cc.
	* tree-diagnostic.cc (tree_diagnostics_defaults): Drop
	initialization of m_make_json_for_path.
	* tree-diagnostic.h (default_tree_make_json_for): Delete decl.

2024-06-18  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS): Add selftest-diagnostic-path.o and
	selftest-logical-location.o.
	* logical-location.h: Include "label-text.h".
	(class logical_location): Update leading comment.
	* selftest-diagnostic-path.cc: New file, adapted from
	simple-diagnostic-path.cc and from material in
	tree-diagnostic-path.cc.
	* selftest-diagnostic-path.h: New file, adapted from
	simple-diagnostic-path.h and from material in
	tree-diagnostic-path.cc.
	* selftest-logical-location.cc: New file.
	* selftest-logical-location.h: New file.
	* tree-diagnostic-path.cc: Remove includes of "tree-pretty-print.h",
	"langhooks.h", and "simple-diagnostic-path.h".  Add include of
	"selftest-diagnostic-path.h".
	(class test_diagnostic_path): Delete, in favor of new
	implementation in selftest-diagnostic-path.{h,cc}, which is
	directly derived from diagnostic_path, rather than from
	simple_diagnostic_path.
	(selftest::test_intraprocedural_path): Eliminate tree usage,
	via change to test_diagnostic_path, using strings rather than
	function_decls for identifying functions in the test.
	(selftest::test_interprocedural_path_1): Likewise.
	(selftest::test_interprocedural_path_2): Likewise.
	(selftest::test_recursion): Likewise.
	(selftest::test_control_flow_1): Likewise.
	(selftest::test_control_flow_2): Likewise.
	(selftest::test_control_flow_3): Likewise.
	(selftest::assert_cfg_edge_path_streq): Likewise.
	(selftest::test_control_flow_5): Likewise.
	(selftest::test_control_flow_6): Likewise.

2024-06-18  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic.cc: Include "logical-location.h".
	(diagnostic_path::get_first_event_in_a_function): Fix typo in
	leading comment.  Rewrite to use logical_location rather than
	tree.  Drop test on stack depth.
	(diagnostic_path::interprocedural_p): Rewrite to use
	logical_location rather than tree.
	(logical_location::function_p): New.
	* diagnostic-path.h (diagnostic_event::get_fndecl): Eliminate
	vfunc.
	(diagnostic_path::same_function_p): New pure virtual func.
	* logical-location.h (logical_location::get_name_for_path_output):
	New pure virtual func.
	* simple-diagnostic-path.cc
	(simple_diagnostic_path::same_function_p): New.
	(simple_diagnostic_event::simple_diagnostic_event): Initialize
	m_logical_loc.
	* simple-diagnostic-path.h: Include "tree-logical-location.h".
	(simple_diagnostic_event::get_fndecl): Convert from a vfunc
	implementation to an accessor.
	(simple_diagnostic_event::get_logical_location): Use
	m_logical_loc.
	(simple_diagnostic_event::m_logical_loc): New field.
	(simple_diagnostic_path::same_function_p): New decl.
	* tree-diagnostic-path.cc: Move pragma disabling -Wformat-diag to
	cover the whole file.
	(can_consolidate_events): Add params "path", "ev1_idx", and
	"ev2_idx".  Rewrite to use diagnostic_path::same_function_p rather
	than tree.
	(per_thread_summary::per_thread_summary): Add "path" param
	(per_thread_summary::m_path): New field.
	(event_range::event_range): Update for conversion of m_fndecl to
	m_logical_loc.
	(event_range::maybe_add_event): Rename param "idx" to
	"new_ev_idx".  Update call to can_consolidate_events to pass in
	"m_path", "m_start_idx", and "new_ev_idx".
	(event_range::m_fndecl): Replace with...
	(event_range::m_logical_loc): ...this.
	(path_summary::get_or_create_events_for_thread_id): Pass "path" to
	per_thread_summary ctor.
	(per_thread_summary::interprocedural_p): Rewrite to use
	diagnostic_path::same_function_p rather than tree.
	(print_fndecl): Delete.
	(thread_event_printer::print_swimlane_for_event_range): Update for
	conversion from tree to logical_location.
	(default_tree_diagnostic_path_printer): Likewise.
	(default_tree_make_json_for_path): Likewise.
	* tree-logical-location.cc: Include "intl.h".
	(compiler_logical_location::get_name_for_tree_for_path_output):
	New.
	(tree_logical_location::get_name_for_path_output): New.
	(current_fndecl_logical_location::get_name_for_path_output): New.
	* tree-logical-location.h
	(compiler_logical_location::get_name_for_tree_for_path_output):
	New decl.
	(tree_logical_location::get_name_for_path_output): New decl.
	(current_fndecl_logical_location::get_name_for_path_output): New
	decl.

2024-06-18  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS): Add simple-diagnostic-path.o.
	* diagnostic-path.h (class simple_diagnostic_event): Move to
	simple-diagnostic-path.h.
	(class simple_diagnostic_thread): Likewise.
	(class simple_diagnostic_path): Likewise.
	* diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
	Move to simple-diagnostic-path.cc.
	(simple_diagnostic_path::num_events): Likewise.
	(simple_diagnostic_path::get_event): Likewise.
	(simple_diagnostic_path::num_threads): Likewise.
	(simple_diagnostic_path::get_thread): Likewise.
	(simple_diagnostic_path::add_thread): Likewise.
	(simple_diagnostic_path::add_event): Likewise.
	(simple_diagnostic_path::add_thread_event): Likewise.
	(simple_diagnostic_path::connect_to_next_event): Likewise.
	(simple_diagnostic_event::simple_diagnostic_event): Likewise.
	(simple_diagnostic_event::~simple_diagnostic_event): Likewise.
	* selftest-run-tests.cc (selftest::run_tests): Call
	selftest::simple_diagnostic_path_cc_tests.
	* selftest.h (selftest::simple_diagnostic_path_cc_tests): New
	decl.
	* simple-diagnostic-path.cc: New file, from the above material.
	* simple-diagnostic-path.h: New file, from the above material
	from diagnostic-path.h.
	* tree-diagnostic-path.cc: Include "simple-diagnostic-path.h".

2024-06-18  Pan Li  <pan2.li@intel.com>

	* match.pd: Add form 7 and 8 for the unsigned .SAT_ADD match.

2024-06-18  Pan Li  <pan2.li@intel.com>

	* match.pd: Add form 11 match pattern for .SAT_SUB.

2024-06-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115537
	* tree-vect-loop.cc (vectorizable_reduction): Also reject
	SLP condition reductions of EXTRACT_LAST kind when multiple
	statement copies are involved.

2024-06-18  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md (bset splitters): New patterns for
	generating bset when bit position is limited.

2024-06-18  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.cc (aarch64_addti_scratch_regs): Use
	force_highpart_subreg instead of gen_highpart and simplify_gen_subreg.
	(aarch64_subvti_scratch_regs): Likewise.

2024-06-18  Richard Sandiford  <richard.sandiford@arm.com>

	* explow.h (force_highpart_subreg): Declare.
	* explow.cc (force_highpart_subreg): New function.
	* builtins.cc (expand_builtin_issignaling): Use it.
	* expmed.cc (emit_store_flag_1): Likewise.

2024-06-18  Richard Sandiford  <richard.sandiford@arm.com>

	* builtins.cc (expand_builtin_issignaling): Use force_lowpart_subreg
	instead of simplify_gen_subreg and lowpart_subreg.
	* expr.cc (convert_mode_scalar, expand_expr_real_2): Likewise.
	* optabs.cc (expand_doubleword_mod): Likewise.

2024-06-18  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/115464
	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
	(aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
	simplify_gen_subreg and lowpart_subreg.
	* config/aarch64/aarch64-sve-builtins-base.cc
	(svset_neonq_impl::expand): Likewise.
	* config/aarch64/aarch64-sve-builtins-sme.cc
	(add_load_store_slice_operand): Likewise.
	* config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
	(aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.

2024-06-18  Richard Sandiford  <richard.sandiford@arm.com>

	* explow.h (force_lowpart_subreg): Declare.
	* explow.cc (force_lowpart_subreg): New function.
	* optabs.cc (lowpart_subreg_maybe_copy): Delete.
	(expand_absneg_bit): Use force_lowpart_subreg instead of
	lowpart_subreg_maybe_copy.
	(expand_copysign_bit): Likewise.

2024-06-18  Richard Sandiford  <richard.sandiford@arm.com>

	* expmed.cc (store_bit_field_using_insv): Use force_subreg
	instead of simplify_gen_subreg.
	(store_bit_field_1): Likewise.
	(extract_bit_field_as_subreg): Likewise.
	(extract_integral_bit_field): Likewise.
	(emit_store_flag_1): Likewise.
	* expr.cc (convert_move): Likewise.
	(convert_modes): Likewise.
	(emit_group_load_1): Likewise.
	(emit_group_store): Likewise.
	(expand_assignment): Likewise.

2024-06-18  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
	Use force_subreg instead of simplify_gen_subreg.
	* config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
	* config/aarch64/aarch64-sve-builtins-base.cc
	(svget_impl::expand): Likewise.
	(svget_neonq_impl::expand): Likewise.
	* config/aarch64/aarch64-sve-builtins-functions.h
	(multireg_permute::expand): Likewise.

2024-06-18  Richard Sandiford  <richard.sandiford@arm.com>

	* explow.cc (force_subreg): Emit no instructions on failure.

2024-06-18  Jakub Jelinek  <jakub@redhat.com>

	PR target/115324
	* config/rs6000/rs6000-gen-builtins.cc (write_decls): Change
	declaration of rs6000_init_generated_builtins from no arguments
	to 4 pointer arguments.
	(write_init_bif_table): Change rs6000_builtin_info_fntype to
	builtin_info_fntype and rs6000_builtin_decls to builtin_decls.
	(write_init_ovld_table): Change rs6000_instance_info_fntype to
	instance_info_fntype, rs6000_builtin_decls to builtin_decls and
	rs6000_overload_info to overload_info.
	(write_init_file): Add __noipa__ attribute to
	rs6000_init_generated_builtins for GCC 8.1+ and change the function
	from no arguments to 4 pointer arguments.  Change rs6000_builtin_decls
	to builtin_decls.
	* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Adjust
	rs6000_init_generated_builtins caller.

2024-06-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115493
	* tree-vect-loop.cc (vect_create_epilog_for_reduction): Use
	the first scalar result.

2024-06-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/111793
	* tree-ssa-alias.h (ref_can_have_store_data_races): Declare.
	* tree-ssa-alias.cc (ref_can_have_store_data_races): New
	function.
	* tree-if-conv.cc (ifcvt_memrefs_wont_trap): Use
	ref_can_have_store_data_races to allow more unconditional
	stores.
	* tree-ssa-loop-im.cc (execute_sm): Likewise.
	* tree-ssa-phiopt.cc (cond_store_replacement): Likewise.

2024-06-18  Hu, Lin1  <lin1.hu@intel.com>

	* config/i386/avxintrin.h: Move cmp[p|s][s|d] to [e|x]mmintrin.h,
	and move macros to xmmintrin.h
	* config/i386/emmintrin.h: Add cmp[p|s]s intrins.
	* config/i386/i386-builtin.def: Modify __builtin_ia32_cmp[p|s][s|d].
	* config/i386/i386-expand.cc
	(ix86_expand_args_builtin): Raise error when imm is in range of
	[8, 32] without avx.
	* config/i386/predicates.md (cmpps_imm_operand): New predicate.
	* config/i386/sse.md (avx_cmp<mode>3): Modefy define_insn.
	(avx_vmcmp<mode>3): Ditto.
	* config/i386/xmmintrin.h (_CMP_EQ_OQ): New macro for sse/sse2.
	(_CMP_LT_OS): Ditto
	(_CMP_LE_OS): Ditto
	(_CMP_UNORD_Q): Ditto
	(_CMP_NEQ_UQ): Ditto
	(_CMP_NLT_US): Ditto
	(_CMP_NLE_US): Ditto
	(_CMP_ORD_Q): Ditto
	(_mm_cmp_ps): Move intrin from avxintrin.h to xmmintrin.h
	(_mm_cmp_ss): Ditto.

2024-06-17  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md (bsetclr_zero_extract): New pattern.

2024-06-17  Jakub Jelinek  <jakub@redhat.com>

	PR driver/115440
	* opts-common.cc (add_misspelling_candidates): If opt1 is non-NULL,
	add a space and opt1 to the alternative suggestion text.

2024-06-17  Patrick O'Neill  <patrick@rivosinc.com>

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::to_string): Skip zaamo/zalrsc when not
	supported by the assembler.
	* config.in: Regenerate.
	* configure: Regenerate.
	* configure.ac: Add zaamo/zalrsc assmeber check.

2024-06-17  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/install.texi (Configuration): Mark up __cxa_atexit as @code.

2024-06-17  Peter Bergner  <bergner@linux.ibm.com>

	PR target/115389
	* config/rs6000/rs6000-logue.cc (rs6000_stack_info): Compute
	rop_hash_save_offset for non-Altivec compiles.

2024-06-17  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md (bsetdi_2): New pattern.

2024-06-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115508
	* tree-vect-slp.cc (vect_schedule_slp_node): Guard check on
	representative.

2024-06-17  Richard Biener  <rguenther@suse.de>

	Revert:
	2024-05-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100923
	* tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference): Valueize
	base SSA_NAME.
	(vn_reference_lookup_3): Adjust vn_context_bb around calls
	to ao_ref_init_from_vn_reference.
	(vn_reference_lookup_pieces): Revert original PR100923 fix.
	(vn_reference_lookup): Likewise.

2024-06-17  Aldy Hernandez  <aldyh@redhat.com>

	* data-streamer-in.cc (streamer_read_value_range): Rename
	Value_Range to value_range.
	* data-streamer.h (streamer_read_value_range): Same.
	* gimple-pretty-print.cc (dump_ssaname_info): Same.
	* gimple-range-cache.cc (ssa_block_ranges::dump): Same.
	(ssa_lazy_cache::merge): Same.
	(block_range_cache::dump): Same.
	(ssa_cache::merge_range): Same.
	(ssa_cache::dump): Same.
	(ranger_cache::edge_range): Same.
	(ranger_cache::propagate_cache): Same.
	(ranger_cache::fill_block_cache): Same.
	(ranger_cache::resolve_dom): Same.
	(ranger_cache::range_from_dom): Same.
	(ranger_cache::register_inferred_value): Same.
	* gimple-range-fold.cc (op1_range): Same.
	(op2_range): Same.
	(fold_relations): Same.
	(fold_using_range::range_of_range_op): Same.
	(fold_using_range::range_of_phi): Same.
	(fold_using_range::range_of_call): Same.
	(fold_using_range::condexpr_adjust): Same.
	(fold_using_range::range_of_cond_expr): Same.
	(fur_source::register_outgoing_edges): Same.
	* gimple-range-fold.h (gimple_range_type): Same.
	(gimple_range_ssa_p): Same.
	* gimple-range-gori.cc (gori_compute::compute_operand_range): Same.
	(gori_compute::logical_combine): Same.
	(gori_compute::refine_using_relation): Same.
	(gori_compute::compute_operand1_range): Same.
	(gori_compute::compute_operand2_range): Same.
	(gori_compute::compute_operand1_and_operand2_range): Same.
	(gori_calc_operands): Same.
	(gori_name_helper): Same.
	* gimple-range-infer.cc (gimple_infer_range::check_assume_func): Same.
	(gimple_infer_range::gimple_infer_range): Same.
	(infer_range_manager::maybe_adjust_range): Same.
	(infer_range_manager::add_range): Same.
	* gimple-range-infer.h: Same.
	* gimple-range-op.cc
	(gimple_range_op_handler::gimple_range_op_handler): Same.
	(gimple_range_op_handler::calc_op1): Same.
	(gimple_range_op_handler::calc_op2): Same.
	(gimple_range_op_handler::maybe_builtin_call): Same.
	* gimple-range-path.cc (path_range_query::internal_range_of_expr): Same.
	(path_range_query::ssa_range_in_phi): Same.
	(path_range_query::compute_ranges_in_phis): Same.
	(path_range_query::compute_ranges_in_block): Same.
	(path_range_query::add_to_exit_dependencies): Same.
	* gimple-range-trace.cc (debug_seed_ranger): Same.
	* gimple-range.cc (gimple_ranger::range_of_expr): Same.
	(gimple_ranger::range_on_entry): Same.
	(gimple_ranger::range_on_edge): Same.
	(gimple_ranger::range_of_stmt): Same.
	(gimple_ranger::prefill_stmt_dependencies): Same.
	(gimple_ranger::register_inferred_ranges): Same.
	(gimple_ranger::register_transitive_inferred_ranges): Same.
	(gimple_ranger::export_global_ranges): Same.
	(gimple_ranger::dump_bb): Same.
	(assume_query::calculate_op): Same.
	(assume_query::calculate_phi): Same.
	(assume_query::dump): Same.
	(dom_ranger::range_of_stmt): Same.
	* ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Same.
	(ipa_vr_operation_and_type_effects): Same.
	(ipa_value_range_from_jfunc): Same.
	(propagate_bits_across_jump_function): Same.
	(propagate_vr_across_jump_function): Same.
	(ipcp_store_vr_results): Same.
	* ipa-cp.h: Same.
	* ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
	(evaluate_properties_for_edge): Same.
	* ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
	(ipa_vr::get_vrange): Same.
	(ipa_vr::streamer_read): Same.
	(ipa_vr::streamer_write): Same.
	(ipa_vr::dump): Same.
	(ipa_set_jfunc_vr): Same.
	(ipa_compute_jump_functions_for_edge): Same.
	(ipcp_get_parm_bits): Same.
	(ipcp_update_vr): Same.
	(ipa_record_return_value_range): Same.
	(ipa_return_value_range): Same.
	* ipa-prop.h (ipa_return_value_range): Same.
	(ipa_record_return_value_range): Same.
	* range-op.h (range_cast): Same.
	* tree-ssa-dom.cc
	(dom_opt_dom_walker::set_global_ranges_from_unreachable_edges): Same.
	(cprop_operand): Same.
	* tree-ssa-loop-ch.cc (loop_static_stmt_p): Same.
	* tree-ssa-loop-niter.cc (record_nonwrapping_iv): Same.
	* tree-ssa-loop-split.cc (split_at_bb_p): Same.
	* tree-ssa-phiopt.cc (value_replacement): Same.
	* tree-ssa-strlen.cc (get_range): Same.
	* tree-ssa-threadedge.cc (hybrid_jt_simplifier::simplify): Same.
	(hybrid_jt_simplifier::compute_exit_dependencies): Same.
	* tree-ssanames.cc (set_range_info): Same.
	(duplicate_ssa_name_range_info): Same.
	* tree-vrp.cc (remove_unreachable::handle_early): Same.
	(remove_unreachable::remove_and_update_globals): Same.
	(execute_ranger_vrp): Same.
	* value-query.cc (range_query::value_of_expr): Same.
	(range_query::value_on_edge): Same.
	(range_query::value_of_stmt): Same.
	(range_query::value_on_entry): Same.
	(range_query::value_on_exit): Same.
	(range_query::get_tree_range): Same.
	* value-range-storage.cc (vrange_storage::set_vrange): Same.
	* value-range.cc (Value_Range::dump): Same.
	(value_range::dump): Same.
	(debug): Same.
	* value-range.h (enum value_range_discriminator): Same.
	(class vrange): Same.
	(class Value_Range): Same.
	(class value_range): Same.
	(Value_Range::Value_Range): Same.
	(value_range::value_range): Same.
	(Value_Range::~Value_Range): Same.
	(value_range::~value_range): Same.
	(Value_Range::set_type): Same.
	(value_range::set_type): Same.
	(Value_Range::init): Same.
	(value_range::init): Same.
	(Value_Range::operator=): Same.
	(value_range::operator=): Same.
	(Value_Range::operator==): Same.
	(value_range::operator==): Same.
	(Value_Range::operator!=): Same.
	(value_range::operator!=): Same.
	(Value_Range::supports_type_p): Same.
	(value_range::supports_type_p): Same.
	* vr-values.cc (simplify_using_ranges::fold_cond_with_ops): Same.
	(simplify_using_ranges::legacy_fold_cond): Same.

2024-06-17  Hu, Lin1  <lin1.hu@intel.com>

	PR target/115161
	* config/i386/i386-builtin.def: Change CODE_FOR_* for cvtt*'s builtins.
	* config/i386/sse.md:
	(unspec_avx512fp16_fix<vcvtt_uns_suffix>
	_trunc<mode>2<mask_name><round_saeonly_name>):
	Use UNSPEC instead of FIX/UNSIGNED_FIX.
	(unspec_avx512fp16_fix<vcvtt_uns_suffix>_trunc<mode>2<mask_name>):
	Ditto.
	(unspec_avx512fp16_fix<vcvtt_uns_suffix>_truncv2di2<mask_name>): Ditto.
	(unspec_avx512fp16_fix<vcvtt_uns_suffix>_trunc<mode>2<round_saeonly_name>):
	Ditto.
	(unspec_sse_cvttps2pi): Ditto.
	(unspec_sse_cvttss2si<rex64namesuffix><round_saeonly_name>): Ditto.
	(unspec_fix<vcvtt_uns_suffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
	Ditto.
	(unspec_fix_truncv8sfv8si2<mask_name>): Ditto.
	(unspec_fix_truncv4sfv4si2<mask_name>): Ditto.
	(unspec_sse2_cvttpd2pi): Ditto.
	(unspec_fixuns_truncv2dfv2si2): Ditto.
	(unspec_avx512f_vcvttss2usi<rex64namesuffix><round_saeonly_name>):
	Ditto.
	(unspec_avx512f_vcvttsd2usi<rex64namesuffix><round_saeonly_name>):
	Ditto.
	(unspec_sse2_cvttsd2si<rex64namesuffix><round_saeonly_name>): Ditto.
	(unspec_fix<vcvtt_uns_suffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
	Ditto.
	(*unspec_fixuns_truncv2dfv2si2): Ditto.
	(unspec_fixuns_truncv2dfv2si2_mask): Ditto.
	(unspec_fix_truncv4dfv4si2<mask_name>): Ditto.
	(unspec_fixuns_truncv4dfv4si2<mask_name>): Ditto.
	(unspec_fix<vcvtt_uns_suffix>
	_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
	Ditto.
	(unspec_fix<vcvtt_uns_suffix>
	_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
	Ditto.
	(unspec_avx512dq_fix<vcvtt_uns_suffix>_truncv2sfv2di2<mask_name>):
	Ditto.
	(<mask_codefor>unspec_fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
	Ditto.
	(unspec_sse2_cvttpd2dq<mask_name>): Ditto.

2024-06-17  Levy Hsu  <admin@levyhsu.com>

	* config/i386/i386-expand.cc
	(ix86_vectorize_vec_perm_const): Convert BF to HI using subreg.
	* config/i386/predicates.md
	(vcvtne2ps2bf_parallel): New define_insn_and_split.
	* config/i386/sse.md
	(vpermt2_sepcial_bf16_shuffle_<mode>): New predicates matches odd increasing perm.

2024-06-17  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* config/s390/vector.md (*vmrhf_half<mode>): New.
	(extendv2sfv2df2): New.

2024-06-17  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	PR target/115261
	* config/s390/s390.md (any_extend,extend_insn,zero_extend):
	New code attributes and code iterator.
	* config/s390/vector.md (V_EXTEND): New mode iterator.
	(<extend_insn><V_EXTEND:mode><vec_2x_wide>2): New insn.

2024-06-16  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/100211
	* config/aarch64/aarch64.h (machine_function): Fix the size
	of reg_is_wrapped_separately.

2024-06-16  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md ((1 << N) | C): New splitter for IOR/XOR
	of a single bit an a DImode object.

2024-06-16  Jeff Law  <jlaw@ventanamicro.com>

	* config/sh/sh.md (neg_zero_extract_4b): New pattern.

2024-06-16  Peter Damianov  <peter0x44@disroot.org>

	* pretty-print.cc (mingw_ansi_fputs): Don't translate escape sequences if
	the console has ENABLE_VIRTUAL_TERMINAL_PROCESSING.

2024-06-16  Peter Damianov  <peter0x44@disroot.org>

	* diagnostic-color.cc (auto_enable_urls): Don't hardcode to return
	false on mingw hosts.
	(auto_enable_urls): Return true if console
	supports ansi escape sequences.

2024-06-16  Peter Damianov  <peter0x44@disroot.org>

	* diagnostic-color.cc (should_colorize): Enable processing of VT100
	escape sequences on windows consoles

2024-06-15  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
	Fix allocation size of buffer.
	(riscv_process_one_target_attr): Likewise.
	(riscv_process_target_attr): Likewise.

2024-06-15  Gerald Pfeifer  <gerald@pfeifer.com>

	PR target/69374
	* doc/install.texi (Specific): Remove pointer to old versions
	of binutils.

2024-06-14  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-gori.cc (gori_calc_operands): Do not continue nor
	add the range when VARYING is produced for an operand.

2024-06-14  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ssa_lazy_cache::merge): New.
	* gimple-range-cache.h (ssa_lazy_cache::merge): New prototype.

2024-06-14  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-fold.cc (fold_using_range::range_of_call): Ensure
	LHS is an SSA_NAME before invoking gimple_range_global.

2024-06-14  Pan Li  <pan2.li@intel.com>

	* match.pd: Add more match for unsigned sat_sub.
	* tree-ssa-math-opts.cc (match_unsigned_saturation_sub): Add new
	func impl to match phi node for .SAT_SUB.
	(math_opts_dom_walker::after_dom_children): Try match .SAT_SUB
	for the phi node, MULT_EXPR, BIT_XOR_EXPR and BIT_AND_EXPR.

2024-06-14  Jan Beulich  <jbeulich@suse.com>

	* configure.ac: Drop ${objdir}/ from NM and AR. Move setting of
	ld_ver out of conditional.
	* configure: Re-generate.

2024-06-14  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vectorizable_reduction): Allow
	single-def-use cycles with SLP.
	(vect_transform_reduction): Handle SLP single def-use cycles.
	(vect_transform_cycle_phi): Likewise.

2024-06-14  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/invoke.texi (x86 Options): Consolidate duplicate MOVBE
	listings for haswell, broadwell, skylake, skylake-avx512,
	cannonlake, icelake-client, icelake-server, cascadelake,
	cooperlake, tigerlake, sapphirerapids, rocketlake, graniterapids,
	and graniterapids-d options to -march.

2024-06-14  Pan Li  <pan2.li@intel.com>

	PR target/115456
	* config/riscv/vector-iterators.md: Leverage V_ZVFH instead of V
	which contains the VF_ZVFHMIN for alignment.

2024-06-14  Gerald Pfeifer  <gerald@pfeifer.com>

	PR target/69374
	* doc/install.texi (Specific): Remove stale reference to Interix.

2024-06-14  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (get_group_load_store_type): Do not
	re-use poly-int remain but re-compute with non-poly values.
	Verify the shortened load is good enough to be covered with
	a single scalar gap iteration before accepting it.

2024-06-14  liuhongt  <hongtao.liu@intel.com>

	* config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
	pternlog_operand under AVX512, also adjust VEC_DUPLICATE
	according since vec_dup:mem can't be that cheap.

2024-06-14  liuhongt  <hongtao.liu@intel.com>

	* config/i386/x86-tune.def (X86_TUNE_ONE_IF_CONV_INSN): Remove
	latest Intel processors.
	Co-authored by: Lingling Kong <lingling.kong@intel.com>

2024-06-14  Roger Sayle  <roger@nextmovesoftware.com>

	* config/i386/i386-expand.cc (ix86_expand_ternlog): Try performing
	logic operation in a different vector mode if that enables use of
	a 32-bit or 64-bit broadcast addressing mode.

2024-06-14  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/113212
	* expr.h (const_seqpops): New typedef.
	(expand_expr_real_2): Constify the first argument.
	* optabs.cc (expand_widen_pattern_expr): Likewise.
	* optabs.h (expand_widen_pattern_expr): Likewise.
	* expr.cc (expand_expr_real_2):  Likewise
	(do_store_flag): Likewise. Remove incorrect store to ops->code.

2024-06-13  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/sync-rvwmo.md: Add support for subword fenced
	loads/stores.
	* config/riscv/sync-ztso.md: Ditto.
	* config/riscv/sync.md: Ditto.

2024-06-13  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/extend.texi (AArch64 Function Attributes): Add
	(AVR Variable Attributes): Ditto.
	(Common Type Attributes): Ditto.

2024-06-13  Hongyu Wang  <hongyu.wang@intel.com>

	PR target/115370
	PR target/115463
	* target.def (have_ccmp): New target hook.
	* targhooks.cc (default_have_ccmp): New function.
	* targhooks.h (default_have_ccmp): New prototype.
	* doc/tm.texi.in: Add TARGET_HAVE_CCMP.
	* doc/tm.texi: Regenerate.
	* cfgexpand.cc (expand_gimple_cond): Call targetm.have_ccmp
	instead of checking if targetm.gen_ccmp_first exists.
	* expr.cc (expand_expr_real_gassign): Likewise.
	* config/i386/i386.cc (ix86_have_ccmp): New target hook to
	check if APX_CCMP enabled.
	(TARGET_HAVE_CCMP): Define.

2024-06-13  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/115464
	* simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
	to fold two subregs together if their relationship isn't known
	at compile time.
	* explow.h (force_subreg): Declare.
	* explow.cc (force_subreg): New function.
	* config/aarch64/aarch64-sve-builtins-base.cc
	(svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.

2024-06-13  Pan Li  <pan2.li@intel.com>

	PR target/115456
	* config/riscv/autovec.md: Take ZVFH mode iterator instead of
	the ZVFHMIN for the alignment.
	* config/riscv/vector-iterators.md: Add 2 new iterator
	V_VLS_ZVFH and VLS_ZVFH.

2024-06-13  Hongyu Wang  <hongyu.wang@intel.com>

	* config/i386/i386.md (@ccmp<mode>): Add new alternative
	<r>,C and adjust output templates. Also adjust UNSPEC mode
	to CCmode.

2024-06-13  Gerald Pfeifer  <gerald@pfeifer.com>

	PR other/69374
	* doc/install.texi (Prerequisites): Simplify note on the C++
	compiler required. Drop requirements for versions of GCC prior
	to 3.4. Fix grammar.

2024-06-13  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (get_group_load_store_type): Consistently
	use VMAT_STRIDED_SLP for strided SLP accesses and not
	VMAT_ELEMENTWISE.
	(vectorizable_store): Adjust VMAT_STRIDED_SLP handling to
	allow not only half-size but also smaller accesses.
	(vectorizable_load): Likewise.

2024-06-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115385
	* tree-vect-stmts.cc (get_group_load_store_type): Peeling
	of a single scalar iteration is sufficient if we can narrow
	the access to the next power of two of the bits in the last
	access.
	(vectorizable_load): Ensure that the last access is narrowed.

2024-06-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114107
	PR tree-optimization/110445
	* tree-vect-stmts.cc (get_group_load_store_type): Refactor
	contiguous access case.  Make sure peeling for gap constraints
	are always tested and consistently relax when we know we can
	avoid touching excess elements during code generation.  But
	rewrite the check poly-int aware.

2024-06-13  Andi Kleen  <ak@linux.intel.com>

	* doc/extend.texi: Use std::string_view in asm constexpr
	example.

2024-06-13  liuhongt  <hongtao.liu@intel.com>

	PR target/115452
	* config/i386/i386-features.cc (scalar_chain::convert_op): Use
	reg_or_subregno instead of REGNO to avoid ICE.

2024-06-13  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips-cpus.def: Use PROCESSOR_24KF1_1 for mips32;
	Use PROCESSOR_5KF for mips64/mips64r2/mips64r3/mips64r5.

2024-06-13  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips-modes.def: New CC_MODE CCE.
	* config/mips/mips-protos.h(mips_output_compare): New function.
	* config/mips/mips.cc(mips_allocate_fcc): Set CCEmode count=1.
	(mips_emit_compare): Use CCEmode for LTGT/LT/LE for pre-R6.
	(mips_output_compare): New function. Convert lt/le to slt/sle
	for R6; convert ueq to ngl for CCEmode.
	(mips_hard_regno_mode_ok_uncached): Mention CCEmode.
	* config/mips/mips.h: Mention CCEmode for LOAD_EXTEND_OP.
	* config/mips/mips.md(FPCC): Add CCE.
	(define_mode_iterator MOVECC): Mention CCE.
	(define_mode_attr reg): Add CCE with "z".
	(define_mode_attr fpcmp): Add CCE with "c".
	(define_code_attr fcond): ltgt should use sne instead of ne.
	(s<code>_<SCALARF:mode>_using_<FPCC:mode>): call mips_output_compare.

2024-06-13  Lingling Kong  <lingling.kong@intel.com>

	* config/i386/i386-opts.h (enum apx_features): Add apx_zu.
	* config/i386/i386.h (TARGET_APX_ZU): Define.
	* config/i386/i386.md (*imulhi<mode>zu): New define_insn.
	(*setcc_<mode>_zu): Ditto.
	* config/i386/i386.opt: Add enum value for zu.

2024-06-12  David Malcolm  <dmalcolm@redhat.com>

	PR bootstrap/115465
	* config/aarch64/aarch64-early-ra.cc (early_ra::process_block):
	Update for fields of pretty_printer becoming private in
	r15-1209-gc5e3be456888aa.

2024-06-12  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/115176
	* config/aarch64/aarch64-simd.md (aarch64_rbit<mode><vczle><vczbe>): Use
	bitreverse instead of unspec.
	* config/aarch64/aarch64-sve-builtins-base.cc (svrbit): Convert over to using
	rtx_code_function instead of unspec_based_function.
	* config/aarch64/aarch64-sve.md: Update comment where RBIT is included.
	* config/aarch64/aarch64.cc (aarch64_rtx_costs): Handle BITREVERSE like BSWAP.
	Remove UNSPEC_RBIT support.
	* config/aarch64/aarch64.md (unspec): Remove UNSPEC_RBIT.
	(aarch64_rbit<mode>): Use bitreverse instead of unspec.
	* config/aarch64/iterators.md (SVE_INT_UNARY): Add bitreverse.
	(optab): Likewise.
	(sve_int_op): Likewise.
	(SVE_INT_UNARY): Remove UNSPEC_RBIT.
	(optab): Likewise.
	(sve_int_op): Likewise.
	(min_elem_bits): Likewise.

2024-06-12  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/115449
	* gimple-match-head.cc (gimple_maybe_truncate): New declaration.
	(gimple_bitwise_equal_p): Match truncations that differ only
	in types with the same precision.
	(gimple_bitwise_inverted_equal_p): For matching after bit_not_with_nop
	call gimple_bitwise_equal_p.
	* match.pd (maybe_truncate): New match pattern.

2024-06-12  Victor Do Nascimento  <victor.donascimento@arm.com>

	PR tree-optimization/114061
	* tree-data-ref.cc (get_references_in_stmt): set
	`clobbers_memory' to false for __builtin_prefetch.
	* tree-vect-loop.cc (vect_transform_loop): Drop all
	__builtin_prefetch calls from loops.

2024-06-12  David Malcolm  <dmalcolm@redhat.com>

	* dumpfile.cc (dump_pretty_printer::emit_items): Update for
	changes to chunk_info.
	* pretty-print.cc (chunk_info::append_formatted_chunk): New, based
	on code in cp/error.cc's append_formatted_chunk.
	(chunk_info::pop_from_output_buffer): New, based on code in
	pp_output_formatted_text and dump_pretty_printer::emit_items.
	(on_begin_quote): Convert to...
	(chunk_info::on_begin_quote): ...this.
	(on_end_quote): Convert to...
	(chunk_info::on_end_quote): ...this.
	(pretty_printer::format): Update for chunk_info becoming a class
	and its fields gaining "m_" prefixes.  Update for on_begin_quote
	and on_end_quote moving to chunk_info.
	(quoting_info::handle_phase_3): Update for changes to chunk_info.
	(pp_output_formatted_text): Likewise.  Move cleanup code to
	chunk_info::pop_from_output_buffer.
	* pretty-print.h (class output_buffer): New forward decl.
	(class urlifier): New forward decl.
	(struct chunk_info): Convert to...
	(class chunk_info): ...this.  Add friend class pretty_printer.
	(chunk_info::get_args): New accessor.
	(chunk_info::get_quoting_info): New accessor.
	(chunk_info::append_formatted_chunk): New decl.
	(chunk_info::pop_from_output_buffer): New decl.
	(chunk_info::on_begin_quote): New decl.
	(chunk_info::on_end_quote): New decl.
	(chunk_info::prev): Rename to...
	(chunk_info::m_prev): ...this.
	(chunk_info::args): Rename to...
	(chunk_info::m_args): ...this.
	(output_buffer::cur_chunk_array): Drop "struct" from decl.

2024-06-12  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic.cc (diagnostic_context::urls_init): Update for fields
	of pretty_printer becoming private.
	(diagnostic_context::print_any_cwe): Likewise.
	(diagnostic_context::print_any_rules): Likewise.
	(diagnostic_context::print_option_information): Likewise.
	* diagnostic.h (diagnostic_format_decoder): Likewise.
	(diagnostic_prefixing_rule): Likewise, fixing typo.
	* digraph.cc (test_dump_to_dot): Likewise.
	* digraph.h (digraph<GraphTraits>::dump_dot_to_file): Likewise.
	* dumpfile.cc
	(dump_pretty_printer::emit_any_pending_textual_chunks): Likewise.
	* gimple-pretty-print.cc (print_gimple_stmt): Likewise.
	(print_gimple_expr): Likewise.
	(print_gimple_seq): Likewise.
	(dump_ssaname_info_to_file): Likewise.
	(gimple_dump_bb): Likewise.
	* graph.cc (print_graph_cfg): Likewise.
	(start_graph_dump): Likewise.
	* langhooks.cc (lhd_print_error_function): Likewise.
	* lto-wrapper.cc (print_lto_docs_link): Likewise.
	* pretty-print.cc (pp_set_real_maximum_length): Convert to...
	(pretty_printer::set_real_maximum_length): ...this.
	(pp_clear_state): Convert to...
	(pretty_printer::clear_state): ...this.
	(pp_wrap_text): Update for pp_remaining_character_count_for_line
	becoming a member function.
	(urlify_quoted_string): Update for fields of pretty_printer becoming
	private.
	(pp_format): Convert to...
	(pretty_printer::format): ...this.  Reduce the scope of local
	variables "old_line_length" and "old_wrapping_mode" and make
	const.  Reduce the scope of locals "args", "new_chunk_array",
	"curarg", "any_unnumbered", and "any_numbered".
	(pp_output_formatted_text): Update for fields of pretty_printer
	becoming private.
	(pp_flush): Likewise.
	(pp_really_flush): Likewise.
	(pp_set_line_maximum_length): Likewise.
	(pp_set_prefix): Convert to...
	(pretty_printer::set_prefix): ...this.
	(pp_take_prefix): Update for fields of pretty_printer gaining
	"m_" prefixes.
	(pp_destroy_prefix): Likewise.
	(pp_emit_prefix): Convert to...
	(pretty_printer::emit_prefix): ...this.
	(pretty_printer::pretty_printer): Update both ctors for fields
	gaining "m_"  prefixes.
	(pretty_printer::~pretty_printer): Likewise for dtor.
	(pp_append_text): Update for pp_emit_prefix becoming
	pretty_printer::emit_prefix.
	(pp_remaining_character_count_for_line): Convert to...
	(pretty_printer::remaining_character_count_for_line): ...this.
	(pp_character): Update for above change.
	(pp_maybe_space): Convert to...
	(pretty_printer::maybe_space): ...this.
	(pp_begin_url): Convert to...
	(pretty_printer::begin_url): ...this.
	(get_end_url_string): Update for fields of pretty_printer
	becoming private.
	(pp_end_url): Convert to...
	(pretty_printer::end_url): ...this.
	(selftest::test_pretty_printer::test_pretty_printer): Update for
	fields of pretty_printer becoming private.
	(selftest::test_urls): Likewise.
	(selftest::test_null_urls): Likewise.
	(selftest::test_urlification): Likewise.
	* pretty-print.h (pp_line_cutoff): Convert from macro to inline
	function.
	(pp_prefixing_rule): Likewise.
	(pp_wrapping_mode): Likewise.
	(pp_format_decoder): Likewise.
	(pp_needs_newline): Likewise.
	(pp_indentation): Likewise.
	(pp_translate_identifiers): Likewise.
	(pp_show_color): Likewise.
	(pp_buffer): Likewise.
	(pp_get_prefix): Add forward decl to allow friend decl.
	(pp_take_prefix): Likewise.
	(pp_destroy_prefix): Likewise.
	(class pretty_printer): Fix typo in leading comment.  Add
	"friend" decls for the various new accessor functions that were
	formerly macros and for pp_get_prefix, pp_take_prefix, and
	pp_destroy_prefix.  Make all fields private.
	(pretty_printer::set_output_stream): New.
	(pretty_printer::set_prefix): New decl.
	(pretty_printer::emit_prefix): New decl.
	(pretty_printer::format): New decl.
	(pretty_printer::maybe_space): New decl.
	(pretty_printer::supports_urls_p): New.
	(pretty_printer::get_url_format): New.
	(pretty_printer::set_url_format): New.
	(pretty_printer::begin_url): New decl.
	(pretty_printer::end_url): New decl.
	(pretty_printer::set_verbatim_wrapping): New.
	(pretty_printer::set_padding): New.
	(pretty_printer::get_padding): New.
	(pretty_printer::clear_state): New decl.
	(pretty_printer::set_real_maximum_length): New decl.
	(pretty_printer::remaining_character_count_for_line): New decl.
	(pretty_printer::buffer): Rename to...
	(pretty_printer::m_buffer): ...this.
	(pretty_printer::prefix): Rename to...
	(pretty_printer::m_prefix): ...this;
	(pretty_printer::padding): Rename to...
	(pretty_printer::m_padding): ...this;
	(pretty_printer::maximum_length): Rename to...
	(pretty_printer::m_maximum_length): ...this;
	(pretty_printer::indent_skip): Rename to...
	(pretty_printer::m_indent_skip): ...this;
	(pretty_printer::wrapping): Rename to...
	(pretty_printer::m_wrapping): ...this;
	(pretty_printer::format_decoder): Rename to...
	(pretty_printer::m_format_decoder): ...this;
	(pretty_printer::emitted_prefix): Rename to...
	(pretty_printer::m_emitted_prefix): ...this;
	(pretty_printer::need_newline): Rename to...
	(pretty_printer::m_need_newline): ...this;
	(pretty_printer::translate_identifiers): Rename to...
	(pretty_printer::m_translate_identifiers): ...this;
	(pretty_printer::show_color): Rename to...
	(pretty_printer::m_show_color): ...this;
	(pretty_printer::url_format): Rename to...
	(pretty_printer::m_url_format): ...this;
	(pp_get_prefix): Reformat.
	(pp_format_postprocessor): New inline function.
	(pp_take_prefix): Move decl to before class pretty_printer.
	(pp_destroy_prefix): Likewise.
	(pp_set_prefix): Convert to inline function.
	(pp_emit_prefix): Convert to inline function.
	(pp_format): Convert to inline function.
	(pp_maybe_space): Convert to inline function.
	(pp_begin_url): Convert to inline function.
	(pp_end_url): Convert to inline function.
	(pp_set_verbatim_wrapping): Convert from macro to inline
	function, renaming...
	(pp_set_verbatim_wrapping_): ...this.
	* print-rtl.cc (dump_value_slim): Update for fields of
	pretty_printer becoming private.
	(dump_insn_slim): Likewise.
	(dump_rtl_slim): Likewise.
	* print-tree.cc (print_node): Likewise.
	* sched-rgn.cc (dump_rgn_dependencies_dot): Likewise.
	* text-art/canvas.cc (canvas::print_to_pp): Likewise.
	(canvas::debug): Likewise.
	(selftest::test_canvas_urls): Likewise.
	* text-art/dump.h (dump_to_file): Likewise.
	* text-art/selftests.cc (selftest::assert_canvas_streq): Likewise.
	* text-art/style.cc (style::print_changes): Likewise.
	* text-art/styled-string.cc (styled_string::from_fmt_va):
	Likewise.
	* tree-diagnostic-path.cc (control_flow_tests): Update for
	pp_show_color becoming an inline function.
	* tree-loop-distribution.cc (dot_rdg_1): Update for fields of
	pretty_printer becoming private.
	* tree-pretty-print.cc (maybe_init_pretty_print): Likewise.
	* value-range.cc (vrange::dump): Likewise.
	(irange_bitmask::dump): Likewise.

2024-06-12  David Malcolm  <dmalcolm@redhat.com>

	* gimple-pretty-print.cc: Rename pretty_printer "buffer" to "pp"
	throughout.
	* print-tree.cc (print_node): Likewise.
	* tree-loop-distribution.cc (dot_rdg_1): Likewise.
	* tree-pretty-print.h (dump_location): Likewise.
	* value-range.cc (vrange::dump): Likewise.
	(irange_bitmask::dump): Likewise.

2024-06-12  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/predicates.md (high_bitmask_operand): New
	predicate.
	* config/loongarch/constraints.md (Yy): New constriant.
	* config/loongarch/loongarch.md (and<mode>3_align): New
	define_insn_and_split.

2024-06-12  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.cc
	(loongarch_expand_conditional_move): Compare mode size with
	UNITS_PER_WORD instead of word_mode.

2024-06-12  Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
	    Yvan ROUX  <yvan.roux@foss.st.com>

	PR target/115253
	* config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear):
	Sign extend for Thumb1.
	(thumb1_expand_prologue): Add zero/sign extend.

2024-06-12  Gerald Pfeifer  <gerald@pfeifer.com>

	PR target/69374
	* doc/install.texi (Specific) <*-*-cygwin>: Update web link.

2024-06-12  Pan Li  <pan2.li@intel.com>

	* tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children):
	Leverage gsi_after_labels instead of gsi_start_bb to skip the
	leading labels of bb.

2024-06-12  Gerald Pfeifer  <gerald@pfeifer.com>

	PR target/69374
	* doc/install.texi (Specific) <*-*-linux-gnu>: Do not list
	glibc 2.1 and binutils 2.12 as minimum dependencies.

2024-06-12  Alexandre Oliva  <oliva@adacore.com>

	PR tree-optimization/113681
	* tree-profile.cc (pass_ipa_tree_profile::gate): Skip if
	seen_errors.

2024-06-12  liuhongt  <hongtao.liu@intel.com>

	PR target/115384
	* simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
	Only do the simplification of (AND (ASHIFTRT A imm) mask)
	to (LSHIFTRT A imm) when the component of const_vector is
	CONST_INT_P.

2024-06-11  Joseph Myers  <josmyers@redhat.com>

	* doc/cpp.texi (__STDC_VERSION__): Document C2Y handling.
	* doc/invoke.texi (-Wc23-c2y-compat, -std=c2y, -std=gnu2y):
	Document options.
	(-std=gnu23): Update documentation.
	* doc/standards.texi (C Language): Document C2Y.  Update C23
	description.
	* config/rl78/rl78.cc (rl78_option_override): Handle "GNU C2Y"
	language name.
	* dwarf2out.cc (highest_c_language, gen_compile_unit_die):
	Likewise.

2024-06-11  Gerald Pfeifer  <gerald@pfeifer.com>

	PR target/69374
	* doc/install.texi (Specific) <x86_64-*-solaris2*>: Remove
	redundant introduction of x86-64.

2024-06-11  Robin Dapp  <rdapp@ventanamicro.com>

	PR tree-optimization/115382
	* tree-vect-loop.cc (vectorize_fold_left_reduction): Use
	prepare_vec_mask.
	* tree-vect-stmts.cc (check_load_store_for_partial_vectors):
	Remove static of prepare_vec_mask.
	* tree-vectorizer.h (prepare_vec_mask): Export.

2024-06-11  Patrick O'Neill  <patrick@rivosinc.com>

	* config/riscv/sync.md (atomic_<atomic_optab><mode>): New expand pattern.
	(amo_atomic_<atomic_optab><mode>): Rename amo pattern.
	(atomic_fetch_<atomic_optab><mode>): New lrsc sequence pattern.
	(lrsc_atomic_<atomic_optab><mode>): New expand pattern.
	(amo_atomic_fetch_<atomic_optab><mode>): Rename amo pattern.
	(lrsc_atomic_fetch_<atomic_optab><mode>): New lrsc sequence pattern.
	(atomic_exchange<mode>): New expand pattern.
	(amo_atomic_exchange<mode>): Rename amo pattern.
	(lrsc_atomic_exchange<mode>): New lrsc sequence pattern.

2024-06-11  Patrick O'Neill  <patrick@rivosinc.com>

	* doc/sourcebuild.texi: Add docs for atomic extension testsuite infra.

2024-06-11  Edwin Lu  <ewlu@rivosinc.com>
	    Patrick O'Neill  <patrick@rivosinc.com>

	* common/config/riscv/riscv-common.cc: Add Zaamo and Zalrsc.
	* config/riscv/arch-canonicalize: Make A imply Zaamo and Zalrsc.
	* config/riscv/riscv.opt: Add Zaamo and Zalrsc
	* config/riscv/sync.md: Convert TARGET_ATOMIC to TARGET_ZAAMO and
	TARGET_ZALRSC.

2024-06-11  Uros Bizjak  <ubizjak@gmail.com>

	PR target/112600
	* config/i386/i386.md (usadd<mode>3): Emit insn sequence
	involving conditional move for TARGET_CMOVE targets.
	(ussub<mode>3): Ditto.

2024-06-11  Pengxuan Zheng  <quic_pzheng@quicinc.com>

	* config/aarch64/aarch64-builtins.cc (VAR1): Remap float_truncate_lo_
	builtin codes to standard optab ones.
	* config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_<mode><vczle><vczbe>):
	Rename to...
	(trunc<Vwide><mode>2<vczle><vczbe>): ... This.

2024-06-11  Andi Kleen  <ak@linux.intel.com>

	* doc/extend.texi: Document constexpr asm.

2024-06-11  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-fold.cc (range_of_ssa_name_with_loop_info): Issue a
	message if SCEV is not invoked due to a mismatch.

2024-06-11  Roger Sayle  <roger@nextmovesoftware.com>

	PR target/115397
	* config/i386/i386-expand.cc (ix86_expand_ternlog): Move call to
	ix86_broadcast_from_constant before call to validize_mem, but after
	call to force_const_mem.

2024-06-11  Pan Li  <pan2.li@intel.com>

	* config/riscv/autovec.md (ussub<mode>3): Add new pattern impl
	for the unsigned vector modes.
	* config/riscv/riscv-protos.h (expand_vec_ussub): Add new func
	decl to expand .SAT_SUB for vector mode.
	* config/riscv/riscv-v.cc (emit_vec_saddu): Add new func impl
	to expand .SAT_SUB for vector mode.
	(emit_vec_binary_alu): Add new helper func to emit binary alu.
	(expand_vec_ussub): Leverage above helper func.

2024-06-10  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/gm2.texi (Documentation): Fix typos, grammar, and a link.

2024-06-10  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-array-bounds.cc (array_bounds_checker::array_bounds_checker):
	Always use current range_query.
	(pass_data_array_bounds): New.
	(pass_array_bounds): New.
	(make_pass_array_bounds): New.
	* gimple-array-bounds.h  (array_bounds_checker): Adjust prototype.
	* passes.def (pass_array_bounds): New.  Add after VRP1.
	* timevar.def (TV_TREE_ARRAY_BOUNDS): New timevar.
	* tree-pass.h (make_pass_array_bounds): Add prototype.
	* tree-vrp.cc (execute_ranger_vrp): Remove warning param and do
	not invoke array bounds warning pass.
	(pass_vrp::pass_vrp): Adjust params.
	(pass_vrp::close): Adjust parameters.
	(pass_vrp::warn_array_bounds_p): Remove.
	(make_pass_vrp): Remove warning param.
	(make_pass_early_vrp): Remove warning param.
	(make_pass_fast_vrp): Remove warning param.

2024-06-10  Raphael Zinsly  <rzinsly@ventanamicro.com>

	* config/riscv/bitmanip.md (*bextdisi): New pattern.

2024-06-10  Pan Li  <pan2.li@intel.com>

	PR target/115387
	* tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children): Take
	the gsi of start_bb instead of last_bb.

2024-06-10  Raphael Zinsly  <rzinsly@ventanamicro.com>

	* config/riscv/bitmanip.md (*bextdisi): New pattern.

2024-06-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115388
	* tree-ssa-dse.cc (dse_classify_store): Handle irreducible
	regions.
	(pass_dse::execute): Make sure to mark backedges.

2024-06-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115395
	* tree-vect-loop.cc (vect_create_epilog_for_reduction):
	Handle STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT also for SLP
	reductions of group_size one.

2024-06-10  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/s390.cc (expand_perm_as_replicate): Handle memory
	operands.
	* config/s390/vx-builtins.md (vec_splats<mode>): Turn into parameterized expander.
	(@vec_splats<mode>): New expander.

2024-06-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115383
	* tree-vect-stmts.cc (vectorizable_condition): Handle
	generating a chain of .FOLD_EXTRACT_LAST.

2024-06-09  Andreas Tobler  <andreast@gcc.gnu.org>

	* config/freebsd-spec.h: Change fbsd-lib-spec for FreeBSD > 13,
	do not link against profiled system libraries if -pg is invoked.
	Add a define to note about this change.
	* config/aarch64/aarch64-freebsd.h: Use the note to inform if
	-pg is invoked on FreeBSD > 13.
	* config/arm/freebsd.h: Likewise.
	* config/i386/freebsd.h: Likewise.
	* config/i386/freebsd64.h: Likewise.
	* config/riscv/freebsd.h: Likewise.
	* config/rs6000/freebsd64.h: Likewise.
	* config/rs6000/sysv4.h: Likeise.

2024-06-09  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_move_integer): Initialize "x".

2024-06-09  Uros Bizjak  <ubizjak@gmail.com>

	PR target/112600
	* config/i386/i386.md (ussub<mode>3): New expander.
	(sub<mode>_3): Ditto.

2024-06-09  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/install.texi (avr): Remove link to www.amelek.gda.pl/avr/.

2024-06-09  Roger Sayle  <roger@nextmovesoftware.com>

	* expmed.cc (expand_shift_1): Use add_optab instead of ior_optab
	to generate PLUS instead or IOR when unioning disjoint bitfields.
	* optabs.cc (expand_subword_shift): Likewise.
	(expand_binop): Likewise for double-word rotate.

2024-06-08  Peter Bergner  <bergner@linux.ibm.com>

	* config/rs6000/rs6000-logue.cc (rs6000_stack_info): Update comment.

2024-06-08  Uros Bizjak  <ubizjak@gmail.com>

	PR target/112600
	* config/i386/i386.md (usadd<mode>3): New expander.
	(x86_mov<mode>cc_0_m1_neg): Use SWI mode iterator.

2024-06-08  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-protos.h (riscv_expand_ussub): Add new func
	decl for ussub expanding.
	* config/riscv/riscv.cc (riscv_expand_ussub): Ditto but for impl.
	* config/riscv/riscv.md (ussub<mode>3): Add new pattern ussub
	for scalar modes.

2024-06-07  David Malcolm  <dmalcolm@redhat.com>

	* doc/invoke.texi: Add -Wanalyzer-undefined-behavior-ptrdiff.

2024-06-07  Jason Merrill  <jason@redhat.com>

	* doc/invoke.texi (C++ Modules): Mention -include.

2024-06-07  Roger Sayle  <roger@nextmovesoftware.com>

	PR target/115351
	* config/i386/i386.cc (ix86_rtx_costs): Provide estimates for
	the *concatditi3 and *insvti_highpart patterns, about two insns.

2024-06-07  Roger Sayle  <roger@nextmovesoftware.com>
	    Hongtao Liu  <hongtao.liu@intel.com>

	* config/i386/i386-expand.cc (ix86_expand_args_builtin): Call
	fixup_modeless_constant before testing predicates.  Only call
	copy_to_mode_reg on memory operands (after the first one).
	(ix86_gen_bcst_mem): Helper function to convert a CONST_VECTOR
	into a VEC_DUPLICATE if possible.
	(ix86_ternlog_idx):  Convert an RTX expression into a ternlog
	index between 0 and 255, recording the operands in ARGS, if
	possible or return -1 if this is not possible/valid.
	(ix86_ternlog_leaf_p): Helper function to identify "leaves"
	of a ternlog expression, e.g. REG_P, MEM_P, CONST_VECTOR, etc.
	(ix86_ternlog_operand_p): Test whether a expression is suitable
	for and prefered as an UNSPEC_TERNLOG.
	(ix86_expand_ternlog_binop): Helper function to construct the
	binary operation corresponding to a sufficiently simple ternlog.
	(ix86_expand_ternlog_andnot): Helper function to construct a
	ANDN operation corresponding to a sufficiently simple ternlog.
	(ix86_expand_ternlog): Expand a 3-operand ternary logic
	expression, constructing either an UNSPEC_TERNLOG or simpler
	rtx expression.  Called from builtin expanders and pre-reload
	splitters.
	* config/i386/i386-protos.h (ix86_ternlog_idx): Prototype here.
	(ix86_ternlog_operand_p): Likewise.
	(ix86_expand_ternlog): Likewise.
	* config/i386/predicates.md (ternlog_operand): New predicate
	that calls xi86_ternlog_operand_p.
	* config/i386/sse.md (<avx512>_vpternlog<mode>_0): New
	define_insn_and_split that recognizes a SET_SRC of ternlog_operand
	and expands it via ix86_expand_ternlog pre-reload.
	(<avx512>_vternlog<mode>_mask): Convert from define_insn to
	define_expand.  Use ix86_expand_ternlog if the mask operand is
	~0 (or 255 or -1).
	(*<avx512>_vternlog<mode>_mask): define_insn renamed from above.

2024-06-07  Michal Jires  <mjires@suse.cz>

	* common.opt: Add cache partitioning.
	* flag-types.h (enum lto_partition_model): Likewise.

2024-06-07  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vectorize_fold_left_reduction): Fix
	mask vector operand indexing.

2024-06-07  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/115352
	* gimple-lower-bitint.cc (lower_addsub_overflow): Don't disable
	single_comparison if cmp_code is GE_EXPR.

2024-06-07  Alexandre Oliva  <oliva@adacore.com>

	* target.def (call_offset_return_label): New hook.
	* doc/tm.texi.in (TARGET_CALL_OFFSET_RETURN_LABEL): Add
	placeholder.
	* doc/tm.texi: Rebuild.
	* dwarf2out.cc (struct call_arg_loc_node): Record call_insn
	instead of call_arg_loc_note.
	(add_AT_lbl_id): Add optional offset argument.
	(gen_call_site_die): Compute and pass on a return pc offset.
	(gen_subprogram_die): Move call_arg_loc_note computation...
	(dwarf2out_var_location): ... from here.  Set call_insn.

2024-06-06  Pan Li  <pan2.li@intel.com>

	* doc/match-and-simplify.texi: Add doc for the matching flag '^'.
	* genmatch.cc (cmp_operand): Add match_phi comparation.
	(dt_node::gen_kids_1): Add cond_expr bool flag for phi match.
	(dt_operand::gen_phi_on_cond): Add new func to gen phi matching
	on cond_expr.
	(parser::parse_expr): Add handling for the expr flag '^'.
	* match.pd: Add more form for unsigned .SAT_ADD.
	* tree-ssa-math-opts.cc (build_saturation_binary_arith_call): Add
	new func impl to build call for phi gimple.
	(match_unsigned_saturation_add): Add new func impl to match the
	.SAT_ADD for phi gimple.
	(math_opts_dom_walker::after_dom_children): Add phi matching
	try for all gimple phi stmt.

2024-06-06  Pengxuan Zheng  <quic_pzheng@quicinc.com>

	PR target/113880
	PR target/113869
	* config/aarch64/aarch64-builtins.cc (VAR1): Remap float_extend_lo_
	builtin codes to standard optab ones.
	* config/aarch64/aarch64-simd.md (aarch64_float_extend_lo_<Vwide>): Rename
	to...
	(extend<mode><Vwide>2): ... This.

2024-06-06  Andrew Pinski  <quic_apinski@quicinc.com>

	PR plugins/115288
	* Makefile.in (CPPLIB_H): Add label-text.h.

2024-06-06  Richard Ball  <richard.ball@arm.com>

	* config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
	Add missing __ARM_NEON_SVE_BRIDGE.

2024-06-06  Richard Ball  <richard.ball@arm.com>

	PR target/115353
	* config/arm/arm.h (enum arm_auto_incmodes):
	Correct CASE_VECTOR_SHORTEN_MODE query.

2024-06-06  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-sve.md (@aarch64_pred_cmp<cmp_op><mode>,
	*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest,
	@aarch64_pred_cmp<cmp_op><mode>_wide,
	*aarch64_pred_cmp<cmp_op><mode>_wide_cc,
	*aarch64_pred_cmp<cmp_op><mode>_wide_ptest): Fix Upl tie alternative.
	* config/aarch64/aarch64-sve2.md (@aarch64_pred_<sve_int_op><mode>): Fix
	Upl tie alternative.

2024-06-06  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx.md (nvptx_uniform_warp_check): Make fit for
	non-full-warp execution, via 'vote.all.pred'.

2024-06-06  Pan Li  <pan2.li@intel.com>

	* match.pd: Add new form for vector mode recog.
	* tree-vect-patterns.cc (gimple_unsigned_integer_sat_sub): Add
	new match func decl;
	(vect_recog_build_binary_gimple_call): Extract helper func to
	build gcall with given internal_fn.
	(vect_recog_sat_sub_pattern): Add new func impl to recog .SAT_SUB.

2024-06-06  Michal Jires  <mjires@suse.cz>

	* lto-streamer.cc (lto_get_section_name): Remove suffixes after WPA.

2024-06-06  Michal Jires  <mjires@suse.cz>

	* lto-opts.cc (lto_write_options): Skip OPT_fltrans_output_list_.

2024-06-06  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/riscv.opt.urls: Regenerate.

2024-06-06  Hongyu Wang  <hongyu.wang@intel.com>

	* config/i386/i386-expand.cc (ix86_gen_ccmp_first):
	Add fp compare and check the allowed fp compare type.
	(ix86_gen_ccmp_next): Adjust compare_code input to ccmp for
	fp compare.

2024-06-06  Hongyu Wang  <hongyu.wang@intel.com>

	* ccmp.cc (expand_ccmp_expr_1): Check ret and ret2 of
	expand_ccmp_next, returns the valid one first instead of
	comparing cost.

2024-06-06  Hongyu Wang  <hongyu.wang@intel.com>

	* config/i386/i386-expand.cc (ix86_gen_ccmp_first): New function
	that test if the first compare can be generated.
	(ix86_gen_ccmp_next): New function to emit a simgle compare and ccmp
	sequence.
	* config/i386/i386-opts.h (enum apx_features): Add apx_ccmp.
	* config/i386/i386-protos.h (ix86_gen_ccmp_first): New proto
	declare.
	(ix86_gen_ccmp_next): Likewise.
	(ix86_get_flags_cc): Likewise.
	* config/i386/i386.cc (ix86_flags_cc): New enum.
	(ix86_ccmp_dfv_mapping): New string array to map conditional
	code to dfv.
	(ix86_print_operand): Handle special dfv flag for CCMP.
	(ix86_get_flags_cc): New function to return x86 CC enum.
	(TARGET_GEN_CCMP_FIRST): Define.
	(TARGET_GEN_CCMP_NEXT): Likewise.
	* config/i386/i386.h (TARGET_APX_CCMP): Define.
	* config/i386/i386.md (@ccmp<mode>): New define_insn to support
	ccmp.
	(UNSPEC_APX_DFV): New unspec for ccmp dfv.
	(ALL_CC): New mode iterator.
	(cstorecc4): Change to ...
	(cstore<mode>4) ... this, use ALL_CC to loop through all
	available CCmodes.
	* config/i386/i386.opt (apx_ccmp): Add enum value for ccmp.

2024-06-06  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vectorizable_reduction): Allow
	single-lane SLP in-order reductions.
	(vectorize_fold_left_reduction): Handle SLP reduction with
	conditional reduction op.

2024-06-06  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vect_analyze_scalar_cycles_1): Queue
	double reductions in LOOP_VINFO_REDUCTIONS.
	(vect_create_epilog_for_reduction): Remove asserts disabling
	SLP for double reductions.
	(vectorizable_reduction): Analyze SLP double reductions
	only once and start off the correct places.
	* tree-vect-slp.cc (vect_get_and_check_slp_defs): Allow
	vect_double_reduction_def.
	(vect_build_slp_tree_2): Fix condition for the ignored
	reduction initial values.
	* tree-vect-stmts.cc (vect_analyze_stmt): Allow
	vect_double_reduction_def.

2024-06-06  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vect_create_epilog_for_reduction):
	Adjust for single-lane COND_REDUCTION SLP vectorization.
	(vectorizable_reduction): Likewise.
	(vect_transform_cycle_phi): Likewise.

2024-06-06  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (vectorizable_condition): Allow
	single-lane SLP, but not when we need to swap then and
	else clause.

2024-06-06  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips.cc(mips_insn_cost): Add missing COSTS_N_INSNS
	to count.

2024-06-06  liuhongt  <hongtao.liu@intel.com>

	PR target/114428
	* config/i386/i386.cc (ix86_rtx_costs): Adjust cost for
	CONST_VECTOR_DUPLICATE_P in constant_pool.
	* config/i386/i386-expand.cc (ix86_broadcast_from_constant):
	Remove static.
	* config/i386/i386-protos.h (ix86_broadcast_from_constant):
	Declare.

2024-06-06  liuhongt  <hongtao.liu@intel.com>

	PR target/114428
	* simplify-rtx.cc
	(simplify_context::simplify_binary_operation_1):
	Simplify (AND (ASHIFTRT A imm) mask) to (LSHIFTRT A imm) for
	specific mask.

2024-06-05  Robin Dapp  <rdapp.gcc@gmail.com>

	* config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED):
	Move from here...
	* config/riscv/riscv.h (TARGET_VECTOR_MISALIGN_SUPPORTED):
	...to here and map to riscv_vector_unaligned_access_p.
	* config/riscv/riscv.opt: Add -mvector-strict-align.
	* config/riscv/riscv.cc (struct riscv_tune_param): Add
	vector_unaligned_access.
	(riscv_override_options_internal): Set
	riscv_vector_unaligned_access_p.
	* doc/invoke.texi: Document -mvector-strict-align.

2024-06-05  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/tuning_models/neoversen2.h (neoversen2_tunings): Add
	AARCH64_EXTRA_TUNE_AVOID_PRED_RMW.
	* config/aarch64/tuning_models/neoversev1.h (neoversev1_tunings): Add
	AARCH64_EXTRA_TUNE_AVOID_PRED_RMW.
	* config/aarch64/tuning_models/neoversev2.h (neoversev2_tunings): Add
	AARCH64_EXTRA_TUNE_AVOID_PRED_RMW.

2024-06-05  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-sve.md (and<mode>3,
	@aarch64_pred_<optab><mode>_z, *<optab><mode>3_cc,
	*<optab><mode>3_ptest, aarch64_pred_<nlogical><mode>_z,
	*<nlogical><mode>3_cc, *<nlogical><mode>3_ptest,
	aarch64_pred_<logical_nn><mode>_z, *<logical_nn><mode>3_cc,
	*<logical_nn><mode>3_ptest, @aarch64_pred_cmp<cmp_op><mode>,
	*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest,
	@aarch64_pred_cmp<cmp_op><mode>_wide,
	*aarch64_pred_cmp<cmp_op><mode>_wide_cc,
	*aarch64_pred_cmp<cmp_op><mode>_wide_ptest, @aarch64_brk<brk_op>,
	*aarch64_brk<brk_op>_cc, *aarch64_brk<brk_op>_ptest,
	@aarch64_brk<brk_op>, *aarch64_brk<brk_op>_cc,
	*aarch64_brk<brk_op>_ptest, aarch64_rdffr_z, *aarch64_rdffr_z_ptest,
	*aarch64_rdffr_ptest, *aarch64_rdffr_z_cc, *aarch64_rdffr_cc): Add
	new early clobber
	alternative.
	* config/aarch64/aarch64-sve2.md
	(@aarch64_pred_<sve_int_op><mode>): Likewise.

2024-06-05  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-tuning-flags.def
	(AVOID_PRED_RMW): New.
	* config/aarch64/aarch64.h (TARGET_SVE_PRED_CLOBBER): New.
	* config/aarch64/aarch64.md (pred_clobber): New.
	(arch_enabled): Use it.

2024-06-05  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-sve.md (and<mode>3,
	@aarch64_pred_<optab><mode>_z, *<optab><mode>3_cc,
	*<optab><mode>3_ptest, aarch64_pred_<nlogical><mode>_z,
	*<nlogical><mode>3_cc, *<nlogical><mode>3_ptest,
	aarch64_pred_<logical_nn><mode>_z, *<logical_nn><mode>3_cc,
	*<logical_nn><mode>3_ptest, *cmp<cmp_op><mode>_ptest,
	@aarch64_pred_cmp<cmp_op><mode>_wide,
	*aarch64_pred_cmp<cmp_op><mode>_wide_cc,
	*aarch64_pred_cmp<cmp_op><mode>_wide_ptest, *aarch64_brk<brk_op>_cc,
	*aarch64_brk<brk_op>_ptest, @aarch64_brk<brk_op>,
	*aarch64_brk<brk_op>_cc, *aarch64_brk<brk_op>_ptest, aarch64_rdffr_z,
	*aarch64_rdffr_z_ptest, *aarch64_rdffr_ptest, *aarch64_rdffr_z_cc,
	*aarch64_rdffr_cc): Convert to compact syntax.
	* config/aarch64/aarch64-sve2.md
	(@aarch64_pred_<sve_int_op><mode>): Likewise.

2024-06-05  Jakub Jelinek  <jakub@redhat.com>
	    Frederik Harwath  <frederik@codesourcery.com>
	    Sandra Loosemore  <sandra@codesourcery.com>

	* tree.def (OMP_TILE, OMP_UNROLL): New tree codes.
	* tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_PARTIAL,
	OMP_CLAUSE_FULL and OMP_CLAUSE_SIZES.
	* tree.h (OMP_LOOPXFORM_CHECK): Define.
	(OMP_LOOPXFORM_LOWERED): Define.
	(OMP_CLAUSE_PARTIAL_EXPR): Define.
	(OMP_CLAUSE_SIZES_LIST): Define.
	* tree.cc (omp_clause_num_ops, omp_clause_code_name): Add entries
	for OMP_CLAUSE_{PARTIAL,FULL,SIZES}.
	* tree-pretty-print.cc (dump_omp_clause): Handle
	OMP_CLAUSE_{PARTIAL,FULL,SIZES}.
	(dump_generic_node): Handle OMP_TILE and OMP_UNROLL.  Skip printing
	loops with NULL OMP_FOR_INIT (node) vector element.
	* gimplify.cc (is_gimple_stmt): Handle OMP_TILE and OMP_UNROLL.
	(gimplify_omp_taskloop_expr): For SAVE_EXPR use gimplify_save_expr.
	(gimplify_omp_loop_xform): New function.
	(gimplify_omp_for): Call omp_maybe_apply_loop_xforms and if that
	reshuffles what the passed pointer points to, retry or return GS_OK.
	Handle OMP_TILE and OMP_UNROLL.
	(gimplify_omp_loop): Call omp_maybe_apply_loop_xforms and if that
	reshuffles what the passed pointer points to, return GS_OK.
	(gimplify_expr): Handle OMP_TILE and OMP_UNROLL.
	* omp-general.h (omp_loop_number_of_iterations,
	omp_maybe_apply_loop_xforms): Declare.
	* omp-general.cc (omp_adjust_for_condition): For LE_EXPR and GE_EXPR
	with pointers, don't add/subtract one, but the size of what the
	pointer points to.
	(omp_loop_number_of_iterations, omp_apply_tile,
	find_nested_loop_xform, omp_maybe_apply_loop_xforms): New functions.

2024-06-05  Kewen Lin  <linkw@linux.ibm.com>

	* config/darwin.cc (darwin_patch_builtins): Use TYPE_PRECISION of
	long_double_type_node to replace LONG_DOUBLE_TYPE_SIZE.

2024-06-05  Pan Li  <pan2.li@intel.com>

	PR target/51492
	PR target/112600
	* internal-fn.def (SAT_SUB): Add new IFN define for SAT_SUB.
	* match.pd: Add new match for SAT_SUB.
	* optabs.def (OPTAB_NL): Remove fixed-point for ussub/ssub.
	* tree-ssa-math-opts.cc (gimple_unsigned_integer_sat_sub): Add
	new decl for generated in match.pd.
	(build_saturation_binary_arith_call): Add new helper function
	to build the gimple call to binary SAT alu.
	(match_saturation_arith): Rename from.
	(match_unsigned_saturation_add): Rename to.
	(match_unsigned_saturation_sub): Add new func to match the
	unsigned sat sub.
	(math_opts_dom_walker::after_dom_children): Add SAT_SUB matching
	try when COND_EXPR.

2024-06-05  Gerald Pfeifer  <gerald@pfeifer.com>

	PR other/69374
	* doc/install.texi (Prerequisites): Drop reference to GNU awk
	version 3.1.5. Remove fluff.

2024-06-05  liuhongt  <hongtao.liu@intel.com>

	PR rtl-optimization/100927
	PR rtl-optimization/115161
	PR rtl-optimization/115115
	* simplify-rtx.cc (simplify_const_unary_operation): Prevent
	simplication of FIX/UNSIGNED_FIX for NAN/INF/out-of-range
	constant when flag_trapping_math.
	* fold-const.cc (fold_convert_const_int_from_real): Don't fold
	for overflow value when_trapping_math.

2024-06-05  Xiao Zeng  <zengxiao@eswincomputing.com>

	* config/riscv/iterators.md: Add mode_iterator between
	floating-point modes and BFmode.
	* config/riscv/riscv.cc (riscv_output_move): Handle BFmode move
	for zfbfmin.
	* config/riscv/riscv.md (trunc<mode>bf2): New pattern for BFmode.
	(extendbfsf2): Dotto.
	(*movhf_hardfloat): Add BFmode.
	(*mov<mode>_hardfloat): Dotto.

2024-06-04  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/115337
	* gimple-range-op.cc (cfn_clz::fold_range): For
	m_gimple_call_internal_p handle as a special case also second argument
	of -1 next to prec.

2024-06-04  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/115337
	* fold-const.cc (tree_call_nonnegative_warnv_p): Handle
	CASE_CFN_CTZ like CASE_CFN_CLZ.

2024-06-04  Jakub Jelinek  <jakub@redhat.com>

	* fold-const.cc (tree_call_nonnegative_warnv_p): Formatting fixes.
	(tree_invalid_nonnegative_warnv_p): Likewise.
	* gimple-fold.cc (gimple_call_nonnegative_warnv_p): Likewise.

2024-06-04  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/115337
	* fold-const.cc (tree_call_nonnegative_warnv_p) <CASE_CFN_CLZ>:
	If arg1 is non-NULL, RECURSE on it, otherwise return true.

2024-06-04  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/108789
	* builtins.cc (fold_builtin_arith_overflow): For ovf_only,
	don't call save_expr and don't build REALPART_EXPR, otherwise
	set TREE_SIDE_EFFECTS on call before calling save_expr.
	(fold_builtin_addc_subc): Set TREE_SIDE_EFFECTS on call before
	calling save_expr.

2024-06-04  Jakub Jelinek  <jakub@redhat.com>

	* doc/invoke.texi (lujiazui): Clarify that while the CPUs do support
	AVX and F16C, -march=lujiazui actually doesn't enable those.

2024-06-04  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_build_slp_tree_2): Only multi-lane
	discoveries are reduction chains and need special backedge
	treatment.
	(vect_analyze_slp): Fall back to single-lane SLP discovery
	for reductions.  Make sure to try single-lane SLP reduction
	for all reductions as fallback.
	(vectorizable_load): Avoid outer loop SLP vectorization with
	multi-copy vector stmts in the inner loop.
	(vectorizable_store): Likewise.
	* tree-vect-loop.cc (vect_create_epilog_for_reduction): Allow
	direct opcode and shift reduction also for SLP reductions
	with a single lane.
	* tree-vect-stmts.cc (get_group_load_store_type): For SLP also
	check for the PR65518 single-element interleaving case as done in
	vect_grouped_load_supported.

2024-06-04  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_schedule_slp_node): For mask/len
	loops make sure to not advance the insertion iterator
	beyond a GIMPLE_COND.

2024-06-03  Jakub Jelinek  <jakub@redhat.com>

	PR target/115324
	* config/rs6000/rs6000-gen-builtins.cc (write_decls): Remove
	GTY markup from struct bifdata and struct ovlddata and remove their
	fntype members.  Change next member in struct ovlddata and
	first_instance member of struct ovldrecord to have int type rather
	than struct ovlddata *.  Remove GTY markup from rs6000_builtin_info
	and rs6000_instance_info arrays, declare new
	rs6000_builtin_info_fntype and rs6000_instance_info_fntype arrays,
	which have GTY markup.
	(write_bif_static_init): Adjust for the above changes.
	(write_ovld_static_init): Likewise.
	(write_init_bif_table): Likewise.
	(write_init_ovld_table): Likewise.
	* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Likewise.
	* config/rs6000/rs6000-c.cc (find_instance): Likewise.  Make static.
	(altivec_resolve_overloaded_builtin): Adjust for the above changes.

2024-06-03  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc: Include "ordered-hash-map.h" and
	"sbitmap.h".
	(enum class diagnostic_artifact_role): New.
	(class sarif_artifact): New.
	(sarif_builder::maybe_make_artifact_content_object): Make public.
	(sarif_builder::m_filenames): Replace with...
	(sarif_builder::m_filename_to_artifact_map): ...this.
	(sarif_artifact::add_role): New.
	(sarif_artifact::populate_contents): New.
	(get_artifact_role_string): New.
	(sarif_artifact::populate_roles): New.
	(sarif_result::on_nested_diagnostic): Pass role to
	make_location_object.
	(sarif_ice_notification::sarif_ice_notification): Likewise.
	(sarif_builder::sarif_builder): Add "main_input_filename_" param.
	Mark it as the artifact that the tool was instructed to scan.
	(sarif_builder::make_result_object): Pass role to
	make_locations_arr.
	(sarif_builder::make_locations_arr): Add "role" param and pass it
	to make_location_object.
	(sarif_builder::make_location_object): Add "role" param and pass
	it to maybe_make_physical_location_object.
	(sarif_builder::maybe_make_physical_location_object): Add "role"
	param and pass it to call to get_or_create_artifact, rather than
	adding to now-removed "m_filenames".  Flag the artifact for its
	contents to be embedded.
	(sarif_builder::make_thread_flow_location_object): Pass role to
	make_location_object.
	(sarif_builder::make_run_object): Update for change from
	m_filename to m_filename_to_artifact_map.  Call populate_contents
	and populate_roles on each artifact_obj.
	(sarif_builder::make_artifact_object): Convert to...
	(sarif_builder::get_or_create_artifact): ...this, moving addition
	of contents to make_run_object, and conditionalizing setting of
	sourceLanguage on "role".
	(sarif_output_format::sarif_output_format): Add
	"main_input_filename_" param and pass to m_builder's ctor.
	(sarif_stream_output_format::sarif_stream_output_format):
	Likewise.
	(sarif_file_output_format::sarif_file_output_format): Likewise.
	(diagnostic_output_format_init_sarif_stderr): Add
	"main_input_filename_" param and pass to ctor.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.
	* diagnostic.cc (diagnostic_output_format_init): Add
	"main_input_filename_" param and pass to the
	diagnostic_output_format_init_sarif_* calls.
	* diagnostic.h (diagnostic_output_format_init): Add
	main_input_filename_" param to decl.
	(diagnostic_output_format_init_sarif_stderr): Likewise.
	(diagnostic_output_format_init_sarif_file): Likewise.
	(diagnostic_output_format_init_sarif_stream): Likewise.
	* gcc.cc (driver_handle_option): Pass main input filename to
	diagnostic_output_format_init.
	* opts.cc (common_handle_option): Likewise.

2024-06-03  Eric Botcazou  <ebotcazou@adacore.com>

	* dwarf2out.cc (loc_list_from_tree_1) <CEIL_DIV_EXPR>; Add const.
	<do_comp_binop>: Use a signed comparison for small unsigned types.
	Implement wrap-around arithmetics for small integer types.

2024-06-03  Uros Bizjak  <ubizjak@gmail.com>

	PR target/115321
	* config/i386/i386.md (bswapsi2): Force operand 1
	to a register also for !TARGET_BSWAP.

2024-06-03  Aldy Hernandez  <aldyh@redhat.com>

	* builtins.cc (expand_builtin_strnlen): Replace value_range use
	with int_range_max or irange when appropriate.
	(determine_block_size): Same.
	* fold-const.cc (minmax_from_comparison): Same.
	* gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
	(array_bounds_checker::check_array_ref): Same.
	* gimple-fold.cc (size_must_be_zero_p): Same.
	* gimple-predicate-analysis.cc (find_var_cmp_const): Same.
	* gimple-ssa-sprintf.cc (get_int_range): Same.
	(format_integer): Same.
	(try_substitute_return_value): Same.
	(handle_printf_call): Same.
	* gimple-ssa-warn-restrict.cc
	(builtin_memref::extend_offset_range): Same.
	* graphite-sese-to-poly.cc (add_param_constraints): Same.
	* internal-fn.cc (get_min_precision): Same.
	* match.pd: Same.
	* pointer-query.cc (get_size_range): Same.
	* range-op.cc (get_shift_range): Same.
	(operator_trunc_mod::op1_range): Same.
	(operator_trunc_mod::op2_range): Same.
	* range.cc (range_negatives): Same.
	* range.h (range_positives): Same.
	(range_negatives): Same.
	* tree-affine.cc (expr_to_aff_combination): Same.
	* tree-data-ref.cc (compute_distributive_range): Same.
	(nop_conversion_for_offset_p): Same.
	(split_constant_offset): Same.
	(split_constant_offset_1): Same.
	(dr_step_indicator): Same.
	* tree-dfa.cc (get_ref_base_and_extent): Same.
	* tree-scalar-evolution.cc (iv_can_overflow_p): Same.
	* tree-ssa-math-opts.cc (optimize_spaceship): Same.
	* tree-ssa-pre.cc (insert_into_preds_of_block): Same.
	* tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
	* tree-ssa-strlen.cc (compare_nonzero_chars): Same.
	(dump_strlen_info): Same.
	(get_range_strlen_dynamic): Same.
	(set_strlen_range): Same.
	(maybe_diag_stxncpy_trunc): Same.
	(strlen_pass::get_len_or_size): Same.
	(strlen_pass::handle_builtin_string_cmp): Same.
	(strlen_pass::count_nonzero_bytes_addr): Same.
	(strlen_pass::handle_integral_assign): Same.
	* tree-switch-conversion.cc (bit_test_cluster::emit): Same.
	* tree-vect-loop-manip.cc (vect_gen_vector_loop_niters): Same.
	(vect_do_peeling): Same.
	* tree-vect-patterns.cc (vect_get_range_info): Same.
	(vect_recog_divmod_pattern): Same.
	* tree.cc (get_range_pos_neg): Same.
	* value-range.cc (debug): Remove value_range variants.
	* value-range.h (value_range): Remove typedef.
	* vr-values.cc
	(simplify_using_ranges::op_with_boolean_value_range_p): Replace
	value_range use with int_range_max or irange when appropriate.
	(check_for_binary_op_overflow): Same.
	(simplify_using_ranges::legacy_fold_cond_overflow): Same.
	(find_case_label_ranges): Same.
	(simplify_using_ranges::simplify_abs_using_ranges): Same.
	(test_for_singularity): Same.
	(simplify_using_ranges::simplify_compare_using_ranges_1): Same.
	(simplify_using_ranges::simplify_casted_compare): Same.
	(simplify_using_ranges::simplify_switch_using_ranges): Same.
	(simplify_conversion_using_ranges): Same.
	(simplify_using_ranges::two_valued_val_range_p): Same.

2024-06-03  Tobias Burnus  <tburnus@baylibre.com>

	* doc/install.texi (gcn): Fix date of recommended newlib version.

2024-06-03  Marc Poulhiès  <poulhies@adacore.com>

	* config/aarch64/aarch64-ldp-fusion.cc (struct aarch64_pair_fusion):
	Use new type name.

2024-06-03  Marc Poulhiès  <poulhies@adacore.com>

	* pair-fusion.h (enum class writeback): Rename to...
	(enum class writeback_type): ...this.
	(struct pair_fusion): Adjust type name after renaming.
	* pair-fusion.cc (pair_fusion_bb_info::track_access): Likewise.
	(pair_fusion_bb_info::fuse_pair): Likewise.
	(pair_fusion::process_block): Likewise.

2024-06-03  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vect_analyze_loop_1): Avoid extra space
	before 'failed'.

2024-06-03  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (get_initial_defs_for_reduction):
	Always convert neutral_op.

2024-06-03  liuhongt  <hongtao.liu@intel.com>

	PR target/115299
	* config/i386/i386.cc (ix86_noce_conversion_profitable_p): Add
	some preference for floating point ifcvt when SSE4.1 is not
	available.

2024-06-03  Haochen Jiang  <haochen.jiang@intel.com>

	* common/config/i386/i386-common.cc: Change Granite Rapids
	series CPU type to P_PROC_AVX10_1_512.
	* common/config/i386/i386-cpuinfo.h (enum feature_priority):
	Revise comment part. Add P_AVX10_1_256, P_AVX10_1_512,
	P_PROC_AVX10_1_512.
	* common/config/i386/i386-isas.h: Link to avx10.1-256, avx10.1-512.

2024-06-03  Lingling Kong  <lingling.kong@intel.com>

	* config/i386/i386.md (clz<mode>2_lzcnt_nf): New define_insn.
	(*clz<mode>2_lzcnt_falsedep_nf): Ditto.
	(<lt_zcnt>_<mode>_nf): Ditto.
	(*<lt_zcnt>_<mode>_falsedep_nf): Ditto.
	(<lt_zcnt>_hi<nf_name>): Ditto.
	(popcount<mode>2_nf): Ditto.
	(*popcount<mode>2_falsedep_nf): Ditto.
	(popcounthi2<nf_name>): Ditto.

2024-06-03  Lingling Kong  <lingling.kong@intel.com>

	* config/i386/i386.md (*mul<mode>3_1<nf_name>): New define_insn.
	(*mulqi3_1<nf_name>): Ditto.
	(*<u>divmod<mode>4_noext_nf): Ditto.
	(<u>divmodhiqi3<nf_name>): Ditto.

2024-06-03  Lingling Kong  <lingling.kong@intel.com>

	* config/i386/i386.md (x86_64_shld): New define_insn.
	(x86_64_shld<nf_name>): Ditto.
	(x86_64_shld_ndd<nf_name>): Ditto.
	(x86_64_shld_1<nf_name>): Ditto.
	(x86_64_shld_ndd_1<nf_name>): Ditto.
	(*x86_64_shld_shrd_1_nozext_nf): Ditto.
	(x86_shld<nf_name>): Ditto.
	(x86_shld_ndd<nf_name>): Ditto.
	(x86_shld_1<nf_name>): Ditto.
	(x86_shld_ndd_1<nf_name>): Ditto.
	(*x86_shld_shrd_1_nozext_nf): Ditto.
	(<insn><dwi>3_doubleword_lowpart_nf): Ditto.
	(x86_64_shrd<nf_name>): Ditto.
	(x86_64_shrd_ndd<nf_name>): Ditto.
	(x86_64_shrd_1<nf_name>): Ditto.
	(x86_64_shrd_ndd_1<nf_name>): Ditto.
	(*x86_64_shrd_shld_1_nozext_nf): Ditto.
	(x86_shrd<nf_name>): Ditto.
	(x86_shrd_ndd<nf_name>): Ditto.
	(x86_shrd_1<nf_name>): Ditto.
	(x86_shrd_ndd_1<nf_name>): Ditto.
	(*x86_shrd_shld_1_nozext_nf): Ditto.

2024-06-03  Lingling Kong  <lingling.kong@intel.com>

	* config/i386/i386.md (ashr<mode>3_cvt<nf_name>): New
	define_insn.
	(*<insn><mode>3_1<nf_name>): Ditto.

2024-06-03  Lingling Kong  <lingling.kong@intel.com>

	* config/i386/i386.md (*ashr<mode>3_1<nf_name>): New
	define_insn.
	(*lshr<mode>3_1<nf_name>): Ditto.
	(*lshrqi3_1<nf_name>): Ditto.
	(*lshrhi3_1<nf_name>): Ditto.

2024-06-03  Lingling Kong  <lingling.kong@intel.com>

	* config/i386/i386.md (*ashl<mode>3_1<nf_name>): New
	define_insn.
	(*ashlhi3_1<nf_name>): Ditto.
	(*ashlqi3_1<nf_name>): Ditto.
	* config/i386/sse.md: New define_split.

2024-06-03  Lingling Kong  <lingling.kong@intel.com>

	* config/i386/i386.md (nf_nonf_attr): New subst_attr.
	(nf_nonf_x64_attr): Ditto.
	(*sub<mode>_1<nf_name>): New define_insn.
	(*anddi_1<nf_name>): Ditto.
	(*and<mode>_1<nf_name>): Ditto.
	(*andqi_1<nf_name>): Ditto.
	(*<code><mode>_1<nf_name>): Ditto.
	(*<code>qi_1<nf_name>): Ditto.
	(*neg<mode>_1<nf_name>): Ditto.
	* config/i386/sse.md: New define_split.

2024-06-03  Lingling Kong  <lingling.kong@intel.com>
	    Hongyu Wong  <hongyu.wang@intel.com>

	* config/i386/i386-opts.h (enum apx_features): Add nf
	enumeration.
	* config/i386/i386.h (TARGET_APX_NF): New.
	* config/i386/i386.md (nf_name): New subst_att.
	(nf_prefix): Ditto.
	(nf_condition): Ditto.
	(nf_mem_constraint): Ditto.
	(nf_applied): Ditto.
	(nf_subst): Add new define_subst.
	(*add<mode>_1<nf_name>): New define_insn.
	(*addhi_1<nf_name>): Ditto.
	(*addqi_1<nf_name>): Diito.
	* config/i386/i386.opt: Add apx_nf enumeration.

2024-06-03  Hu, Lin1  <lin1.hu@intel.com>

	PR target/113609
	* config/i386/sse.md
	(*kortest_cmp<mode>_setcc): New define_insn_and_split.
	(*kortest_cmp<mode>_jcc): Ditto.

2024-06-01  Georg-Johann Lay  <avr@gjlay.de>

	PR tree-optimization/115307
	* config/avr/avr.md (SFDF): New mode iterator.
	(isinf<mode>2) [sf, df]: New expanders.

2024-06-01  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_integer_op): Add new field.
	(riscv_build_integer_1): Initialize the new field.
	(riscv_built_integer): Recognize more cases where Zbkb's
	pack instruction is profitable.
	(riscv_move_integer): Loop over all the codes.  If requested,
	save the current constant into a temporary.  Generate pack
	for more cases using the saved constant.

2024-06-01  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vect-loop.cc (vect_is_emulated_mixed_dot_prod): Remove parameter
	loop_vinfo. Get input vectype from stmt_info instead of reduction PHI.
	(vect_model_reduction_cost): Remove loop_vinfo argument of call to
	vect_is_emulated_mixed_dot_prod.
	(vect_transform_reduction): Likewise.
	(vectorizable_reduction): Likewise, and bind input vectype to
	lane-reducing operation.

2024-06-01  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vect-loop.cc (vect_reduction_update_partial_vector_usage): New
	function.
	(vectorizable_reduction): Move partial vectorization checking code to
	vect_reduction_update_partial_vector_usage.

2024-06-01  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vectorizer.h (lane_reducing_op_p): New function.
	* tree-vect-slp.cc (vect_analyze_slp): Use new function
	lane_reducing_op_p to check statement code.
	* tree-vect-loop.cc (vect_transform_reduction): Likewise.
	(vectorizable_reduction): Likewise, and change name of a local
	variable that holds the result flag.

2024-05-31  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa-protos.h (xtensa_expand_call):
	Add the third argument as boolean.
	(xtensa_expand_epilogue): Remove the first argument.
	* config/xtensa/xtensa.cc (xtensa_expand_call):
	Add the third argument "sibcall_p", and modify in order to prepend
	"(use A0_REG)" to CALL_INSN_FUNCTION_USAGE if the argument is true.
	(xtensa_expand_epilogue): Remove the first argument "sibcall_p" and
	its conditional clause.
	* config/xtensa/xtensa.md (call, call_value, sibcall, sibcall_value):
	Append a boolean value to the argument of xtensa_expand_call()
	indicating whether it is sibling call or not.
	(epilogue): Remove the boolean argument from xtensa_expand_epilogue(),
	and then append emitting "(return)".
	(sibcall_epilogue): Remove the boolean argument from
	xtensa_expand_epilogue().

2024-05-31  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/predicates.md
	(subreg_HQI_lowpart_operator, xtensa_sminmax_operator):
	New operator predicates.
	* config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
	Remove.
	* config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p): Ditto.
	* config/xtensa/xtensa.md
	(*addsubx, *extzvsi-1bit_ashlsi3, *extzvsi-1bit_addsubx):
	Revise the output statements by conditional ternary operator rather
	than switch-case clause in order to avoid using gcc_unreachable().
	(xtensa_clamps): Reduce to a single pattern definition using the
	predicate added above.
	(Some split patterns to assist *masktrue_const_bitcmpl): Ditto.

2024-05-31  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/riscv-v.cc (expand_const_vector): Document.
	(shuffle_extract_and_slide1up_patterns): Remove.

2024-05-31  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/autovec.md (ctz<mode>2): New expander.
	(clz<mode>2): Ditto.
	* config/riscv/generic-vector-ooo.md: Add bitmanip ops to insn
	reservation.
	* config/riscv/vector-crypto.md: Add VLS modes to insns.
	* config/riscv/vector.md: Add bitmanip ops to mode_idx and other
	attributes.

2024-05-31  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/autovec-opt.md (*vandn_<mode>): New pattern.
	* config/riscv/vector.md: Add vandn to mode_idx.

2024-05-31  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/riscv-v.cc (expand_gather_scatter): Use vwsll if
	applicable.
	* config/riscv/vector-crypto.md: Remove mode from vwsll shift
	count operator.
	* config/riscv/vector.md: Add vwsll to mode iterator.

2024-05-31  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/autovec-opt.md (*vwsll_zext1_<mode>): New
	pattern.
	(*vwsll_zext2_<mode>): Ditto.
	(*vwsll_zext1_scalar_<mode>): Ditto.
	(*vwsll_zext1_trunc_<mode>): Ditto.
	(*vwsll_zext2_trunc_<mode>): Ditto.
	(*vwsll_zext1_trunc_scalar_<mode>): Ditto.
	* config/riscv/vector-crypto.md: Make pattern similar to other
	narrowing/widening patterns.

2024-05-31  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/vector.md: Split vwadd.wx/vwsub.wx pattern and
	add extended_scalar patterns.

2024-05-31  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/115068
	* config/riscv/vector.md:  Split vfw<insn>.wf pattern.

2024-05-31  Qing Zhao  <qing.zhao@oracle.com>

	* tree-object-size.cc (access_with_size_object_size): Use the type
	of the 6th argument for the type of the element.
	* internal-fn.cc (expand_ACCESS_WITH_SIZE): Update the comment with
	the 6th argument.

2024-05-31  Qing Zhao  <qing.zhao@oracle.com>

	* tree-object-size.cc (access_with_size_object_size): New function.
	(call_object_size): Call the new function.

2024-05-31  Qing Zhao  <qing.zhao@oracle.com>

	* internal-fn.cc (expand_ACCESS_WITH_SIZE): New function.
	* internal-fn.def (ACCESS_WITH_SIZE): New internal function.
	* tree.cc (is_access_with_size_p): New function.
	(get_ref_from_access_with_size): New function.
	* tree.h (is_access_with_size_p): New prototype.
	(get_ref_from_access_with_size): New prototype.

2024-05-31  Qing Zhao  <qing.zhao@oracle.com>

	* doc/extend.texi: Document attribute counted_by.

2024-05-31  Uros Bizjak  <ubizjak@gmail.com>

	PR target/115297
	* config/alpha/alpha.md (<any_divmod:code>si3): Wrap DImode
	operands 3 and 4 with truncate:SI RTX.
	(*divmodsi_internal_er): Ditto for operands 1 and 2.
	(*divmodsi_internal_er_1): Ditto.
	(*divmodsi_internal): Ditto.
	* config/alpha/constraints.md ("b"): Correct register
	number in the description.

2024-05-31  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/nvptx/nvptx.h: Configure global constructor, destructor
	support.

2024-05-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115278
	* tree-if-conv.cc (ifcvt_local_dce): Do not DSE volatile stores.

2024-05-31  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* config.gcc: Move ${target_min} from obsolete to unsupported
	message.

2024-05-31  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/115022
	* doc/invoke.texi (fstrub=disable): Fix opindex.
	(minline-memops-threshold): Fix opindex.
	(mcmodel=): Add opindex and fix them.
	* common.opt.urls: Regenerate.
	* config/aarch64/aarch64.opt.urls: Regenerate.
	* config/bpf/bpf.opt.urls: Regenerate.
	* config/i386/i386.opt.urls: Regenerate.
	* config/loongarch/loongarch.opt.urls: Regenerate.
	* config/nds32/nds32-elf.opt.urls: Regenerate.
	* config/nds32/nds32-linux.opt.urls: Regenerate.
	* config/or1k/or1k.opt.urls: Regenerate.
	* config/riscv/riscv.opt.urls: Regenerate.
	* config/rs6000/aix64.opt.urls: Regenerate.
	* config/rs6000/linux64.opt.urls: Regenerate.
	* config/sparc/sparc.opt.urls: Regenerate.

2024-05-31  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa-protos.h
	(xtensa_use_return_instruction_p): Remove.
	* config/xtensa/xtensa.cc
	(machine_function): Remove "epilogue_done" field.
	(xtensa_expand_epilogue): Remove "cfun->machine->epilogue_done" usage.
	(xtensa_use_return_instruction_p): Remove.
	* config/xtensa/xtensa.md ("return"):
	Replace calling "xtensa_use_return_instruction_p()" with inline code.

2024-05-31  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.cc (xtensa_valid_move, constantpool_address_p,
	xtensa_tls_symbol_p, gen_int_relational, xtensa_emit_move_sequence,
	xtensa_copy_incoming_a7, xtensa_expand_block_move,
	xtensa_expand_nonlocal_goto, xtensa_emit_call,
	xtensa_legitimate_address_p, xtensa_legitimize_address,
	xtensa_tls_referenced_p, print_operand, print_operand_address,
	xtensa_output_literal):
	Replace RTX code comparisons with their predicate macros such as
	REG_P().
	* config/xtensa/xtensa.h (CONSTANT_ADDRESS_P,
	LEGITIMATE_PIC_OPERAND_P): Ditto.
	* config/xtensa/xtensa.md (reload<mode>_literal, indirect_jump):
	Ditto.

2024-05-31  Martin Uecker  <uecker@tugraz.at>

	PR tree-optimization/115157
	PR tree-optimization/115177
	* godump.cc (go_output_typedef): Use TYPE_MAIN_VARIANT instead
	of TYPE_CANONICAL.

2024-05-31  liuhongt  <hongtao.liu@intel.com>

	* config/i386/emmintrin.h (__double_u): Rename from double_u.
	(_mm_load_sd): Replace double_u with __double_u.
	(_mm_store_sd): Ditto.
	(_mm_loadh_pd): Ditto.
	(_mm_loadl_pd): Ditto.
	* config/i386/xmmintrin.h (__float_u): Rename from float_u.
	(_mm_load_ss): Ditto.
	(_mm_store_ss): Ditto.

2024-05-30  Uros Bizjak  <ubizjak@gmail.com>

	PR target/115102
	* config/i386/i386.md (bswaphi2): Also enable for !TARGET_MOVBE.
	(*bswaphi2): New insn pattern.
	(bswaphisi2_lowpart): Rename from bswaphi_lowpart.  Rewrite
	insn RTX to match the expected form of the combine pass.
	Remove rol{w} alternative and corresponding attributes.
	(bswsaphisi2_lowpart peephole2): New peephole2 pattern to
	conditionally convert bswaphisi2_lowpart to rotlhi3_1_slp.
	(bswapsi2): Update expander for rename.
	(rotlhi3_1_slp splitter): Conditionally split to bswaphi2.

2024-05-30  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/115281
	* ira-conflicts.cc (go_through_subreg): Use the natural size of
	the inner mode rather than the outer mode.

2024-05-30  Ajit Kumar Agarwal  <aagarwa1@linux.ibm.com>

	* pair-fusion.h: Generic header code for load store pair fusion
	that can be shared across different architectures.
	* pair-fusion.cc: Generic source code implementation for
	load store pair fusion that can be shared across different architectures.
	* Makefile.in: Add new object file pair-fusion.o.
	* config/aarch64/aarch64-ldp-fusion.cc: Delete generic code and move it
	to pair-fusion.cc in the middle-end.
	* config/aarch64/t-aarch64: Add header file dependency on pair-fusion.h.
	Remove unnecessary header file dependency.

2024-05-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR c++/115031
	* config/sparc/sol2.h (GGC_QUIRE_SIZE): Define as 510.

2024-05-30  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OBJS-libcommon): Add text-art/tree-widget.o.
	* doc/analyzer.texi: Rewrite discussion of dumping state to
	cover the text_art::tree_widget-based dumps, with a more
	interesting example.
	* text-art/dump-widget-info.h: New file.
	* text-art/dump.h: New file.
	* text-art/selftests.cc (selftest::text_art_tests): Call
	text_art_tree_widget_cc_tests.
	* text-art/selftests.h (selftest::text_art_tree_widget_cc_tests):
	New decl.
	* text-art/theme.cc (ascii_theme::get_cppchar): Handle the various
	cell_kind::TREE_*.
	(unicode_theme::get_cppchar): Likewise.
	* text-art/theme.h (enum class theme::cell_kind): Add
	TREE_CHILD_NON_FINAL, TREE_CHILD_FINAL, TREE_X_CONNECTOR, and
	TREE_Y_CONNECTOR.
	* text-art/tree-widget.cc: New file.
	* text-art/tree-widget.h: New file.

2024-05-30  liuhongt  <hongtao.liu@intel.com>

	* config/i386/sse.md (vcond_mask_<mode><mode>): New expander.

2024-05-30  liuhongt  <hongtao.liu@intel.com>

	PR tree-optimization/112325
	* tree-ssa-loop-ivcanon.cc (estimated_unrolled_size): Move the
	2 / 3 loop body size reduction to ..
	(try_unroll_loop_completely): .. here, add it for the check of
	body size shrink, and the check of comparison against
	param_max_completely_peeled_insns when
	(!cunrolli ||loop->inner).
	(canonicalize_loop_induction_variables): Add new parameter
	cunrolli and pass down.
	(tree_unroll_loops_completely_1): Ditto.
	(canonicalize_induction_variables): Pass cunrolli as false to
	canonicalize_loop_induction_variables.
	(tree_unroll_loops_completely): Set cunrolli to true at
	beginning and set it to false after CHANGED is true.

2024-05-30  Alexandre Oliva  <oliva@adacore.com>

	* doc/sourcebuild.texi (dg-additional-sources): Document
	newly-added support for target selectors, and implicit discard
	on non-linking tests that name the compiler output explicitly.

2024-05-30  Jiawei  <jiawei@iscas.ac.cn>

	* tree-ssa-pre.cc (create_component_ref_by_pieces_1): New conditions.

2024-05-30  Hans-Peter Nilsson  <hp@axis.com>

	Revert:
	2024-05-28  Hans-Peter Nilsson  <hp@axis.com>

	* resource.cc: Include cfgrtl.h.  Use BLOCK_FOR_INSN (insn)->index
	instead of calling find_basic_block (insn).  Assert for not -1.
	(find_basic_block): Remove function.
	(init_resource_info): Call compute_bb_for_insn.
	(free_resource_info): Call free_bb_for_insn.

2024-05-30  Hans-Peter Nilsson  <hp@axis.com>

	Revert:
	2024-05-28  Hans-Peter Nilsson  <hp@axis.com>

	* resource.cc (mark_target_live_regs): Remove redundant check for b
	being -1, after gcc_assert.

2024-05-30  Hans-Peter Nilsson  <hp@axis.com>

	Revert:
	2024-05-28  Hans-Peter Nilsson  <hp@axis.com>

	* resource.cc (free_resource_info, clear_hashed_info_for_insn): Don't
	check for non-null target_hash_table and bb_ticks.
	(mark_target_live_regs): Ditto.  Replace check for non-NULL result from
	BLOCK_FOR_INSN with a call to gcc_assert.  Fold code conditioned on
	tinfo != NULL.

2024-05-29  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips.cc(mips16_gp_pseudo_reg): Mark
	MIPS16_PIC_TEMP and MIPS_PROLOGUE_TEMP clobbered.
	(mips_emit_call_insn): Mark MIPS16_PIC_TEMP and
	MIPS_PROLOGUE_TEMP clobbered if MIPS16 and CALL_CLOBBERED_GP.

2024-05-29  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/115224
	* generic-match-head.cc (bitwise_inverted_equal_p): Add `a ^ CST`
	case.
	* gimple-match-head.cc (gimple_bit_xor_cst): New declaration.
	(gimple_bitwise_inverted_equal_p): Add `a ^ CST` case.
	* match.pd (bit_xor_cst): New match.
	(maybe_bit_not): Add bit_xor_cst case.

2024-05-29  Andrew Pinski  <quic_apinski@quicinc.com>

	* match.pd (bit_not_with_nop): Unconditionalize.
	(maybe_cmp): Likewise.
	(maybe_bit_not): New match pattern.
	(`~X & X`): Use maybe_bit_not and add `:c` back.
	(`~x ^ x`/`~x | x`): Likewise.

2024-05-29  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/115258
	* config/aarch64/aarch64-simd.md (aarch64_combinev16qi): Allow
	the split before reload.
	* config/aarch64/aarch64.cc (aarch64_split_combinev16qi): Generalize
	into a form that handles pseudo registers.

2024-05-29  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vect-loop.c : Removed.

2024-05-29  Feng Xue  <fxue@os.amperecomputing.com>

	* tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Move
	initialization of bbs to explicit construction code.  Adjust the
	definition of nbbs.
	(update_epilogue_loop_vinfo): Update nbbs for epilog vinfo.
	* tree-vect-patterns.cc (vect_determine_precisions): Make
	loop_vec_info and bb_vec_info share same code.
	(vect_pattern_recog): Remove duplicated vect_pattern_recog_1 loop.
	* tree-vect-slp.cc (vect_get_and_check_slp_defs): Access to bbs[0]
	via base vec_info class.
	(_bb_vec_info::_bb_vec_info): Initialize bbs and nbbs using data
	fields of input auto_vec<> bbs.
	(vect_slp_region): Use access to nbbs to replace original
	bbs.length().
	(vect_schedule_slp_node): Access to bbs[0] via base vec_info class.
	* tree-vectorizer.cc (vec_info::vec_info): Add initialization of
	bbs and nbbs.
	(vec_info::insert_seq_on_entry): Access to bbs[0] via base vec_info
	class.
	* tree-vectorizer.h (vec_info): Add new fields bbs and nbbs.
	(LOOP_VINFO_NBBS): New macro.
	(BB_VINFO_BBS): Rename BB_VINFO_BB to BB_VINFO_BBS.
	(BB_VINFO_NBBS): New macro.
	(_loop_vec_info): Remove field bbs.
	(_bb_vec_info): Rename field bbs.
	* tree-vect-loop.c: New file.

2024-05-29  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/crypto.md (riscv_xpack_<X:mode>_<HX:mode>_2): Remove '*'
	allow it to be used via the gen_* interface.
	* config/riscv/riscv.cc (riscv_build_integer): Identify when Zbkb
	can be used to profitably synthesize repeating constants.
	(riscv_move_integer): Codegen changes to generate those Zbkb sequences.

2024-05-29  Jason Merrill  <jason@redhat.com>

	* doc/invoke.texi: Update module extension docs.

2024-05-29  Tobias Burnus  <tburnus@baylibre.com>

	* config/gcn/gcn-hsa.h (gcn_local_sym_hash): Fix typo.

2024-05-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115252
	* tree-vect-stmts.cc (get_group_load_store_type): Enhance
	detecting the number of cases where we can avoid accessing a gap
	during code generation.
	(vectorizable_load): Remove old half-vector peeling for gap
	avoidance which is now redundant.  Add gap-aligned case where
	it's OK to access the gap.  Add assert that we have peeling for
	gaps enabled when we access a gap.

2024-05-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114435
	* tree-predcom.cc (tree_predictive_commoning): Queue
	the next scalar cleanup sub-pipeline to be run when we
	did something.

2024-05-29  Hongyu Wang  <hongyu.wang@intel.com>

	PR target/113719
	* config/i386/i386-options.cc (ix86_override_options_after_change):
	Remove call to ix86_default_align and
	ix86_recompute_optlev_based_flags.
	(ix86_option_override_internal): Call ix86_default_align and
	ix86_recompute_optlev_based_flags.

2024-05-29  liuhongt  <hongtao.liu@intel.com>

	* config/i386/i386.cc (ix86_avoid_jump_mispredicts): Change
	gen_pad to gen_max_skip_align.
	(ix86_align_loops): New function.
	(ix86_reorg): Call ix86_align_loops.
	* config/i386/i386.md (pad): Rename to ..
	(max_skip_align): .. this, and accept 2 operands for align and
	skip.

2024-05-29  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/x86-tune-costs.h (generic_cost): Change from
	16:11:8 to 16.

2024-05-29  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-gori.cc (gori_on_edge): Always use static ranges
	from the specified range_query.
	* gimple-range-gori.h (gori_on_edge): Change prototype.
	* gimple-range.cc (dom_ranger::maybe_push_edge): Change arguments
	to call.

2024-05-29  Kewen Lin  <linkw@linux.ibm.com>

	PR target/114846
	* config/rs6000/rs6000-logue.cc (rs6000_emit_epilogue): As
	EPILOGUE_TYPE_EH_RETURN would be passed as epilogue_type directly
	now, adjust the relevant handlings on it.
	* config/rs6000/rs6000.md (eh_return expander): Append by calling
	gen_eh_return_internal and emit_barrier.
	(eh_return_internal): New define_insn_and_split, call function
	rs6000_emit_epilogue with epilogue type EPILOGUE_TYPE_EH_RETURN.

2024-05-28  liuhongt  <hongtao.liu@intel.com>

	PR target/67325
	* config/i386/i386.cc (ix86_rtx_costs): Reduce cost of MEM (A
	+ imm) to "cost of MEM (A)" + 1.

2024-05-28  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range.cc (dom_ranger::dom_ranger): Do not initialize m_out.
	(dom_ranger::maybe_push_edge): Use gori () rather than m_out.
	* gimple-range.h (dom_ranger::m_out): Remove.
	* tree-vrp.cc (remove_unreachable::remove_unreachable): Use a
	range-query ranther than a gimple_ranger.
	(remove_unreachable::remove): New.
	(remove_unreachable::m_ranger): Change to a range_query.
	(remove_unreachable::handle_early): If there is no dependency
	information, do nothing.
	(remove_unreachable::remove_and_update_globals): Do not update
	globals if there is no dependecy info to use.

2024-05-28  Hans-Peter Nilsson  <hp@axis.com>

	* resource.cc (free_resource_info, clear_hashed_info_for_insn): Don't
	check for non-null target_hash_table and bb_ticks.
	(mark_target_live_regs): Ditto.  Replace check for non-NULL result from
	BLOCK_FOR_INSN with a call to gcc_assert.  Fold code conditioned on
	tinfo != NULL.

2024-05-28  Hans-Peter Nilsson  <hp@axis.com>

	* resource.cc (mark_target_live_regs): Remove redundant check for b
	being -1, after gcc_assert.

2024-05-28  Hans-Peter Nilsson  <hp@axis.com>

	* resource.cc: Include cfgrtl.h.  Use BLOCK_FOR_INSN (insn)->index
	instead of calling find_basic_block (insn).  Assert for not -1.
	(find_basic_block): Remove function.
	(init_resource_info): Call compute_bb_for_insn.
	(free_resource_info): Call free_bb_for_insn.

2024-05-28  Hans-Peter Nilsson  <hp@axis.com>

	PR rtl-optimization/115182
	* resource.cc (mark_target_live_regs): Don't look for
	unconditional branches after the target to improve on the
	register liveness.
	(find_dead_or_set_registers): Remove unused function.

2024-05-28  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/sync.md (atomic_loaddi_fpu): Use movd/pextrd
	to move DImode value from XMM to GPR for TARGET_SSE4_1.
	(atomic_storedi_fpu): Use movd/pinsrd to move DImode value
	from GPR to XMM for TARGET_SSE4_1.

2024-05-28  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-color.cc: Define INCLUDE_VECTOR.
	Include "label-text.h" and "selftest.h".
	(struct color_cap): Replace with...
	(struct color_default): ...this, adding "m_" prefixes to fields
	and dropping "name_len" and "free_val" field.
	(color_dict): Convert to...
	(gcc_color_defaults): ...this, making const, dropping the trailing
	strlen and "false" from each entry.
	(class diagnostic_color_dict): New.
	(g_color_dict): New.
	(colorize_start): Reimplement in terms of g_color_dict.
	(diagnostic_color_dict::get_entry_by_name): New, based on
	colorize_start.
	(diagnostic_color_dict::get_start_by_name): Likewise.
	(diagnostic_color_dict::diagnostic_color_dict): New.
	(parse_gcc_colors): Reimplement, moving body...
	(diagnostic_color_dict::parse_envvar_value): ...here.
	(colorize_init): Lazily create g_color_dict.
	(selftest::test_empty_color_dict): New.
	(selftest::test_default_color_dict): New.
	(selftest::test_color_dict_envvar_parsing): New.
	(selftest::diagnostic_color_cc_tests): New.
	* selftest-run-tests.cc (selftest::run_tests): Call
	selftest::diagnostic_color_cc_tests.
	* selftest.h (selftest::diagnostic_color_cc_tests): New decl.

2024-05-28  David Malcolm  <dmalcolm@redhat.com>

	* function-tests.cc: Include "selftest-tree.h".
	* selftest-tree.h: New file.
	* selftest.h (make_fndecl): Move to selftest-tree.h.

2024-05-28  David Malcolm  <dmalcolm@redhat.com>

	* config/v850/v850.opt.urls: Regenerate, with fix.
	* config/vax/vax.opt.urls: Likewise.
	* regenerate-opt-urls.py (TARGET_SPECIFIC_PAGES): Fix transposed
	values for "vax" and "v850".

2024-05-28  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/115221
	* gimple-range-fold.cc (range_of_ssa_name_with_loop_info): Do
	not invoke SCEV is range_query's do not match.

2024-05-28  Andrew MacLeod  <amacleod@redhat.com>

	* tree-ssa-strlen.cc (strlen_pass::strlen_pass): Add function
	pointer and initialize ptr_qry with current range_query.
	(strlen_pass::m_ranger): Remove.
	(printf_strlen_execute): Enable and disable ranger.

2024-05-28  David Malcolm  <dmalcolm@redhat.com>

	PR analyzer/115203
	* diagnostic-path.h
	(simple_diagnostic_path::disable_event_localization): New.
	(simple_diagnostic_path::m_localize_events): New field.
	* diagnostic.cc
	(simple_diagnostic_path::simple_diagnostic_path): Initialize
	m_localize_events.
	(simple_diagnostic_path::add_event): Only localize fmt if
	m_localize_events is true.
	* tree-diagnostic-path.cc
	(test_diagnostic_path::test_diagnostic_path): Call
	disable_event_localization.

2024-05-28  David Malcolm  <dmalcolm@redhat.com>

	PR bootstrap/115167
	* Makefile.in (C_COMMON_OBJS): Add c-family/c-type-mismatch.o.
	* gcc-rich-location.cc
	(maybe_range_label_for_tree_type_mismatch::get_text): Move to
	c-family/c-type-mismatch.cc.
	(binary_op_rich_location::binary_op_rich_location): Likewise.
	(binary_op_rich_location::use_operator_loc_p): Likewise.
	* gcc-rich-location.h (class range_label_for_type_mismatch):
	Likewise.
	(class maybe_range_label_for_tree_type_mismatch): Likewise.
	(class op_location_t): Likewise for forward decl.
	(class binary_op_rich_location): Likewise.

2024-05-28  Lyut Nersisyan  <lyut.nersisyan@gmail.com>

	* config/riscv/crypto.md: Add new combiner patterns to generate
	pack, packh, packw instrutions.
	* config/riscv/iterators.md (HX): New iterator for half X mode.
	* config/riscv/riscv.md (<optab>_shift_reverse<X:mode>): Tighten
	cases to avoid.  Do not lose bits for XOR/IOR.

2024-05-28  Feng Xue  <fxue@os.amperecomputing.com>

	PR tree-optimization/115060
	* tree-vect-patterns.cc (vect_get_internal_def): Return statement for
	vectorization.
	(vect_widened_op_tree): Call vect_get_internal_def instead of look_def
	to get statement information.
	(vect_recog_widen_abd_pattern): No need to call vect_stmt_to_vectorize.

2024-05-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115236
	* tree-ssa-structalias.cc (build_pred_graph): Properly
	handle *ANYTHING = X.
	(build_succ_graph): Likewise.  Do not elide direct nodes
	from receiving from STOREDANYTHING.

2024-05-28  Richard Biener  <rguenther@suse.de>

	* tree-ssa-structalias.cc (find_func_aliases): Use
	get_constraint_for_address_of to build escape constraints
	for asm inputs and outputs.

2024-05-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115254
	* tree-vect-slp.cc (vect_build_slp_tree): Only account
	multi-lane SLP to limit.

2024-05-28  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (get_initial_defs_for_reduction): Convert
	neutral op to the vector component type.

2024-05-28  liuhongt  <hongtao.liu@intel.com>

	* config/i386/sse.md
	(<avx512>_<complexopname>_<mode>_mask<round_name>): Align
	operands' predicate with corresponding expander.
	(<avx512>_<complexopname>_<mode><maskc_name><round_name>):
	Ditto.

2024-05-28  Xi Ruoyao  <xry111@xry111.site>

	PR target/115169
	* config/loongarch/loongarch.cc
	(loongarch_expand_conditional_move): Guard REGNO with REG_P.

2024-05-27  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/115238
	* generic-match-head.cc (bitwise_inverted_equal_p): Use
	uniform_integer_cst_p instead of checking INTEGER_CST.
	* gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Likewise.

2024-05-27  Gaius Mulley  <gaiusmod2@gmail.com>

	* doc/gm2.texi: Replace all occurrences of xref
	{foo, , , gm2} with xref {foo}.

2024-05-27  Richard Biener  <rguenther@suse.de>

	* tree-ssa-structalias.cc (scc_visit): Mark the node we
	collapse to as being in a component.

2024-05-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115220
	PR tree-optimization/115226
	* tree-ssa-sink.cc (statement_sink_location): When ignoring
	paths to kills when sinking stores make sure the final
	sink location is still post-dominated by the original one.
	Otherwise we'd need to insert a PHI node to merge virtual operands.

2024-05-27  TheShermanTanker  <tanksherman27@gmail.com>

	* config/mingw/mingw32.h: Add new define for POSIX
	threads.

2024-05-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115232
	* gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle
	failure to demangle gracefully.

2024-05-27  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/gm2.texi (What is GNU Modula-2): Move gcc.gnu.org links to
	https.
	(Other languages): Ditto. And fix casing of GCC.

2024-05-27  Liao Shihua  <shihua@iscas.ac.cn>

	* config/riscv/riscv.cc (riscv_rtx_costs): Add TARGET_ZMMUL.

2024-05-27  Maciej W. Rozycki  <macro@orcam.me.uk>

	* doc/invoke.texi (Option Summary): Add `-md', `-md-float', and
	`-mg-float' options.  Reorder, matching VAX Options.
	(VAX Options): Reword the description of `-mg' option.  Add
	`-md', `-md-float', and `-mg-float' options.

2024-05-27  Abe Skolnik  <abe_skolnik@yahoo.com>

	PR target/79646
	* config/vax/vax.opt (md, md-float, mg, mg-float): Correct
	descriptions.

2024-05-27  Lyut Nersisyan  <lyut.nersisyan@gmail.com>

	* config/riscv/riscv.md (<optab>_shift_reverse<X:mode>): New pattern.

2024-05-27  Levy Hsu  <admin@levyhsu.com>
	    H.J. Lu  <hjl.tools@gmail.com>

	PR target/115146
	* config/i386/i386-expand.cc (expand_vec_perm_psrlw_psllw_por): Replace arithmatic shift
	gen_ashrv4hi3 with logic shift gen_lshrv4hi3.
	Replace gen_vlshrv8hi3 with gen_lshrv8hi3 and gen_vashlv8hi3 with gen_ashlv8hi3.

2024-05-27  Pan Li  <pan2.li@intel.com>

	* genmatch.cc (dt_node::gen_kids_1): Fix indenet mis-aligned.

2024-05-26  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_build_integer_one): Verify there
	are no bits left to set in the constant when generating bseti.
	(riscv_built_integer): Synthesize ~value and if it's cheap use it
	with a trailing xori with -1.

2024-05-26  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/extend.texi (Attribute Syntax): Use @samp{=} instead of @code{=}.
	(Extended Asm): Ditto.

2024-05-26  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_build_integer_1): Try generating
	a nearby simpler constant, then using a final addi to set low
	bits properly.

2024-05-26  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/115208
	* value-query.cc (range_query::create_gori): Confirm gori_map is NULL.
	(range_query::destroy_gori): Free gori_map if one was allocated.

2024-05-25  Jeff Law  <jlaw@ventanamicro.com>

	* simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Handle
	more logical simplifications.

2024-05-24  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/predicates.md (arith_operand_or_mode_mask): Renamed to..
	(arith_or_mode_mask_or_zbs_operand): New predicate.
	* config/riscv/riscv.md (and<mode>3): Update predicate for operand 2.
	* config/riscv/riscv.cc (riscv_build_integer_1): Use bclri to clear
	bits, particularly bits 31..63 when profitable to do so.

2024-05-24  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/115192
	* tree-data-ref.cc (create_intersect_range_checks): Take the
	alignment of the access sizes into account.

2024-05-24  Gaius Mulley  <gaiusmod2@gmail.com>

	* doc/gm2.texi: Replace all occurrences of xref {, , , gm2}
	with xref {, , , m2}.

2024-05-24  Manolis Tsamis  <manolis.tsamis@vrull.eu>

	* match.pd: Allow no-op view_convert between permutes.

2024-05-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115144
	* tree-ssa-sink.cc (do_not_sink): New function, split out
	from ...
	(select_best_block): Here.  First pick valid block to
	sink to.  From that search for the best valid block,
	avoiding sinking across conditions to exceptional code.
	(sink_code_in_bb): When updating vuses of stores in
	paths we do not sink a store to make sure we didn't
	pick a dominating sink location.

2024-05-24  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-phiprop.cc (phiprop_insert_phi): Add
	dce_ssa_names argument. Add the phi's result to it.
	(propagate_with_phi): Add dce_ssa_names argument.
	Update call to phiprop_insert_phi.
	(pass_phiprop::execute): Update call to propagate_with_phi.
	Call simple_dce_from_worklist if there was a change.

2024-05-24  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_build_slp_instance): Do not split
	store dataref groups on loop SLP discovery failure but create
	a single SLP instance for the stores but branch to SLP sub-trees
	and merge with a series of VEC_PERM nodes.

2024-05-23  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-edge.h (range_query::condexpr_adjust): Delete.
	* gimple-range-fold.cc (fold_using_range::range_of_range_op): Use
	gori_ssa routine.
	(fold_using_range::range_of_address): Likewise.
	(fold_using_range::range_of_phi): Likewise.
	(fold_using_range::condexpr_adjust): Relocated from gori_compute.
	(fold_using_range::range_of_cond_expr): Use local condexpr_adjust.
	(fur_source::register_outgoing_edges): Use gori_ssa routine.
	* gimple-range-fold.h (gori_ssa): Rename from gori_bb.
	(fold_using_range::condexpr_adjust): Add prototype.
	* gimple-range-gori.cc (gori_compute::condexpr_adjust): Relocate.
	* gimple-range-gori.h (gori_compute::condexpr_adjust): Delete.

2024-05-23  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ranger_cache::ranger_cache): Use gori_ssa.
	(ranger_cache::dump): Likewise.
	(ranger_cache::get_global_range): Likewise.
	(ranger_cache::set_global_range): Likewise.
	(ranger_cache::register_inferred_value): Likewise.
	* gimple-range-edge.h (gimple_outgoing_range::map): Remove.
	* gimple-range-fold.cc (fold_using_range::range_of_range_op): Use
	gori_ssa.
	(fold_using_range::range_of_address): Likewise.
	(fold_using_range::range_of_phi): Likewise.
	(fur_source::register_outgoing_edges): Likewise.
	* gimple-range-fold.h (fur_source::query): Make const.
	(gori_ssa): New.
	* gimple-range-gori.cc (gori_map::dump): Use 'this' pointer.
	(gori_compute::gori_compute): Construct with a gori_map.
	* gimple-range-gori.h (gori_compute:gori_compute): Change
	prototype.
	(gori_compute::map): Delete.
	(gori_compute::m_map): Change to a reference.
	(FOR_EACH_GORI_IMPORT_NAME): Change parameter gori to gorimap.
	(FOR_EACH_GORI_EXPORT_NAME): Likewise.
	* gimple-range-path.cc (path_range_query::compute_ranges_in_block):
	Use gori_ssa method.
	(path_range_query::compute_exit_dependencies): Likewise.
	* gimple-range.cc (gimple_ranger::range_of_stmt): Likewise.
	(gimple_ranger::register_transitive_inferred_ranges): Likewise.
	* tree-ssa-dom.cc (set_global_ranges_from_unreachable_edges):
	Likewise.
	* tree-ssa-threadedge.cc (compute_exit_dependencies): Likewise.
	* tree-vrp.cc (remove_unreachable::handle_early): Likewise.
	(remove_unreachable::remove_and_update_globals): Likewise.
	* value-query.cc (range_query::create_gori): Create gori map.
	(range_query::share_query): Copy gori map member.
	(range_query::range_query): Initiialize gori_map member.
	* value-query.h (range_query::gori_ssa): New.
	(range_query::m_map): New.

2024-05-23  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ranger_cache::ranger_cache): Create
	GORi via the range_query instead of a local member.
	(ranger_cache::dump_bb): Use gori via from the range_query parent.
	(ranger_cache::get_global_range): Likewise.
	(ranger_cache::set_global_range): Likewise.
	(ranger_cache::edge_range): Likewise.
	(anger_cache::block_range): Likewise.
	(ranger_cache::fill_block_cache): Likewise.
	(ranger_cache::range_from_dom): Likewise.
	(ranger_cache::register_inferred_value): Likewise.
	* gimple-range-cache.h (ranger_cache::m_gori): Delete.
	* gimple-range-fold.cc (fur_source::fur_source): Set m_depend_p.
	(fur_depend::fur_depend): Remove gori parameter.
	* gimple-range-fold.h (fur_source::gori): Adjust.
	(fur_source::m_gori): Delete.
	(fur_source::m_depend): New.
	(fur_depend::fur_depend): Adjust prototype.
	* gimple-range-path.cc (path_range_query::path_range_query): Share
	ranger oracles.
	(path_range_query::range_defined_in_block): Use oracle directly.
	(path_range_query::compute_ranges_in_block): Use new gori() method.
	(path_range_query::adjust_for_non_null_uses): Use oracle directly.
	(path_range_query::compute_exit_dependencies): Likewise.
	(jt_fur_source::jt_fur_source): No gori in the parameters.
	(path_range_query::range_of_stmt): Likewise.
	(path_range_query::compute_outgoing_relations): Likewise.
	* gimple-range.cc (gimple_ranger::fold_range_internal): Likewise.
	(gimple_ranger::range_of_stmt): Access gori via gori () method.
	(assume_query::range_of_expr): Create a gori object.
	(assume_query::~assume_query): Destroy a gori object.
	(assume_query::calculate_op): Remove old gori() accessor.
	* gimple-range.h (gimple_ranger::gori): Delete.
	(assume_query::~assume_query): New.
	(assume_query::m_gori): Delete.
	* tree-ssa-dom.cc (set_global_ranges_from_unreachable_edges): use
	gori () method.
	* tree-ssa-threadedge.cc (compute_exit_dependencies): Likewise.
	* value-query.cc (default_gori): New.
	(range_query::create_gori): New.
	(range_query::destroy_gori): New.
	(range_query::share_oracles): Set m_gori.
	(range_query::range_query): Set m_gori to default.
	(range_query::~range_query): call destroy gori.
	* value-query.h (range_query): Adjust prototypes
	(range_query::m_gori): New.

2024-05-23  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ranger_cache::ranger_cache): Adjust
	m_gori constructor.
	(ranger_cache::edge_range): Use renamed edge_range_p name.
	(ranger_cache::range_from_dom): Likewise.
	* gimple-range-edge.h (gimple_outgoing_range::condexpr_adjust): New.
	(gimple_outgoing_range::has_edge_range_p): New.
	(gimple_outgoing_range::dump): New.
	(gimple_outgoing_range::compute_operand_range): New.
	(gimple_outgoing_range::map): New.
	* gimple-range-fold.cc (fur_source::register_outgoing_edges ): Use
	renamed edge_range_p routine
	* gimple-range-gori.cc (gori_compute::gori_compute): Adjust
	constructor.
	(gori_compute::~gori_compute): New.
	(gori_compute::edge_range_p): Rename from outgoing_edge_range_p
	and use inherited routine instead of member method.
	* gimple-range-gori.h (class gori_compute): Inherit from
	gimple_outgoing_range, adjust protoypes.
	(gori_compute::outgpoing): Delete.
	* gimple-range-path.cc (path_range_query::compute_ranges_in_block): Use
	renamed edge_range_p routine.
	* tree-ssa-loop-unswitch.cc (evaluate_control_stmt_using_entry_checks):
	Likewise.

2024-05-23  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ranger_cache::ranger_cache): Access
	gori_map via member call.
	(ranger_cache::dump_bb): Likewise.
	(ranger_cache::get_global_range): Likewise.
	(ranger_cache::set_global_range): Likewise.
	(ranger_cache::register_inferred_value): Likewise.
	* gimple-range-fold.cc (fold_using_range::range_of_range_op): Likewise.
	(fold_using_range::range_of_address): Likewise.
	(fold_using_range::range_of_phi): Likewise.
	* gimple-range-gori.cc (gori_compute::compute_operand_range_switch):
	likewise.
	(gori_compute::compute_operand_range): Likewise.
	(gori_compute::compute_logical_operands): Likewise.
	(gori_compute::refine_using_relation): Likewise.
	(gori_compute::compute_operand1_and_operand2_range): Likewise.
	(gori_compute::may_recompute_p): Likewise.
	(gori_compute::has_edge_range_p): Likewise.
	(gori_compute::outgoing_edge_range_p): Likewise.
	(gori_compute::condexpr_adjust): Likewise.
	* gimple-range-gori.h (class gori_compute): Do not inherit from
	gori_map.
	(gori_compute::m_map): New.
	* gimple-range-path.cc (gimple-range-path.cc): Use gori_map member.
	(path_range_query::compute_exit_dependencies): Likewise.
	* gimple-range.cc (gimple_ranger::range_of_stmt): Likewise.
	(gimple_ranger::register_transitive_inferred_ranges): Likewise.
	* tree-ssa-dom.cc (set_global_ranges_from_unreachable_edges): Likewise.
	* tree-ssa-threadedge.cc (compute_exit_dependencies): Likewise.
	* tree-vrp.cc (remove_unreachable::handle_early): Likewise.
	(remove_unreachable::remove_and_update_globals): Likewise.

2024-05-23  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-edge.cc (gimple_outgoing_range::gimple_outgoing_range):
	Do not allocate a range allocator at construction time.
	(gimple_outgoing_range::~gimple_outgoing_range): Delete allocator
	if one was allocated.
	(gimple_outgoing_range::set_switch_limit): New.
	(gimple_outgoing_range::switch_edge_range): Create an allocator if one
	does not exist.
	(gimple_outgoing_range::edge_range_p): Check for zero edges.
	* gimple-range-edge.h (class gimple_outgoing_range): Adjust prototypes.

2024-05-23  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/113879
	* gimple-range-fold.cc (op1_range): New.
	(op2_range): New.
	* gimple-range-fold.h (op1_range): New prototypes.
	(op2_range): New prototypes.
	* gimple-range-infer.cc (gimple_infer_range::add_range): Do not
	add an inferred range if it is VARYING.
	(gimple_infer_range::gimple_infer_range): Add inferred ranges
	for any range-op statements if requested.
	* gimple-range-infer.h (gimple_infer_range): Add parameter.

2024-05-23  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ranger_cache::ranger_cache): Create an infer
	oracle instead of a local member.
	(ranger_cache::~ranger_cache): Destroy the oracle.
	(ranger_cache::edge_range): Use oracle.
	(ranger_cache::fill_block_cache): Likewise.
	(ranger_cache::range_from_dom): Likewise.
	(ranger_cache::apply_inferred_ranges): Likewise.
	* gimple-range-cache.h (ranger_cache::m_exit): Delete.
	* gimple-range-infer.cc (infer_oracle): New static object;
	(class infer_oracle): New.
	(non_null_wrapper::non_null_wrapper): New.
	(non_null_wrapper::add_nonzero): New.
	(non_null_wrapper::add_range): New.
	(non_null_loadstore): Use nonnull_wrapper.
	(gimple_infer_range::gimple_infer_range): New alternate constructor.
	(exit_range::stmt): New.
	(infer_range_manager::has_range_p): Combine seperate methods.
	(infer_range_manager::maybe_adjust_range): Adjust has_range_p call.
	(infer_range_manager::add_ranges): New.
	(infer_range_manager::add_range): Take stmt rather than BB.
	(infer_range_manager::add_nonzero): Adjust from BB to stmt.
	* gimple-range-infer.h (class gimple_infer_range): Adjust methods.
	(infer_range_oracle): New.
	(class infer_range_manager): Inherit from infer_range_oracle.
	Adjust methods.
	* gimple-range-path.cc (path_range_query::range_defined_in_block): Use
	oracle.
	(path_range_query::adjust_for_non_null_uses): Likewise.
	* gimple-range.cc (gimple_ranger::range_on_edge): Likewise
	(gimple_ranger::register_transitive_inferred_ranges): Likewise.
	* value-query.cc (default_infer_oracle): New.
	(range_query::create_infer_oracle): New.
	(range_query::destroy_infer_oracle): New.
	(range_query::share_query): Copy infer pointer.
	(range_query::range_query): Initialize infer pointer.
	(range_query::~range_query): destroy infer object.
	* value-query.h (range_query::infer_oracle): New.
	(range_query::create_infer_oracle): New prototype.
	(range_query::destroy_infer_oracle): New prototype.
	(range_query::m_infer): New.

2024-05-23  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range.cc (gimple_ranger::gimple_ranger): Share the
	components from ranger_cache.
	(gimple_ranger::~gimple_ranger): Don't clear pointer.
	* value-query.cc (range_query::share_query): New.
	(range_query::range_query): Clear shared component flag.
	(range_query::~range_query): Don't free shared component copies.
	* value-query.h (share_query): New prototype.
	(m_shared_copy_p): New member.

2024-05-23  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ranger_cache::dump_bb): Use m_relation.
	(ranger_cache::fill_block_cache): Likewise
	* gimple-range-fold.cc (fur_stmt::get_phi_operand): Use new names.
	(fur_depend::register_relation): Likewise.
	(fold_using_range::range_of_phi): Likewise.
	* gimple-range-path.cc (path_range_query::path_range_query): Likewise.
	(path_range_query::~path_range_query): Likewise.
	(ath_range_query::compute_ranges): Likewise.
	(jt_fur_source::register_relation): Likewise.
	(jt_fur_source::query_relation): Likewise.
	(path_range_query::maybe_register_phi_relation): Likewise.
	* gimple-range-path.h (get_path_oracle): Likewise.
	* gimple-range.cc (gimple_ranger::gimple_ranger): Likewise.
	(gimple_ranger::~gimple_ranger): Likewise.
	* value-query.cc (range_query::create_relation_oracle): Likewise.
	(range_query::destroy_relation_oracle): Likewise.
	(range_query::share_oracles): Likewise.
	(range_query::range_query): Likewise.
	* value-query.h (value_query::relation): Rename from oracle.
	(m_relation): Rename from m_oracle.
	* value-relation.cc (relation_oracle::query): Rename from
	query_relation.
	(equiv_oracle::query): Likewise.
	(equiv_oracle::record): Rename from register_relation.
	(relation_oracle::record): Likewise.
	(dom_oracle::record): Likewise.
	(dom_oracle::query): Rename from query_relation.
	(path_oracle::record): Rename from register_relation.
	(path_oracle::query): Rename from query_relation.
	* value-relation.h (*::record): Rename from register_relation.
	(*::query): Rename from query_relation.

2024-05-23  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ranger_cache::dump_bb): Remove check for
	NULL oracle pointer.
	(ranger_cache::fill_block_cache): Likewise.
	* gimple-range-fold.cc (fur_stmt::get_phi_operand): Likewise.
	(fur_depend::fur_depend): Likewise.
	(fur_depend::register_relation): Likewise, use qury_relation.
	(fold_using_range::range_of_phi): Likewise.
	(fold_using_range::relation_fold_and_or): Likewise.
	* gimple-range-fold.h (fur_source::m_oracle): Delete.  Oracle
	can be accessed dirctly via m_query now.
	* gimple-range-path.cc (path_range_query::path_range_query):
	Adjust for oracle reference pointer.
	(path_range_query::compute_ranges): Likewise.
	(jt_fur_source::jt_fur_source): Adjust for no m_oracle member.
	(jt_fur_source::register_relation): Do not check for NULL
	pointer.
	(jt_fur_source::query_relation): Likewise.
	* gimple-range.cc (gimple_ranger::gimple_ranger):  Adjust for
	reference pointer.
	* value-query.cc (default_relation_oracle): New.
	(range_query::create_relation_oracle): Relocate from header.
	Ensure not being added to global query.
	(range_query::destroy_relation_oracle): Relocate from header.
	(range_query::range_query): Initailize to default oracle.
	(ange_query::~range_query): Call destroy_relation_oracle.
	* value-query.h (class range_query): Adjust prototypes.
	(range_query::create_relation_oracle): Move to source file.
	(range_query::destroy_relation_oracle): Move to source file.
	* value-relation.cc (relation_oracle::validate_relation): Delete.
	(relation_oracle::register_stmt): Rename to register_relation.
	(relation_oracle::register_edge): Likewise.
	* value-relation.h (register_stmt): Rename to register_relation and
	provide default function in base class.
	(register_edge): Likewise.
	(relation_oracle::validate_relation): Delete.
	(relation_oracle::query_relation): Provide default in base class.
	(relation_oracle::dump): Likewise.
	(relation_oracle::equiv_set): Likewise.
	(default_relation_oracle): New extenal reference.
	(partial_equiv_set, add_partial_equiv): Move to protected.

2024-05-23  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ranger_cache::ranger_cache): Call
	create_relation_oracle.
	(ranger_cache::~ranger_cache): Call destroy_relation_oracle.
	* gimple-range-fold.cc (fur_stmt::get_phi_operand): Check for
	relation oracle bnefore calling query_relation.
	(fold_using_range::range_of_phi): Likewise.
	* gimple-range-path.cc (path_range_query::~path_range_query): Set
	relation oracle pointer to NULL when done.
	* gimple-range.cc (gimple_ranger::~gimple_ranger): Likewise.
	* value-query.cc (range_query::~range_query): Ensure any
	relation oracle is destroyed.
	(range_query::query_relation): relocate to relation_oracle object.
	* value-query.h (class range_query): Adjust method proototypes.
	(range_query::create_relation_oracle): New.
	(range_query::destroy_relation_oracle): New.
	* value-relation.cc (relation_oracle::query_relation): Relocate
	from range query class.
	* value-relation.h (Call relation_oracle): New prototypes.

2024-05-23  Pan Li  <pan2.li@intel.com>

	* generic-match-head.cc (types_match): Add overloaded types_match
	for 3 types.
	* gimple-match-head.cc (types_match): Ditto.
	* match.pd: Leverage overloaded types_match.

2024-05-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115197
	* tree-loop-distribution.cc (copy_loop_before): Constant PHI
	args remain the same.

2024-05-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115199
	* tree-ssa-structalias.cc (process_constraint): Also
	record &ANYTHING = X as *ANYTING = X in the end.

2024-05-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115138
	* tree-ssa-alias.cc (ptrs_compare_unequal): Make sure
	pt.vars_contains_nonlocal differs since we do not represent
	FUNCTION_DECLs or LABEL_DECLs in vars explicitly.

2024-05-23  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	PR target/109549
	* config/s390/s390.cc (TARGET_NOCE_CONVERSION_PROFITABLE_P):
	Define.
	(s390_noce_conversion_profitable_p): Implement.

2024-05-23  Aldy Hernandez  <aldyh@redhat.com>

	PR tree-optimization/115191
	* tree-ssa-phiopt.cc (value_replacement): Use Value_Range instead
	of int_range_max.

2024-05-23  Andrew Pinski  <quic_apinski@quicinc.com>
	    Joel Jones  <quic_joeljone@quicinc.com>
	    Wei Zhao  <quic_wezhao@quicinc.com>

	* config/aarch64/aarch64-cores.def (oryon-1): New entry.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* doc/invoke.texi  (AArch64 Options): Document oryon-1.

2024-05-22  Pengxuan Zheng  <quic_pzheng@quicinc.com>

	PR target/102171
	* config/aarch64/aarch64-builtins.cc (AARCH64_SIMD_VGET_HIGH_BUILTINS):
	New macro to create definitions for all vget_high intrinsics.
	(VGET_HIGH_BUILTIN): Likewise.
	(enum aarch64_builtins): Add vget_high function codes.
	(AARCH64_SIMD_VGET_LOW_BUILTINS): Delete duplicate macro.
	(aarch64_general_fold_builtin): Fold vget_high calls.
	* config/aarch64/aarch64-simd-builtins.def: Delete vget_high builtins.
	* config/aarch64/aarch64-simd.md (aarch64_get_high<mode>): Delete.
	(aarch64_vget_hi_halfv8bf): Likewise.
	* config/aarch64/arm_neon.h (__attribute__): Delete.
	(vget_high_f16): Likewise.
	(vget_high_f32): Likewise.
	(vget_high_f64): Likewise.
	(vget_high_p8): Likewise.
	(vget_high_p16): Likewise.
	(vget_high_p64): Likewise.
	(vget_high_s8): Likewise.
	(vget_high_s16): Likewise.
	(vget_high_s32): Likewise.
	(vget_high_s64): Likewise.
	(vget_high_u8): Likewise.
	(vget_high_u16): Likewise.
	(vget_high_u32): Likewise.
	(vget_high_u64): Likewise.
	(vget_high_bf16): Likewise.

2024-05-22  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/115038
	* fold-mem-offsets.cc (fold_offsets): Return 0 if the defining
	instruction of the register is frame related.

2024-05-22  Roger Sayle  <roger@nextmovesoftware.com>

	* config/i386/i386.cc (ix86_rtx_costs) <case CONST_INT>:
	A CONST_INT that isn't x86_64_immediate_operand requires an extra
	(expensive) movabsq insn to load, so return COSTS_N_INSNS (1) + 1.

2024-05-22  Roger Sayle  <roger@nextmovesoftware.com>

	* except.cc (output_function_exception_table): Move call to
	get_personality_function after targetm_common.except_unwind_info
	check, to avoid ICE on targets that don't support exceptions.

2024-05-22  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (change_vec_perm_layout): Ignore an
	input partition of -1.

2024-05-22  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_schedule_slp_node): Avoid looking
	at SLP_REPRESENTATIVE for VEC_PERM nodes.

2024-05-22  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (vect_check_store_rhs): Look at *rhs
	only when it's a vec_constant_def.
	(vect_is_simple_use): When we have no representative for
	an internal node, fill in *op with error_mark_node.

2024-05-22  Richard Biener  <rguenther@suse.de>

	* doc/invoke.texi (C++ Modules): Fix typo.

2024-05-22  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/115152
	* tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes_addr): If
	!si->full_string_p, clear *nulterm and set maxlen to nbytes.

2024-05-22  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/115172
	* ubsan.cc (instrument_bool_enum_load): If rhs is not in generic
	address space, use qualified version of utype with the right
	address space.  Formatting fix.

2024-05-22  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/115069
	* config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
	Do not enable the optimization when AVX512BW is not enabled.

2024-05-21  Vineet Gupta  <vineetg@rivosinc.com>

	* config/riscv/riscv.cc (riscv_expand_epilogue): Handle offset
	being sum of two S12.

2024-05-21  Vineet Gupta  <vineetg@rivosinc.com>

	PR target/105733
	* config/riscv/riscv.h: New macros for with aligned offsets.
	* config/riscv/riscv.cc (riscv_split_sum_of_two_s12): New
	function to split a sum of two s12 values into constituents.
	(riscv_expand_prologue): Handle offset being sum of two S12.
	(riscv_expand_epilogue): Ditto.
	* config/riscv/riscv-protos.h (riscv_split_sum_of_two_s12): New.

2024-05-21  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/115154
	* match.pd (convert (mult zero_one_valued_p@1 INTEGER_CST@2)): Disable
	for 1bit signed types.

2024-05-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115137
	* tree-ssa-structalias.cc (pt_solution_includes_const_pool): NONLOCAL
	also includes constant pool entries.

2024-05-21  Richard Sandiford  <richard.sandiford@arm.com>

	* hard-reg-set.h (target_hard_regs::x_eh_return_data_regs): New field.
	(eh_return_data_regs): New macro.
	* reginfo.cc (init_reg_sets_1): Initialize x_eh_return_data_regs.
	* df-scan.cc (df_get_exit_block_use_set): Use it.
	* ira-lives.cc (process_out_of_region_eh_regs): Likewise.

2024-05-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/115149
	* tree-ssa-live.cc (virtual_operand_live::get_live_in):
	Explicitly track the first processed edge.

2024-05-21  liuhongt  <hongtao.liu@intel.com>

	PR target/114427
	* config/i386/i386-expand.cc (expand_vec_perm_even_odd_pack):
	Use pblendw instead of pand to clear upper bits.

2024-05-21  Kewen Lin  <linkw@linux.ibm.com>

	* config/rs6000/rs6000.md (@ieee_128bit_vsx_neg<IEEE128>2): Remove
	the use of operands[3].
	(@ieee_128bit_vsx_neg<IEEE128>2): Likewise.
	(*ieee_128bit_vsx_nabs<mode>2): Likewise.

2024-05-21  Kewen Lin  <linkw@linux.ibm.com>

	* config/rs6000/rs6000.md (mode attribute rreg): Remove useless
	entries with modes TF, TD, V4SF and V2DF.

2024-05-21  Kewen Lin  <linkw@linux.ibm.com>

	* config/rs6000/vector.md (define_expand vector_load_<mode>): Remove.
	(vector_store_<mode>): Likewise.

2024-05-21  Kewen Lin  <linkw@linux.ibm.com>

	* config/rs6000/rs6000-call.cc (rs6000_darwin64_record_arg_recurse):
	Clean up TFmode and TDmode check with FLOAT128_2REG_P.

2024-05-21  Kewen Lin  <linkw@linux.ibm.com>

	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Remove
	useless check on TARGET_P8_VECTOR && !TARGET_ALTIVEC and add an
	assertion on !TARGET_VSX if !TARGET_ALTIVEC.

2024-05-21  Kewen Lin  <linkw@linux.ibm.com>

	PR target/114402
	* config/rs6000/rs6000.cc (rs6000_generate_compare): Make IEEE128
	handling without vsx go with libcall.

2024-05-20  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/115143
	* tree-ssa-phiopt.cc (minmax_replacement): Check for empty
	phi nodes for middle bbs for the case where middle bb is not empty.

2024-05-20  Pengxuan Zheng  <quic_pzheng@quicinc.com>

	PR target/102171
	* config/aarch64/aarch64-builtins.cc (AARCH64_SIMD_VGET_LOW_BUILTINS):
	New macro to create definitions for all vget_low intrinsics.
	(VGET_LOW_BUILTIN): Likewise.
	(enum aarch64_builtins): Add vget_low function codes.
	(aarch64_general_fold_builtin): Fold vget_low calls.
	* config/aarch64/aarch64-simd-builtins.def: Delete vget_low builtins.
	* config/aarch64/aarch64-simd.md (aarch64_get_low<mode>): Delete.
	(aarch64_vget_lo_halfv8bf): Likewise.
	* config/aarch64/arm_neon.h (__attribute__): Delete.
	(vget_low_f16): Likewise.
	(vget_low_f32): Likewise.
	(vget_low_f64): Likewise.
	(vget_low_p8): Likewise.
	(vget_low_p16): Likewise.
	(vget_low_p64): Likewise.
	(vget_low_s8): Likewise.
	(vget_low_s16): Likewise.
	(vget_low_s32): Likewise.
	(vget_low_s64): Likewise.
	(vget_low_u8): Likewise.
	(vget_low_u16): Likewise.
	(vget_low_u32): Likewise.
	(vget_low_u64): Likewise.
	(vget_low_bf16): Likewise.

2024-05-20  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	* config/aarch64/aarch64.cc (aarch64_rtx_costs): Improve CTZ costing.

2024-05-20  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	* config/aarch64/aarch64.md (movsi_aarch64): Use '\;' to force
	newline in 2-instruction pattern.
	(movdi_aarch64): Likewise.

2024-05-20  Ajit Kumar Agarwal  <aagarwa1@linux.ibm.com>

	* config/aarch64/aarch64-ldp-fusion.cc: Rename generic parts of code
	to avoid "ldp" and "stp".

2024-05-20  Mark Wielaard  <mark@klomp.org>

	* config/riscv/riscv.opt.urls: Regenerate.
	* config/i386/i386.opt.urls: Likewise.

2024-05-20  Ajit Kumar Agarwal  <aagarwa1@linux.ibm.com>

	* config/aarch64/aarch64-ldp-fusion.cc: Factor out a
	target-independent interface and move it to the head of the file

2024-05-20  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips.cc(mips_option_override):
	Drop mips_lra_flag variable;
	(mips_lra_p): Removed.
	(TARGET_LRA_P): Remove definition here to use the default one.
	* config/mips/mips.md(*mul_acc_si, *mul_acc_si_r3900, *mul_sub_si):
	Drop mips_lra_flag variable.
	* config/mips/mips.opt(-mlra): Removed.
	* config/mips/mips.opt.urls(mlra): Removed.

2024-05-20  Haochen Jiang  <haochen.jiang@intel.com>

	* common/config/i386/cpuinfo.h
	(get_intel_cpu): Remove Xeon Phi cpus.
	(get_available_features): Remove Xeon Phi ISAs.
	* common/config/i386/i386-common.cc
	(OPTION_MASK_ISA_AVX512PF_SET): Removed.
	(OPTION_MASK_ISA_AVX512ER_SET): Ditto.
	(OPTION_MASK_ISA2_AVX5124FMAPS_SET): Ditto.
	(OPTION_MASK_ISA2_AVX5124VNNIW_SET): Ditto.
	(OPTION_MASK_ISA_PREFETCHWT1_SET): Ditto.
	(OPTION_MASK_ISA_AVX512F_UNSET): Remove AVX512PF and AVX512ER.
	(OPTION_MASK_ISA_AVX512PF_UNSET): Removed.
	(OPTION_MASK_ISA_AVX512ER_UNSET): Ditto.
	(OPTION_MASK_ISA2_AVX5124FMAPS_UNSET): Ditto.
	(OPTION_MASK_ISA2_AVX5124VNNIW_UNSET): Ditto.
	(OPTION_MASK_ISA_PREFETCHWT1_UNSET): Ditto.
	(OPTION_MASK_ISA2_AVX512F_UNSET): Remove AVX5124FMAPS and
	AVX5125VNNIW.
	(ix86_handle_option): Remove Xeon Phi options.
	(processor_names): Remove Xeon Phi cpus.
	(processor_alias_table): Ditto.
	* common/config/i386/i386-cpuinfo.h
	(enum processor_types): Ditto.
	(enum processor_features): Remove Xeon Phi ISAs.
	* common/config/i386/i386-isas.h: Ditto.
	* config.gcc: Remove Xeon Phi cpus and ISAs.
	* config/i386/avx5124fmapsintrin.h: Remove intrin support.
	* config/i386/avx5124vnniwintrin.h: Ditto.
	* config/i386/avx512erintrin.h: Ditto.
	* config/i386/avx512pfintrin.h: Ditto.
	* config/i386/cpuid.h (bit_AVX512PF): Removed.
	(bit_AVX512ER): Ditto.
	(bit_PREFETCHWT1): Ditto.
	(bit_AVX5124VNNIW): Ditto.
	(bit_AVX5124FMAPS): Ditto.
	* config/i386/driver-i386.cc
	(host_detect_local_cpu): Remove Xeon Phi.
	* config/i386/i386-builtin-types.def: Remove unused types.
	* config/i386/i386-builtin.def (BDESC): Remove builtins.
	* config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins): Ditto.
	* config/i386/i386-c.cc (ix86_target_macros_internal): Remove Xeon
	Phi cpus and ISAs.
	* config/i386/i386-expand.cc (ix86_expand_builtin): Remove Xeon Phi
	related handlers.
	(ix86_emit_swdivsf): Ditto.
	(ix86_emit_swsqrtsf): Ditto.
	* config/i386/i386-isa.def: Remove Xeon Phi ISAs.
	* config/i386/i386-options.cc (m_KNL): Removed.
	(m_KNM): Ditto.
	(isa2_opts): Remove Xeon Phi ISAs.
	(isa_opts): Ditto.
	(processor_cost_table): Remove Xeon Phi cpus.
	(ix86_valid_target_attribute_inner_p): Remove Xeon Phi ISAs.
	(ix86_option_override_internal): Remove Xeon Phi related handlers.
	* config/i386/i386-rust.cc (ix86_rust_target_cpu_info): Remove Xeon
	Phi ISAs.
	* config/i386/i386.cc (ix86_hard_regno_mode_ok): Remove Xeon Phi
	related handler.
	* config/i386/i386.h (TARGET_EMIT_VZEROUPPER): Removed.
	(enum processor_type): Remove Xeon Phi cpus.
	* config/i386/i386.md (prefetch): Remove PREFETCHWT1.
	(*prefetch_3dnow): Ditto.
	(*prefetch_prefetchwt1): Removed.
	* config/i386/i386.opt: Remove Xeon Phi ISAs.
	* config/i386/immintrin.h: Ditto.
	* config/i386/sse.md (VF1_AVX512ER_128_256): Removed.
	(rsqrt<mode>2): Change iterator from VF1_AVX512ER_128_256 to
	VF1_128_256.
	(GATHER_SCATTER_SF_MEM_MODE): Removed.
	(avx512pf_gatherpf<mode>sf): Ditto.
	(*avx512pf_gatherpf<VI48_512:mode>sf_mask): Ditto.
	(avx512pf_gatherpf<mode>df): Ditto.
	(*avx512pf_gatherpf<VI4_256_8_512:mode>df_mask): Ditto.
	(avx512pf_scatterpf<mode>sf): Ditto.
	(*avx512pf_scatterpf<VI48_512:mode>sf_mask): Ditto.
	(avx512pf_scatterpf<mode>df): Ditto.
	(*avx512pf_scatterpf<VI4_256_8_512:mode>df_mask): Ditto.
	(exp2<mode>2): Ditto.
	(avx512er_exp2<mode><mask_name><round_saeonly_name>): Ditto.
	(<mask_codefor>avx512er_rcp28<mode><mask_name><round_saeonly_name>):
	Ditto.
	(avx512er_vmrcp28<mode><mask_name><round_saeonly_name>): Ditto.
	(<mask_codefor>avx512er_rsqrt28<mode><mask_name><round_saeonly_name>):
	Ditto.
	(avx512er_vmrsqrt28<mode><mask_name><round_saeonly_name>): Ditto.
	(IMOD4): Ditto.
	(imod4_narrow): Ditto.
	(mov<mode>): Ditto.
	(*mov<mode>_internal): Ditto.
	(avx5124fmaddps_4fmaddps): Ditto.
	(avx5124fmaddps_4fmaddps_mask): Ditto.
	(avx5124fmaddps_4fmaddps_maskz): Ditto.
	(avx5124fmaddps_4fmaddss): Ditto.
	(avx5124fmaddps_4fmaddss_mask): Ditto.
	(avx5124fmaddps_4fmaddss_maskz): Ditto.
	(avx5124fmaddps_4fnmaddps): Ditto.
	(avx5124fmaddps_4fnmaddps_mask): Ditto.
	(avx5124fmaddps_4fnmaddps_maskz): Ditto.
	(avx5124fmaddps_4fnmaddss): Ditto.
	(avx5124fmaddps_4fnmaddss_mask): Ditto.
	(avx5124fmaddps_4fnmaddss_maskz): Ditto.
	(avx5124vnniw_vp4dpwssd): Ditto.
	(avx5124vnniw_vp4dpwssd_mask): Ditto.
	(avx5124vnniw_vp4dpwssd_maskz): Ditto.
	(avx5124vnniw_vp4dpwssds): Ditto.
	(avx5124vnniw_vp4dpwssds_mask): Ditto.
	(avx5124vnniw_vp4dpwssds_maskz): Ditto.
	* config/i386/x86-tune-sched.cc (ix86_issue_rate): Remove Xeon Phi cpus.
	(ix86_adjust_cost): Ditto.
	* config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Ditto.
	(X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto.
	(X86_TUNE_MOVX): Ditto.
	(X86_TUNE_MEMORY_MISMATCH_STALL): Ditto.
	(X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto.
	(X86_TUNE_FOUR_JUMP_LIMIT): Ditto.
	(X86_TUNE_USE_INCDEC): Ditto.
	(X86_TUNE_INTEGER_DFMODE_MOVES): Ditto.
	(X86_TUNE_OPT_AGU): Ditto.
	(X86_TUNE_AVOID_LEA_FOR_ADDR): Ditto.
	(X86_TUNE_AVOID_MEM_OPND_FOR_CMOVE): Ditto.
	(X86_TUNE_USE_SAHF): Ditto.
	(X86_TUNE_USE_CLTD): Ditto.
	(X86_TUNE_USE_BT): Ditto.
	(X86_TUNE_ONE_IF_CONV_INSN): Ditto.
	(X86_TUNE_EXPAND_ABS): Ditto.
	(X86_TUNE_USE_SIMODE_FIOP): Ditto.
	(X86_TUNE_EXT_80387_CONSTANTS): Ditto.
	(X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto.
	(X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto.
	(X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS): Ditto.
	(X86_TUNE_SLOW_PSHUFB): Ditto.
	(X86_TUNE_EMIT_VZEROUPPER): Removed.
	* config/i386/xmmintrin.h (enum _mm_hint): Remove _MM_HINT_ET1.
	* doc/extend.texi: Remove Xeon Phi.
	* doc/invoke.texi: Ditto.

2024-05-20  Pan Li  <pan2.li@intel.com>

	* dse.cc (get_stored_val): Make sure read_mode/write_mode
	is valid subreg before gen_lowpart.

2024-05-19  Jeff Law  <jlaw@ventanamicro.com>

	PR target/115142
	* config/riscv/riscv.cc (mem_shadd_or_shadd_rtx_p): Make sure
	shifted argument is a register.

2024-05-19  Eric Botcazou  <ebotcazou@adacore.com>

	* optabs-query.cc (can_mult_highpart_p): Test for the existence of
	a wider mode instead of requiring it.

2024-05-19  Roger Sayle  <roger@nextmovesoftware.com>

	* config/nvptx/nvptx.md (popcount<mode>2): Split into...
	(popcountsi2): define_insn handling SImode popcount.
	(popcountdi2): define_insn handling DImode popcount, with an
	explicit truncate:SI to produce an SImode result.

2024-05-18  Palmer Dabbelt  <palmer@rivosinc.com>

	* config/riscv/riscv.opt: Add -mno-fence-tso.
	* config/riscv/sync-rvwmo.md (mem_thread_fence_rvwmo): Respect
	-mno-fence-tso.
	* doc/invoke.texi (RISC-V): Document -mno-fence-tso.

2024-05-18  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.md: Add new patterns to allow selection
	between (x << C1) + C2 vs (x + C2') << C1 depending on the
	cost C2 vs C2'.

2024-05-18  Xiao Zeng  <zengxiao@eswincomputing.com>

	* config/riscv/riscv.cc (riscv_legitimize_move): Optimize movbf
	with Nan-boxing value.
	* config/riscv/riscv.md (*movhf_softfloat_boxing): Expand movbf
	with Nan-boxing value.
	(*mov<HFBF:mode>_softfloat_boxing): Ditto.
	with Nan-boxing value.
	(*movbf_softfloat_boxing): Delete abandon pattern.

2024-05-18  Xiao Zeng  <zengxiao@eswincomputing.com>

	* config/riscv/riscv-builtins.cc (riscv_init_builtin_types):
	Modify _Bfloat16 to __bf16.
	* config/riscv/riscv.cc (riscv_mangle_type): Ditto.

2024-05-18  Pan Li  <pan2.li@intel.com>

	PR target/51492
	PR target/112600
	* config/riscv/autovec.md (usadd<mode>3): New pattern expand for
	the unsigned SAT_ADD in vector mode.
	* config/riscv/riscv-protos.h (riscv_expand_usadd): New func decl
	to expand usadd<mode>3 pattern.
	(expand_vec_usadd): Ditto but for vector.
	* config/riscv/riscv-v.cc (emit_vec_saddu): New func impl to emit
	the vsadd insn.
	(expand_vec_usadd): New func impl to expand usadd<mode>3 for vector.
	* config/riscv/riscv.cc (riscv_expand_usadd): New func impl to
	expand usadd<mode>3 for scalar.
	* config/riscv/riscv.md (usadd<mode>3): New pattern expand for
	the unsigned SAT_ADD in scalar mode.
	* config/riscv/vector.md: Allow VLS mode for vsaddu.

2024-05-17  David Malcolm  <dmalcolm@redhat.com>

	* common.opt.urls: Regenerate to add
	fdiagnostics-show-event-links.

2024-05-17  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/riscv-protos.h (struct common_vector_cost): Add
	segment_permute cost.
	* config/riscv/riscv-vector-costs.cc (costs::adjust_stmt_cost):
	Handle segment loads/stores.
	* config/riscv/riscv.cc: Initialize segment_permute_[2-8] to 1.

2024-05-17  Robin Dapp  <rdapp@ventanamicro.com>

	PR middle-end/113474
	* internal-fn.cc (expand_vec_cond_mask_optab_fn):  Remove
	force_regs.

2024-05-17  Tom Tromey  <tromey@adacore.com>

	* dwarf2out.cc (gen_namespace_die): Use DW_TAG_module for Ada.

2024-05-17  David Malcolm  <dmalcolm@redhat.com>

	* common.opt (fdiagnostics-show-event-links): New option.
	* diagnostic-label-effects.h: New file.
	* diagnostic-path.h (diagnostic_event::connect_to_next_event_p):
	New pure virtual function.
	(simple_diagnostic_event::connect_to_next_event_p): Implement it.
	(simple_diagnostic_event::connect_to_next_event): New.
	(simple_diagnostic_event::m_connected_to_next_event): New field.
	(simple_diagnostic_path::connect_to_next_event): New decl.
	* diagnostic-show-locus.cc: Include "text-art/theme.h" and
	"diagnostic-label-effects.h".
	(colorizer::set_cfg_edge): New.
	(layout::m_fallback_theme): New field.
	(layout::m_theme): New field.
	(layout::m_effect_info): New field.
	(layout::m_link_lhs_state): New enum and field.
	(layout::m_link_rhs_column): New field.
	(layout_range::has_in_edge): New.
	(layout_range::has_out_edge): New.
	(layout::layout): Add "effect_info" optional param.  Initialize
	m_theme, m_link_lhs_state, and m_link_rhs_column.
	(layout::maybe_add_location_range): Remove stray "FIXME" from
	leading comment.
	(layout::print_source_line): Replace space after margin with a
	call to print_leftmost_column.
	(layout::print_leftmost_column): New.
	(layout::start_annotation_line): Make non-const.  Gain
	responsibility for printing the leftmost column after the margin.
	(layout::print_annotation_line): Drop pp_space, as this is now
	added by start_annotation_line.
	(line_label::line_label): Add "has_in_edge" and "has_out_edge"
	params and initialize...
	(line_label::m_has_in_edge): New field.
	(line_label::m_has_out_edge): New field.
	(layout::print_any_labels): Pass edge information to line_label
	ctor.  Keep track of in-edges and out-edges, adding visualizations
	of these links between labels.
	(layout::print_leading_fixits):  Drop pp_character, as this is now
	added by start_annotation_line.
	(layout::print_trailing_fixits): Fix off-by-one errors in column
	calculation.
	(layout::move_to_column): Add comment about debugging.
	(layout::show_ruler): Make non-const.  Drop pp_space calls, as
	this is now added by start_annotation_line.
	(layout::print_line): Call print_any_right_to_left_edge_lines.
	(layout::print_any_right_to_left_edge_lines): New.
	(layout::update_any_effects): New.
	(gcc_rich_location::add_location_if_nearby): Initialize
	loc_range.m_label.
	(diagnostic_context::maybe_show_locus): Add "effects" param and
	pass it to diagnostic_context::show_locus.
	(diagnostic_context::show_locus): Add "effects" param, passing it
	to layout's ctor.  Call update_any_effects on the layout after
	printing the lines.
	(selftest::test_layout_x_offset_display_utf8): Update expected
	result for eliminated trailing newline.
	(selftest::test_layout_x_offset_display_utf8): Likewise.
	(selftest::test_layout_x_offset_display_tab): Likewise.
	* diagnostic.cc (diagnostic_context::initialize): Initialize
	m_source_printing.show_event_links_p.
	(simple_diagnostic_path::connect_to_next_event): New.
	(simple_diagnostic_event::simple_diagnostic_event): Initialize
	m_connected_to_next_event.
	* diagnostic.h (class diagnostic_source_effect_info): New forward
	decl.
	(diagnostic_source_printing_options::show_event_links_p): New
	field.
	(diagnostic_context::maybe_show_locus): Add optional "effect_info"
	param.
	(diagnostic_context::show_locus): Add "effect_info" param.
	(diagnostic_show_locus): Add optional "effect_info" param.
	* doc/invoke.texi: Add -fno-diagnostics-show-event-links.
	* lto-wrapper.cc (merge_and_complain): Add
	OPT_fdiagnostics_show_event_links to switch.
	(append_compiler_options): Likewise.
	(append_diag_options): Likewise.
	* opts-common.cc (decode_cmdline_options_to_array): Add
	"-fno-diagnostics-show-event-links" to -fdiagnostics-plain-output.
	* opts.cc (common_handle_option): Add case for
	OPT_fdiagnostics_show_event_links.
	* text-art/theme.cc (ascii_theme::get_cppchar): Handle
	cell_kind::CFG_*.
	(unicode_theme::get_cppchar): Likewise.
	* text-art/theme.h (theme::cell_kind): Add CFG_*.
	* toplev.cc (general_init): Initialize
	global_dc->m_source_printing.show_event_links_p.
	* tree-diagnostic-path.cc: Define INCLUDE_ALGORITHM,
	INCLUDE_MEMORY, and INCLUDE_STRING.  Include
	"diagnostic-label-effects.h".
	(path_label::path_label): Initialize m_effects.
	(path_label::get_effects): New.
	(class path_label::path_label_effects): New.
	(path_label::m_effects): New field.
	(class per_thread_summary): Add "friend struct event_range;".
	(per_thread_summary::per_thread_summary): Initialize m_last_event.
	(per_thread_summary::m_last_event): New field.
	(struct event_range::per_source_line_info): New.
	(event_range::event_range): Make "t" non-const.  Add
	"show_event_links" param and use it to initialize
	m_show_event_links.  Add info for initial event.
	(event_range::get_per_source_line_info): New.
	(event_range::maybe_add_event): Verify compatibility of the new
	label and existing labels with respect to the link-printing code.
	Update per-source-line info when an event is added.
	(event_range::print): Add"effect_info" param and pass to
	diagnostic_show_locus.
	(event_range::m_per_thread_summary): Make non-const.
	(event_range::m_source_line_info_map): New field.
	(event_range::m_show_event_links): New field.
	(path_summary::path_summary): Add "show_event_links" optional
	param, passing it to event_range ctor calls. Update
	pts.m_last_event.
	(thread_event_printer::print_swimlane_for_event_range): Add
	"effect_info" param and pass it to range->print.
	(print_path_summary_as_text): Keep track of the column for any
	out-edges at the end of printing each event_range and use as
	the leading in-edge for the next event_range.
	(default_tree_diagnostic_path_printer): Pass in show_event_links_p
	to path_summary ctor.
	(selftest::path_events_have_column_data_p): New.
	(class selftest::control_flow_test): New.
	(selftest::test_control_flow_1): New.
	(selftest::test_control_flow_2): New.
	(selftest::test_control_flow_3): New.
	(selftest::assert_cfg_edge_path_streq): New.
	(ASSERT_CFG_EDGE_PATH_STREQ): New macro.
	(selftest::test_control_flow_4): New.
	(selftest::test_control_flow_5): New.
	(selftest::test_control_flow_6): New.
	(selftest::control_flow_tests): New.
	(selftest::tree_diagnostic_path_cc_tests): Disable colorization on
	global_dc's printer.  Convert event_pp to a std::unique_ptr. Call
	control_flow_tests via for_each_line_table_case.
	(gen_command_line_string): Likewise.

2024-05-17  Uros Bizjak  <ubizjak@gmail.com>

	PR middle-end/112600
	* config/i386/mmx.md (<insn><mode>3): New expander.
	* config/i386/sse.md
	(<sse2_avx2>_<sat_plusminus:insn><mode>3<mask_name>):
	Rename expander to <sat_plusminus:insn><mode>3<mask_name>.
	(<umaxmin:code><mode>3): Update for rename.
	* config/i386/i386-builtin.def: Update for rename.

2024-05-17  Aldy Hernandez  <aldyh@redhat.com>

	PR middle-end/115131
	* value-range.cc (prange::intersect): Set VARYING if intersection
	of bitmasks made the range span the entire domain.
	(range_tests_misc): New test.

2024-05-17  Alexander Monakov  <amonakov@ispras.ru>

	PR c++/114480
	* tree-into-ssa.cc (prune_unused_phi_nodes): Add dfs_out entries
	to the 'defs' array in the reverse order.

2024-05-17  Aldy Hernandez  <aldyh@redhat.com>

	PR middle-end/115128
	* ipa-cp.cc (ipa_value_range_from_jfunc): Check for undefined_p
	before looking at type.
	(propagate_vr_across_jump_function): Same.

2024-05-17  Richard Biener  <rguenther@suse.de>

	PR middle-end/115110
	* tree-ssa-alias.cc (view_converted_memref_p): Fix.

2024-05-17  Eric Botcazou  <ebotcazou@adacore.com>

	* expmed.h (expmed_mult_highpart_optab): Declare.
	* expmed.cc (expmed_mult_highpart_optab): Remove static keyword.
	Do not assume that OP1 is a constant integer.  Fix pasto.
	(expmed_mult_highpart): Pass OP1 narrowed to MODE in all the calls
	to expmed_mult_highpart_optab.
	* optabs-query.cc (can_mult_highpart_p): Use 2 for integer widening
	and shift subsequent values accordingly.
	* optabs.cc (expand_mult_highpart): Call expmed_mult_highpart_optab
	when can_mult_highpart_p returns 2 and adjust to above change.

2024-05-17  Richard Biener  <rguenther@suse.de>

	* tree-ssa-alias.h (pt_solution_includes_const_pool): Declare.
	* tree-ssa-alias.cc (ptrs_compare_unequal): Use
	pt_solution_includes_const_pool.
	* tree-ssa-structalias.cc (pt_solution_includes_const_pool): New.

2024-05-17  Alexandre Oliva  <oliva@adacore.com>

	* common.opt (freg-struct-return): Make it explicitly
	fpcc-struct-return's NegativeAlias.  Copy Optimization...
	(freg-struct-return): ... here.

2024-05-17  Pan Li  <pan2.li@intel.com>

	* config/riscv/.riscv.cc.swo: Removed.
	* config/riscv/j: Removed.

2024-05-16  Pan Li  <pan2.li@intel.com>

	* config/riscv/autovec-opt.md(*vcond_mask_len_popcount_<VB_VLS:mode><P:mode>):
	New pattern of vcond_mask_len_popcount for vector bool mode.
	* config/riscv/autovec.md (vcond_mask_len_<mode>): New pattern of
	vcond_mask_len for vector bool mode.
	(cbranch<mode>4): New pattern for vector bool mode.
	* config/riscv/vector-iterators.md: Add new unspec UNSPEC_SELECT_MASK.
	* config/riscv/vector.md (@pred_popcount<VB:mode><P:mode>): Add VLS mode
	to popcount pattern.
	(@pred_popcount<VB_VLS:mode><P:mode>): Ditto.

2024-05-16  Jan Hubicka  <jh@suse.cz>

	PR ipa/113787
	* ipa-fnsummary.cc (points_to_local_or_readonly_memory_p): Do not
	look into TARGET_MEM_REFS with constant opreand 0.

2024-05-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/13962
	PR tree-optimization/96564
	* tree-ssa-alias.h (pt_solution::const_pool): New flag.
	* tree-ssa-alias.cc (ptrs_compare_unequal): Handle pointer-pointer
	compares.
	(dump_points_to_solution): Dump the const_pool flag, fix guard
	of flag dumping.
	* gimple-pretty-print.cc (pp_points_to_solution): Likewise.
	* tree-ssa-structalias.cc (find_what_var_points_to): Set
	the const_pool flag for STRING.
	(pt_solution_ior_into): Handle the const_pool flag.
	(ipa_escaped_pt): Initialize it.

2024-05-16  Richard Biener  <rguenther@suse.de>

	* tree-ssa-structalias.cc (get_constraint_for_1): For
	volatile referenced or decls use ANYTHING.

2024-05-16  Pan Li  <pan2.li@intel.com>

	* tree-vect-loop.cc (vect_gen_loop_len_mask): New func to gen
	the loop len mask.
	* tree-vect-stmts.cc (vectorizable_early_exit): Invoke the
	vect_gen_loop_len_mask for 1 or more stmt(s).
	* tree-vectorizer.h (vect_gen_loop_len_mask): New func decl
	for vect_gen_loop_len_mask.

2024-05-16  Pan Li  <pan2.li@intel.com>

	PR target/51492
	PR target/112600
	* tree-vect-patterns.cc (gimple_unsigned_integer_sat_add): New
	func decl generated by match.pd match.
	(vect_recog_sat_add_pattern): New func impl to recog the pattern
	for unsigned SAT_ADD.

2024-05-16  Pan Li  <pan2.li@intel.com>

	PR target/51492
	PR target/112600
	* internal-fn.cc (commutative_binary_fn_p): Add type IFN_SAT_ADD
	to the return true switch case(s).
	* internal-fn.def (SAT_ADD):  Add new signed optab SAT_ADD.
	* match.pd: Add unsigned SAT_ADD match(es).
	* optabs.def (OPTAB_NL): Remove fixed-point limitation for
	us/ssadd.
	* tree-ssa-math-opts.cc (gimple_unsigned_integer_sat_add): New
	extern func decl generated in match.pd match.
	(match_saturation_arith): New func impl to match the saturation arith.
	(math_opts_dom_walker::after_dom_children): Try match saturation
	arith when IOR expr.

2024-05-16  Aldy Hernandez  <aldyh@redhat.com>

	Revert:
	2024-05-10  Aldy Hernandez  <aldyh@redhat.com>

	Revert:
	2024-05-08  Aldy Hernandez  <aldyh@redhat.com>

	* gimple-range-cache.cc (sbr_sparse_bitmap::sbr_sparse_bitmap):
	Change irange to prange.
	* gimple-range-fold.cc (fold_using_range::fold_stmt): Same.
	(fold_using_range::range_of_address): Same.
	* gimple-range-fold.h (range_of_address): Same.
	* gimple-range-infer.cc (gimple_infer_range::add_nonzero): Same.
	* gimple-range-op.cc (class cfn_strlen): Same.
	* gimple-range-path.cc
	(path_range_query::adjust_for_non_null_uses): Same.
	* gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses): Same.
	* tree-ssa-structalias.cc (find_what_p_points_to): Same.
	* range-op-ptr.cc (range_op_table::initialize_pointer_ops): Remove
	hybrid entries in table.
	* range-op.cc (range_op_table::range_op_table): Add pointer
	entries for bitwise and/or and min/max.
	* value-range.cc (irange::verify_range): Add assert.
	* value-range.h (irange::varying_compatible_p): Remove check for
	error_mark_node.
	(irange::supports_p): Remove pointer support.
	* ipa-cp.h (ipa_supports_p): Add prange support.

2024-05-16  Aldy Hernandez  <aldyh@redhat.com>

	PR tree-optimization/114985
	* gimple-range-op.cc: Remove pointers_handled_p.
	* ipa-cp.cc (ipa_value_range_from_jfunc): Skip range folding if
	operands don't match.
	(propagate_vr_across_jump_function): Same.
	* range-op-mixed.h: Remove pointers_handled_p and tweak
	operand_check_p.
	* range-op-ptr.cc (range_operator::pointers_handled_p): Remove.
	(pointer_plus_operator::pointers_handled_p): Remove.
	(class operator_pointer_diff): Remove pointers_handled_p.
	(operator_pointer_diff::pointers_handled_p): Remove.
	(operator_identity::pointers_handled_p): Remove.
	(operator_cst::pointers_handled_p): Remove.
	(operator_cast::pointers_handled_p): Remove.
	(operator_min::pointers_handled_p): Remove.
	(operator_max::pointers_handled_p): Remove.
	(operator_addr_expr::pointers_handled_p): Remove.
	(operator_bitwise_and::pointers_handled_p): Remove.
	(operator_bitwise_or::pointers_handled_p): Remove.
	(operator_equal::pointers_handled_p): Remove.
	(operator_not_equal::pointers_handled_p): Remove.
	(operator_lt::pointers_handled_p): Remove.
	(operator_le::pointers_handled_p): Remove.
	(operator_gt::pointers_handled_p): Remove.
	(operator_ge::pointers_handled_p): Remove.
	* range-op.cc (TRAP_ON_UNHANDLED_POINTER_OPERATORS): Remove.
	(range_op_handler::lhs_op1_relation): Remove pointers_handled_p checks.
	(range_op_handler::lhs_op2_relation): Same.
	(range_op_handler::op1_op2_relation): Same.
	* range-op.h: Remove RO_* declarations.

2024-05-16  Aldy Hernandez  <aldyh@redhat.com>

	PR tree-optimization/114985
	* vr-values.cc (simplify_using_ranges::fold_cond_with_ops): Use
	boolean type when folding conditionals.

2024-05-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/79958
	PR tree-optimization/109087
	PR tree-optimization/100314
	PR tree-optimization/114774
	* tree-ssa-dse.cc (dse_classify_store): New forwarder.
	(dse_classify_store): Add arguments cnt and visited, recurse
	to track multiple paths when we end up with multiple defs.

2024-05-16  David Malcolm  <dmalcolm@redhat.com>

	* text-art/theme.cc (ascii_theme::get_cppchar): Add
	cell_kind::INTERPROCEDURAL_*.
	(unicode_theme::get_cppchar): Likewise.
	* text-art/theme.h (theme::cell_kind): Likewise.
	* tree-diagnostic-path.cc:
	(thread_event_printer::print_swimlane_for_event_range): Use the
	above to get characters for indicating interprocedural stack
	depth activity, falling back to ascii.
	(selftest::test_interprocedural_path_1): Test with both ascii
	and unicode themes.
	(selftest::test_interprocedural_path_2): Likewise.
	(selftest::test_recursion): Likewise.

2024-05-16  David Malcolm  <dmalcolm@redhat.com>

	* tree-diagnostic-path.cc: Include "text-art/theme.h".
	(path_label::get_text): If the event has
	diagnostic_event::VERB_danger, and the theme enables emojis, then
	add a warning emoji between the event number and the event text.

2024-05-16  David Malcolm  <dmalcolm@redhat.com>

	* tree-diagnostic-path.cc (per_thread_summary::interprocedural_p):
	New.
	(thread_event_printer::print_swimlane_for_event_range): Don't
	indent and print the stack depth line if this thread's events are
	purely intraprocedural.
	(selftest::test_intraprocedural_path): Update expected output.

2024-05-16  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-path.h: Update leading comment to reflect
	intraprocedural cases.  Fix typo in comment.
	* doc/invoke.texi: Update intraprocedural example.

2024-05-16  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-show-locus.cc: Define INCLUDE_VECTOR and include
	"text-art/types.h".
	(line_label::line_label): Drop "policy" argument.  Use
	styled_string::calc_canvas_width when computing m_display_width,
	as this skips SGR codes.
	(layout::print_any_labels): Update for line_label ctor change.
	(selftest::test_one_liner_labels_utf8): Update expected text to
	reflect that the labels can fit on one line if we don't get
	confused by SGR colorization codes.

2024-05-16  Xiao Zeng  <zengxiao@eswincomputing.com>

	* common/config/riscv/riscv-common.cc:
	(riscv_implied_info): Add zvfbfwma item.
	(riscv_ext_version_table): Ditto.
	(riscv_ext_flag_table): Ditto.
	* config/riscv/riscv.opt:
	(MASK_ZVFBFWMA): New macro.
	(TARGET_ZVFBFWMA): Ditto.

2024-05-16  liuhongt  <hongtao.liu@intel.com>

	PR target/114514
	* config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
	Set d.one_operand_p to true when TARGET_SSSE3.

2024-05-16  liuhongt  <hongtao.liu@intel.com>

	PR target/114514
	* config/i386/i386-expand.cc
	(ix86_expand_vec_shift_qihi_constant): Optimize ashift >> 7 to
	vpcmpgtb.
	(ix86_expand_vecop_qihi_partial): Ditto.

2024-05-15  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv-string.cc: Add missing hunk from last change.

2024-05-15  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv-string.cc (emit_strcmp_scalar_load_and_compare):
	Use adjust_address() to calculate MEM-PLUS pattern.

2024-05-15  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv-protos.h (riscv_expand_block_compare): New
	prototype.
	* config/riscv/riscv-string.cc (GEN_EMIT_HELPER2): New helper
	for zero_extendhi.
	(do_load_from_addr): Add support for HI and SI/64 modes.
	(do_load): Add helper for zero-extended loads.
	(emit_memcmp_scalar_load_and_compare): New helper to emit memcmp.
	(emit_memcmp_scalar_result_calculation): Likewise.
	(riscv_expand_block_compare_scalar): Likewise.
	(riscv_expand_block_compare): New RISC-V expander for memory compare.
	* config/riscv/riscv.md (cmpmemsi): New cmpmem expansion.

2024-05-15  Marek Polacek  <polacek@redhat.com>

	DR 1693
	PR c++/113760
	DR 569
	* doc/invoke.texi: Update -Wextra-semi documentation.

2024-05-15  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/114902
	PR rtl-optimization/115092
	* combine.cc (simplify_compare_const): Don't optimize
	GE op0 SIGNED_MIN or LT op0 SIGNED_MIN into NE op0 const0_rtx or
	EQ op0 const0_rtx.

2024-05-15  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114589
	* tree-ssa-sink.cc (select_best_block): Remove profile-based
	heuristics.  Instead reject sink locations that sink
	to post-dominators.  Move empty latch check here from
	statement_sink_location.  Also consider early_bb for the
	loop depth check.
	(statement_sink_location): Remove superfluous check.  Remove
	empty latch check.
	(pass_sink_code::execute): Compute/release post-dominators.

2024-05-15  Richard Biener  <rguenther@suse.de>

	PR middle-end/111422
	* cfgexpand.cc (add_scope_conflicts_2): Handle PHIs
	by recursing to their arguments.

2024-05-15  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_combine_internal<mode>):
	Use UZP1 instead of INS.
	(aarch64_combine_internal_be<mode>): Likewise.

2024-05-15  Jan Hubicka  <jh@suse.cz>

	* alias.cc (reference_alias_ptr_type_1): Use view_converted_memref_p.
	* alias.h (view_converted_memref_p): Declare.
	* tree-ssa-alias.cc (view_converted_memref_p): Export.
	(ao_compare::compare_ao_refs): Use same_type_for_tbaa.

2024-05-15  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv-string.cc (riscv_block_move_straight):
	Hand over up to 2xXLEN bytes to move_by_pieces().

2024-05-15  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv-string.cc (riscv_block_move_straight): Add
	parameter align.
	(riscv_adjust_block_mem): Replace parameter length by align.
	(riscv_block_move_loop): Add parameter align.
	(riscv_expand_block_move_scalar): Set alignment properly if the
	target has fast unaligned access.

2024-05-15  Aldy Hernandez  <aldyh@redhat.com>

	PR tree-optimization/114995
	* range-op-ptr.cc (range_operator::pointers_handled_p): Default to true.

2024-05-15  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/114301
	* tree-cfg.cc (gimple_can_duplicate_bb_p): Check returns_twice
	only on the last call statement rather than all.

2024-05-15  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv-string.cc
	(riscv_expand_block_clear_zicboz_zic64b): Handle rv32 correctly.

2024-05-15  Levy Hsu  <admin@levyhsu.com>

	PR target/107563
	* config/i386/i386-expand.cc (expand_vec_perm_psrlw_psllw_por): New
	subroutine.
	(ix86_expand_vec_perm_const_1): Call expand_vec_perm_psrlw_psllw_por.

2024-05-15  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.md: Add pattern for sign extended shift-add
	sequence with a masked input.

2024-05-14  Dimitar Dimitrov  <dimitar@dinux.eu>

	PR rtl-optimization/115013
	* config/pru/pru.cc (pru_class_likely_spilled_p): Implement
	to mark classes containing one SImode register as likely
	spilled.
	(TARGET_CLASS_LIKELY_SPILLED_P): Define.

2024-05-14  Vineet Gupta  <vineetg@rivosinc.com>

	* config/riscv/riscv.h: New macros to check for sum of two S12
	range.
	* config/riscv/constraints.md: New constraint.
	* config/riscv/predicates.md: New Predicate.
	* config/riscv/riscv.md: New splitter.
	* config/riscv/riscv.cc (riscv_reg_frame_related): New helper.
	* config/riscv/riscv-protos.h: New helper prototype.

2024-05-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99954
	* tree-data-ref.cc (dr_may_alias_p): For bases that are
	not completely analyzed fall back to TBAA and points-to.
	* tree-loop-distribution.cc
	(loop_distribution::classify_builtin_ldst): When there
	is no dependence again classify as memcpy.
	* tree-ssa-alias.cc (ptr_deref_may_alias_decl_p): Verify
	the pointer is an SSA name.

2024-05-14  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv-protos.h (riscv_expand_block_clear): New prototype.
	* config/riscv/riscv-string.cc (riscv_expand_block_clear_zicboz_zic64b):
	New function to expand a block-clear with cbo.zero.
	(riscv_expand_block_clear): New RISC-V block-clear expansion function.
	* config/riscv/riscv.md (setmem<mode>): New setmem expansion.

2024-05-14  Christoph Müllner  <christoph.muellner@vrull.eu>

	* expr.cc (clear_by_pieces): Remove static from clear_by_pieces.
	* expr.h (clear_by_pieces): Add prototype for clear_by_pieces.

2024-05-14  Tom de Vries  <tdevries@suse.de>

	PR debug/115066
	* dwarf2out.cc (output_macinfo_op): Fix DW_MACRO_define_strx/strp
	choice for v4 .debug_macro.dwo.  Add asserts to check that choice.

2024-05-14  Jan Hubicka  <jh@suse.cz>

	PR ipa/113291
	* ipa-inline.cc (enum can_inline_edge_by_limits_flags): New enum.
	(can_inline_edge_by_limits_p): Take flags instead of multiple bools; add flag
	for forcing inlinie limits.
	(can_early_inline_edge_p): Update.
	(want_inline_self_recursive_call_p): Update; use FORCE_LIMITS mode.
	(check_callers): Update.
	(update_caller_keys): Update.
	(update_callee_keys): Update.
	(recursive_inlining): Update.
	(add_new_edges_to_heap): Update.
	(speculation_useful_p): Update.
	(inline_small_functions): Clear DECL_DISREGARD_INLINE_LIMITS on self recursion.
	(flatten_function): Update.
	(inline_to_all_callers_1): Update.

2024-05-14  Haochen Gui  <guihaoc@gcc.gnu.org>

	* config/rs6000/rs6000.cc (TARGET_OVERLAP_OP_BY_PIECES_P): Define.

2024-05-14  Jeff Law  <jlaw@ventanamicro.com>

	Revert:
	2024-05-13  Sergei Lewis  <slewis@rivosinc.com>

	* config/riscv/riscv.md (movmem<mode>): Use riscv_vector::expand_block_move,
	if and only if we know the entire operation can be performed using one vector
	load followed by one vector store

2024-05-14  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-vector-builtins.cc
	(validate_instance_type_required_extensions): Remove the
	operator from the trailing and put it to new line.

2024-05-13  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md: Add new splitter for AND with
	a constant that masks off bits 32..63 and needs synthesis.

2024-05-13  Sergei Lewis  <slewis@rivosinc.com>

	* config/riscv/riscv.md (movmem<mode>): Use riscv_vector::expand_block_move,
	if and only if we know the entire operation can be performed using one vector
	load followed by one vector store

2024-05-13  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/115013
	* lra-constraints.cc (process_alt_operands): Update all_used_nregs
	only for winreg.  Ignore reg starvation for small reg classes.

2024-05-13  Pan Li  <pan2.li@intel.com>

	PR target/114988
	* config/riscv/riscv-vector-builtins.cc
	(validate_instance_type_required_extensions): New func impl to
	validate the intrinisc func type ops.
	(expand_builtin): Validate instance type before expand.

2024-05-13  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md (bextseqzdisi): New patterns.
	* config/riscv/.riscv.cc.swo: New file.
	* config/riscv/j: New file.

2024-05-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/60276
	* tree-vect-stmts.cc (vectorizable_load): Do not exempt
	pure_slp grouped loads from the STMT_VINFO_MIN_NEG_DIST
	restriction.

2024-05-13  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_analyze_slp_instance): Remove
	slp_inst_kind_reduc_group handling.
	(vect_analyze_slp): Add the meat here.

2024-05-13  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113982
	* tree-ssa-math-opts.cc (arith_overflow_check_p): Also return 1
	for RSHIFT_EXPR by precision of maxval if shift result is only
	used in a cast or comparison against zero.
	(match_arith_overflow): Handle the RSHIFT_EXPR use case.

2024-05-13  YunQiang Su  <syq@debian.org>

	Revert:
	2024-05-09  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/constraints.md: Add new constraint 'w'.

2024-05-12  Roger Sayle  <roger@nextmovesoftware.com>
	    Kyrill Tkachov  <kyrylo.tkachov@foss.arm.com>

	* config/arm/arm.md (*arm_zeroextractsi2_8_8, *arm_signextractsi2_8_8,
	*arm_zeroextractsi2_8_16, *arm_signextractsi2_8_16,
	*arm_zeroextractsi2_16_8, *arm_signextractsi2_16_8): New.

2024-05-12  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_build_integer_1): Use slli.uw more.

2024-05-12  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_build_integer_1): Fix thinko in testing
	when lui can be used to set several bits in bseti path.

2024-05-12  Mark Wielaard  <mark@klomp.org>

	* config/mingw/cygming.opt.urls: Regenerate.
	* config/mingw/mingw.opt.urls: Likewise.

2024-05-11  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (DEBUG_S_SYMBOLS): Define.
	(S_COMPILE3, CV_CFL_80386, CV_CFL_X64): Likewise.
	(CV_CFL_C, CV_CFL_CXX): Likewise.
	(SYMBOL_START_LABEL, SYMBOL_END_LABEL): Likewise.
	(start_processor, language_constant): New functions.
	(write_compile3_symbol, write_codeview_symbols): Likewise.
	(codeview_debug_finish): Call write_codeview_symbols.

2024-05-11  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (DEBUG_S_LINES, LINE_LABEL): Define.
	(END_FUNC_LABEL): Likewise.
	(struct codeview_line, codeview_line_block): New structures.
	(codeview_function): Likewise.
	(line_label_num, func_label_num, funcs, last_func): New variables.
	(last_filename, last_file_id): Likewise.
	(codeview_source_line, write_line_numbers): New functions.
	(codeview_switch_text_section, codeview_end_epilogue): Likewise.
	(codeview_debug_finish): Call write_line_numbers.
	* dwarf2codeview.h (codeview_source_line): Prototype.
	(codeview_switch_text_secction, codeview_end_epilogue): Likewise.
	* dwarf2out.cc (dwarf2_end_epilogue): Add codeview support.
	(dwarf2out_switch_text_section): Likewise.
	(dwarf2out_source_line): Likewise.
	* opts.cc (finish_options): Handle codeview debugging symbols.

2024-05-11  Mark Harmstone  <mark@harmstone.com>

	* dwarf2codeview.cc (DEBUG_S_STRINGTABLE): Define.
	(DEBUG_S_FILECHKSMS, CHKSUM_TYPE_MD5, HASH_SIZE): Likewise.
	(codeview_string, codeview_source_file): New structures.
	(struct string_hasher): New class for codeview_string hashing.
	(files, last_file, num_files, string_offset): New variables.
	(strings_hstab, strings, last_string): Likewise.
	(add_string, codevie_start_source_file): New functions.
	(write_strings_tabe, write_soruce_files): Likewise.
	(codeview_debug_finish): Call new functions.
	* dwarf2codeview.h (codeview_start_source_file): Prototype.
	* dwarf2out.cc (dwarf2out_start_source_file): Handle codeview.

2024-05-11  Mark Harmstone  <mark@harmstone.com>

	* Makefile.in (OBJS): Add dwarf2codeview.o.
	(GTFILES): Add dwarf2codeview.cc
	* config/i386/cygming.h (CODEVIEW_DEBUGGING_INFO): Define.
	* dwarf2codeview.cc: New file.
	* dwarf2codeview.h: New file.
	* dwarf2out.cc: Include dwarf2codeview.h.
	(dwarf2out_finish): Call codeview_debug_finish as needed.
	* flag-types.h (DINFO_TYPE_CODEVIEW): Add enum member.
	(CODEVIEW_DEBUG): Define.
	* flags.h (codeview_debuginfo_p): Proottype.
	* opts.cc (debug_type_names): Add codeview.
	(debug_type_masks): Add CODEVIEW_DEBUG.
	(df_set_names): Add codeview.
	(codeview_debuginfo_p): New function.
	(dwarf_based_debuginfo_p): Add CODEVIEW clause.
	(set_debug_level): Handle CODEVIEW_DEBUG.
	* toplev.cc (process_options): Handle codeview.

2024-05-11  dzhao.ampere  <di.zhao@amperecomputing.com>

	PR tree-optimization/114760
	* tree-ssa-loop-niter.cc (is_lshift_by_1): New function
	to check if STMT is equivalent to x << 1.
	(is_rshift_by_1): New function to check if STMT is
	equivalent to x >> 1.
	(number_of_iterations_cltz): Enhance the identification
	of logical shift by one.
	(number_of_iterations_cltz_complement): Enhance the
	identification of logical shift by one.

2024-05-11  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-ptr.cc (range_operator::fold_range): Return false.

2024-05-11  Aldy Hernandez  <aldyh@redhat.com>

	* range-op.cc (TRAP_ON_UNHANDLED_POINTER_OPERATORS): New
	(range_op_handler::fold_range): Use it.
	(range_op_handler::op1_range): Same.
	(range_op_handler::op2_range): Same.
	(range_op_handler::lhs_op1_relation): Same.
	(range_op_handler::lhs_op2_relation): Same.
	(range_op_handler::op1_op2_relation): Same.

2024-05-10  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_build_integer_1): Recognize cases where
	we can use shNadd to improve constant synthesis.
	(riscv_move_integer): Handle code generation for shNadd.

2024-05-10  Roger Sayle  <roger@nextmovesoftware.com>
	    Hongtao Liu  <hongtao.liu@intel.com>

	* config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
	Don't attempt ix86_expand_vec_shift_qihi_constant on SSE4.1.

2024-05-10  Dimitar Dimitrov  <dimitar@dinux.eu>

	* config/pru/predicates.md (pru_mulsrc0_operand): Use register
	class instead of register number for the check.
	(pru_mulsrc1_operand): Ditto.

2024-05-10  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/114942
	* lra-constraints.cc (struct input_reload): Add new member early_clobber_p.
	(get_reload_reg): Add new arg early_clobber_p, don't reuse input
	reload with true early_clobber_p member value, use the arg for new
	element of curr_insn_input_reloads.
	(match_reload): Assign false to early_clobber_p member.
	(process_addr_reg, simplify_operand_subreg, curr_insn_transform):
	Adjust get_reload_reg calls.

2024-05-10  Aldy Hernandez  <aldyh@redhat.com>

	PR tree-optimization/115026
	* value-range.cc (prange::update_bitmask): Use operand bitmask.

2024-05-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114998
	* tree-loop-distribution.cc (free_rdg): Take loop argument.
	Reset UIDs of stmts still in the IL rather than all stmts
	referenced from the RDG.
	(loop_distribution::build_rdg): Pass loop to free_rdg.
	(loop_distribution::distribute_loop): Likewise.
	(loop_distribution::transform_reduction_loop): Likewise.

2024-05-10  Richard Biener  <rguenther@suse.de>

	* tree-vect-patterns.cc (vect_pattern_recog_1): Do not
	remove reductions involving patterns.
	* tree-vect-loop.cc (vectorizable_reduction): Reject SLP
	reduction groups with multiple lane-reducing reductions.
	* tree-vect-slp.cc (vect_analyze_slp_instance): When discovering
	SLP reduction groups avoid including lane-reducing ones.

2024-05-10  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/bpf/bpf.cc (bpf_print_operand_address): Include
	surrounding parenthesis around mem operands in pseudoc asm
	dialect.
	* config/bpf/bpf.md (*mov<MM:mode>): Adapt accordingly.
	(zero_extendhidi2): Likewise.
	(zero_extendqidi2): Likewise.
	(*extendsidi2): Likewise.
	(*extendsidi2): Likewise.
	(extendhidi2): Likewise.
	(extendqidi2): Likewise.
	(extendhisi2): Likewise.
	* config/bpf/atomic.md (atomic_add<AMO:mode>): Likewise.
	(atomic_and<AMO:mode>): Likewise.
	(atomic_or<AMO:mode>): Likewise.
	(atomic_xor<AMO:mode>): Likewise.
	(atomic_fetch_add<AMO:mode>): Likewise.
	(atomic_fetch_and<AMO:mode>): Likewise.
	(atomic_fetch_or<AMO:mode>): Likewise.
	(atomic_fetch_xor<AMO:mode>): Likewise.

2024-05-10  Jakub Jelinek  <jakub@redhat.com>

	PR target/114968
	* target.def (use_atexit_for_cxa_atexit): Remove spurious space
	from comment.
	(adjust_cdtor_callabi_fntype): New cxx target hook.
	* targhooks.h (default_cxx_adjust_cdtor_callabi_fntype): Declare.
	* targhooks.cc (default_cxx_adjust_cdtor_callabi_fntype): New
	function.
	* doc/tm.texi.in (TARGET_CXX_ADJUST_CDTOR_CALLABI_FNTYPE): Add.
	* doc/tm.texi: Regenerate.
	* config/i386/i386.cc (ix86_cxx_adjust_cdtor_callabi_fntype): New
	function.
	(TARGET_CXX_ADJUST_CDTOR_CALLABI_FNTYPE): Redefine.

2024-05-10  Aldy Hernandez  <aldyh@redhat.com>

	PR tree-optimization/115009
	* value-range-storage.cc (prange_storage::alloc): Do not assume
	all pointers are the same size.
	(prange_storage::prange_storage): Same.
	(prange_storage::fits_p): Same.

2024-05-10  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv-vsetvl.cc: Fix typos in comments.
	(get_all_predecessors): Ditto.
	(pre_vsetvl::m_unknow_info): Rename to...
	(pre_vsetvl::m_unknown_info): this.
	(pre_vsetvl::compute_vsetvl_def_data): Rename m_unknow_info to
	m_unknown_info.
	(pre_vsetvl::cleaup): Rename to...
	(pre_vsetvl::cleanup): this.
	(pre_vsetvl::compute_vsetvl_def_data): Fix typos.
	(pass_vsetvl::lazy_vsetvl): Update function name and fix typos.
	* config/riscv/riscv.cc: Fix typos in comments.
	(struct machine_function): Fix typo in comments.
	(riscv_valid_lo_sum_p): Ditto.
	(riscv_force_address): Ditto.
	(riscv_immediate_operand_p): Ditto.
	(riscv_in_small_data_p): Ditto.
	(riscv_first_stack_step): Ditto.
	(riscv_expand_prologue): Ditto.
	(riscv_convert_vector_chunks): Ditto.
	(riscv_override_options_internal): Ditto.
	(get_common_costs): Ditto.

2024-05-10  Xi Ruoyao  <xry111@xry111.site>

	PR driver/114980
	* opts-common.cc (prune_options): Move -fdiagnostics-urls=
	early like -fdiagnostics-color=.

2024-05-10  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md: Add splitter for shadd feeding another
	add instruction.

2024-05-10  Aldy Hernandez  <aldyh@redhat.com>

	Revert:
	2024-05-08  Aldy Hernandez  <aldyh@redhat.com>

	* gimple-range-cache.cc (sbr_sparse_bitmap::sbr_sparse_bitmap):
	Change irange to prange.
	* gimple-range-fold.cc (fold_using_range::fold_stmt): Same.
	(fold_using_range::range_of_address): Same.
	* gimple-range-fold.h (range_of_address): Same.
	* gimple-range-infer.cc (gimple_infer_range::add_nonzero): Same.
	* gimple-range-op.cc (class cfn_strlen): Same.
	* gimple-range-path.cc
	(path_range_query::adjust_for_non_null_uses): Same.
	* gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses): Same.
	* tree-ssa-structalias.cc (find_what_p_points_to): Same.
	* range-op-ptr.cc (range_op_table::initialize_pointer_ops): Remove
	hybrid entries in table.
	* range-op.cc (range_op_table::range_op_table): Add pointer
	entries for bitwise and/or and min/max.
	* value-range.cc (irange::verify_range): Add assert.
	* value-range.h (irange::varying_compatible_p): Remove check for
	error_mark_node.
	(irange::supports_p): Remove pointer support.
	* ipa-cp.h (ipa_supports_p): Add prange support.

2024-05-09  Roger Sayle  <roger@nextmovesoftware.com>

	* simplify-rtx.cc (simplify_const_binary_operation): Constant
	fold binary operations where the LHS is CONST_VECTOR and the
	RHS is CONST_INT (or CONST_DOUBLE) such as vector shifts.

2024-05-09  Martin Jambor  <mjambor@suse.cz>

	* tree-sra.cc (sra_modify_assign): Remove the original statement
	also when dealing with a store to a fully covered aggregate from a
	non-candidate.

2024-05-09  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/constraints.md: Add new constraint 'w'.

2024-05-09  Hu, Lin1  <lin1.hu@intel.com>

	PR target/84508
	* config/i386/emmintrin.h
	(_mm_load_sd): Remove alignment requirement.
	(_mm_store_sd): Ditto.
	(_mm_loadh_pd): Ditto.
	(_mm_loadl_pd): Ditto.
	(_mm_storel_pd): Add alignment requirement.
	* config/i386/xmmintrin.h
	(_mm_loadh_pi): Remove alignment requirement.
	(_mm_loadl_pi): Ditto.
	(_mm_load_ss): Ditto.
	(_mm_store_ss): Ditto.

2024-05-09  Aldy Hernandez  <aldyh@redhat.com>

	PR tree-optimization/114912
	* value-range.h (class Value_Range): Use a union.

2024-05-09  Aldy Hernandez  <aldyh@redhat.com>

	* range-op.cc (range_op_handler::discriminator_fail): Reword error
	message.

2024-05-09  konglin1  <lingling.kong@intel.com>

	* config/i386/i386.cc (ix86_hardreg_mov_ok): Relax
	hard reg mov restriction when lra in progress.

2024-05-08  Xiao Zeng  <zengxiao@eswincomputing.com>

	* config/riscv/riscv.cc (riscv_legitimize_move): Expand movbf
	with Nan-boxing value.
	* config/riscv/riscv.md (*movbf_softfloat_boxing): New pattern.

2024-05-08  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_build_integer_1): Fix incorrect
	if-then-else nesting of Zbs code.

2024-05-08  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/114810
	* lra-constraints.cc (process_alt_operands): Calculate union reg
	class for the alternative, peak matched regs and required reload
	regs.  Recognize alternatives with lack of available registers and
	make them costly.  Add debug print about this case.

2024-05-08  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/112392
	* match.pd (`x CMP nonnegative ? x : ABS<x>`): New pattern;
	where CMP is ==, > and >=.
	(`x CMP nonnegative@y ? y : ABS<x>`): New pattern.

2024-05-08  Ajit Kumar Agarwal  <aagarwa1@linux.ibm.com>

	PR tree-optimization/81953
	* tree-ssa-sink.cc (statement_sink_location):Sink statements at
	the begining of the basic block after labels.

2024-05-08  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/iterators.md (ashiftrt): New code attribute
	'extract_shift' and adding extractions to optab.
	* config/riscv/riscv.md (*lshr<GPR:mode>3_zero_extend_4): Rename to...
	(*<any_extract:optab><GPR:mode>3):...this and add support for
	sign-extensions.

2024-05-08  Christoph Müllner  <christoph.muellner@vrull.eu>

	PR target/111501
	* config/riscv/riscv.md (*lshr<GPR:mode>3_zero_extend_4): New
	pattern for zero-extraction.

2024-05-08  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/iterators.md (sraiw): New code iterator 'any_extract'.
	New code attribute 'extract_sidi_shift'.
	* config/riscv/riscv.md (*lshrsi3_zero_extend_2): Rename to...
	(*lshrsi3_extend_2):...this and add support for sign-extensions.

2024-05-08  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (get_initial_defs_for_reduction): Convert
	initial value to the vector component type.

2024-05-08  Richard Biener  <rguenther@suse.de>

	* tree-vect-data-refs.cc (vect_enhance_data_refs_alignment):
	Properly guard DR_GROUP_SIZE access with STMT_VINFO_GROUPED_ACCESS.

2024-05-08  Alex Coplan  <alex.coplan@arm.com>

	PR target/114936
	* config/aarch64/aarch64-ldp-fusion.cc (combine_reg_notes):
	Ensure insn iN has its REG_FRAME_RELATED_EXPR (if any) stored in
	FR_EXPR[N-1], thus matching the correspondence expected by the
	copy_rtx calls.

2024-05-08  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* tree-ssa-loop-prefetch.cc (determine_unroll_factor): Honour
	-fno-unroll-loops.

2024-05-08  Georg-Johann Lay  <avr@gjlay.de>

	PR target/114975
	* config/avr/avr.md: Add combine pattern for
	8-bit parity detection.

2024-05-08  Georg-Johann Lay  <avr@gjlay.de>

	PR target/114975
	* config/avr/avr.md: Add combine pattern for
	8-bit popcount detection.

2024-05-08  Richard Biener  <rguenther@suse.de>

	* tree-into-ssa.cc (insert_updated_phi_nodes_for): Skip
	pruning when the nearest common dominator is the successor
	of ENTRY_BLOCK.  Do not copy IDF but prune it directly.

2024-05-08  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114965
	* tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Don't try to
	optimize away exp - lowi subtraction from shift count unless entry
	test is emitted or unless r.upper_bound () is smaller than prec.

2024-05-08  Eric Botcazou  <ebotcazou@adacore.com>

	* expmed.h (choose_multiplier): Tweak description and remove last
	parameter.
	* expmed.cc (choose_multiplier): Likewise.  Add assertion for the
	third parameter and adds details to various comments.
	(invert_mod2n): Tweak description and add assertion for the first
	parameter.
	(expand_divmod): Adjust calls to choose_multiplier.
	* tree-vect-generic.cc (expand_vector_divmod): Likewise.
	* tree-vect-patterns.cc (vect_recog_divmod_pattern): Likewise.

2024-05-08  konglin1  <lingling.kong@intel.com>

	PR target/109549
	* config/i386/i386.cc (ix86_rtx_costs): The XEXP (x, 0) for cmov
	is an operator do not need to compute cost.

2024-05-08  Aldy Hernandez  <aldyh@redhat.com>

	* gimple-range-cache.cc (sbr_sparse_bitmap::sbr_sparse_bitmap):
	Change irange to prange.
	* gimple-range-fold.cc (fold_using_range::fold_stmt): Same.
	(fold_using_range::range_of_address): Same.
	* gimple-range-fold.h (range_of_address): Same.
	* gimple-range-infer.cc (gimple_infer_range::add_nonzero): Same.
	* gimple-range-op.cc (class cfn_strlen): Same.
	* gimple-range-path.cc
	(path_range_query::adjust_for_non_null_uses): Same.
	* gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses): Same.
	* tree-ssa-structalias.cc (find_what_p_points_to): Same.
	* range-op-ptr.cc (range_op_table::initialize_pointer_ops): Remove
	hybrid entries in table.
	* range-op.cc (range_op_table::range_op_table): Add pointer
	entries for bitwise and/or and min/max.
	* value-range.cc (irange::verify_range): Add assert.
	* value-range.h (irange::varying_compatible_p): Remove check for
	error_mark_node.
	(irange::supports_p): Remove pointer support.
	* ipa-cp.h (ipa_supports_p): Add prange support.

2024-05-07  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/19661
	* tree-ssa-dce.cc (is_cxa_atexit): New function.
	(is_removable_cxa_atexit_call): New function.
	(mark_stmt_if_obviously_necessary): Don't mark removable
	cxa_at_exit calls.
	(mark_all_reaching_defs_necessary_1): Likewise.
	(propagate_necessity): Likewise.

2024-05-07  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/114894
	* match.pd (`a != 0 ? a / b : 0`): New pattern.
	(`a != 0 ? a * b : 0`): New pattern.
	(`a != 0 ? a & b : 0`): New pattern.

2024-05-07  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (generic_ooo_tune_info): Turn on
	overlap_op_by_pieces.

2024-05-07  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv.cc (struct riscv_tune_param): Add new
	"overlap_op_by_pieces" field.
	(rocket_tune_info, sifive_7_tune_info): Set it.
	(sifive_p400_tune_info, sifive_p600_tune_info): Likewise.
	(thead_c906_tune_info, xiangshan_nanhu_tune_info): Likewise.
	(generic_ooo_tune_info, optimize_size_tune_info): Likewise.
	(riscv_overlap_op_by_pieces): New function.
	(TARGET_OVERLAP_OP_BY_PIECES_P): define.

2024-05-07  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114907
	* expr.cc (convert_mode_scalar): Use trunc_optab rather than
	sext_optab for HF->BF conversions.
	* optabs-libfuncs.cc (gen_trunc_conv_libfunc): Likewise.

2024-05-07  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/114956
	* tree-inline.cc: Include asan.h.
	(copy_bb): Remove also .ASAN_MARK calls if id->dst_fn has asan/hwasan
	sanitization disabled.

2024-05-07  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv-string.cc (riscv_expand_strcmp): Do not inline
	strncmp with zero size.
	(emit_strcmp_scalar_compare_subword): Adjust rotation for rv32 vs rv64.
	* config/riscv/riscv.opt (var_inline_strcmp): Enable by default.
	(vriscv_inline_strncmp, riscv_inline_strlen): Likewise.

2024-05-07  Zac Walker  <zacwalker@microsoft.com>

	* config.gcc: Build and add objects for Cygwin and MinGW. Add Cygwin
	and MinGW options to the target.

2024-05-07  Zac Walker  <zacwalker@microsoft.com>

	* config/i386/mingw-w64.opt.urls: Rename options' name and
	regenerate option URLs.
	* config/lynx.opt.urls: Likewise.
	* config/mingw/cygming.opt.urls: Likewise.
	* config/mingw/mingw.opt.urls: Likewise.
	* doc/invoke.texi: Likewise.

2024-05-07  Zac Walker  <zacwalker@microsoft.com>

	* config/aarch64/aarch64.h (struct seh_frame_state): Declare SEH
	structure in machine_function.
	(GTY): Add SEH field.

2024-05-07  Zac Walker  <zacwalker@microsoft.com>

	* config.gcc: Add Cygwin and MinGW difinitions.
	* config/aarch64/aarch64-protos.h
	(mingw_pe_maybe_record_exported_symbol): Declare functions
	which are used in Cygwin and MinGW environment.
	(mingw_pe_section_type_flags): Likewise.
	(mingw_pe_unique_section): Likewise.
	(mingw_pe_encode_section_info): Likewise.
	* config/aarch64/cygming.h: New file.

2024-05-07  Zac Walker  <zacwalker@microsoft.com>

	* config.gcc: Define TARGET_AARCH64_MS_ABI.
	* config/mingw/mingw-stdint.h (INTPTR_TYPE): Use
	TARGET_AARCH64_MS_ABI to adjust MinGW headers for
	AArch64 MS ABI.
	(UINTPTR_TYPE): Likewise.
	(defined): Likewise.
	* config/mingw/mingw32.h (DEFAULT_ABI): Likewise.
	(defined): Likewise.
	* config/mingw/winnt.cc (defined): Use TARGET_ARM64_MS_ABI to
	exclude ix86_get_callcvt.
	(i386_pe_maybe_mangle_decl_assembler_name): Likewise.
	(i386_pe_mangle_decl_assembler_name): Likewise.

2024-05-07  Zac Walker  <zacwalker@microsoft.com>

	* config/i386/cygming.h (SUBTARGET_ENCODE_SECTION_INFO):
	Rename functions in mingw folder which will be reused for
	aarch64.
	(TARGET_ASM_UNIQUE_SECTION): Likewise.
	(TARGET_ASM_NAMED_SECTION): Likewise.
	(TARGET_SECTION_TYPE_FLAGS): Likewise.
	(ASM_DECLARE_COLD_FUNCTION_NAME): Likewise.
	(ASM_OUTPUT_EXTERNAL_LIBCALL): Likewise.
	* config/i386/i386-protos.h (i386_pe_unique_section):
	Rename into ...
	(mingw_pe_unique_section): ... this.
	(i386_pe_declare_function_type): Rename into ...
	(mingw_pe_declare_function_type): ... this.
	(i386_pe_encode_section_info): Rename into ...
	(mingw_pe_encode_section_info): ... this.
	(i386_pe_maybe_record_exported_symbol): Rename into ...
	(mingw_pe_maybe_record_exported_symbol): ... this.
	(i386_pe_section_type_flags): Rename into ...
	(mingw_pe_section_type_flags): ... this.
	(i386_pe_asm_named_section): Rename into ...
	(mingw_pe_asm_named_section): ... this.
	* config/mingw/winnt.cc (i386_pe_encode_section_info):
	Rename into ...
	(mingw_pe_encode_section_info): ... this.
	(i386_pe_unique_section): Rename into ...
	(mingw_pe_unique_section): ... this.
	(i386_pe_section_type_flags): Rename into ...
	(mingw_pe_section_type_flags): ... this.
	(i386_pe_asm_named_section): Rename into ...
	(mingw_pe_asm_named_section): ... this.
	(i386_pe_asm_output_aligned_decl_common): Likewise.
	(i386_pe_declare_function_type): Rename into ...
	(mingw_pe_declare_function_type): ... this.
	(i386_pe_maybe_record_exported_symbol): Rename into ...
	(mingw_pe_maybe_record_exported_symbol): ... this.
	(i386_pe_start_function): Likewise.
	* varasm.cc (switch_to_comdat_section): Likewise.

2024-05-07  Zac Walker  <zacwalker@microsoft.com>

	* config.gcc: Adjust targets after moving MinGW related files
	from i386 to mingw folder.
	* config/i386/cygming.opt: Move to...
	* config/mingw/cygming.opt: ...here.
	* config/i386/cygming.opt.urls: Move to...
	* config/mingw/cygming.opt.urls: ...here.
	* config/i386/cygwin-d.cc: Move to...
	* config/mingw/cygwin-d.cc: ...here.
	* config/i386/mingw-stdint.h: Move to...
	* config/mingw/mingw-stdint.h: ...here.
	* config/i386/mingw.opt: Move to...
	* config/mingw/mingw.opt: ...here.
	* config/i386/mingw.opt.urls: Move to...
	* config/mingw/mingw.opt.urls: ...here.
	* config/i386/mingw32.h: Move to...
	* config/mingw/mingw32.h: ...here.
	* config/i386/msformat-c.cc: Move to...
	* config/mingw/msformat-c.cc: ...here.
	* config/i386/t-cygming: Move to...
	* config/mingw/t-cygming: ...here and updated.
	* config/i386/winnt-cxx.cc: Move to...
	* config/mingw/winnt-cxx.cc: ...here.
	* config/i386/winnt-d.cc: Move to...
	* config/mingw/winnt-d.cc: ...here.
	* config/i386/winnt-stubs.cc: Move to...
	* config/mingw/winnt-stubs.cc: ...here.
	* config/i386/winnt.cc: Move to...
	* config/mingw/winnt.cc: ...here.

2024-05-07  Zac Walker  <zacwalker@microsoft.com>

	* config.gcc: Add COFF format support definitions.
	* config/aarch64/aarch64-coff.h: New file.

2024-05-07  Zac Walker  <zacwalker@microsoft.com>

	* config.gcc: Define TARGET_AARCH64_MS_ABI when
	AArch64 MS ABI is used.
	* config/aarch64/aarch64.h (FIXED_X18): Adjust
	FIXED_REGISTERS, CALL_REALLY_USED_REGISTERS and
	STATIC_CHAIN_REGNUM for AArch64 MS ABI.
	(CALL_USED_X18): Likewise.
	(FIXED_REGISTERS): Likewise.
	* config/aarch64/aarch64-abi-ms.h: New file.

2024-05-07  Zac Walker  <zacwalker@microsoft.com>

	* config.gcc: Add aarch64-w64-mingw32 target.

2024-05-07  Alex Coplan  <alex.coplan@arm.com>

	PR target/114674
	* config/aarch64/aarch64-ldp-fusion.cc (ldp_bb_info::fuse_pair):
	Use replace_equiv_address_nv on a change of base instead of
	adjust_address_nv on the other access.

2024-05-07  Richard Biener  <rguenther@suse.de>

	* tree-into-ssa.cc (insert_updated_phi_nodes_for): Fix block
	index check.

2024-05-07  Richard Biener  <rguenther@suse.de>

	* tree-ssa-live.cc (init_var_map): Pre-allocate vec_bbs vector
	to the correct size and use quick_push.

2024-05-07  Richard Biener  <rguenther@suse.de>

	PR middle-end/27800
	* gimplify.cc (gimplify_modify_expr_rhs): For a COND_EXPR
	avoid a temporary from gimplify_cond_expr when the LHS is
	a register by pushing the assignment into the COND_EXPR arms.

2024-05-07  Richard Biener  <rguenther@suse.de>

	* gimplify.cc (gimplify_hasher::equal): Remove redundant
	checking.

2024-05-07  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	PR tree-optimization/110490
	* tree-scalar-evolution.cc (expression_expensive_p): Also
	consider mode widening for popcount, clz, and ctz.

2024-05-07  Richard Biener  <rguenther@suse.de>

	* cfgexpand.cc (stack_var::representative): Use 'unsigned'
	for stack var indexes instead of 'size_t'.
	(stack_var::next): Likewise.
	(EOC): Likewise.
	(stack_vars_alloc): Likewise.
	(stack_vars_num): Likewise.
	(decl_to_stack_part): Likewise.
	(stack_vars_sorted): Likewise.
	(add_stack_var): Likewise.
	(add_stack_var_conflict): Likewise.
	(stack_var_conflict_p): Likewise.
	(visit_op): Likewise.
	(visit_conflict): Likewise.
	(add_scope_conflicts_1): Likewise.
	(stack_var_cmp): Likewise.
	(part_hashmap): Likewise.
	(update_alias_info_with_stack_vars): Likewise.
	(union_stack_vars): Likewise.
	(partition_stack_vars): Likewise.
	(dump_stack_var_partition): Likewise.
	(expand_stack_vars): Likewise.
	(account_stack_vars): Likewise.
	(stack_protect_decl_phase_1): Likewise.
	(stack_protect_decl_phase_2): Likewise.
	(asan_decl_phase_3): Likewise.
	(init_vars_expansion): Likewise.
	(estimated_stack_frame_size): Likewise.

2024-05-07  Richard Biener  <rguenther@suse.de>

	PR middle-end/114931
	* tree.cc (type_hash_canon_hash): Hash TYPE_STRUCTURAL_EQUALITY_P.
	(type_cache_hasher::equal): Compare TYPE_STRUCTURAL_EQUALITY_P.
	(build_array_type_1): Set TYPE_STRUCTURAL_EQUALITY_P before
	probing with type_hash_canon.
	(build_function_type): Likewise.
	(build_method_type_directly): Likewise.
	(build_offset_type): Likewise.
	(build_complex_type): Likewise.
	* attribs.cc (build_type_attribute_qual_variant): Likewise.

2024-05-07  Aldy Hernandez  <aldyh@redhat.com>

	* ipa-cp.cc (ipa_vr_operation_and_type_effects): Use ipa_supports_p.
	(ipa_value_range_from_jfunc): Change Value_Range type.
	(propagate_vr_across_jump_function): Same.
	* ipa-cp.h (ipa_supports_p): New.
	* ipa-fnsummary.cc (evaluate_conditions_for_known_args): Change Value_Range type.
	* ipa-prop.cc (ipa_compute_jump_functions_for_edge): Use ipa_supports_p.
	(ipcp_get_parm_bits): Same.

2024-05-07  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* config.gcc: Move *-*-solaris2.11.[0-3]* to unsupported list.
	<*-*-solaris2*> (default_use_cxa_atexit): Set unconditionally.
	* configure.ac (AX_LIB_SOCKET_NSL): Don't call.
	(NETLIBS): Remove.
	(gcc_cv_ld_aligned_shf_merge): Remove.
	(hidden_linkonce) <i?86-*-solaris2* | x86_64-*-solaris2*>: Remove.
	(gcc_cv_target_dl_iterate_phdr) <*-*-solaris2*>: Always set to yes.
	* Makefile.in (NETLIBS): Remove.
	* configure, config.in, aclocal.m4: Regenerate.
	* config/sol2.h: Don't check HAVE_SOLARIS_CRTS.
	(STARTFILE_SPEC): Remove !HAVE_SOLARIS_CRTS case.
	[USE_GLD] (LINK_EH_SPEC): Remove TARGET_DL_ITERATE_PHDR guard.
	* config/i386/i386.cc (USE_HIDDEN_LINKONCE): Remove guard.
	* varasm.cc (mergeable_string_section): Remove
	HAVE_LD_ALIGNED_SHF_MERGE handling.
	(mergeable_constant_section): Likewise.
	* doc/install.texi (Specific,i?86-*-solaris2*): Reference Solaris
	11.4 only.
	(Specific, *-*-solaris2*): Document Solaris 11.3 removal.  Remove
	11.3 references and caveats.  Update for 11.4.

2024-05-07  Richard Biener  <rguenther@suse.de>

	Revert:
	2024-04-10  Richard Biener  <rguenther@suse.de>

	Revert:
	2024-03-27  Segher Boessenkool  <segher@kernel.crashing.org>

	PR rtl-optimization/101523
	* combine.cc (try_combine): Don't do a 2-insn combination if
	it does not in fact change I2.

2024-05-07  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/97263
	* doc/invoke.texi(fmath-errno): Document it is turned on
	with -Ofast.
	(funsafe-math-optimizations): Likewise.
	(ffinite-math-only): Likewise.
	(fno-trapping-math): Likewise and use less strong language.

2024-05-07  liuhongt  <hongtao.liu@intel.com>

	* config/i386/sse.md (usdot_prodv*qi): Extend to VI1_AVX512
	with vpmaddwd when avxvnni/avx512vnni is not available.

2024-05-07  liuhongt  <hongtao.liu@intel.com>

	PR target/113079
	* config/i386/mmx.md (usdot_prodv8qi): New expander.
	(sdot_prodv8qi): Ditto.
	(udot_prodv8qi): Ditto.
	(usdot_prodv4hi): Ditto.
	(udot_prodv4hi): Ditto.
	(sdot_prodv4hi): Ditto.

2024-05-07  liuhongt  <hongtao.liu@intel.com>

	PR target/113090
	* config/i386/i386-expand.cc
	(expand_vec_perm_punpckldq_pshuf): New function.
	(ix86_expand_vec_perm_const_1): Try
	expand_vec_perm_punpckldq_pshuf for sequence of 2
	instructions.

2024-05-07  Dimitar Dimitrov  <dimitar@dinux.eu>

	* config/pru/pru-passes.cc (class pass_pru_minrt_check): New
	pass.
	(pass_pru_minrt_check::execute): New method.
	(make_pru_minrt_check): New function.
	* config/pru/pru-passes.def (INSERT_PASS_AFTER): Register the
	minrt check pass.
	* config/pru/pru-protos.h (make_pru_minrt_check): Add
	declaration.

2024-05-07  Dimitar Dimitrov  <dimitar@dinux.eu>

	* config/pru/pru-passes.cc (class pass_tiabi_check): Rename to
	add "pru_" prefix.
	(class pass_pru_tiabi_check): Ditto.
	(pass_tiabi_check::execute): Ditto.
	(pass_pru_tiabi_check::execute): Ditto.
	(make_pru_tiabi_check): Ditto.
	(pru_register_abicheck_pass): Remove.
	* config/pru/pru-protos.h (pru_register_abicheck_pass): Remove.
	(make_pru_tiabi_check): Add declaration.
	* config/pru/pru.cc (pru_option_override): Remove explicit pass
	registration.
	* config/pru/t-pru: Register PRU passes definition file.
	* config/pru/pru-passes.def: New file.

2024-05-07  Dimitar Dimitrov  <dimitar@dinux.eu>

	* config/pru/pru.md (lshrdi3): Use HOST_WIDE_INT_1U macro.
	(ashldi3): Ditto.

2024-05-07  Dimitar Dimitrov  <dimitar@dinux.eu>

	* config/pru/pru-passes.cc: Drop ATTRIBUTE_UNUSED and remove
	argument's name.
	* config/pru/pru-pragma.cc (pru_pragma_ctable_entry): Ditto.
	* config/pru/pru.cc (pru_function_profiler): Ditto.
	(pru_can_eliminate): Ditto.
	(pru_rtx_costs): Ditto.
	(pru_insert_attributes): Ditto.
	(pru_function_value): Ditto.
	(pru_libcall_value): Ditto.
	(pru_return_in_memory): Ditto.
	(pru_builtin_decl): Ditto.
	(pru_expand_builtin): Ditto.

2024-05-07  Dimitar Dimitrov  <dimitar@dinux.eu>

	* config/pru/pru.cc (prologue_saved_reg_p): Skip saving
	if function will not return.

2024-05-07  Dimitar Dimitrov  <dimitar@dinux.eu>

	* config/pru/alu-zext.md (_noz0): New subst attribute.
	(<code>_impl): Allow zero-extending the destination.
	(<shift_op>): Remove unified pattern
	(ashl_impl): New distinct pattern.
	(lshr_impl): Ditto.
	(alu3_zext_op0_subst): New subst iterator to zero-extend the
	destination register.

2024-05-07  Dimitar Dimitrov  <dimitar@dinux.eu>

	* config/pru/pru.md (extzv<mode>): Make it an expand pattern,
	handle efficiently zero-positioned bit-fields.
	(insv<mode>): New expand pattern.

2024-05-07  Dimitar Dimitrov  <dimitar@dinux.eu>

	* config/pru/pru.md: New pattern alternative for zero-filling
	64-bit registers.

2024-05-07  Dimitar Dimitrov  <dimitar@dinux.eu>

	* config/pru/pru.cc (pru_address_cost): Implement address cost
	calculation.
	(TARGET_ADDRESS_COST): Define for PRU.

2024-05-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114921
	* tree-vect-stmts.cc (vectorizable_assignment): Use
	tree_nop_conversion_p to identify converts we can vectorize
	with a simple assignment.

2024-05-07  Roger Sayle  <roger@nextmovesoftware.com>
	    Hongtao Liu  <hongtao.liu@intel.com>

	PR target/106060
	* config/i386/i386-expand.cc (enum ix86_vec_bcast_alg): New.
	(struct ix86_vec_bcast_map_simode_t): New type for table below.
	(ix86_vec_bcast_map_simode): Table of SImode constants that may
	be efficiently synthesized by a ix86_vec_bcast_alg method.
	(ix86_vec_bcast_map_simode_cmp): New comparator for bsearch.
	(ix86_vector_duplicate_simode_const): Efficiently synthesize
	V4SImode and V8SImode constants that duplicate special constants.
	(ix86_vector_duplicate_value): Attempt to synthesize "special"
	vector constants using ix86_vector_duplicate_simode_const.
	* config/i386/i386.cc (ix86_rtx_costs) <case ABS>: ABS of a
	vector integer mode costs with a single SSE instruction.

2024-05-06  Xiao Zeng  <zengxiao@eswincomputing.com>

	* common/config/riscv/riscv-common.cc (riscv_implied_info): zfbfmin
	implies zfhmin.
	(riscv_ext_version_table, riscv_ext_flag_table): Add zfbfmin.
	* config/riscv/riscv.opt (ZFBFMIN): Add optoion.

2024-05-06  Xiao Zeng  <zengxiao@eswincomputing.com>
	    Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/iterators.md: New mode iterator HFBF.
	* config/riscv/riscv-builtins.cc (riscv_init_builtin_types):
	Initialize data type _Bfloat16.
	* config/riscv/riscv-modes.def (FLOAT_MODE): New.
	(ADJUST_FLOAT_FORMAT): New.
	* config/riscv/riscv.cc (riscv_mangle_type): Support for BFmode.
	(riscv_scalar_mode_supported_p): Ditto.
	(riscv_libgcc_floating_mode_supported_p): Ditto.
	(riscv_init_libfuncs): Set the conversion method for BFmode and
	HFmode.
	(riscv_block_arith_comp_libfuncs_for_mode): Set the arithmetic
	and comparison libfuncs for the mode.
	* config/riscv/riscv.md (mode" ): Add BF.
	(movhf): Support for BFmode.
	(mov<mode>): Ditto.
	(*movhf_softfloat): Ditto.
	(*mov<mode>_softfloat): Ditto.

2024-05-06  Palmer Dabbelt  <palmer@rivosinc.com>

	* doc/invoke.texi (RISC-V): Add -mcmodel=large.

2024-05-06  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_integer_op): Add field tracking if we
	want to use a "uw" instruction variant.
	(riscv_build_integer_1): Initialize the new field in various places.
	Use lui+slli.uw for some constants.
	(riscv_move_integer): Handle slli.uw.

2024-05-06  Qing Zhao  <qing.zhao@oracle.com>

	PR c/53548
	* stor-layout.cc (place_union_field): Use zero sizes for flexible array
	member fields.

2024-05-06  Qing Zhao  <qing.zhao@oracle.com>

	PR c/53548
	* doc/extend.texi: Add documentation for Flexible Array Members in
	Unions and Flexible Array Members alone in Structures.

2024-05-06  Georg-Johann Lay  <avr@gjlay.de>

	PR ipa/92606
	* config/avr/avr.cc (avr_option_override): Set
	flag_ipa_icf_variables = 0.

2024-05-06  Sandra Loosemore  <sloosemore@baylibre.com>

	* tree-nested.cc (convert_tramp_reference_stmt): Use the correct
	accessor for GIMPLE_OMP_TARGET clauses.

2024-05-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100923
	* tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference): Valueize
	base SSA_NAME.
	(vn_reference_lookup_3): Adjust vn_context_bb around calls
	to ao_ref_init_from_vn_reference.
	(vn_reference_lookup_pieces): Revert original PR100923 fix.
	(vn_reference_lookup): Likewise.

2024-05-06  Richard Biener  <rguenther@suse.de>

	* tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference): Add
	TARGET_MEM_REF support.  Handle more bases.

2024-05-06  YunQiang Su  <syq@gcc.gnu.org>

	PR target/113179
	* expmed.cc(store_bit_field_using_insv): TRUNCATE value1 if
	needed.

2024-05-05  Andrew Pinski  <quic_apinski@quicinc.com>

	* gimple-loop-versioning.cc (loop_versioning): Remove m_nloops field.
	(loop_versioning::loop_versioning): Remove initialization of
	m_nloops field and move it to be a local variable.
	(loop_versioning::analyze_blocks): Fix formating.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* gimple-range-op.cc (class cfn_pass_through_arg1): Add overloads
	for prange operations.
	(cfn_strlen): Same.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add overloaded declarations for pointer variants.
	* range-op-ptr.cc (operator_ge::fold_range): New.
	(operator_ge::op1_range): New.
	(operator_ge::op2_range): New.
	(operator_ge::op1_op2_relation): New.
	(operator_ge::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add overloaded declarations for pointer variants.
	* range-op-ptr.cc (operator_gt::fold_range): New.
	(operator_gt::op1_range): New.
	(operator_gt::op2_range): New.
	(operator_gt::op1_op2_relation): New.
	(operator_gt::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add overloaded declarations for pointer variants.
	* range-op-ptr.cc (operator_le::fold_range): New.
	(operator_le::op1_range): New.
	(operator_le::op2_range): New.
	(operator_le::op1_op2_relation): New.
	(operator_le::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add overloaded declarations for pointer variants.
	* range-op-ptr.cc (max_limit): New.
	(min_limit): New.
	(build_lt): New.
	(build_le): New.
	(build_gt): New.
	(build_ge): New.
	(operator_lt::fold_range): New.
	(operator_lt::op1_range): New.
	(operator_lt::op2_range): New.
	(operator_lt::op1_op2_relation): New.
	(operator_lt::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add overloaded declarations for pointer variants.
	* range-op-ptr.cc (operator_equal::fold_range): New.
	(operator_equal::op1_range): New.
	(operator_equal::op2_range): New.
	(operator_equal::op1_op2_relation): New.
	(operator_equal::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add overloaded declarations for pointer variants.
	* range-op-ptr.cc (operator_not_equal::fold_range): New.
	(operator_not_equal::op1_range): New.
	(operator_not_equal::op2_range): New.
	(operator_not_equal::op1_op2_relation): New.
	(operator_not_equal::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add overloaded declarations for pointer variants.
	* range-op-ptr.cc (operator_bitwise_or::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add overloaded declarations for pointer variants.
	* range-op-ptr.cc (operator_bitwise_and::fold_range): New.
	(operator_bitwise_and::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-ptr.cc
	(operator_pointer_diff::op1_op2_relation_effect): New.
	(operator_pointer_diff::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-ptr.cc (class pointer_plus_operator): Add overloaded declarations
	for pointer variants.
	(pointer_plus_operator::fold_range): New.
	(pointer_plus_operator::op2_range): New.
	(pointer_plus_operator::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add overloaded declarations for pointer variants.
	* range-op-ptr.cc (operator_addr_expr::op1_range): New.
	(operator_addr_expr::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add overloaded declarations for pointer variants.
	* range-op-ptr.cc (operator_min::fold_range): New.
	(operator_min::pointers_handled_p): New.
	(operator_max::fold_range): New.
	(operator_max::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add overloaded declarations for pointer variants.
	* range-op-ptr.cc (operator_cast::fold_range): New.
	(operator_cast::op1_range): New.
	(operator_cast::lhs_op1_relation): New.
	(operator_cast::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add overloaded declarations for pointer variants.
	* range-op-ptr.cc (operator_cst::fold_range): New.
	(operator_cst::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add overloaded declarations for fold_range, op1_range,
	lhs_op1_relation, pointers_handled_p.
	* range-op-ptr.cc (operator_identity::fold_range): New.
	(operator_identity::lhs_op1_relation): New.
	(operator_identity::op1_range): New.
	(operator_identity::pointers_handled_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-mixed.h: Add using declarator for all classes.
	* range-op-ptr.cc (range_operator::pointers_handled_p): New.
	(range_operator::fold_range): New.
	(range_operator::op1_op2_relation_effect): New.
	(range_operator::op1_range): New.
	(range_operator::op2_range): New.
	(range_operator::op1_op2_relation): New.
	(range_operator::lhs_op1_relation): New.
	(range_operator::update_bitmask): New.
	(class pointer_plus_operator): New.
	(class operator_pointer_diff): New.
	(class hybrid_min_operator): New.
	(class hybrid_max_operator): New.
	* range-op.cc: Add RO_PPP, RO_PPI, RO_IPP, RO_IPI, RO_PIP, RO_PII.
	(range_op_handler::discriminator_fail): New.
	(has_pointer_operand_p): New.
	(range_op_handler::fold_range): Add pointer support.
	(range_op_handler::op1_range): Same.
	(range_op_handler::op2_range): Same.
	(range_op_handler::lhs_op1_relation): Same.
	(range_op_handler::lhs_op2_relation): Same.
	(range_op_handler::op1_op2_relation): Same.
	(class operator_div): Add using.
	(class operator_lshift): Add using.
	(class operator_rshift):Add using.
	(class operator_trunc_mod):Add using.
	(class operator_absu):Add using.
	* range-op.h (enum range_op_dispatch_type): New.
	Add extern definitions for RO_*.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* value-range.cc (get_legacy_range): New version for prange.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* value-range.cc (add_vrange): Add prange support.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* value-range-storage.cc (vrange_allocator::clone_varying): Add
	prange support.
	(vrange_allocator::clone_undefined): Same.
	(vrange_storage::alloc): Same.
	(vrange_storage::set_vrange): Same.
	(vrange_storage::get_vrange): Same.
	(vrange_storage::fits_p): Same.
	(vrange_storage::equal_p): Same.
	(prange_storage::alloc): New.
	(prange_storage::prange_storage): New.
	(prange_storage::set_prange): New.
	(prange_storage::get_prange): New.
	(prange_storage::equal_p): New.
	(prange_storage::fits_p): New.
	* value-range-storage.h (class prange_storage): Add prange support.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* data-streamer-in.cc (streamer_read_value_range): Add prange support.
	* data-streamer-out.cc (streamer_write_vrange): Same.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* value-range-pretty-print.cc (vrange_printer::visit): New.
	* value-range-pretty-print.h: Declare prange visit() method.
	* value-range.cc (vrange::operator=): Add prange support.
	(vrange::operator==): Same.
	(prange::accept): New.
	(prange::set_nonnegative): New.
	(prange::set): New.
	(prange::contains_p): New.
	(prange::singleton_p): New.
	(prange::lbound): New.
	(prange::ubound): New.
	(prange::union_): New.
	(prange::intersect): New.
	(prange::operator=): New.
	(prange::operator==): New.
	(prange::invert): New.
	(prange::verify_range): New.
	(prange::update_bitmask): New.
	(range_tests_misc): Use prange.
	* value-range.h (enum value_range_discriminator): Add VR_PRANGE.
	(class prange): New.
	(Value_Range::init): Add prange support.
	(Value_Range::operator=): Same.
	(Value_Range::supports_type_p): Same.
	(prange::prange):  New.
	(prange::supports_p): New.
	(prange::supports_type_p): New.
	(prange::set_undefined): New.
	(prange::set_varying): New.
	(prange::set_nonzero): New.
	(prange::set_zero): New.
	(prange::contains_p): New.
	(prange::zero_p): New.
	(prange::nonzero_p): New.
	(prange::type): New.
	(prange::lower_bound): New.
	(prange::upper_bound): New.
	(prange::varying_compatible_p): New.
	(prange::get_bitmask): New.
	(prange::fits_p): New.

2024-05-04  Aldy Hernandez  <aldyh@redhat.com>

	* value-range.h (class prange): New.

2024-05-03  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/23872
	* tree-pretty-print.cc (dump_generic_node <case COMPOUND_EXPR>): Fix
	calls to dump_generic_node and also remove unreachable code that is testing
	`flags & TDF_SLIM`.

2024-05-03  Vineet Gupta  <vineetg@rivosinc.com>

	* config/riscv/riscv.cc: Comment updates.
	* config/riscv/riscv.h: Ditto.

2024-05-03  Vineet Gupta  <vineetg@rivosinc.com>

	* doc/rtl.texi: Add entry for GET_MODE_INNER.

2024-05-03  Richard Biener  <rguenther@suse.de>

	* bitmap.cc (bitmap_alloc): When using the global bitmap obstack
	assert that is initialized.

2024-05-03  Richard Biener  <rguenther@suse.de>

	PR middle-end/114931
	* tree.cc (build_array_type_1): Return early when type_hash_canon
	returned an older existing type.
	(build_function_type): Likewise.
	(build_method_type_directly): Likewise.
	(build_offset_type): Likewise.

2024-05-03  Alex Coplan  <alex.coplan@arm.com>

	PR rtl-optimization/114924
	* cfgrtl.cc (duplicate_insn_chain): When updating MEM_EXPRs,
	don't strip (e.g.) ARRAY_REFs from the final MEM_EXPR.

2024-05-03  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113596
	* tree-inline.cc (expand_call_inline): Emit __builtin_stack_save
	and __builtin_stack_restore calls around inlined functions which
	call alloca.

2024-05-03  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114921
	* tree-vect-stmts.cc (vectorizable_assignment): Require
	same vector component modes for input and output for
	CONVERT_EXPR_CODE_P.

2024-05-02  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.md (<round_pattern><ANYF:mode>2): Adjust
	condition to match what can be properly implemented.  Fix various
	formatting issues.
	(l<round_pattern><ANYF:mode>si2_sext): Fix formatting

2024-05-02  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/predicates.md (arith_or_zbs_operand): New predicate.
	* config/riscv/riscv.cc (riscv_build_integer_one): Use bseti to set
	single bits when profitable.
	* config/riscv/riscv.md (*<optab><mode>3): Renamed with '*' prefix.
	(<optab><mode>3): New expander for IOR/XOR.

2024-05-02  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.cc (vect_print_slp_tree): Mark live lanes.
	(dot_slp_tree): New overload for multiple entries.

2024-05-02  Gaius Mulley  <gaiusmod2@gmail.com>

	PR modula2/113836
	* doc/gm2.texi (Compiler options): Add -fm2-debug-trace=,
	-fm2-dump, -fm2-dump-decl=, -fm2-dump-gimple=, -fm2-dump-quad=
	and -fm2-dump-filter=.

2024-05-02  Marc Poulhiès  <poulhies@adacore.com>

	* value-range.h: fix static_assert to use 2 arguments.

2024-05-02  Peter Damianov  <peter0x44@disroot.org>

	PR lto/110710
	* lto-wrapper.cc (run_gcc): Instead of truncating a processed
	ltrans input from the Makefile use the new -truncate option
	to accomplish the same.

2024-05-02  Peter Damianov  <peter0x44@disroot.org>

	PR lto/110710
	* common.opt (truncate): New internal option.
	* gcc.cc (totruncate_file): New global.
	(driver_handle_option): Handle -truncate <file>.
	(driver::final_actions): Truncate the file indicated.

2024-05-02  Richard Biener  <rguenther@suse.de>

	* graphds.cc (dump_graph): Dump in graphviz format.

2024-05-02  Richard Biener  <rguenther@suse.de>

	* tree-ssa-live.h (tree_live_info_d::global): Remove.
	(partition_is_global): Likewise.
	(make_live_on_entry): Do not set bit in global.
	* tree-ssa-live.cc (new_tree_live_info): Do not allocate
	global bitmap.
	(delete_tree_live_info): Do not release it.
	(set_var_live_on_entry): Do not set bits in it.

2024-05-02  Richard Biener  <rguenther@suse.de>

	PR middle-end/114579
	* cfgexpand.cc (add_scope_conflicts_1): Record all-to-all
	conflicts only when there's a CFG merge but for all CFG merges.

2024-05-01  Gerald Pfeifer  <gerald@pfeifer.com>

	PR target/69374
	PR target/112959
	* doc/install.texi (Specific) <*-*-freebsd*>: The Ada and D
	run-time libraries are broken on i386 which also can affect
	64-bit builds. Go is broken.

2024-05-01  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/bitmanip.md (splitter to use w-form division): Remove
	explicit subregs.
	(zero extended bitfield extraction): Similarly.
	* config/riscv/thead.md (*th_memidx_operand): Similarly.

2024-05-01  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Break out
	tests for easier debugging in store pair fusion case.  Fix offset
	check in same.

2024-05-01  Gerald Pfeifer  <gerald@pfeifer.com>

	PR target/69374
	PR target/112959
	* doc/install.texi (Specific) <*-*-freebsd*>: No longer refer
	to GCC or binutils in base. Recommend bootstrap using binutils.

2024-05-01  Gerald Pfeifer  <gerald@pfeifer.com>

	PR target/69374
	* doc/install.texi (Specific) <ia64-*-hpux*>: Remove details
	on libunwind for GCC 3.4 and earlier.

2024-05-01  Aldy Hernandez  <aldyh@redhat.com>

	* ipa-fnsummary.cc (evaluate_properties_for_edge): Initialize Value_Range's.
	* value-range.h (class Value_Range): Add a buffer and remove
	m_irange and m_frange.
	(Value_Range::Value_Range): Call init.
	(Value_Range::set_type): Same.
	(Value_Range::init): Use in place new to initialize buffer.
	(Value_Range::operator=): Tidy.

2024-05-01  Aldy Hernandez  <aldyh@redhat.com>

	* value-range.cc (unsupported_range::union_): Cast vrange to
	unsupported_range.
	(unsupported_range::intersect): Same.
	(unsupported_range::operator=): Make argument an unsupported_range.
	* value-range.h: New constructor.

2024-04-30  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-op.cc (gimple_range_op_handler::calc_op1): Don't
	assert that here are less than 3 operands.
	(gimple_range_op_handler::maybe_builtin_call): Simply return if
	there is no type for the function call.

2024-04-30  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range.cc (gimple_ranger::range_on_entry): Adjust for new
	API and support non-SSA expressions.
	(gimple_ranger::range_on_exit): Ditto.
	* gimple-range.h (range_on_entry, range_on_exit): Adjust API.
	* value-query.cc (range_query::range_on_entry): New.
	(range_query::range_on_exit): New.
	(range_query::value_on_entry): New.
	(range_query::value_on_exit): New.
	(range_query::invoke_range_of_expr): New.
	(range_query::get_tree_range): Allow stmt, on_entry or on_exit
	range queries.
	SSA_NAMES should invoke range_of_expr if possible.
	* value-query.h (class range_query): Adjust prototypes.

2024-04-30  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range.cc (gimple_ranger::range_of_expr): Call range_of_stmt
	when there is no context stmt.

2024-04-30  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ranger_cache::get_global_range): Do not
	pre-evaluate PHI nodes from the cache.
	(ranger_cache::fill_block_cache): Make re-entrant.

2024-04-30  Andrew MacLeod  <amacleod@redhat.com>

	* value-query.cc (get_range_global): Rename to gimple_range_global.
	(gimple_range_global): Remove wrapper function.
	(global_range_query::range_of_expr): Call gimple_range_global.

2024-04-30  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-cfg.cc (verify_gimple_assign): Remove quote
	mark to shut up the warning.

2024-04-30  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-phiopt.cc (value_replacement): Reject undef variables
	so they don't become unconditional used.

2024-04-30  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-phiopt.cc (value_replacement): Move check for
	NE/EQ earlier.

2024-04-30  Andrew Pinski  <quic_apinski@quicinc.com>

	* tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges):
	Remove the special case of gimple_seq_singleton_p.

2024-04-30  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/112976
	* cfgexpand.cc (expand_gimple_stmt_1): Remove
	support for expanding nontemporal "moves" with
	ssa names on the LHS.

2024-04-30  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/112976
	* tree-cfg.cc (verify_gimple_assign): Verify that
	nontmporal moves are stores.
	* gimple.h (struct gimple): Note that only
	nontemporal stores are supported.

2024-04-30  Jivan Hakobyan  <jivanhakobyan9@gmail.com>

	* config/riscv/iterators.md (fix_ops, fix_uns): New iterators.
	(RINT, rint_pattern, rint_rm): Remove unused iterators.
	* config/riscv/riscv-protos.h (get_fp_rounding_coefficient): Prototype.
	* config/riscv/riscv-v.cc (get_fp_rounding_coefficient): Externalize.
	external linkage.
	* config/riscv/riscv.md (UNSPEC_LROUND): Remove.
	(fix_trunc<ANYF:mode><GPR:mode>2): Replace with ...
	(<fix_uns>_trunc<ANYF:mode>si2): New expander & associated insn.
	(<fix_uns>_trunc<ANYF:mode>si2_ext): New insn.
	(<fix_uns>_trunc<ANYF:mode>di2): Likewise.
	(l<rint_pattern><ANYF:mode><GPR:mode>2): Replace with ...
	(lrint<ANYF:mode>si2): New expander and associated insn.
	(lrint<ANYF:mode>si2_ext, lrint<ANYF:mode>di2): New insns.
	(<round_pattern><ANYF:mode>2): Replace with....
	(l<round_pattern><ANYF:mode>si2): New expander and associated insn.
	(l<round_pattern><ANYF:mode>si2_sext): New insn.
	(l<round_pattern><ANYF:mode>di2): Likewise.
	(<round_pattern><ANYF:mode>2): New expander.

2024-04-30  Aldy Hernandez  <aldyh@redhat.com>

	* gimple-ssa-warn-access.cc (check_nul_terminated_array): Change
	int_range<2> to int_range_max.
	(memmodel_to_uhwi): Same.
	* tree-ssa-loop-niter.cc (refine_value_range_using_guard): Same.
	(determine_value_range): Same.
	(infer_loop_bounds_from_signedness): Same.
	(scev_var_range_cant_overflow): Same.

2024-04-30  Richard Biener  <rguenther@suse.de>

	PR middle-end/13421
	* optabs-tree.cc (optab_for_tree_code): Do not consider
	{add,sub}v or {us,ss}{add,sub} optabs for POINTER_DIFF_EXPR
	or POINTER_PLUS_EXPR.

2024-04-30  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114876
	* gimple-ssa-sprintf.cc (format_character): For min == 0 && max == 0,
	set max, likely and unlikely members to 1 rather than 0.  Remove
	useless res.knownrange = true;.  Formatting fixes.

2024-04-30  Jakub Jelinek  <jakub@redhat.com>
	    Hongtao Liu  <hongtao.liu@intel.com>

	PR tree-optimization/114883
	* tree-vect-loop.cc (vect_transform_reduction): Allow IFN_COND_MIN and
	IFN_COND_MAX in the assert.

2024-04-30  Jakub Jelinek  <jakub@redhat.com>

	* doc/cpp.texi (__STDC_VERSION__): Document 202311L value
	for -std=c23/-std=gnu23.

2024-04-30  Richard Biener  <rguenther@suse.de>

	PR middle-end/114734
	* internal-fn.cc (expand_call_mem_ref): Use
	get_gimple_for_ssa_name to get at the def stmt of the address
	argument to honor SSA coalescing constraints.

2024-04-29  demin.han  <demin.han@starfivetech.com>

	PR target/114506
	* config/riscv/riscv-vector-costs.cc (non_contiguous_memory_access_p): Rename
	(need_additional_vector_vars_p): Rename and refine condition

2024-04-29  Pan Li  <pan2.li@intel.com>

	PR target/114885
	* config/riscv/riscv.cc (riscv_legitimize_subreg_const_poly_move): New
	func impl to take care of (const_int_poly:TI 8).
	(riscv_legitimize_move): Handle subreg is const_int_poly,

2024-04-29  Christoph Müllner  <christoph.muellner@vrull.eu>

	* common/config/riscv/riscv-common.cc: Move ziccamoa, ziccif,
	zicclsm, and ziccrse into riscv_zi_subext.
	* config/riscv/riscv.opt: Define MASK_ZIC64B for
	riscv_ziccmo_subext.

2024-04-29  Jie Mei  <jie.mei@oss.cipunited.com>

	* config/mips/i6400.md (i6400_fpu_minmax): New
	define_insn_reservation.
	* config/mips/mips.h (ISA_HAS_FMIN_FMAX): Define new macro.
	* config/mips/mips.md (UNSPEC_FMIN): New unspec.
	(UNSPEC_FMAX): Same as above.
	(type): Add fminmax.
	(smin<mode>3): Generates MIN.fmt instructions.
	(smax<mode>3): Generates MAX.fmt instructions.
	(fmin<mode>3): Generates MIN.fmt instructions.
	(fmax<mode>3): Generates MAX.fmt instructions.
	* config/mips/p6600.md (p6600_fpu_fabs): Include fminmax
	type.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* tree-ssa-ccp.cc (ccp_finalize): Normalize before calling
	set_bitmask.
	* value-range.cc (irange::intersect_bitmask): Calculate changed
	irange_bitmask bits on our own.
	(irange::union_bitmask): Same.
	(irange_bitmask::verify_mask): Verify that bits are normalized.
	* value-range.h (irange_bitmask::union_): Do not normalize.
	Remove return value.
	(irange_bitmask::intersect): Same.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* range-op-ptr.cc (pointer_plus_operator::wi_fold): Use method
	range setters instead of out of line functions.
	(pointer_min_max_operator::wi_fold): Same.
	(pointer_and_operator::wi_fold): Same.
	(pointer_or_operator::wi_fold): Same.
	* range-op.cc (operator_negate::fold_range): Same.
	(operator_addr_expr::fold_range): Same.
	(range_op_cast_tests): Same.
	* range.cc (range_zero): Remove.
	(range_nonzero): Remove.
	* range.h (range_zero): Remove.
	(range_nonzero): Remove.
	* value-range.cc (range_tests_misc): Use method instead of out of
	line function.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* value-range-pretty-print.cc (print_int_bound): New.
	(print_irange_bitmasks): New.
	(vrange_printer::print_irange_bound): Remove.
	(vrange_printer::print_irange_bitmasks): Remove.
	* value-range-pretty-print.h: Remove print_irange_bitmasks and
	print_irange_bound

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* value-range.h (range_includes_zero_p): Accept vrange.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* tree-ssa-loop-split.cc (split_at_bb_p): Make int_range a Value_Range.
	* tree-ssa-strlen.cc (get_range): Same.
	* value-query.cc (range_query::get_tree_range):  Handle both
	integers and pointers.
	* vr-values.cc (simplify_using_ranges::fold_cond_with_ops): Make
	r0 and r1 Value_Range's.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* value-range.cc (get_bitmask_from_range): Move out of irange class.
	(irange::get_bitmask): Call function instead of internal method.
	* value-range.h (class irange): Remove get_bitmask_from_range.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* value-range.cc (get_legacy_range): Make static and add another
	version of get_legacy_range that takes a vrange.
	* value-range.h (class irange): Remove unnecessary friendship with
	get_legacy_range.
	(get_legacy_range): Accept a vrange.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* value-range-storage.cc (irange_storage::set_irange): Move
	verification code from here...
	(vrange_storage::set_vrange): ...to here.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* gimple-range-op.cc (cfn_clz::fold_range): Change
	range_includes_zero_p argument to a reference.
	(cfn_ctz::fold_range): Same.
	* range-op.cc (operator_plus::lhs_op1_relation): Same.
	* value-range.h (range_includes_zero_p): Same.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* vr-values.cc (simplify_using_ranges::fold_cond_with_ops): Remove
	type from range_true and range_false.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* value-range-storage.h: Remove friends.
	* value-range.cc (gt_ggc_mx): Remove.
	(gt_pch_nx): Remove.
	* value-range.h (class vrange): Remove GTY markers.
	(class irange): Same.
	(class int_range): Same.
	(class frange): Same.
	(gt_ggc_mx): Remove.
	(gt_pch_nx): Remove.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* ipa-cp.cc (propagate_bits_across_jump_function): Access bitmask
	through base class.
	(ipcp_store_vr_results): Same.
	* ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
	(ipcp_get_parm_bits): Same.
	(ipcp_update_vr): Same.
	* range-op-mixed.h (update_known_bitmask): Change argument to vrange.
	* range-op.cc (update_known_bitmask): Same.
	* value-range.cc (vrange::update_bitmask):  New.
	(irange::set_nonzero_bits): Move to vrange class.
	(irange::get_nonzero_bits): Same.
	* value-range.h (class vrange): Add update_bitmask, get_bitmask,
	get_nonzero_bits, and set_nonzero_bits.
	(class irange): Make bitmask methods virtual overrides.
	(class Value_Range): Add get_bitmask and update_bitmask.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* tree-ssa-loop-niter.cc (refine_value_range_using_guard): Convert
	bound to wide_int.
	* value-range.cc (Value_Range::lower_bound): Remove.
	(Value_Range::upper_bound): Remove.
	(unsupported_range::lbound): New.
	(unsupported_range::ubound): New.
	(frange::lbound): New.
	(frange::ubound): New.
	(irange::lbound): New.
	(irange::ubound): New.
	* value-range.h (class vrange): Add lbound() and ubound().
	(class irange): Same.
	(class frange): Same.
	(class unsupported_range): Same.
	(class Value_Range): Rename lower_bound and upper_bound to lbound
	and ubound respectively.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* gimple-ssa-warn-access.cc (check_nul_terminated_array): Make Value_Range an int_range.
	(memmodel_to_uhwi): Same
	* tree-ssa-loop-niter.cc (refine_value_range_using_guard): Same.
	(determine_value_range): Same.
	(infer_loop_bounds_from_signedness): Same.
	(scev_var_range_cant_overflow): Same.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* value-range.h (vrange::~vrange): New.
	(int_range::~int_range): Make final override.

2024-04-28  Aldy Hernandez  <aldyh@redhat.com>

	* value-range.cc (unsupported_range::accept): Move down.
	(vrange::contains_p):  Rename to...
	(unsupported_range::contains_p): ...this.
	(vrange::singleton_p): Rename to...
	(unsupported_range::singleton_p): ...this.
	(vrange::set): Rename to...
	(unsupported_range::set): ...this.
	(vrange::type): Rename to...
	(unsupported_range::type): ...this.
	(vrange::supports_type_p): Rename to...
	(unsupported_range::supports_type_p): ...this.
	(vrange::set_undefined): Rename to...
	(unsupported_range::set_undefined): ...this.
	(vrange::set_varying): Rename to...
	(unsupported_range::set_varying): ...this.
	(vrange::union_): Rename to...
	(unsupported_range::union_): ...this.
	(vrange::intersect): Rename to...
	(unsupported_range::intersect): ...this.
	(vrange::zero_p): Rename to...
	(unsupported_range::zero_p): ...this.
	(vrange::nonzero_p): Rename to...
	(unsupported_range::nonzero_p): ...this.
	(vrange::set_nonzero): Rename to...
	(unsupported_range::set_nonzero): ...this.
	(vrange::set_zero): Rename to...
	(unsupported_range::set_zero): ...this.
	(vrange::set_nonnegative): Rename to...
	(unsupported_range::set_nonnegative): ...this.
	(vrange::fits_p): Rename to...
	(unsupported_range::fits_p): ...this.
	(unsupported_range::operator=): New.
	(frange::fits_p): New.
	* value-range.h (class vrange): Make an abstract class.
	(class unsupported_range): Declare override methods.

2024-04-28  Gerald Pfeifer  <gerald@pfeifer.com>

	PR target/69374
	PR target/112959
	* doc/install.texi (Specific) <*-*-freebsd*>: Remove references to
	FreeBSD 7 and older.

2024-04-28  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/contrib.texi: Update David Binderman's entry.

2024-04-28  liuhongt  <hongtao.liu@intel.com>

	* config/i386/i386.md: (zero_extendsidi2): Adjust
	alternative *k to ?k.
	(zero_extend<mode>di2): Ditto.
	(*zero_extend<mode>si2): Ditto.
	(*zero_extendqihi2): Ditto.

2024-04-28  Jiufu Guo  <guojiufu@linux.ibm.com>

	PR target/95782
	* config/s390/s390-c.cc (s390_macro_to_expand): Avoid empty identifier.

2024-04-28  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/113822
	* config/aarch64/aarch64.cc (aarch64_evpc_reencode): Use
	vec_perm_indices::new_shrunk_vector instead of manually
	going through the indices.

2024-04-27  Xi Ruoyao  <xry111@xry111.site>

	PR target/114861
	* config/loongarch/loongarch.md (bstrins_<mode>_for_mask): Add
	constraints for operands.
	(bstrins_<mode>_for_ior_mask): Likewise.

2024-04-27  Fangrui Song  <maskray@gcc.gnu.org>

	* config/riscv/elf.h (LINK_SPEC): Add -X.
	* config/riscv/freebsd.h (LINK_SPEC): Add -X.
	* config/riscv/linux.h (LINK_SPEC): Add -X.

2024-04-26  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	* config/aarch64/aarch64.cc (MAX_SET_SIZE): New define.
	(aarch64_progress_pointer): Remove function.
	(aarch64_set_one_block_and_progress_pointer): Simplify and clean up.
	(aarch64_expand_setmem): Clean up implementation, use byte offsets,
	simplify size calculation.

2024-04-26  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	* config/aarch64/aarch64.cc (aarch64_mode_valid_for_sched_fusion_p):
	Remove check for AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS.
	(aarch64_advsimd_ldp_stp_p): Likewise.
	(aarch64_stp_sequence_cost): Likewise.
	(aarch64_expand_cpymem): Likewise.
	(aarch64_expand_setmem): Likewise.
	* config/aarch64/aarch64-ldp-fusion.cc (ldp_operand_mode_ok_p):
	Likewise.
	* config/aarch64/aarch64-ldpstp.md: Likewise.
	* config/aarch64/aarch64-tuning-flags.def: Remove NO_LDP_STP_QREGS.
	* config/aarch64/tuning_models/emag.h: Likewise.
	* config/aarch64/tuning_models/xgene1.h: Likewise.

2024-04-26  Frederik Harwath  <frederik@harwath.name>

	* config.gcc: Add gfx90c.
	* config/gcn/gcn-hsa.h (NO_SRAM_ECC): Likewise.
	* config/gcn/gcn-opts.h (enum processor_type): Likewise.
	(TARGET_GFX90c): New macro.
	* config/gcn/gcn.cc (gcn_option_override): Handle gfx90c.
	(gcn_omp_device_kind_arch_isa): Likewise.
	(output_file_start): Likewise.
	* config/gcn/gcn.h: Add gfx90c.
	* config/gcn/gcn.opt: Likewise.
	* config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX90c): New macro.
	(get_arch): Handle gfx90c.
	(main): Handle EF_AMDGPU_MACH_AMDGCN_GFX90c
	* config/gcn/t-omp-device: Add gfx90c.
	* doc/install.texi: Likewise.
	* doc/invoke.texi: Likewise.

2024-04-25  David Faust  <david.faust@oracle.com>

	* config/bpf/bpf.h (PREFERRED_DEBUGGING_TYPE): Set to BTF_DEBUG.

2024-04-25  David Faust  <david.faust@oracle.com>

	* config/bpf/bpf.cc (bpf_option_override): Improve handling of CO-RE
	options to avoid issues with -gtoggle.

2024-04-25  Jakub Jelinek  <jakub@redhat.com>

	PR fortran/114825
	* tree-nested.cc (get_debug_decl): New function.
	(get_nonlocal_debug_decl): Use it.
	(get_local_debug_decl): Likewise.

2024-04-25  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/bpf/bpf.opt: Use ASM_PSEUDOC for the default value of
	-masm.
	* config/bpf/bpf.h (ASM_SPEC): Adapt accordingly.
	* doc/invoke.texi (eBPF Options): Update.

2024-04-25  Richard Ball  <richard.ball@arm.com>

	PR target/114837
	* config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear):
	Add zero/sign extend.
	(arm_expand_prologue): Add zero/sign extend.

2024-04-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114792
	* tree-ssa-loop-ch.cc (ch_order_loops): New function.
	(ch_base::copy_headers): Sort loops to unloop inner-to-outer.

2024-04-25  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/114416
	* config/sparc/sparc.h (SUN_V9_ABI_COMPATIBILITY): New macro.
	* config/sparc/sol2.h (SUN_V9_ABI_COMPATIBILITY): Redefine it.
	* config/sparc/sparc.cc (fp_type_for_abi): New predicate.
	(traverse_record_type): Use it to spot floating-point types.
	(compute_fp_layout): Also deal with array types.

2024-04-25  Pan Li  <pan2.li@intel.com>

	* config/riscv/vector-crypto.md: Add early clobber to the
	dest operand of vwsll.

2024-04-25  Haochen Gui  <guihaoc@gcc.gnu.org>

	* config/rs6000/altivec.md (*bcdinvalid_<mode>): Replace bcdadd
	with bcdsub.
	(bcdinvalid_<mode>): Likewise.

2024-04-24  Jakub Jelinek  <jakub@redhat.com>

	PR other/114738
	* opts.cc (get_option_url): Revert 2024-04-17 changes.
	* gcc-urlifier.cc: Don't include diagnostic-core.h.
	(gcc_urlifier::make_doc_url): Revert 2024-04-17 changes.
	* configure.ac (documentation-root-url): On release branches
	append gcc-MAJOR.MINOR.0/ to the default DOCUMENTATION_ROOT_URL.
	* doc/install.texi (--with-documentation-root-url=): Document
	the change of the default.
	* configure: Regenerate.

2024-04-24  Pan Li  <pan2.li@intel.com>

	Revert:
	2023-11-29  Juzhe-Zhong  <juzhe.zhong@rivai.ai>
		    kito-cheng  <kito.cheng@sifive.com>
		    kito-cheng  <kito.cheng@gmail.com>

	PR target/112431
	* config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): New register filters.
	* config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Ditto.
	(no,yes): Ditto.
	* config/riscv/vector.md: Support highpart register overlap for vwcvt.

2024-04-24  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config.gcc: Add bpf-c.o as a target object for C and C++.
	* config/bpf/bpf.cc (bpf_target_macros): Move to bpf-c.cc.
	* config/bpf/bpf-c.cc: New file.
	(bpf_target_macros): Move from bpf.cc and define BPF CPU
	feature	macros.
	* config/bpf/t-bpf: Add rules to build bpf-c.o.

2024-04-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114787
	* tree-cfg.cc (remove_edge_and_dominated_blocks): When
	removing a loop backedge clear niter info and when removing
	the last backedge of a loop mark that loop for removal.

2024-04-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114832
	* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
	Fix dominance check.

2024-04-24  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
	Check whether AVX512F is explicitly enabled.

2024-04-24  Pan Li  <pan2.li@intel.com>

	Revert:
	2023-11-30  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/vector.md: Support highpart overlap for vext.vf2

2024-04-23  Jakub Jelinek  <jakub@redhat.com>

	PR target/114810
	* config/i386/i386.md (*andn<dwi>3_doubleword_bmi): Split the =&r,r,ro
	alternative into =&r,r,r enabled only for x64 and =&r,r,o.

2024-04-23  Jan Hubicka  <jh@suse.cz>

	* doc/invoke.texi (-ftree-loop-distribute-patterns): Remove duplicated
	sentence about optimization flags implying this.

2024-04-23  Jakub Jelinek  <jakub@redhat.com>

	* config/darwin.opt (init): Spelling fix: initialiser -> initializer.

2024-04-23  Jakub Jelinek  <jakub@redhat.com>

	* config/epiphany/epiphany.opt (may-round-for-trunc): Spelling fix:
	floatig -> floating.
	* config/riscv/riscv.opt (mcsr-check): Spelling fix: CRS -> CSR.
	* params.opt (-param=ipa-cp-profile-count-base=): Spelling fix:
	frequncy -> frequency.

2024-04-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114799
	* tree-vect-slp.cc (vect_get_and_check_slp_defs): Properly
	update ->any_pattern when swapping operands.

2024-04-23  Andreas Krebbel  <krebbel@linux.ibm.com>

	PR target/114676
	* config/s390/s390-c.cc (s390_expand_overloaded_builtin): Use a
	MEM_REF with an addend of type ptr_type_node.

2024-04-23  Yang Yujie  <yangyujie@loongson.cn>

	* config.gcc: Add loongarch-evolution.o.
	* config/loongarch/genopts/genstr.sh: Enable generation of
	loongarch-evolution.[cc,h].
	* config/loongarch/t-loongarch: Likewise.
	* config/loongarch/genopts/gen-evolution.awk: New file.
	* config/loongarch/genopts/isa-evolution.in: Mark ISA version
	of introduction for each ISA evolution feature.
	* config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
	Define builtin macros for enabled ISA evolutions and the ISA
	version.
	* config/loongarch/loongarch-cpu.cc: Use loongarch-evolution.h.
	* config/loongarch/loongarch.h: Likewise.
	* config/loongarch/loongarch-cpucfg-map.h: Delete.
	* config/loongarch/loongarch-evolution.cc: New file.
	* config/loongarch/loongarch-evolution.h: New file.
	* config/loongarch/loongarch-opts.h (ISA_HAS_FRECIPE): Define.
	(ISA_HAS_DIV32): Likewise.
	(ISA_HAS_LAM_BH): Likewise.
	(ISA_HAS_LAMCAS): Likewise.
	(ISA_HAS_LD_SEQ_SA): Likewise.

2024-04-23  Yang Yujie  <yangyujie@loongson.cn>

	* config.gcc: Make la64v1.0 the default ISA preset of the lp64d ABI.
	* config/loongarch/genopts/loongarch-strings: Define la64v1.0, la64v1.1.
	* config/loongarch/genopts/loongarch.opt.in: Likewise.
	* config/loongarch/loongarch-c.cc (LARCH_CPP_SET_PROCESSOR): Likewise.
	(loongarch_cpu_cpp_builtins): Likewise.
	* config/loongarch/loongarch-cpu.cc (get_native_prid): Likewise.
	(fill_native_cpu_config): Likewise.
	* config/loongarch/loongarch-def.cc (array_tune): Likewise.
	* config/loongarch/loongarch-def.h: Likewise.
	* config/loongarch/loongarch-driver.cc (driver_set_m_parm): Likewise.
	(driver_get_normalized_m_opts): Likewise.
	* config/loongarch/loongarch-opts.cc (default_tune_for_arch): Likewise.
	(TUNE_FOR_ARCH): Likewise.
	(arch_str): Likewise.
	(loongarch_target_option_override): Likewise.
	* config/loongarch/loongarch-opts.h (TARGET_uARCH_LA464): Likewise.
	(TARGET_uARCH_LA664): Likewise.
	* config/loongarch/loongarch-str.h (STR_CPU_ABI_DEFAULT): Likewise.
	(STR_ARCH_ABI_DEFAULT): Likewise.
	(STR_TUNE_GENERIC): Likewise.
	(STR_ARCH_LA64V1_0): Likewise.
	(STR_ARCH_LA64V1_1): Likewise.
	* config/loongarch/loongarch.cc (loongarch_cpu_sched_reassociation_width): Likewise.
	(loongarch_asm_code_end): Likewise.
	* config/loongarch/loongarch.opt: Likewise.
	* doc/invoke.texi: Likewise.

2024-04-22  Pan Li  <pan2.li@intel.com>

	* config/riscv/vector-crypto.md:

2024-04-22  Pan Li  <pan2.li@intel.com>

	Revert:
	2023-11-30  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): Fix constraint.
	* config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Rename vconstraint into group_overlap.
	(no,yes): Ditto.
	(none,W21,W42,W84,W43,W86,W87): Ditto.
	* config/riscv/vector.md: Ditto.

2024-04-22  Pan Li  <pan2.li@intel.com>

	Revert:
	2023-12-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv.md: Rostify the constraints.

2024-04-22  Haochen Jiang  <haochen.jiang@intel.com>

	* common/config/i386/i386-common.cc (processor_alias_table):
	Let Sierra Forest map to CPU_TYPE enum.

2024-04-22  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/s390.cc (s390_option_override_internal): Check zarch
	flag before enabling -mvx.

2024-04-22  Pan Li  <pan2.li@intel.com>

	Revert:
	2023-11-30  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/112431
	* config/riscv/vector.md: Add widenning overlap.

2024-04-22  Pan Li  <pan2.li@intel.com>

	Revert:
	2023-12-01  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/112431
	* config/riscv/vector.md: Support highpart overlap for indexed load.

2024-04-22  Pan Li  <pan2.li@intel.com>

	Revert:
	2023-12-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/112431
	* config/riscv/vector.md: Add highest-number overlap support.

2024-04-22  Pan Li  <pan2.li@intel.com>

	Revert:
	2023-11-30  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/112431
	* config/riscv/vector.md: Add widening overlap of vf2/vf4.

2024-04-21  Pan Li  <pan2.li@intel.com>

	Revert:
	2023-12-01  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/112431
	* config/riscv/vector.md: Support highpart overlap for vx/vf.

2024-04-20  Pan Li  <pan2.li@intel.com>

	Revert:
	2023-12-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/112431
	* config/riscv/vector.md: Fix incorrect overlap in v0.

2024-04-20  Pan Li  <pan2.li@intel.com>

	Revert:
	2023-12-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/112431
	* config/riscv/vector.md: Support highest overlap for wv instructions.

2024-04-20  Pan Li  <pan2.li@intel.com>

	Revert:
	2023-12-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/112432
	* config/riscv/riscv.md (none,W21,W42,W84,W43,W86,W87): Add W0.
	(none,W21,W42,W84,W43,W86,W87,W0): Ditto.
	* config/riscv/vector.md: Ditto.

2024-04-19  Jakub Jelinek  <jakub@redhat.com>

	PR target/114783
	* config/i386/sse.md (*avx2_eq<mode>3): Change last operand's
	constraint from "jm" to "xjm".

2024-04-19  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114753
	* internal-fn.cc (expand_arith_overflow): Add one missing restore
	of flag_trapv before return.

2024-04-19  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/114769
	* tree-vect-patterns.cc:
	(vect_recog_absolute_difference): Have only one success condition.
	(vect_recog_abd_pattern): Handle further checks if
	vect_recog_absolute_difference fails.

2024-04-19  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* config/bpf/core-builtins.cc (get_index_for_enum_value): Create
	function.
	(pack_enum_value): Check for enumerator and error out.
	(process_enum_value): Correct string allocation.

2024-04-19  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* config/bpf/bpf-protos.h (bpf_add_core_reloc): Renamed function
	to bpf_output_move.
	* config/bpf/bpf.cc (bpf_legitimate_address_p): Allow
	UNSPEC_CORE_RELOC to match an address.
	(bpf_insn_cost): Make UNSPEC_CORE_RELOC immediate moves
	expensive to prioritize loads and stores.
	(TARGET_INSN_COST): Add hook.
	(bpf_output_move): Wrapper to call bpf_output_core_reloc.
	(bpf_print_operand): Add support to print immediate operands
	specified with the UNSPEC_CORE_RELOC.
	(bpf_print_operand_address): Likewise, but to support
	UNSPEC_CORE_RELOC in addresses.
	(bpf_init_builtins): Flag BPF_BUILTIN_CORE_RELOC as NOTHROW.
	* config/bpf/bpf.md: Wrap patterns for MOV, LD and ST
	instruction with bpf_output_move call.
	(mov_reloc_core<MM:mode>): Remove now spurious define_insn.
	* config/bpf/constraints.md: Added "c" and "C" constraints to
	match immediates represented with UNSPEC_CORE_RELOC.
	* config/bpf/core-builtins.cc (bpf_add_core_reloc): Remove
	(bpf_output_core_reloc): Add function to create the CO-RE
	relocations based on new matching rules.
	* config/bpf/core-builtins.h (bpf_output_core_reloc): Add
	prototype.
	* config/bpf/predicates.md (core_imm_operand) Add predicate.
	(mov_src_operand): Add match for core_imm_operand.

2024-04-19  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/114768
	* rtlanal.cc (set_noop_p): Don't return true for MEM <- MEM
	sets if src has side-effects or for stores into ZERO_EXTRACT
	if ZERO_EXTRACT operand has side-effects.

2024-04-19  Alexandre Oliva  <oliva@adacore.com>

	* config/t-vxworks (vxw-glimits.h): Don't mangle c23-required
	__STDC_VERSION_LIMITS_H__ define.

2024-04-18  Sandra Loosemore  <sloosemore@baylibre.com>

	* config.gcc: Add nios2*-*-* to the list of obsoleted targets.

2024-04-18  Alexandre Oliva  <oliva@adacore.com>

	* doc/sourcebuild.texi (strndup): Add effective target.

2024-04-18  Tamar Christina  <tamar.christina@arm.com>

	PR target/114741
	* config/aarch64/aarch64.md (<optab><mode>3): Remove ^ from alt 2.
	(copysign<GPF:mode>3): Use SIMD version of IOR directly.

2024-04-18  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114753
	* internal-fn.cc (expand_mul_overflow): Save flag_trapv and
	temporarily clear it for the duration of the function, then
	restore previous value.
	(expand_vector_ubsan_overflow): Likewise.
	(expand_arith_overflow): Likewise.

2024-04-17  Jakub Jelinek  <jakub@redhat.com>

	PR other/114738
	* opts.cc (get_option_url): On release branches append
	gcc-MAJOR.MINOR.0/ after DOCUMENTATION_ROOT_URL.
	* gcc-urlifier.cc (gcc_urlifier::make_doc_url): Likewise.

2024-04-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114749
	* tree-vect-loop.cc (vect_analyze_loop_2): Reset
	LOOP_VINFO_USING_PARTIAL_VECTORS_P when re-trying without SLP.

2024-04-17  Georg-Johann Lay  <avr@gjlay.de>

	PR target/114752
	* config/avr/avr.cc (avr_print_operand) [CONST_DOUBLE_P]: Handle DFmode.

2024-04-17  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/114743
	* asan.cc (maybe_instrument_call): Don't instrument calls to
	.ABNORMAL_DISPATCHER.

2024-04-16  Andrew Pinski  <quic_apinski@quicinc.com>

	PR c/92880
	* doc/extend.texi (Using Vector Instructions): Add that
	the base_types could be a typedef of them.

2024-04-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114736
	* tree-vect-slp.cc (vect_optimize_slp_pass::is_cfg_latch_edge):
	Do not consider VEC_PERM_EXPRs as PHI use.

2024-04-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114733
	* tree-vect-loop.cc (vectorizable_nonlinear_induction): Reject
	neg induction vectorization of single element vectors.

2024-04-16  Jakub Jelinek  <jakub@redhat.com>

	* tree.cc (array_type_nelts): Ensure 2 spaces after . in comment
	instead of just one.
	(build_variant_type_copy): Likewise.
	(tree_check_failed): Likewise.
	(build_atomic_base): Likewise.
	* ipa-free-lang-data.cc (fld_incomplete_type_of): Use an indefinite
	article rather than a.

2024-04-16  Fei Gao  <gaofei@eswincomputing.com>

	* config/riscv/riscv.cc (riscv_expand_conditional_move):
	replace or with add when expanding zicond if possible.

2024-04-16  Alexandre Oliva  <oliva@adacore.com>

	PR middle-end/112938
	* ipa-strub.cc (pass_ipa_strub::execute): Drop volatility from
	indirected parm.
	(maybe_make_indirect): Restore volatility in dereferences.

2024-04-16  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch.opt.urls: Regenerate.
	* config/mn10300/mn10300.opt.urls: Likewise.
	* config/msp430/msp430.opt.urls: Likewise.
	* config/nds32/nds32-elf.opt.urls: Likewise.
	* config/nds32/nds32-linux.opt.urls: Likewise.
	* config/nds32/nds32.opt.urls: Likewise.
	* config/pru/pru.opt.urls: Likewise.
	* config/riscv/riscv.opt.urls: Likewise.
	* config/rx/rx.opt.urls: Likewise.
	* config/sh/sh.opt.urls: Likewise.
	* config/sparc/sparc.opt.urls: Likewise.
	* doc/invoke.texi: Add indexes for some compilation options.

2024-04-15  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-mcus.def: Add: avr16du14, avr16du20, avr16du28,
	avr16du32, avr32du14, avr32du20, avr32du28,  avr32du32.
	* doc/avr-mmcu.texi: Rebuild.

2024-04-15  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/114668
	* config/riscv/autovec.md: Add VLS.

2024-04-15  Richard Biener  <rguenther@suse.de>

	PR gcov-profile/114715
	* gimplify.cc (gimplify_switch_expr): Set the location of the
	GIMPLE switch.

2024-04-15  H.J. Lu  <hjl.tools@gmail.com>

	PR target/114696
	* config/i386/i386.md (isa): Add apx_ndd_64.
	(enabled): Likewise.
	(*add<dwi>3_doubleword): Change rjO to r,ro,jO with 8-bit
	signed integer constant and enable jO only for apx_ndd_64.
	(*add<dwi>3_doubleword_cc_overflow_1): Likewise.
	(*and<dwi>3_doubleword): Likewise.
	(*<code><dwi>3_doubleword): Likewise.

2024-04-15  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/114403
	* tree-vect-loop.cc (vect_transform_loop): Adjust upper bounds for when
	peeling for gaps and early break.

2024-04-15  Jakub Jelinek  <jakub@redhat.com>

	PR c++/114634
	* attribs.cc (diag_attr_exclusions): Set attrs[1] to NULL_TREE for
	decls with NULL TREE_TYPE.

2024-04-12  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-option-extensions.def: Add RCPC to
	RCPC3 dependencies.
	* config/aarch64/aarch64.h (AARCH64_ISA_RCPC8_4): Add test for
	RCPC3 bit

2024-04-12  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-arches.def: Add CSSC to V8_9A
	dependencies.

2024-04-12  Will Schmidt  <will_schmidt@linux.ibm.com>
	    Peter Bergner  <bergner@linux.ibm.com>

	PR target/101865
	* config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported): Use
	TARGET_POWER8.
	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use
	OPTION_MASK_POWER8.
	* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_POWER8.
	(ISA_2_7_MASKS_SERVER): Likewise.
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Update
	comment.  Use OPTION_MASK_POWER8 and TARGET_POWER8.
	* config/rs6000/rs6000.h (TARGET_SYNC_HI_QI): Use TARGET_POWER8.
	* config/rs6000/rs6000.md (define_attr "isa"): Add p8.
	(define_attr "enabled"): Handle it.
	(define_insn "prefetch"): Use TARGET_POWER8.
	* config/rs6000/rs6000.opt (mpower8-internal): New.

2024-04-12  Jason Merrill  <jason@redhat.com>
	    Patrick Palka  <ppalka@redhat.com>

	PR c++/113141
	* doc/invoke.texi: Document -Wcast-user-defined.

2024-04-12  Tatsuyuki Ishi  <ishitatsuyuki@gmail.com>

	* config/riscv/riscv.opt.urls: Regenerated.

2024-04-12  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/114666
	* match.pd (`!a?b:c`): Reject signed types for the condition.
	(`a?~t:t`): Likewise.

2024-04-12  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.cc (aarch64_output_sme_zero_za): Require
	all tiles to have the same suffix.

2024-04-12  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv.cc (riscv_vector_float_type_p): Take int
	as the return value instead of unsigned.
	(riscv_vector_element_bitsize): Ditto.
	(riscv_vector_required_min_vlen): Ditto.
	(riscv_validate_vector_type): Take int type for local variable(s).

2024-04-12  Jakub Jelinek  <jakub@redhat.com>

	* tree-cfg.cc (gimple_verify_flow_info): Make the misplaced
	returns_twice diagnostics translatable.

2024-04-12  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/114687
	* gimple-iterator.cc (gsi_safe_insert_before): Only use
	edge_before_returns_twice_call if bb_has_abnormal_pred.
	(gsi_safe_insert_seq_before): Likewise.
	* gimple-lower-bitint.cc (bitint_large_huge::lower_call): Only
	push to m_returns_twice_calls if bb_has_abnormal_pred.

2024-04-12  Pan Li  <pan2.li@intel.com>

	PR target/114639
	* config/riscv/riscv.cc (riscv_function_value_regno_p): Add
	TARGET_VECTOR predicate for V_RETURN regno.

2024-04-11  David Faust  <david.faust@oracle.com>

	* btfout.cc (btf_asm_type_ref): Convert IDs to BTF internally and
	fix potentially looking up wrong type for asm debug comment info.
	Split into...
	(btf_asm_datasec_type_ref): ... This. New.
	(btf_asm_datasec_entry): Call it here, instead of btf_asm_type_ref.
	(btf_asm_type, btf_asm_array, btf_asm_varent, btf_asm_sou_member)
	(btf_asm_func_arg, btf_asm_func_type): Adapt btf_asm_type_ref call.

2024-04-11  David Faust  <david.faust@oracle.com>

	* btfout.cc (btf_asm_sou_member): Always emit non-representable
	bitfield members as having 'void' type.  Refactor slightly.

2024-04-11  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-option-extensions.def:
	Remove "memtag", "memtag2", "ssbs", "ssbs2", "ls64", "ls64_v"
	and "ls64_accdata" FMV features.

2024-04-11  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-option-extensions.def:
	Remove "flagm2", "sha1", "pmull", "dit", "dpb", "dpb2", "jscvt",
	"fcma", "rcpc2", "frintts", "dgh", "ebf16", "sve-bf16",
	"sve-ebf16", "sve-i8mm", "sve2-pmull128", "memtag3", "bti" and
	"wfxt" entries.

2024-04-11  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-option-extensions.def:
	Fix "rmd"->"rdm", and add FMV to "rdma".
	* config/aarch64/aarch64.cc (FEAT_RDMA): Define as FEAT_RDM.

2024-04-11  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64.cc (compare_feature_masks):
	Use ARRAY_SIZE and >=0 for iteration bounds.
	(aarch64_mangle_decl_assembler_name): Use ARRAY_SIZE.

2024-04-11  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64-option-extensions.def: Reorder FMV entries.

2024-04-11  Gaius Mulley  <gaiusmod2@gmail.com>

	* doc/standards.texi (Language Standards Supported by GCC):
	Add Modula-2 language section.

2024-04-11  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/110027
	* asan.cc (asan_emit_stack_protection): Assert offsets[0] is
	zero if there is no stack protect guard, otherwise
	-ASAN_RED_ZONE_SIZE.  If alignb > ASAN_RED_ZONE_SIZE and there is
	stack pointer guard, take the ASAN_RED_ZONE_SIZE bytes allocated at
	the top of the stack into account when computing base_align_bias.
	Recompute use_after_return_class from asan_frame_size + base_align_bias
	and set to -1 if that would overflow to 11.

2024-04-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/109596
	* tree-ssa-loop-ch.cc (ch_base::copy_headers): Propagate
	debug stmts to nonexit->dest rather than exit->dest.

2024-04-11  Richard Biener  <rguenther@suse.de>

	PR middle-end/114681
	* tree-inline.cc (copy_bb): Key on the remapped stmt
	to identify gconds to have condition coverage data remapped.

2024-04-11  Pan Li  <pan2.li@intel.com>

	PR target/114639
	* config/riscv/riscv.cc (riscv_function_value_regno_p): New func
	impl for hook TARGET_FUNCTION_VALUE_REGNO_P.
	(riscv_get_raw_result_mode): New func imple for hook
	TARGET_GET_RAW_RESULT_MODE.
	(TARGET_FUNCTION_VALUE_REGNO_P): Impl the hook.
	(TARGET_GET_RAW_RESULT_MODE): Ditto.
	* config/riscv/riscv.h (V_RETURN): New macro for vector return.
	(GP_RETURN_FIRST): New macro for the first GPR in return.
	(GP_RETURN_LAST): New macro for the last GPR in return.
	(FP_RETURN_FIRST): Diito but for FPR.
	(FP_RETURN_LAST): Ditto.
	(FUNCTION_VALUE_REGNO_P): Remove as deprecated and replace by
	TARGET_FUNCTION_VALUE_REGNO_P.

2024-04-11  Indu Bhagat  <indu.bhagat@oracle.com>

	* btfout.cc (btf_asm_type): Do not skip emitting members of
	unknown type.

2024-04-11  Indu Bhagat  <indu.bhagat@oracle.com>

	PR debug/112878
	* dwarf2ctf.cc (gen_ctf_sou_type): Check for conditions before
	call to ctf_add_slice.  Use CTF_K_UNKNOWN type if fail.

2024-04-10  Marek Polacek  <polacek@redhat.com>

	PR target/114606
	* config/i386/i386-options.cc (ix86_option_override_internal): Use
	opts_set rather than checking == CF_NONE.

2024-04-10  David Malcolm  <dmalcolm@redhat.com>

	* doc/analyzer.texi: Various tweaks.

2024-04-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114672
	* tree-ssa-math-opts.cc (convert_plusminus_to_widen): Only
	allow mode-precision results.

2024-04-10  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/aarch64/aarch64.cc (TARGET_C_BITINT_TYPE_INFO): Declare MACRO.
	(aarch64_bitint_type_info): New function.
	(aarch64_return_in_memory_1): Return large _BitInt's in memory.
	(aarch64_function_arg_alignment): Adapt to correctly return the ABI
	mandated alignment of _BitInt(N) where N > 128 as the alignment of
	TImode.
	(aarch64_composite_type_p): Return true for _BitInt(N), where N > 128.

2024-04-10  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/aarch64/aarch64.cc (bitint_or_aggr_of_bitint_p): New function.
	(aarch64_layout_arg): Don't emit diagnostics for types involving
	_BitInt(N).

2024-04-10  Jakub Jelinek  <jakub@redhat.com>

	PR c++/114462
	* tree-core.h (enum annot_expr_kind): Add
	annot_expr_maybe_infinite_kind enumerator.
	* gimplify.cc (gimple_boolify): Handle annot_expr_maybe_infinite_kind.
	* tree-cfg.cc (replace_loop_annotate_in_block): Likewise.
	(replace_loop_annotate): Likewise.  Move loop->finite_p initialization
	before the replace_loop_annotate_in_block calls.
	* tree-pretty-print.cc (dump_generic_node): Handle
	annot_expr_maybe_infinite_kind.

2024-04-10  Richard Biener  <rguenther@suse.de>

	Revert:
	2024-03-27  Segher Boessenkool  <segher@kernel.crashing.org>

	PR rtl-optimization/101523
	* combine.cc (try_combine): Don't do a 2-insn combination if
	it does not in fact change I2.

2024-04-10  Peter Bergner  <bergner@linux.ibm.com>

	PR target/101865
	* config/rs6000/rs6000.h (TARGET_DIRECT_MOVE): Define.
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace
	OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR.  Delete redundant
	OPTION_MASK_DIRECT_MOVE usage.  Delete TARGET_DIRECT_MOVE dead code.
	(rs6000_opt_masks): Neuter the "direct-move" option.
	* config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Replace
	OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR.  Delete useless
	comment.
	* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete
	OPTION_MASK_DIRECT_MOVE.
	(OTHER_VSX_VECTOR_MASKS): Likewise.
	(POWERPC_MASKS): Likewise.
	* config/rs6000/rs6000.opt (mdirect-move): Remove Mask and Var.

2024-04-10  Hongyu Wang  <hongyu.wang@intel.com>

	* config/i386/sse.md (sha1msg1): Use "ja" instead of "Bm" for
	memory constraint.
	(sha1msg2): Likewise.
	(sha1nexte): Likewise.
	(sha1rnds4): Likewise.
	(sha256msg1): Likewise.
	(sha256msg2): Likewise.
	(sha256rnds2): Likewise.
	(aes<aesklvariant>u8): Use "jm" instead of "m" for memory
	constraint.
	(*aes<aeswideklvariant>u8): Likewise.
	(*encodekey128u32): Use "jr" instead of "r" for register
	constraints.
	(*encodekey256u32): Likewise.

2024-04-09  Juergen Christ  <jchrist@linux.ibm.com>

	* config/s390/s390.cc (expand_perm_as_replicate): Implement.
	(vectorize_vec_perm_const_1): Call new function.
	* config/s390/vx-builtins.md (vec_splat<mode>): Change to...
	(@vec_splat<mode>): ...this.

2024-04-09  David Faust  <david.faust@oracle.com>

	PR debug/114608
	* btfout.cc (btf_asm_datasec_entry): Only emit a symbol reference when
	generating BTF for BPF CO-RE target.

2024-04-09  Richard Ball  <richard.ball@arm.com>

	* config/aarch64/aarch64-c.cc (aarch64_pragma_aarch64):
	Add functions_nulls parameter to pragma_handlers.
	* config/aarch64/aarch64-protos.h: Likewise.
	* config/aarch64/aarch64-sve-builtins.h
	(enum handle_pragma_index): Add enum to count
	number of pragmas to be handled.
	* config/aarch64/aarch64-sve-builtins.cc
	(GTY): Add global variable for initial indexes
	and change overload_names to an array.
	(function_builder::function_builder):
	Add pragma handler information.
	(function_builder::add_function):
	Add code for overwriting previous
	registered_functions entries.
	(add_unique_function):
	Use an array to register overload_names
	for both pragma handler modes.
	(add_overloaded_function): Likewise.
	(init_builtins):
	Add functions_nulls parameter to pragma_handlers.
	(handle_arm_sve_h):
	Initialize pragma handler information.
	(handle_arm_neon_sve_bridge_h): Likewise.
	(handle_arm_sme_h): Likewise.

2024-04-09  Richard Biener  <rguenther@suse.de>

	PR lto/114655
	* lto-wrapper.cc (merge_flto_options): Add force argument.
	(merge_and_complain): Do not force here.
	(run_gcc): But here to make the link-time -flto option override
	any compile-time one.

2024-04-09  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config/rs6000/rtems.h (OS_MISSING_POWERPC64): Define.

2024-04-09  Jørgen Kvalsvik  <j@lambda.is>

	PR gcov-profile/114601
	* tree-profile.cc (condition_uid): Guard fn->cond_uids access.

2024-04-09  Jakub Jelinek  <jakub@redhat.com>

	PR target/114576
	* config/i386/i386.md (isa): Remove aes, add vaes_avx512vl.
	(enabled): Remove aes isa check, add vaes_avx512vl.
	* config/i386/sse.md (aesenc, aesenclast, aesdec, aesdeclast): Use
	jm instead of m for second alternative and emit {evex} prefix
	for it if !TARGET_AES.  Use noavx,avx,vaes_avx512vl isa attribute.
	(vaesdec_<mode>, vaesdeclast_<mode>, vaesenc_<mode>,
	vaesenclast_<mode>): Add second alternative with x instead of v
	and jm instead of m.

2024-04-09  Gaius Mulley  <gaiusmod2@gmail.com>

	* doc/gm2.texi (Compiler options): Remove -fdebug-trace-quad.
	Remove -fdebug-trace-api.
	Add -fm2-debug-trace=.

2024-04-09  Yang Yujie  <yangyujie@loongson.cn>

	PR target/113233
	* config/loongarch/loongarch.cc (loongarch_reg_init):
	Reinitialize the loongarch_regno_mode_ok cache.
	(loongarch_option_override): Same.
	(loongarch_save_restore_target_globals): Restore target globals.
	(loongarch_set_current_function): Restore the target contexts
	for functions.
	(TARGET_SET_CURRENT_FUNCTION): Define.
	* config/loongarch/loongarch.h (SWITCHABLE_TARGET): Enable
	switchable target context.
	* config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
	Initialize all builtin functions at startup.
	(loongarch_expand_builtin): Turn assertion of builtin availability
	into a test.

2024-04-09  Jørgen Kvalsvik  <j@lambda.is>

	PR middle-end/114627
	* tree-profile.cc (instrument_decisions): Generate constant
	at the start of loop.

2024-04-09  Jørgen Kvalsvik  <j@lambda.is>

	PR middle-end/114599
	* tree-inline.cc (copy_bb): Copy cond_uids into callee.
	(prepend_lexical_block): Remove outdated comment.
	(add_local_variables): Remove bad cond_uids copy.

2024-04-09  Jakub Jelinek  <jakub@redhat.com>

	* expr.cc (convert_mode_scalar): Fix duplicated words in comment;
	into into -> it into.
	* function.h (function::cond_uids): Fix duplicated words in comment;
	same same -> same.
	* config/riscv/riscv-vector-costs.cc
	(costs::adjust_vect_cost_per_loop): Fix duplicated words in comment;
	model model -> model.
	* config/riscv/riscv-vector-builtins-shapes.cc (build_base): Fix
	duplicated words in comment; for for -> for.
	* config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Fix
	duplicated words in comment; more more -> more.
	* config/aarch64/driver-aarch64.cc (host_detect_local_cpu): Fix
	duplicated words in comment; be be -> be.
	* tree-profile.cc (masking_vectors): Fix duplicated words in comment;
	has has -> has, the the -> the.
	* value-range.cc (irange::set_range_from_bitmask): Fix duplicated
	words in comment; the the -> the.
	* gcov.cc (add_condition_counts): Fix duplicated words in comment;
	to to -> to.
	* vr-values.cc (get_scev_info): Fix duplicated words in comment;
	the the -> to the.
	* tree-vrp.cc (fully_replaceable): Fix duplicated words in comment;
	by by -> by.
	* mode-switching.cc (single_succ_confluence_n): Fix duplicated words
	in comment; the the -> the.
	* tree-ssa-phiopt.cc (value_replacement): Fix duplicated words in
	comment; can can -> we can.
	* gimple-range-phi.cc (phi_analyzer::process_phi): Fix duplicated words
	in comment; it it -> it is.
	* tree-ssa-sccvn.cc (visit_phi): Fix duplicated words in comment;
	to to -> to.
	* rtl-ssa/accesses.h (use_info::next_debug_insn_use): Fix duplicated
	words in comment; if if -> if.
	* doc/options.texi (InverseMask): Fix duplicated words; and and -> and.
	Change take to takes.
	* doc/invoke.texi (fanalyzer-undo-inlining): Fix duplicated words;
	be be -> be.
	(-minline-memops-threshold): Likewise.

2024-04-09  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114628
	* gimple-lower-bitint.cc (gimple_lower_bitint): Keep debug stmts
	before returns_twice calls as is, don't push them into arg_stmts
	vector/move to edges.

2024-04-09  Sergey Bugaev  <bugaevc@gmail.com>

	* config.gcc: Recognize aarch64*-*-gnu* targets.
	* config/aarch64/aarch64-gnu.h: New file.

2024-04-09  Sergey Bugaev  <bugaevc@gmail.com>

	* config/i386/gnu.h: Move GNU/Hurd STARTFILE_SPEC from here...
	* config/gnu.h: ...to here.

2024-04-09  Richard Biener  <rguenther@suse.de>

	PR middle-end/114604
	* gimple-range.cc (enable_ranger): Initialize the global
	bitmap obstack.
	(disable_ranger): Release it.

2024-04-09  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config.gcc (aarch64-*-rtems*): Add target makefile fragment
	t-aarch64-rtems.
	* config/aarch64/t-aarch64-rtems: New file.

2024-04-09  H.J. Lu  <hjl.tools@gmail.com>

	PR target/114587
	* config/i386/i386-c.cc (ix86_target_macros_internal): Define
	__APX_INLINE_ASM_USE_GPR32__ for -mapx-inline-asm-use-gpr32.

2024-04-09  Kewen Lin  <linkw@linux.ibm.com>
	    Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/88309
	* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Fix
	wrong align passed to function build_aligned_type.
	* tree-ssa-loop-prefetch.cc (is_miss_rate_acceptable): Add an
	assertion to ensure align_unit should be positive.
	* tree.cc (build_qualified_type): Update function comments.

2024-04-08  Uros Bizjak  <ubizjak@gmail.com>

	PR rtl-optimization/112560
	* combine.cc (try_combine): Replace cc_use_loc with the entire
	new RTX only in case cc_use_loc satisfies COMPARISON_P predicate.
	Otherwise scan the entire cc_use_loc RTX for CC reg to be updated
	with a new mode.
	* config/i386/i386.md (@pushf<mode>2): Allow all CC modes for
	operand 1.

2024-04-08  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/gcn/gcn.opt (--param=gcn-preferred-vectorization-factor):
	New.
	* config/gcn/gcn.cc (gcn_vectorize_preferred_simd_mode) Use it.
	* doc/invoke.texi (Optimize Options): Document it.

2024-04-08  Thomas Schwinge  <tschwinge@baylibre.com>

	* doc/sourcebuild.texi (Effective-Target Keywords): Document
	'asm_goto_with_outputs'.  Add comment to 'lra'.

2024-04-08  Martin Jambor  <mjambor@suse.cz>

	PR ipa/113359
	* ipa-icf-gimple.h (func_checker): New members
	safe_for_total_scalarization_p, m_total_scalarization_limit_known_p
	and m_total_scalarization_limit.
	(func_checker::func_checker): Initialize new member variables.
	* ipa-icf-gimple.cc: Include tree-sra.h.
	(func_checker::func_checker): Initialize new member variables.
	(func_checker::safe_for_total_scalarization_p): New function.
	(func_checker::compare_operand): Use the new function.
	* tree-sra.h (sra_get_max_scalarization_size): Declare.
	(sra_total_scalarization_would_copy_same_data_p): Likewise.
	* tree-sra.cc (prepare_iteration_over_array_elts): New function.
	(class sra_padding_collecting): New.
	(sra_padding_collecting::record_padding): Likewise.
	(scalarizable_type_p): Rename to totally_scalarizable_type_p.  Add
	ability to record padding when requested.
	(totally_scalarize_subtree): Split out gathering information necessary
	to iterate over array elements to prepare_iteration_over_array_elts.
	Fix errornous early exit.
	(analyze_all_variable_accesses): Adjust the call to
	totally_scalarizable_type_p.  Move determining of total scalariation
	size limit...
	(sra_get_max_scalarization_size): ...here.
	(check_ts_and_push_padding_to_vec): New function.
	(sra_total_scalarization_would_copy_same_data_p): Likewise.

2024-04-08  Martin Jambor  <mjambor@suse.cz>

	PR ipa/113907
	* ipa-prop.h (class ipa_vr): Declare new overload of a member function
	equal_p.
	(ipa_jump_functions_equivalent_p): Declare.
	* ipa-prop.cc (ipa_vr::equal_p): New function.
	(ipa_agg_pass_through_jf_equivalent_p): Likewise.
	(ipa_agg_jump_functions_equivalent_p): Likewise.
	(ipa_jump_functions_equivalent_p): Likewise.
	* ipa-cp.h (values_equal_for_ipcp_p): Declare.
	* ipa-cp.cc (values_equal_for_ipcp_p): Make function public.
	* ipa-icf-gimple.cc: Include alloc-pool.h, symbol-summary.h, sreal.h,
	ipa-cp.h and ipa-prop.h.
	(func_checker::compare_gimple_call): Comapre jump functions.

2024-04-08  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/114607
	* config/aarch64/aarch64-sve-builtins-base.cc
	(svusdot_impl::expand): Fix botched attempt to swap the operands
	for svsudot.

2024-04-08  Tatsuyuki Ishi  <ishitatsuyuki@gmail.com>

	* config/riscv/riscv.opt: Add -mtls-dialect to configure TLS flavor.
	* config.gcc: Add --with-tls configuration option to change the
	default TLS flavor.
	* config/riscv/riscv.h: Add TARGET_TLSDESC determined from
	-mtls-dialect and with_tls defaults.
	* config/riscv/riscv-opts.h: Define enum riscv_tls_type for the
	two TLS flavors.
	* config/riscv/riscv-protos.h: Define SYMBOL_TLSDESC symbol type.
	* config/riscv/riscv.md: Add instruction sequence for TLSDESC.
	* config/riscv/riscv.cc (riscv_symbol_insns): Add instruction
	sequence length data for TLSDESC.
	(riscv_legitimize_tls_address): Add lowering of TLSDESC.
	* doc/install.texi: Document --with-tls for RISC-V.
	* doc/invoke.texi: Document -mtls-dialect for RISC-V.

2024-04-08  Jakub Jelinek  <jakub@redhat.com>

	PR target/114605
	* config/s390/s390.cc (s390_const_int_pool_entry_p): Punt
	if mem doesn't have MODE_INT mode, or pool constant doesn't
	have MODE_INT mode, or if pool constant mode is smaller than
	mem mode.  If mem mode is different from pool constant mode,
	try to simplify subreg.  If that doesn't work, punt, if it
	does, use the simplified constant instead of the constant pool
	constant.
	* config/s390/s390.md (movdi from const pool peephole): If
	either low or high 32-bit part is zero, just emit move insn
	instead of move + ior.

2024-04-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114624
	* tree-scalar-evolution.cc (final_value_replacement_loop):
	Get at the PHI arg location before releasing the PHI node.

2024-04-08  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-vector-builtins-shapes.cc (build_one): Pass
	required_ext arg when invoke add function.
	(build_th_loadstore): Ditto.
	(struct vcreate_def): Ditto.
	(struct read_vl_def): Ditto.
	(struct vlenb_def): Ditto.
	* config/riscv/riscv-vector-builtins.cc (function_builder::add_function):
	Introduce new arg required_ext to fill in the register func.
	(function_builder::add_unique_function): Ditto.
	(function_builder::add_overloaded_function): Ditto.
	(expand_builtin): Leverage required_extensions_specified to
	check if the required extension is provided.
	* config/riscv/riscv-vector-builtins.h (reqired_ext_to_isa_name): New
	func impl to convert the required_ext enum to the extension name.
	(required_extensions_specified): New func impl to predicate if
	the required extension is well feeded.

2024-04-08  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.h (LINK_COMMAND_SPEC_A): Update coverage
	specs.

2024-04-08  demin.han  <demin.han@starfivetech.com>

	* config/riscv/riscv-vector-costs.cc: Use length()

2024-04-08  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-c.cc (struct pragma_intrinsic_flags): New
	struct to hold all intrinisc related flags.
	(riscv_pragma_intrinsic_flags_pollute): New func to pollute
	the intrinsic flags and backup original flags.
	(riscv_pragma_intrinsic_flags_restore): New func to restore
	the flags from the backup intrinsic flags.
	(riscv_pragma_intrinsic): Pollute the flags and register all
	possible builtin types and functions, then restore and reinit.
	* config/riscv/riscv-protos.h (reinit_builtins): New func
	decl to reinit after flags pollution.
	(riscv_option_override): New extern func decl.
	* config/riscv/riscv-vector-builtins.cc (register_builtin_types_on_null):
	New func to register builtin types if null.
	(DEF_RVV_TYPE): Ditto.
	(DEF_RVV_TUPLE_TYPE): Ditto.
	(reinit_builtins): New func impl to reinit after flags pollution.
	(expand_builtin): Return
	target rtx after error_at.
	* config/riscv/riscv.cc (riscv_vector_int_type_p): New predicate
	func to tell one tree type is integer or not.
	(riscv_vector_float_type_p): New predicate func to tell one tree
	type is float or not.
	(riscv_vector_element_bitsize): New func to get the element bitsize
	of a vector tree type.
	(riscv_vector_required_min_vlen): New func to get the required min vlen
	of a vector tree type.
	(riscv_validate_vector_type): New func to validate the tree type
	is valid on flags.
	(riscv_return_value_is_vector_type_p): Leverage the func
	riscv_validate_vector_type to do the tree type validation.
	(riscv_arguments_is_vector_type_p): Ditto.
	(riscv_override_options_internal): Ditto.

2024-04-08  Lulu Cheng  <chenglulu@loongson.cn>

	PR target/112919
	* config/loongarch/loongarch-def.cc (la664_align): Newly defined
	function that sets alignment rules under the LA664 microarchitecture.
	* config/loongarch/loongarch-opts.cc
	(loongarch_target_option_override): If not optimizing for size, set
	the default alignment to what the target wants.
	* config/loongarch/loongarch-tune.h (struct loongarch_align): Add
	new member variables jump and loop.

2024-04-06  H.J. Lu  <hjl.tools@gmail.com>

	PR target/114590
	* config/i386/i386.md (x86_64_shld): Use explicit shift count in
	AT&T syntax.
	(x86_64_shld_ndd): Likewise.
	(x86_shld): Likewise.
	(x86_shld_ndd): Likewise.
	(x86_64_shrd): Likewise.
	(x86_64_shrd_ndd): Likewise.
	(x86_shrd): Likewise.
	(x86_shrd_ndd): Likewise.

2024-04-06  Jørgen Kvalsvik  <j@lambda.is>

	PR middle-end/114599
	* tree-inline.cc (add_local_variables): Copy cond_uids mappings.

2024-04-05  David Malcolm  <dmalcolm@redhat.com>

	PR analyzer/114588
	* diagnostic-color.cc (color_dict): Add "valid" and "invalid" as
	color capability names.
	* doc/invoke.texi: Document them in description of GCC_COLORS.
	* text-art/style.cc: Include "diagnostic-color.h".
	(text_art::get_style_from_color_cap_name): New.
	* text-art/types.h (get_style_from_color_cap_name): New decl.

2024-04-05  Alex Coplan  <alex.coplan@arm.com>

	* config/aarch64/aarch64-ldp-fusion.cc (struct alias_walker):
	Fix double space after const qualifier on valid ().

2024-04-05  Martin Jambor  <mjambor@suse.cz>

	PR ipa/113964
	* ipa-param-manipulation.cc (ipa_param_adjustments::modify_call):
	Force values obtined through pass-through maps to the expected
	split type.

2024-04-05  Mark Wielaard  <mark@klomp.org>

	* common.opt.urls: Regenerate.

2024-04-05  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/114603
	* config/aarch64/aarch64-sve.md (@aarch64_pred_cnot<mode>): Replace
	with...
	(@aarch64_ptrue_cnot<mode>): ...this, requiring operand 1 to be
	a ptrue.
	(*cnot<mode>): Require operand 1 to be a ptrue.
	* config/aarch64/aarch64-sve-builtins-base.cc (svcnot_impl::expand):
	Use aarch64_ptrue_cnot<mode> for _x operations that are predicated
	with a ptrue.  Represent other _x operations as fully-defined _m
	operations.

2024-04-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114566
	* tree-vect-loop.cc (update_epilogue_loop_vinfo): Don't clear
	base_misaligned.

2024-04-05  Richard Biener  <rguenther@suse.de>

	PR middle-end/114599
	PR gcov-profile/114115
	* symtab.cc (ifunc_ref_map): Do not use auto_bitmap.
	(is_caller_ifunc_resolver): Optimize bitmap_bit_p/bitmap_set_bit
	pair.
	(symtab_node::check_ifunc_callee_symtab_nodes): Properly
	allocate ifunc_ref_map here.

2024-04-04  Martin Jambor  <mjambor@suse.cz>

	PR ipa/111571
	* ipa-param-manipulation.cc
	(ipa_param_body_adjustments::common_initialization): Avoid creating
	duplicate replacement entries.

2024-04-04  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/114415
	* sched-deps.cc (add_insn_mem_dependence): Add memory check for mem argument.
	(sched_analyze_1): Treat stack pointer modification as memory read.
	(sched_analyze_2, sched_analyze_insn): Add memory guard for processing pending_read_mems.
	* sched-int.h (deps_desc): Add comment to pending_read_mems.

2024-04-04  Tobias Burnus  <tburnus@baylibre.com>

	* config/nvptx/mkoffload.cc (main): Call
	gcc_init_libintl and diagnostic_color_init.

2024-04-04  H.J. Lu  <hjl.tools@gmail.com>

	PR target/114587
	* config/i386/i386-c.cc (ix86_target_macros_internal): Define
	__APX_F__ when APX is enabled.

2024-04-04  Jørgen Kvalsvik  <j@lambda.is>

	* builtins.cc (expand_builtin_fork_or_exec): Check
	condition_coverage_flag.
	* collect2.cc (main): Add -fno-condition-coverage to OBSTACK.
	* common.opt: Add new options -fcondition-coverage and
	-Wcoverage-too-many-conditions.
	* doc/gcov.texi: Add --conditions documentation.
	* doc/invoke.texi: Add -fcondition-coverage documentation.
	* function.cc (free_after_compilation): Free cond_uids.
	* function.h (struct function): Add cond_uids.
	* gcc.cc: Link gcov on -fcondition-coverage.
	* gcov-counter.def (GCOV_COUNTER_CONDS): New.
	* gcov-dump.cc (tag_conditions): New.
	* gcov-io.h (GCOV_TAG_CONDS): New.
	(GCOV_TAG_CONDS_LENGTH): New.
	(GCOV_TAG_CONDS_NUM): New.
	* gcov.cc (class condition_info): New.
	(condition_info::condition_info): New.
	(condition_info::popcount): New.
	(struct coverage_info): New.
	(add_condition_counts): New.
	(output_conditions): New.
	(print_usage): Add -g, --conditions.
	(process_args): Likewise.
	(output_intermediate_json_line): Output conditions.
	(read_graph_file): Read condition counters.
	(read_count_file): Likewise.
	(file_summary): Print conditions.
	(accumulate_line_info): Accumulate conditions.
	(output_line_details): Print conditions.
	* gimplify.cc (next_cond_uid): New.
	(reset_cond_uid): New.
	(shortcut_cond_r): Set condition discriminator.
	(tag_shortcut_cond): New.
	(gimple_associate_condition_with_expr): New.
	(shortcut_cond_expr): Set condition discriminator.
	(gimplify_cond_expr): Likewise.
	(gimplify_function_tree): Call reset_cond_uid.
	* ipa-inline.cc (can_early_inline_edge_p): Check
	condition_coverage_flag.
	* ipa-split.cc (pass_split_functions::gate): Likewise.
	* passes.cc (finish_optimization_passes): Likewise.
	* profile.cc (struct condcov): New declaration.
	(cov_length): Likewise.
	(cov_blocks): Likewise.
	(cov_masks): Likewise.
	(cov_maps): Likewise.
	(cov_free): Likewise.
	(instrument_decisions): New.
	(read_thunk_profile): Control output to file.
	(branch_prob): Call find_conditions, instrument_decisions.
	(init_branch_prob): Add total_num_conds.
	(end_branch_prob): Likewise.
	* tree-core.h (struct tree_exp): Add condition_uid.
	* tree-profile.cc (struct conds_ctx): New.
	(CONDITIONS_MAX_TERMS): New.
	(EDGE_CONDITION): New.
	(topological_cmp): New.
	(index_of): New.
	(single_p): New.
	(single_edge): New.
	(contract_edge_up): New.
	(struct outcomes): New.
	(conditional_succs): New.
	(condition_index): New.
	(condition_uid): New.
	(masking_vectors): New.
	(emit_assign): New.
	(emit_bitwise_op): New.
	(make_top_index_visit): New.
	(make_top_index): New.
	(paths_between): New.
	(struct condcov): New.
	(cov_length): New.
	(cov_blocks): New.
	(cov_masks): New.
	(cov_maps): New.
	(cov_free): New.
	(find_conditions): New.
	(struct counters): New.
	(find_counters): New.
	(resolve_counter): New.
	(resolve_counters): New.
	(instrument_decisions): New.
	(tree_profiling): Check condition_coverage_flag.
	(pass_ipa_tree_profile::gate): Likewise.
	* tree.h (SET_EXPR_UID): New.
	(EXPR_COND_UID): New.

2024-04-04  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/114577
	* config/aarch64/aarch64-sve-builtins.h (aarch64_sve::lookup_fndecl):
	Declare.
	* config/aarch64/aarch64-sve-builtins.cc (aarch64_sve::lookup_fndecl):
	New function.
	* config/aarch64/aarch64-sve-builtins-base.cc (is_undef): Likewise.
	(svset_neonq_impl::expand): Optimise expansions whose first argument
	is undefined.

2024-04-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114485
	* tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
	vect_step_op_neg isn't OK for partial vectors but only
	for unknown niter.

2024-04-04  Jakub Jelinek  <jakub@redhat.com>

	PR c++/114537
	* fold-const.cc (native_encode_initializer): Look through
	NON_LVALUE_EXPR if val is INTEGER_CST.

2024-04-04  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114555
	* gimple-lower-bitint.cc (bitint_large_huge::handle_cast): For
	m_bitfld_load and save_cast_conditional add any needed PHIs
	and adjust t4 accordingly.

2024-04-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114551
	* tree-ssa-loop-split.cc (split_loop): If the guard is
	only conditionally evaluated rewrite computations with
	possibly undefined overflow to unsigned arithmetic.

2024-04-04  Eugene Rozenfeld  <erozen@microsoft.com>

	PR gcov-profile/113765
	* auto-profile.cc (afdo_annotate_cfg): Don't set full_profile to true

2024-04-03  Mark Wielaard  <mark@klomp.org>

	* config/i386/i386.opt.urls: Regenerate.

2024-04-03  H.J. Lu  <hjl.tools@gmail.com>

	PR tree-optimization/114115
	* cgraph.h (symtab_node): Add check_ifunc_callee_symtab_nodes.
	(cgraph_node): Add called_by_ifunc_resolver.
	* cgraphunit.cc (symbol_table::compile): Call
	symtab_node::check_ifunc_callee_symtab_nodes.
	* symtab.cc (check_ifunc_resolver): New.
	(ifunc_ref_map): Likewise.
	(is_caller_ifunc_resolver): Likewise.
	(symtab_node::check_ifunc_callee_symtab_nodes): Likewise.
	* tree-profile.cc (gimple_gen_ic_func_profiler): Disable indirect
	call profiling for IFUNC resolvers and their callees.

2024-04-03  Tobias Burnus  <tburnus@baylibre.com>

	* lto-wrapper.cc (compile_offload_image): Prefix 'offload_args'
	suffix by the target name.

2024-04-03  Tobias Burnus  <tburnus@baylibre.com>

	* doc/install.texi (amdgcn-*-amdhsa): Update Newlib recommendation
	and update wording for LLVM 18 release.

2024-04-03  Tobias Burnus  <tburnus@baylibre.com>

	PR other/111966
	* config/gcn/mkoffload.cc (get_arch): New; moved -march= flag
	handling from ...
	(main): ... here; call it to handle --with-arch config option
	and -march= commandline.

2024-04-03  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114552
	* expr.cc (emit_push_insn): Only use store_constructor for
	immediate_const_ctor_p if int_expr_size matches size.

2024-04-03  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114557
	PR tree-optimization/114480
	* tree-phinodes.cc (release_phi_node): Return PHIs from
	allocation buckets not covered by free_phinodes to GC.
	(remove_phi_node): Release the PHI LHS before freeing the
	PHI node.
	* tree-vect-loop.cc (vectorizable_live_operation): Get PHI lhs
	before releasing it.

2024-04-03  Jiahao Xu  <xujiahao@loongson.cn>

	* config/loongarch/lasx.md: Remove unused code.
	* config/loongarch/loongarch-protos.h
	(loongarch_split_lsx_copy_d): Remove.
	(loongarch_split_lsx_insert_d): Ditto.
	(loongarch_split_lsx_fill_d): Ditto.
	* config/loongarch/loongarch.cc
	(loongarch_split_lsx_copy_d): Ditto.
	(loongarch_split_lsx_insert_d): Ditto.
	(loongarch_split_lsx_fill_d): Ditto.
	* config/loongarch/lsx.md (lsx_vpickve2gr_du): Remove splitter.
	(lsx_vpickve2gr_<lsxfmt_f>): Ditto.
	(abs<mode>2): Remove expander.
	(vabs<mode>2): Rename 2 abs<mode>2.

2024-04-02  Christophe Lyon  <christophe.lyon@linaro.org>

	* config/aarch64/aarch64-option-extensions.def: Fix comment.

2024-04-02  Tom Tromey  <tromey@adacore.com>

	* dwarf2out.cc (print_dw_val) <dw_val_class_loc>: Don't
	print newline when not recursing.

2024-04-02  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.cc (darwin_override_options): Update the
	clang major version value in the dsymutil check.

2024-04-02  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.cc (darwin_override_options): Reduce the debug
	level to 2 if dsymutil cannot handle .macinfo sections.

2024-04-02  Yang Yujie  <yangyujie@loongson.cn>

	* config/loongarch/t-loongarch: Add loongarch-def-arrays.h
	to OPTION_H_EXTRA.

2024-04-02  mengqinggang  <mengqinggang@loongson.cn>
	    Lulu Cheng  <chenglulu@loongson.cn>
	    Xi Ruoyao  <xry111@xry111.site>

	* config.gcc: Add --with-tls option to change TLS flavor.
	* config/loongarch/genopts/loongarch.opt.in: Add -mtls-dialect to
	configure TLS flavor.
	* config/loongarch/loongarch-def.h (struct loongarch_target): Add
	tls_dialect.
	* config/loongarch/loongarch-driver.cc (la_driver_init): Add tls
	flavor.
	* config/loongarch/loongarch-opts.cc (loongarch_init_target): Add
	tls_dialect.
	(loongarch_config_target): Ditto.
	(loongarch_update_gcc_opt_status): Ditto.
	* config/loongarch/loongarch-opts.h (loongarch_init_target): Ditto.
	(TARGET_TLS_DESC): New define.
	* config/loongarch/loongarch.cc (loongarch_symbol_insns): Add TLS
	DESC instructions sequence length.
	(loongarch_legitimize_tls_address): New TLS DESC instruction sequence.
	(loongarch_option_override_internal): Add la_opt_tls_dialect.
	(loongarch_option_restore): Add la_target.tls_dialect.
	* config/loongarch/loongarch.md (@got_load_tls_desc<mode>): Normal
	code model for TLS DESC.
	(got_load_tls_desc_off64): Extreme cmode model for TLS DESC.
	* config/loongarch/loongarch.opt: Regenerate.
	* config/loongarch/loongarch.opt.urls: Ditto.
	* doc/invoke.texi: Add a description of the compilation option
	'-mtls-dialect={trad,desc}'.

2024-04-02  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch.opt.urls: Regenerate.

2024-04-01  Yang Yujie  <yangyujie@loongson.cn>

	* config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]recip as
	aliases to -mrecip={all,none}, respectively.
	* config/loongarch/loongarch.opt: Regenerate.
	* config/loongarch/loongarch-def.h (ABI_FPU_64): Rename to...
	(ABI_FPU64_P): ...this.
	(ABI_FPU_32): Rename to...
	(ABI_FPU32_P): ...this.
	(ABI_FPU_NONE): Rename to...
	(ABI_NOFPU_P): ...this.
	(ABI_LP64_P): Define.
	* config/loongarch/loongarch.cc (loongarch_init_print_operand_punct):
	Merged into loongarch_global_init.
	(loongarch_cpu_option_override): Renamed to
	loongarch_target_option_override.
	(loongarch_option_override_internal): Move the work after
	loongarch_config_target into loongarch_target_option_override.
	(loongarch_global_init): Define.
	(INIT_TARGET_FLAG): Move to loongarch-opts.cc.
	(loongarch_option_override): Call loongarch_global_init
	separately.
	* config/loongarch/loongarch-opts.cc (loongarch_parse_mrecip_scheme):
	Split the parsing of -mrecip=<string> from
	loongarch_option_override_internal.
	(loongarch_generate_mrecip_scheme): Define. Split from
	loongarch_option_override_internal.
	(loongarch_target_option_override): Define. Renamed from
	loongarch_cpu_option_override.
	(loongarch_init_misc_options): Define. Split from
	loongarch_option_override_internal.
	(INIT_TARGET_FLAG): Move from loongarch.cc.
	* config/loongarch/loongarch-opts.h (loongarch_target_option_override):
	New prototype.
	(loongarch_parse_mrecip_scheme): New prototype.
	(loongarch_init_misc_options): New prototype.
	(TARGET_ABI_LP64): Simplify with ABI_LP64_P.
	* config/loongarch/loongarch.h (TARGET_RECIP_DIV): Simplify.
	Do not reference specific CPU architecture (LA664).
	(TARGET_RECIP_SQRT): Same.
	(TARGET_RECIP_RSQRT): Same.
	(TARGET_RECIP_VEC_DIV): Same.
	(TARGET_RECIP_VEC_SQRT): Same.
	(TARGET_RECIP_VEC_RSQRT): Same.

2024-04-01  Lulu Cheng  <chenglulu@loongson.cn>

	* doc/invoke.texi: Add descriptions for the compilation
	options.

2024-03-31  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/xiangshan.md (xiangshan_jump): Add branch, jalr, ret
	and sfb_alu.

2024-03-31  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-vector-builtins.cc (expand_builtin): Take
	the term built-in over builtin.

2024-03-31  Pan Li  <pan2.li@intel.com>

	* common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
	Remove unused var decl.

2024-03-30  Xi Ruoyao  <xry111@xry111.site>

	PR target/114175
	* config/mips/mips.cc (mips_setup_incoming_varargs): Only skip
	mips_function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P
	functions if arg.type is NULL.

2024-03-29  Andrew Pinski  <quic_apinski@quicinc.com>

	* lto-compress.cc (lto_end_uncompression): Use
	fatal_error instead of internal_error when ZSTD
	is not enabled.

2024-03-28  Jeff Law  <jlaw@ventanamicro.com>

	* config/h8300/extensions.md (zero_extendqihi*): Add output
	template for reg->reg case where the regs don't match.

2024-03-28  Gaius Mulley  <(no_default)>

	PR modula2/114517
	* doc/gm2.texi: Mention gm2 treats a # in the first column
	as a preprocessor directive unless -fno-cpp is supplied.

2024-03-28  Jakub Jelinek  <jakub@redhat.com>

	* predict.cc (estimate_bb_frequencies): Fix comment typo,
	scalling -> scaling.

2024-03-28  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/112303
	* profile-count.h (profile_count::operator+): Perform
	addition in uint64_t variable and set m_val to MIN of that
	val and max_count.
	(profile_count::operator+=): Likewise.
	(profile_count::operator-=): Formatting fix.
	(profile_count::apply_probability): Use safe_scale_64bit
	even in the int overload.

2024-03-28  Jan Hubicka  <jh@suse.cz>

	PR middle-end/113907
	* ipa-icf.cc (sem_function::init): Hash PHI operands
	(sem_function::compare_phi_node): Add argument about preserving order

2024-03-28  Richard Biener  <rguenther@suse.de>

	PR middle-end/114480
	* cfganal.cc (compute_idf): Use simpler bitmap iteration,
	touch work_set only when phi_insertion_points changed.

2024-03-28  Palmer Dabbelt  <palmer@rivosinc.com>

	* config/riscv/riscv.h (REGISTER_NAMES): Add vxsat.

2024-03-27  Segher Boessenkool  <segher@kernel.crashing.org>

	PR rtl-optimization/101523
	* combine.cc (try_combine): Don't do a 2-insn combination if
	it does not in fact change I2.

2024-03-27  Jakub Jelinek  <jakub@redhat.com>

	* doc/invoke.texi (Spec Files): Use @var{S} instead of S,
	@var{X} instead of X etc. for other placeholders.

2024-03-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114057
	* tree-vect-slp.cc (vect_bb_slp_mark_live_stmts): Mark
	BB reduction remain defs as scalar uses.

2024-03-27  Victor Do Nascimento  <victor.donascimento@arm.com>

	* config/aarch64/aarch64-option-extensions.def (rcpc3):
	Fix FEATURE_STRING field to "lrcpc3".

2024-03-27  Victor Do Nascimento  <victor.donascimento@arm.com>

	* config/aarch64/aarch64-option-extensions.def: Add LSE128
	AARCH64_OPT_EXTENSION, adding it as a dependency for the D128
	feature.
	* doc/invoke.texi (AArch64 Options): Document +lse128.

2024-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-feature-deps.h: Use constexpr for
	out-of-line statics.

2024-03-26  Cupertino Miranda  <cupertino.miranda@oracle.com>

	PR target/114431
	* btfout.cc (get_name_for_datasec_entry): Add function.
	(btf_asm_datasec_entry): Print label when possible.

2024-03-26  Richard Ball  <richard.ball@arm.com>

	PR target/114272
	* config/aarch64/aarch64-cores.def (AARCH64_CORE):
	Change SCHEDULER_IDENT from cortexa55 to cortexa53
	for Cortex-A510 and Cortex-A520.

2024-03-26  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/111151
	* fold-const.cc (extract_muldiv_1) <case MAX_EXPR>: Punt for
	MULT_EXPR altogether, or for MAX_EXPR if c is -1.

2024-03-26  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/111736
	* tsan.cc (instrument_expr): Punt on non-generic address space
	accesses.

2024-03-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114471
	* tree-vect-stmts.cc (vectorizable_operation): Verify operand
	types are compatible with the result type.

2024-03-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114464
	* tree-vect-loop.cc (vectorizable_recurr): Verify the latch
	vector type is compatible with what we chose for the recurrence.

2024-03-26  Jakub Jelinek  <jakub@redhat.com>

	* cfgloopmanip.cc (update_loop_exit_probability_scale_dom_bbs):
	Fix comment typo - multple -> multiple.
	* config/i386/x86-tune.def (X86_TUNE_ACCUMULATE_OUTGOING_ARGS):
	Likewise.

2024-03-26  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Predefine
	__mips_strict_alignment if STRICT_ALIGNMENT.

2024-03-25  Richard Biener  <rguenther@suse.de>

	* config.gcc (amdgcn): Add gfx1036 entries.
	* config/gcn/gcn-hsa.h (NO_XNACK): Likewise.
	(gcn_local_sym_hash): Likewise.
	* config/gcn/gcn-opts.h (enum processor_type): Likewise.
	(TARGET_GFX1036): New macro.
	* config/gcn/gcn.cc (gcn_option_override): Handle gfx1036.
	(gcn_omp_device_kind_arch_isa): Likewise.
	(output_file_start): Likewise.
	* config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Add __gfx1036__.
	(TARGET_CPU_CPP_BUILTINS): Rename __gfx1030 to __gfx1030__.
	* config/gcn/gcn.opt: Add gfx1036.
	* config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1036): New.
	(main): Handle gfx1036.
	* config/gcn/t-omp-device: Add gfx1036 isa.
	* doc/install.texi (amdgcn): Add gfx1036.
	* doc/invoke.texi (-march): Likewise.

2024-03-25  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-c.cc (riscv_pragma_intrinsic): Remove error
	when V is disabled and init the RVV types and intrinic APIs.
	* config/riscv/riscv-vector-builtins.cc (expand_builtin): Report
	error if V ext is disabled.
	* config/riscv/riscv.cc (riscv_return_value_is_vector_type_p):
	Ditto.
	(riscv_arguments_is_vector_type_p): Ditto.
	(riscv_vector_cc_function_p): Ditto.
	* config/riscv/riscv_vector.h: Remove error if V is disable.

2024-03-23  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.cc (pa_output_global_address): Handle
	UNSPEC_DLTIND14R addresses.
	* config/pa/pa.h (PRINT_OPERAND_ADDRESS): Output "RT'" for
	UNSPEC_DLTIND14R address.

2024-03-23  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114433
	* gimple-lower-bitint.cc (bitint_large_huge::handle_cast): For
	m_bitfld_load check save_first rather than m_first.

2024-03-23  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114425
	* gimple-lower-bitint.cc (build_bitint_stmt_ssa_conflicts): Handle
	_Complex large/huge _BitInt types like the large/huge _BitInt types.

2024-03-23  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/111683
	* tree-predcom.cc (pcom_worker::suitable_component_p): If has_write
	and comp_step is RS_NONZERO, return false if any reference in the
	component doesn't have DR_STEP a multiple of access size.

2024-03-23  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.md: Add new split pattern described above.

2024-03-22  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (avr_set_current_function): Adjust diagnostic
	for deprecated SIGNAL and INTERRUPT usage without respective header.

2024-03-22  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn.md (*memory_barrier): Split into RDNA and !RDNA.
	(atomic_load<mode>): Adjust RDNA cache settings.
	(atomic_store<mode>): Likewise.
	(atomic_exchange<mode>): Likewise.

2024-03-22  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn.cc (gcn_vectorize_preferred_simd_mode): Prefer V32 on
	RDNA devices.

2024-03-22  Andrew Stubbs  <ams@baylibre.com>

	* config.gcc (amdgcn): Add gfx1103 entries.
	* config/gcn/gcn-hsa.h (NO_XNACK): Likewise.
	(gcn_local_sym_hash): Likewise.
	* config/gcn/gcn-opts.h (enum processor_type): Likewise.
	(TARGET_GFX1103): New macro.
	* config/gcn/gcn.cc (gcn_option_override): Handle gfx1103.
	(gcn_omp_device_kind_arch_isa): Likewise.
	(output_file_start): Likewise.
	(gcn_hsa_declare_function_name): Use TARGET_RDNA3, not just gfx1100.
	* config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Add __gfx1103__.
	* config/gcn/gcn.opt: Add gfx1103.
	* config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1103): New.
	(main): Handle gfx1103.
	* config/gcn/t-omp-device: Add gfx1103 isa.
	* doc/install.texi (amdgcn): Add gfx1103.
	* doc/invoke.texi (-march): Likewise.

2024-03-22  Andrew Stubbs  <ams@baylibre.com>

	* dojump.cc (do_compare_rtx_and_jump): Clear excess bits in vector
	bitmasks.
	(do_compare_and_jump): Remove now-redundant similar code.
	* internal-fn.cc (expand_fn_using_insn): Clear excess bits in vector
	bitmasks.
	(add_mask_and_len_args): Likewise.

2024-03-22  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Add pre-define
	macro __riscv_v_fixed_vlen when zvl.
	* config/riscv/riscv.cc (riscv_handle_rvv_vector_bits_attribute):
	New static func to take care of the RVV types decorated by
	the attributes.

2024-03-22  Andrew Pinski  <quic_apinski@quicinc.com>

	PR c/109619
	* builtins.cc (fold_builtin_1): Use error_operand_p
	instead of checking against ERROR_MARK.
	(fold_builtin_2): Likewise.
	(fold_builtin_3): Likewise.

2024-03-22  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/111736
	* ubsan.cc (ubsan_expand_null_ifn, instrument_mem_ref): Avoid
	SANITIZE_NULL instrumentation for non-generic address spaces
	for which targetm.addr_space.zero_address_valid (as) is true.

2024-03-22  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114405
	* gimple-lower-bitint.cc (bitint_large_huge::lower_mergeable_stmt):
	Set rprec to limb_prec rather than 0 if tprec is divisible by
	limb_prec.  In the last bf_cur handling, set rprec to (tprec + bo_bit)
	% limb_prec rather than tprec % limb_prec and use just rprec instead
	of rprec + bo_bit.  For build_bit_field_ref offset, divide
	(tprec + bo_bit) by limb_prec rather than just tprec.

2024-03-22  Christoph Müllner  <christoph.muellner@vrull.eu>

	PR target/114194
	* config/riscv/vector-iterators.md: Split VI into VI_FRAC and VI_NOFRAC.
	Only include VI_NOFRAC in V_VLS without TARGET_XTHEADVECTOR.

2024-03-22  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_expand_prologue): Add missing stack
	tie for scalable and final stack adjustment if needed.
	Co-authored-by: Raphael Zinsly <rzinsly@ventanamicro.com>

2024-03-22  Pan Li  <pan2.li@intel.com>

	PR target/114352
	* common/config/riscv/riscv-common.cc (struct riscv_func_target_info):
	New struct for func decl and target name.
	(struct riscv_func_target_hasher): New hasher for hash table mapping
	from the fn_decl to fn_target_name.
	(riscv_func_decl_hash): New func to compute the hash for fn_decl.
	(riscv_func_target_hasher::hash): New func to impl hash interface.
	(riscv_func_target_hasher::equal): New func to impl equal interface.
	(riscv_cmdline_subset_list): New static var for cmdline subset list.
	(riscv_func_target_table_lazy_init): New func to lazy init the func
	target hash table.
	(riscv_func_target_get): New func to get target name from hash table.
	(riscv_func_target_put): New func to put target name into hash table.
	(riscv_func_target_remove_and_destory): New func to remove target
	info from the hash table and destory it.
	(riscv_parse_arch_string): Set the static var cmdline_subset_list.
	* config/riscv/riscv-subset.h (riscv_cmdline_subset_list): New static
	var for cmdline subset list.
	(riscv_func_target_get): New func decl.
	(riscv_func_target_put): Ditto.
	(riscv_func_target_remove_and_destory): Ditto.
	* config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
	Take cmdline_subset_list instead of current_subset_list when clone.
	(riscv_process_target_attr): Record the func target info to hash table.
	(riscv_option_valid_attribute_p): Add new arg tree fndel.
	* config/riscv/riscv.cc (riscv_declare_function_name): Consume the
	func target info and print the arch message.

2024-03-22  Pan Li  <pan2.li@intel.com>

	PR target/114352
	* common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
	Replace implied, combine and check to func finalize.
	(riscv_subset_list::finalize): New func impl to take care of
	implied, combine ext and related checks.
	* config/riscv/riscv-subset.h: Add func decl for finalize.
	* config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
	Finalize the ext before return succeed.
	* config/riscv/riscv.cc (riscv_set_current_function): Reinit the
	machine mode before when set cur function.

2024-03-21  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn.cc (gcn_expand_builtin_1): Comment correction.

2024-03-21  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn-hsa.h (ASM_SPEC): Pass -mattr=+cumode.

2024-03-21  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn-run.cc (main): Add an hsa_memory_free calls for each
	device_malloc call.

2024-03-21  liuhongt  <hongtao.liu@intel.com>

	PR tree-optimization/114396
	* tree-vect-loop.cc (vect_peel_nonlinear_iv_init): Pass utype
	and true to wi::from_mpz.

2024-03-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/111736
	* asan.cc (instrument_derefs): Do not instrument accesses
	to non-generic address-spaces.

2024-03-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113727
	* tree-sra.cc (analyze_access_subtree): Do not allow
	replacements in subtrees when grp_partial_lhs.

2024-03-21  liuhongt  <hongtao.liu@intel.com>

	PR middle-end/114347
	* doc/invoke.texi: Document -fexcess-precision=16.

2024-03-20  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* config/bpf/core-builtins.cc (bpf_core_get_index): Check if
	field contains a DECL_NAME.

2024-03-20  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* config/bpf/btfext-out.cc (cpf_core_reloc_add): Correct for new code.
	Add assert to validate the string is set.
	* config/bpf/core-builtins.cc (cr_final): Make string struct
	field as const.
	(process_enum_value): Correct for field type change.
	(process_type): Set access string to "0".

2024-03-20  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* config/bpf/core-builtins.cc (core_field_info): Add
	support for POINTER_PLUS_EXPR in the root of the field expression.
	(bpf_core_get_index): Likewise.
	(pack_field_expr): Make the BTF type to point to the structure
	related node, instead of its pointer type.
	(make_core_safe_access_index): Correct to new code.

2024-03-20  Xi Ruoyao  <xry111@xry111.site>

	PR target/114407
	* config/loongarch/loongarch-opts.cc (loongarch_config_target):
	Fix typo in diagnostic message, enabing -> enabling.

2024-03-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/114175
	* config/visium/visium.cc (visium_setup_incoming_varargs): Only skip
	TARGET_FUNCTION_ARG_ADVANCE for TYPE_NO_NAMED_ARGS_STDARG_P functions
	if arg.type is NULL.

2024-03-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/114175
	* config/nios2/nios2.cc (nios2_setup_incoming_varargs): Only skip
	nios2_function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
	if arg.type is NULL.

2024-03-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/114175
	* config/nds32/nds32.cc (nds32_setup_incoming_varargs): Only skip
	function arg advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
	if arg.type is NULL.

2024-03-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/114175
	* config/m32r/m32r.cc (m32r_setup_incoming_varargs): Only skip
	function arg advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
	if arg.type is NULL.

2024-03-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/114175
	* config/ft32/ft32.cc (ft32_setup_incoming_varargs): Only skip
	function arg advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
	if arg.type is NULL.

2024-03-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/114175
	* config/epiphany/epiphany.cc (epiphany_setup_incoming_varargs): Only
	skip function arg advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
	if arg.type is NULL.

2024-03-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/114175
	* config/csky/csky.cc (csky_setup_incoming_varargs): Only skip
	csky_function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
	if arg.type is NULL.

2024-03-20  Yury Khrustalev  <yury.khrustalev@arm.com>

	* config/aarch64/aarch64-sys-regs.def: Copy from Binutils.

2024-03-20  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114365
	* gimple-lower-bitint.cc (bitint_large_huge::handle_load): When adding
	a PHI node, set iv2 to its result afterwards.

2024-03-20  Jakub Jelinek  <jakub@redhat.com>

	* tree-ssa-loop-ch.cc (update_profile_after_ch): Fix comment typo:
	probabbility -> probability.
	(ch_base::copy_headers): Fix comment typo: itrations -> iterations.

2024-03-20  Jakub Jelinek  <jakub@redhat.com>

	PR bootstrap/114369
	* system.h (vec_step): Define to vec_step_ when compiling
	with clang on PowerPC.

2024-03-20  demin.han  <demin.han@starfivetech.com>

	PR target/112651
	* config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Rename
	(enum rvv_max_lmul_enum): Ditto
	(TARGET_MAX_LMUL): Ditto
	* config/riscv/riscv-v.cc (preferred_simd_mode): Ditto
	* config/riscv/riscv-vector-costs.cc (costs::record_potential_unexpected_spills): Ditto
	(costs::better_main_loop_than_p): Ditto
	* config/riscv/riscv.opt: Replace -param=riscv-autovec-lmul with -mrvv-max-lmul

2024-03-20  Richard Biener  <rguenther@suse.de>

	PR middle-end/113396
	* tree-dfa.cc (get_ref_base_and_extent): Use index range
	bounds only if they fit within the address-range constraints
	of offset_int.

2024-03-20  Chenghui Pan  <panchenghui@loongson.cn>

	* config/loongarch/loongarch.cc
	(loongarch_hard_regno_mode_ok_uncached): Combine UNITS_PER_FP_REG and
	UNITS_PER_FPREG macros.
	(loongarch_hard_regno_nregs): Ditto.
	(loongarch_class_max_nregs): Ditto.
	(loongarch_get_separate_components): Ditto.
	(loongarch_process_components): Ditto.
	* config/loongarch/loongarch.h (UNITS_PER_FPREG): Ditto.
	(UNITS_PER_HWFPVALUE): Ditto.
	(UNITS_PER_FPVALUE): Ditto.

2024-03-20  Chenghui Pan  <panchenghui@loongson.cn>

	* config/loongarch/lasx.md (vec_cmp<mode><mode256_i>): Remove checking
	of loongarch_expand_vec_cmp()'s return value.
	(vec_cmpu<ILASX:mode><mode256_i>): Ditto.
	* config/loongarch/lsx.md (vec_cmp<mode><mode_i>): Ditto.
	(vec_cmpu<ILSX:mode><mode_i>): Ditto.
	* config/loongarch/loongarch-protos.h
	(loongarch_expand_vec_cmp): Change loongarch_expand_vec_cmp()'s return
	type from bool to void.
	* config/loongarch/loongarch.cc (loongarch_expand_vec_cmp): Ditto.

2024-03-20  Chenghui Pan  <panchenghui@loongson.cn>

	* config/loongarch/loongarch-protos.h
	(loongarch_cfun_has_cprestore_slot_p): Delete.
	(loongarch_adjust_insn_length): Delete.
	(current_section_name): Delete.
	(loongarch_split_symbol_type): Delete.
	* config/loongarch/loongarch.cc
	(loongarch_case_values_threshold): Delete.
	(loongarch_spill_class): Delete.
	(TARGET_OPTAB_SUPPORTED_P): Delete.
	(TARGET_CASE_VALUES_THRESHOLD): Delete.
	(TARGET_SPILL_CLASS): Delete.

2024-03-20  Lewis Hyatt  <lhyatt@gmail.com>

	PR c++/111918
	* diagnostic-core.h (enum diagnostic_t): Add DK_ANY special flag.
	* diagnostic.cc (diagnostic_option_classifier::classify_diagnostic):
	Make use of DK_ANY to indicate a diagnostic was initially enabled.
	(diagnostic_context::diagnostic_enabled): Do not change the type of
	a diagnostic if the saved classification is type DK_ANY.

2024-03-19  Martin Jambor  <mjambor@suse.cz>

	PR ipa/108802
	PR ipa/114254
	* ipa-prop.cc (ipa_get_stmt_member_ptr_load_param): Fix case looking
	at COMPONENT_REFs directly from a PARM_DECL, also recognize loads from
	a pointer parameter.
	(ipa_analyze_indirect_call_uses): Also recognize loads from a pointer
	parameter, also recognize the case when pfn pointer is loaded in its
	own BB.

2024-03-19  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/99829
	* lra-constraints.cc (lra_constraints): Prevent removing insn
	with reverse equivalence to memory if the memory was reloaded.

2024-03-19  David Malcolm  <dmalcolm@redhat.com>

	PR middle-end/114348
	* diagnostic-format-json.cc
	(json_stderr_output_format::machine_readable_stderr_p): New.
	(json_file_output_format::machine_readable_stderr_p): New.
	* diagnostic-format-sarif.cc
	(sarif_stream_output_format::machine_readable_stderr_p): New.
	(sarif_file_output_format::machine_readable_stderr_p): New.
	* diagnostic.cc (diagnostic_context::action_after_output): Move
	"fnotice" to before "finish" call, so that we still have the
	diagnostic_context.
	(fnotice): Bail out if the user requested one of the
	machine-readable diagnostic output formats on stderr.
	* diagnostic.h
	(diagnostic_output_format::machine_readable_stderr_p): New pure
	virtual function.
	(diagnostic_text_output_format::machine_readable_stderr_p): New.
	(diagnostic_context::get_output_format): New accessor.

2024-03-19  Edwin Lu  <ewlu@rivosinc.com>

	PR target/114175
	* config/riscv/riscv.cc (riscv_setup_incoming_varargs): Only skip
	riscv_funciton_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
	if arg.type is NULL

2024-03-19  Jonathan Wakely  <jwakely@redhat.com>

	* doc/install.texi (Prerequisites): Document use of autogen for
	libstdc++.

2024-03-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114151
	PR tree-optimization/114269
	PR tree-optimization/114322
	PR tree-optimization/114074
	* tree-chrec.cc (chrec_fold_multiply): Restrict the use of
	unsigned arithmetic when actual overflow on constant operands
	is observed.

2024-03-19  Jakub Jelinek  <jakub@redhat.com>

	PR target/114175
	* config/arc/arc.cc (arc_setup_incoming_varargs): Only skip
	arc_function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
	if arg.type is NULL.

2024-03-19  Xi Ruoyao  <xry111@xry111.site>

	PR target/114175
	* config/loongarch/loongarch.cc
	(loongarch_setup_incoming_varargs): Only skip
	loongarch_function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P
	functions if arg.type is NULL.

2024-03-19  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/114323
	* config/arm/arm-mve-builtins.cc
	(function_instance::reads_global_state_p): Take CP_READ_MEMORY
	into account.

2024-03-19  Jakub Jelinek  <jakub@redhat.com>

	PR target/114175
	* config/alpha/alpha.cc (alpha_setup_incoming_varargs): Only skip
	function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
	if arg.type is NULL.

2024-03-19  Jakub Jelinek  <jakub@redhat.com>

	PR target/114175
	* config/rs6000/rs6000-call.cc (setup_incoming_varargs): Only skip
	rs6000_function_arg_advance_1 for TYPE_NO_NAMED_ARGS_STDARG_P functions
	if arg.type is NULL.

2024-03-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114375
	* tree-vect-slp.cc (vect_build_slp_tree_2): Compute the
	load permutation for masked loads but reject it when any
	such is necessary.
	* tree-vect-stmts.cc (vectorizable_load): Reject masked
	VMAT_ELEMENTWISE and VMAT_STRIDED_SLP as those are not
	supported.

2024-03-19  Mary Bennett  <mary.bennett@embecosm.com>

	* common/config/riscv/riscv-common.cc: Create XCVbi extension
	support.
	* config/riscv/riscv.opt: Likewise.
	* config/riscv/corev.md: Implement cv_branch<mode> pattern
	for cv.beqimm and cv.bneimm.
	* config/riscv/riscv.md: Add CORE-V branch immediate to RISC-V
	branch instruction pattern.
	* config/riscv/constraints.md: Implement constraints
	cv_bi_s5 - signed 5-bit immediate.
	* config/riscv/predicates.md: Implement predicate
	const_int5s_operand - signed 5 bit immediate.
	* doc/sourcebuild.texi: Add XCVbi documentation.

2024-03-19  Chen Jiawei  <jiawei@iscas.ac.cn>

	* config/riscv/riscv-cores.def (RISCV_TUNE): New def.
	(RISCV_CORE): Ditto.
	* config/riscv/riscv-opts.h (enum riscv_microarchitecture_type): New
	option.
	* config/riscv/riscv.cc: New def.
	* config/riscv/riscv.md: New include.
	* config/riscv/xiangshan.md: New file.

2024-03-18  David Malcolm  <dmalcolm@redhat.com>

	PR analyzer/110902
	PR analyzer/110928
	PR analyzer/111305
	PR analyzer/111441
	* selftest.h (ASSERT_NE_AT): New macro.

2024-03-18  Uros Bizjak  <ubizjak@gmail.com>

	PR target/111822
	* config/i386/i386-features.cc (smode_convert_cst): New function
	to handle SImode, DImode and TImode immediates, generalized from
	timode_convert_cst.
	(timode_convert_cst): Remove.
	(scalar_chain::convert_op): Unify from
	general_scalar_chain::convert_op and timode_scalar_chain::convert_op.
	(general_scalar_chain::convert_op): Remove.
	(timode_scalar_chain::convert_op): Remove.
	(timode_scalar_chain::convert_insn): Update the call to
	renamed timode_convert_cst.
	* config/i386/i386-features.h (class scalar_chain):
	Redeclare convert_op as protected class member.
	(class general_calar_chain): Remove convert_op.
	(class timode_scalar_chain): Ditto.

2024-03-18  Jan Hubicka  <jh@suse.cz>

	* config/i386/zn4zn5.md: Add file missed in the previous commit.

2024-03-18  Jan Hubicka  <jh@suse.cz>
	    Karthiban Anbazhagan  <Karthiban.Anbazhagan@amd.com>

	* common/config/i386/cpuinfo.h (get_amd_cpu): Recognize znver5.
	* common/config/i386/i386-common.cc (processor_names): Add znver5.
	(processor_alias_table): Likewise.
	* common/config/i386/i386-cpuinfo.h (processor_types): Add new zen
	family.
	(processor_subtypes): Add znver5.
	* config.gcc (x86_64-*-* |...): Likewise.
	* config/i386/driver-i386.cc (host_detect_local_cpu): Let
	march=native detect znver5 cpu's.
	* config/i386/i386-c.cc (ix86_target_macros_internal): Add
	znver5.
	* config/i386/i386-options.cc (m_ZNVER5): New definition
	(processor_cost_table): Add znver5.
	* config/i386/i386.cc (ix86_reassociation_width): Likewise.
	* config/i386/i386.h (processor_type): Add PROCESSOR_ZNVER5
	(PTA_ZNVER5): New definition.
	* config/i386/i386.md (define_attr "cpu"): Add znver5.
	(Scheduling descriptions) Add znver5.md.
	* config/i386/x86-tune-costs.h (znver5_cost): New definition.
	* config/i386/x86-tune-sched.cc (ix86_issue_rate): Add znver5.
	(ix86_adjust_cost): Likewise.
	* config/i386/x86-tune.def (avx512_move_by_pieces): Add m_ZNVER5.
	(avx512_store_by_pieces): Add m_ZNVER5.
	* doc/extend.texi: Add znver5.
	* doc/invoke.texi: Likewise.
	* config/i386/znver4.md: Rename to zn4zn5.md; combine znver4 and znver5 Scheduler.

2024-03-18  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/constraints.md (CX2, CX3, CX4): New constraints.
	* config/avr/avr-protos.h (avr_xor_noclobber_dconst): New proto.
	* config/avr/avr.cc (avr_xor_noclobber_dconst): New function.
	* config/avr/avr.md (xorhi3, *xorhi3): Add "d,0,CX2,X" alternative.
	(xorpsi3, *xorpsi3): Add "d,0,CX3,X" alternative.
	(xorsi3, *xorsi3): Add "d,0,CX4,X" alternative.

2024-03-18  liuhongt  <hongtao.liu@intel.com>

	PR target/114334
	* config/i386/i386.md (mode): Add new number V8BF,V16BF,V32BF.
	(MODEF248): New mode iterator.
	(ssevecmodesuffix): Hanlde BF and HF.
	* config/i386/sse.md (andnot<mode>3): Extend to HF/BF.
	(<code><mode>3): Ditto.

2024-03-18  John David Anglin  <danglin@gcc.gnu.org>

	PR rtl-optimization/112415
	* config/pa/pa.cc (pa_emit_move_sequence): Revise condition
	for symbolic memory operands.
	(pa_legitimate_address_p): Revise LO_SUM condition.
	* config/pa/pa.h (INT14_OK_STRICT): Revise define.  Move
	comment about GNU linker to predicates.md.
	* config/pa/predicates.md (floating_point_store_memory_operand):
	Revise condition for symbolic memory operands.  Update
	comment.

2024-03-17  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.cc (pa_delegitimize_address): Delegitimize UNSPEC_TP.

2024-03-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/114175
	* config/i386/i386.cc (ix86_setup_incoming_varargs): Only skip
	ix86_function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
	if arg.type is NULL.

2024-03-16  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114329
	* gimple-lower-bitint.cc (struct bitint_large_huge): Declare
	build_bit_field_ref method.
	(bitint_large_huge::build_bit_field_ref): New method.
	(bitint_large_huge::lower_mergeable_stmt): Use it.

2024-03-15  YunQiang Su  <syq@gcc.gnu.org>

	* config/riscv/riscv.opt.urls: Regenerated.
	* config/rs6000/sysv4.opt.urls: Likewise.
	* config/xtensa/xtensa.opt.urls: Likewise.

2024-03-15  Jakub Jelinek  <jakub@redhat.com>

	* lower-subreg.cc (resolve_simple_move): Fix comment typo,
	betwee -> between.
	* edit-context.cc (class line_event): Fix comment typo,
	betweeen -> between.

2024-03-15  Jakub Jelinek  <jakub@redhat.com>

	PR target/114339
	* config/i386/i386-expand.cc (ix86_expand_int_sse_cmp) <case LE>: Fix
	a pasto, compare code against LE rather than GE.

2024-03-15  Joe Ramsay  <Joe.Ramsay@arm.com>

	* match.pd: Fix truncation pattern for -fno-signed-zeroes

2024-03-15  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114332
	* expr.cc (expand_expr_real_1): EXTEND_BITINT also CALL_EXPR results.

2024-03-15  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113466
	* gimple-lower-bitint.cc (bitint_large_huge): Add m_returns_twice_calls
	member.
	(bitint_large_huge::bitint_large_huge): Initialize it.
	(bitint_large_huge::~bitint_large_huge): Release it.
	(bitint_large_huge::lower_call): Remember ECF_RETURNS_TWICE call stmts
	before which at least one statement has been inserted.
	(gimple_lower_bitint): Move argument loads before ECF_RETURNS_TWICE
	calls to a different block and add corresponding PHIs.

2024-03-15  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips.opt: Support -mstrict-align, and use
	TARGET_STRICT_ALIGN as the flag; keep -m(no-)unaligned-access
	as alias.
	* config/mips/mips.h: Use TARGET_STRICT_ALIGN.
	* config/mips/mips.opt.urls: Regenerate.
	* doc/invoke.texi: Document -m(no-)strict-algin for MIPSr6.

2024-03-15  Tejas Belagod  <tejas.belagod@arm.com>

	PR middle-end/114108
	* tree-vect-patterns.cc (vect_recog_abd_pattern): Call
	vect_convert_output with the correct vecitype.

2024-03-15  Chenghui Pan  <panchenghui@loongson.cn>

	* config/loongarch/lasx.md (lasx_xvpermi_q_<LASX:mode>):
	Remove masking of operand 3.

2024-03-14  Jason Merrill  <jason@redhat.com>

	* tree-core.h (enum clobber_kind): Clarify CLOBBER_OBJECT_*
	comments.

2024-03-14  John David Anglin  <danglin@gcc.gnu.org>

	PR target/114288
	* config/pa/pa.cc (pa_legitimate_address_p): Don't allow
	14-bit displacements before reload for modes that may use
	a floating-point load or store.

2024-03-14  David Faust  <david.faust@oracle.com>

	* config/bpf/bpf.h (INT8_TYPE): Change to signed char.

2024-03-14  Max Filippov  <jcmvbkbc@gmail.com>

	* config/xtensa/xtensa.md (movsi_internal): Move l32i and s32i
	patterns ahead of the l32i.n and s32i.n.

2024-03-14  Jakub Jelinek  <jakub@redhat.com>

	* config/gcn/gcn-hsa.h (ABI_VERSION_SPEC): Fix comment typo.

2024-03-14  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113907
	* ipa-icf.cc (sem_item_optimizer::merge_classes): Reset
	SSA_NAME_RANGE_INFO and SSA_NAME_PTR_INFO on successfully ICF merged
	functions.

2024-03-14  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.md (any_ge): Remove.
	(sge<u>_<X:mode><GPR:mode>): Remove.

2024-03-14  Jakub Jelinek  <jakub@redhat.com>

	PR target/114310
	* config/aarch64/aarch64.cc (aarch64_expand_compare_and_swap): For
	TImode force newval into a register.

2024-03-14  Chung-Lin Tang  <cltang@baylibre.com>

	* tree.h (OMP_CLAUSE_MAP_READONLY): New macro.
	(OMP_CLAUSE__CACHE__READONLY): New macro.
	* tree-core.h (struct GTY(()) tree_base): Adjust comments for new
	uses of readonly_flag bit in OMP_CLAUSE_MAP_READONLY and
	OMP_CLAUSE__CACHE__READONLY.
	* tree-pretty-print.cc (dump_omp_clause): Add support for printing
	OMP_CLAUSE_MAP_READONLY and OMP_CLAUSE__CACHE__READONLY.

2024-03-14  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/s390.cc (s390_encode_section_info): Adjust the check
	for misaligned symbols.
	* config/s390/s390.opt: Improve documentation.

2024-03-14  Jakub Jelinek  <jakub@redhat.com>

	* gimple-iterator.cc (edge_before_returns_twice_call): Copy all
	flags and probability from ad_edge to e edge.  If CDI_DOMINATORS
	are computed, recompute immediate dominator of other_edge->src
	and other_edge->dest.
	(gsi_safe_insert_before, gsi_safe_insert_seq_before): Update *iter
	for the returns_twice call case to the gsi_for_stmt (stmt) to deal
	with update it for bb splitting.

2024-03-14  liuhongt  <hongtao.liu@intel.com>

	* config/i386/i386-features.cc
	(general_scalar_chain::convert_op): Handle REG_EH_REGION note.
	(convert_scalars_to_vector): Ditto.
	* config/i386/i386-features.h (class scalar_chain): New
	memeber control_flow_insns.

2024-03-13  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114319
	* gimple-ssa-store-merging.cc
	(imm_store_chain_info::try_coalesce_bswap): For 32-bit targets
	allow matching __builtin_bswap64 if there is bswapsi2 optab.

2024-03-13  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* config/s390/s390.cc (s390_secondary_reload): Guard
	SYMBOL_FLAG_NOTALIGN2_P.

2024-03-13  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* config/s390/s390-builtin-types.def: Update to reflect latest
	changes.
	* config/s390/s390-builtins.def: Streamline vector builtins with
	LLVM.

2024-03-13  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* config/s390/s390-builtins.def (vec_permi): Deprecate.
	(vec_ctd): Deprecate.
	(vec_ctd_s64): Deprecate.
	(vec_ctd_u64): Deprecate.
	(vec_ctsl): Deprecate.
	(vec_ctul): Deprecate.
	(vec_ld2f): Deprecate.
	(vec_st2f): Deprecate.
	(vec_insert): Deprecate overloads with bool vectors.

2024-03-13  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114313
	* gimple-lower-bitint.cc (bitint_large_huge::limb_access): Use
	TYPE_SIZE of TREE_TYPE (var) rather than TYPE_SIZE of type.
	(bitint_large_huge::handle_load): Pass NULL_TREE rather than
	rhs_type to limb_access for the bitfield load cases.
	(bitint_large_huge::lower_mergeable_stmt): Pass NULL_TREE rather than
	lhs_type to limb_access if nlhs is non-NULL.

2024-03-13  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/112709
	* asan.cc (maybe_create_ssa_name, maybe_cast_to_ptrmode,
	build_check_stmt, maybe_instrument_call, asan_expand_mark_ifn): Use
	gsi_safe_insert_before instead of gsi_insert_before.

2024-03-13  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/112709
	* gimple-iterator.h (gsi_safe_insert_before,
	gsi_safe_insert_seq_before): Declare.
	* gimple-iterator.cc: Include gimplify.h.
	(edge_before_returns_twice_call, adjust_before_returns_twice_call,
	gsi_safe_insert_before, gsi_safe_insert_seq_before): New functions.
	* ubsan.cc (instrument_mem_ref, instrument_pointer_overflow,
	instrument_nonnull_arg, instrument_nonnull_return): Use
	gsi_safe_insert_before instead of gsi_insert_before.
	(maybe_instrument_pointer_overflow): Use force_gimple_operand,
	gimple_seq_add_seq_without_update and gsi_safe_insert_seq_before
	instead of force_gimple_operand_gsi.
	(instrument_object_size): Likewise.  Use gsi_safe_insert_before
	instead of gsi_insert_before.

2024-03-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114121
	* tree-chrec.cc (chrec_fold_plus_1): Guard recursion with
	converted operand properly.
	(chrec_fold_multiply): Likewise.  Handle missed recursion.

2024-03-12  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/112709
	* asan.cc (has_stmt_been_instrumented_p): Don't instrument call
	stores on the caller side unless it is a call to a builtin or
	internal function or function doesn't return by hidden reference.
	(maybe_instrument_call): Likewise.
	(instrument_derefs): Instrument stores to RESULT_DECL if
	returning by hidden reference.

2024-03-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114293
	* tree-ssa-strlen.cc (strlen_pass::handle_builtin_strlen): If
	max is smaller than min, set max to ~(size_t)0.

2024-03-12  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-c.cc (riscv_ext_version_value): Fix
	code style greater than 80 chars.
	(riscv_cpu_cpp_builtins): Fix useless empty line, indent
	with 3 space(s) and argument unalignment.

2024-03-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114297
	* tree-vect-loop.cc (vectorizable_live_operation): Pass in the
	live stmts SLP node to vect_create_epilog_for_reduction.

2024-03-12  Andrew Pinski  <quic_apinski@quicinc.com>

	PR driver/114314
	* common.opt (fmultiflags): Add RejectNegative.

2024-03-11  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* config/aarch64/aarch64.md: Rename aarch_ to aarch64_.
	* config/aarch64/aarch64.opt: Likewise.
	* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
	* config/aarch64/aarch64.cc (aarch64_expand_prologue): Likewise.
	(aarch64_expand_epilogue): Likewise.
	(aarch64_post_cfi_startproc): Likewise.
	(aarch64_handle_no_branch_protection): Copy and rename.
	(aarch64_handle_standard_branch_protection): Likewise.
	(aarch64_handle_pac_ret_protection): Likewise.
	(aarch64_handle_pac_ret_leaf): Likewise.
	(aarch64_handle_pac_ret_b_key): Likewise.
	(aarch64_handle_bti_protection): Likewise.
	(aarch64_override_options): Update branch protection validation.
	(aarch64_handle_attr_branch_protection): Likewise.
	* config/arm/aarch-common-protos.h (aarch_validate_mbranch_protection):
	Pass branch protection type description as argument.
	(struct aarch_branch_protect_type): Move from aarch-common.h.
	* config/arm/aarch-common.cc (aarch_handle_no_branch_protection):
	Remove.
	(aarch_handle_standard_branch_protection): Remove.
	(aarch_handle_pac_ret_protection): Remove.
	(aarch_handle_pac_ret_leaf): Remove.
	(aarch_handle_pac_ret_b_key): Remove.
	(aarch_handle_bti_protection): Remove.
	(aarch_validate_mbranch_protection): Pass branch protection type
	description as argument.
	* config/arm/aarch-common.h (enum aarch_key_type): Remove.
	(struct aarch_branch_protect_type): Remove.
	* config/arm/arm-c.cc (arm_cpu_builtins): Remove aarch_ra_sign_key.
	* config/arm/arm.cc (arm_handle_no_branch_protection): Copy and rename.
	(arm_handle_standard_branch_protection): Likewise.
	(arm_handle_pac_ret_protection): Likewise.
	(arm_handle_pac_ret_leaf): Likewise.
	(arm_handle_bti_protection): Likewise.
	(arm_configure_build_target): Update branch protection validation.
	* config/arm/arm.opt: Remove aarch_ra_sign_key.

2024-03-11  Richard Biener  <rguenther@suse.de>

	PR middle-end/114299
	* gimplify.cc (internal_get_tmp_var): When gimplification
	of VAL failed, return a decl.

2024-03-11  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114278
	* tree-ssa.cc (maybe_optimize_var): If large/huge _BitInt vars are no
	longer addressable, set DECL_NOT_GIMPLE_REG_P on them.

2024-03-11  Eric Botcazou  <ebotcazou@adacore.com>

	PR debug/113519
	PR debug/113777
	* dwarf2out.cc (gen_enumeration_type_die): In the reverse case,
	generate the DIE with the same parent as in the regular case.

2024-03-11  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/95351
	* fold-const.cc (merge_truthop_with_opposite_arm): Use
	the type of the operands of the comparison and not the type
	of the comparison.

2024-03-10  jlaw  <jeffreyalaw@gmail.com>

	PR tree-optimization/110199
	* tree-ssa-scopedtables.cc
	(avail_exprs_stack::simplify_binary_operation): Generalize handling
	of MIN_EXPR/MAX_EXPR to allow additional simplifications.  Canonicalize
	comparison operands for other cases.

2024-03-10  Pan Li  <pan2.li@intel.com>

	* tree-vect-stmts.cc (vectorizable_store): Enable the assert
	during transform process.
	(vectorizable_load): Ditto.

2024-03-10  jlaw  <jeffreyalaw@gmail.com>

	PR target/102250
	* doc/install.texi: Document need for python when building
	RISC-V compilers.

2024-03-10  jlaw  <jeffreyalaw@gmail.com>

	PR target/111362
	* mode-switching.cc (optimize_mode_switching): Only process
	NONDEBUG insns.

2024-03-09  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.md: Fix typos in comment, indentation glitches
	and some other nits.

2024-03-09  Jakub Jelinek  <jakub@redhat.com>

	PR target/114284
	* fwprop.cc (try_fwprop_subst_pattern): Don't propagate
	src containing MEMs unless prop.likely_profitable_p ().

2024-03-09  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.cc (loongarch_print_operand_reloc):
	Support 'Q' for R_LARCH_RELAX for TLS IE.
	(loongarch_output_move): Use 'Q' to print R_LARCH_RELAX for TLS
	IE.
	* config/loongarch/loongarch.md (ld_from_got<mode>): Likewise.

2024-03-09  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (avr_rtx_costs_1) [PLUS]: Determine cost for
	usum_widenqihi and add_zero_extend1.
	[MINUS]: Determine costs for udiff_widenqihi, sub+zero_extend,
	sub+sign_extend.
	* config/avr/avr.md (*addhi3.sign_extend1, *subhi3.sign_extend2):
	Compute exact insn lengths.
	(*usum_widenqihi3): Allow input operands to commute.

2024-03-09  Jakub Jelinek  <jakub@redhat.com>

	* config/i386/i386.opt.urls: Regenerate.

2024-03-09  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/sync.md (atomic_cas_value_strong<mode>):
	In loongarch64, a sign extension operation is added when
	operands[2] is a register operand and the mode is SImode.

2024-03-08  Martin Jambor  <mjambor@suse.cz>

	PR ipa/113757
	* tree-inline.cc (redirect_all_calls): Remove code adding SSAs to
	id->killed_new_ssa_names.

2024-03-08  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/113790
	* lra-assigns.cc (assign_by_spills): Set up all_spilled_pseudos
	for non-reload pseudo too.

2024-03-08  David Faust  <david.faust@oracle.com>

	* config/bpf/bpf.cc (bpf_expand_cpymem, bpf_expand_setmem): Do
	not attempt inline expansion if size is above threshold.
	* config/bpf/bpf.opt (-minline-memops-threshold): New option.
	* doc/invoke.texi (eBPF Options) <-minline-memops-threshold>:
	Document.

2024-03-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114269
	PR tree-optimization/114074
	* tree-chrec.cc (chrec_fold_plus_1): Handle sign-conversions
	in the third CASE_CONVERT case as well.
	(chrec_fold_multiply): Handle sign-conversions from unsigned
	by performing the operation in the unsigned type.

2024-03-08  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.md (*addhi3_zero_extend.ashift1): New pattern.
	* config/avr/avr.cc (avr_rtx_costs_1) [PLUS]: Compute its cost.

2024-03-08  Jakub Jelinek  <jakub@redhat.com>

	* bb-reorder.cc (fix_up_fall_thru_edges): Fix up checking assert,
	asm_noperands < 0 means it is not asm goto too.

2024-03-08  Jakub Jelinek  <jakub@redhat.com>

	PR target/38534
	* config/i386/i386.opt (mnoreturn-no-callee-saved-registers): New
	option.
	* config/i386/i386-options.cc (ix86_set_func_type): Don't use
	TYPE_NO_CALLEE_SAVED_REGISTERS_EXCEPT_BP unless
	ix86_noreturn_no_callee_saved_registers is enabled.
	* doc/invoke.texi (-mnoreturn-no-callee-saved-registers): Document.

2024-03-08  Jakub Jelinek  <jakub@redhat.com>

	PR debug/113918
	* dwarf2out.cc (gen_field_die): Emit DW_AT_export_symbols
	on anonymous unions or structs for -gdwarf-5 or -gno-strict-dwarf.

2024-03-08  demin.han  <demin.han@starfivetech.com>

	PR target/114264
	* config/riscv/riscv-vector-costs.cc: Fix ICE

2024-03-08  Haochen Gui  <guihaoc@gcc.gnu.org>

	* fwprop.cc (forward_propagate_into): Return false for volatile set
	source rtx.

2024-03-07  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	PR target/113618
	* config/aarch64/aarch64.cc (aarch64_copy_one_block): Remove.
	(aarch64_expand_cpymem): Emit single load/store only.
	(aarch64_set_one_block): Emit single stores only.

2024-03-07  Robin Dapp  <rdapp@ventanamicro.com>

	PR middle-end/114196
	* tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Merge
	vectorization guards.

2024-03-07  Jonathan Wakely  <jwakely@redhat.com>

	* doc/cppopts.texi: Remove incorrect claim about -dD not
	outputting predefined macros.

2024-03-07  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>

	PR target/113950
	* config/rs6000/vsx.md (vsx_splat_<mode>): Correct assignment to operand1
	and simplify else if with else.

2024-03-07  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>

	* system.h: Include safe-ctype.h after C++ standard headers.

2024-03-07  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/110079
	* bb-reorder.cc (fix_crossing_unconditional_branches): Don't adjust
	asm goto.

2024-03-07  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/105533
	* expmed.cc (choose_mult_variant): Only try the val - 1 variant
	if val is not HOST_WIDE_INT_MIN or if mode has exactly
	HOST_BITS_PER_WIDE_INT precision.  Avoid triggering UB while computing
	val - 1.

2024-03-07  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/105533
	* tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference) <case ARRAY_REF>:
	Multiple op->off by BITS_PER_UNIT instead of shifting it left by
	LOG2_BITS_PER_UNIT.

2024-03-07  Yang Yujie  <yangyujie@loongson.cn>

	* config.gcc: Add a case for loongarch*-*-linux-musl*.
	* config/loongarch/linux.h: Disable the multilib-compatible
	treatment for *musl* targets.
	* config/loongarch/musl.h: New file.

2024-03-07  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114009
	* genmatch.cc (decision_tree::gen): Emit ARG_UNUSED for captures
	argument even for GENERIC, not just for GIMPLE.
	* match.pd (a * !a -> 0): New simplifications.

2024-03-07  demin.han  <demin.han@starfivetech.com>

	* config/riscv/riscv-protos.h (expand_vec_cmp): Change proto
	* config/riscv/riscv-v.cc (expand_vec_cmp): Use default arguments
	(expand_vec_cmp_float): Adapt arguments

2024-03-06  Uros Bizjak  <ubizjak@gmail.com>

	PR target/114232
	* config/i386/mmx.md (negv2qi2): Enable for optimize_size instead
	of optimize_function_for_size_p.  Explictily enable for TARGET_SSE2.
	(negv2qi SSE reg splitter): Enable for TARGET_SSE2 only.
	(<plusminus:insn>v2qi3): Enable for optimize_size instead
	of optimize_function_for_size_p.  Explictily enable for TARGET_SSE2.
	(<plusminus:insn>v2qi SSE reg splitter): Enable for TARGET_SSE2 only.
	(<any_shift:insn>v2qi3): Enable for optimize_size instead
	of optimize_function_for_size_p.

2024-03-06  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/114200
	PR target/114202
	* config/riscv/vector.md: Use vmv[1248]r.v instead of vmv.v.v.

2024-03-06  Robin Dapp  <rdapp@ventanamicro.com>

	* config/riscv/riscv-vector-costs.cc (adjust_stmt_cost): Move...
	(costs::adjust_stmt_cost): ... to here and add vec_load/vec_store
	offset handling.
	(costs::add_stmt_cost): Also adjust cost for statements without
	stmt_info.
	* config/riscv/riscv-vector-costs.h: Define zero constant.

2024-03-06  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	PR target/113915
	* config/arm/arm.md (NOCOND): Improve comment.
	(arm_rev*) Add predicable.
	* config/arm/arm.cc (arm_final_prescan_insn): Add check for
	PREDICABLE_YES.

2024-03-06  Jeff Law  <jlaw@ventanamicro.com>

	PR target/113001
	PR target/112871
	* config/riscv/riscv.cc (expand_conditional_move): Do not swap
	operands when the comparison operand is the same as the false
	arm for a NE test.

2024-03-06  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/i386-expand.cc (ix86_expand_move) [TARGET_MACHO]:
	Eliminate common code and use generic code instead.

2024-03-06  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (avr_rtx_costs_1) [PLUS+ZERO_EXTEND]: Adjust
	rtx cost.

2024-03-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114239
	* tree-vect-loop.cc (vect_get_vect_def): Remove.
	(vect_create_epilog_for_reduction): The passed in stmt_info
	should now be the live stmt that produces the scalar reduction
	result.  Revert PR114192 fix.  Base reduction info off
	info_for_reduction.  Remove special handling of
	early-break/peeled, restore original vector def gathering.
	Make sure to pick the correct exit PHIs.
	(vectorizable_live_operation): Pass in the proper stmt_info
	for early break exits.

2024-03-06  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-feature-deps.h (feature_deps::info): Add
	out-of-class definitions of static constants.

2024-03-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114249
	* tree-vect-slp.cc (vect_build_slp_instance): Move making
	a BB reduction lane number even ...
	(vect_slp_check_for_roots): ... here to avoid leaking
	pattern defs.

2024-03-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114246
	* tree-ssa-dse.cc (increment_start_addr): Strip useless
	type conversions from the adjusted address.

2024-03-06  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/114190
	* config/i386/i386-features.cc (rest_of_handle_insert_vzeroupper):
	Call df_remove_problem for df_note before calling df_analyze.

2024-03-05  Cupertino Miranda  <cupertino.miranda@oracle.com>
	    Indu Bhagat  <indu.bhagat@oracle.com>

	PR debug/114186
	* dwarf2ctf.cc (gen_ctf_array_type): Invoke the ctf_add_array ()
	in the correct order of the dimensions.
	(gen_ctf_subrange_type): Refactor out handling of
	DW_TAG_subrange_type DIE to here.

2024-03-05  Richard Sandiford  <richard.sandiford@arm.com>

	PR sanitizer/97696
	* asan.cc (asan_expand_mark_ifn): Allow the length to be a poly_int.

2024-03-05  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.md (stride_type): Remove luti_consecutive
	and luti_strided.
	* config/aarch64/aarch64-sme.md
	(@aarch64_sme_lut<LUTI_BITS><mode>): Remove stride_type attribute.
	(@aarch64_sme_lut<LUTI_BITS><mode>_strided2): Delete.
	(@aarch64_sme_lut<LUTI_BITS><mode>_strided4): Likewise.
	* config/aarch64/aarch64-early-ra.cc (is_stride_candidate)
	(early_ra::maybe_convert_to_strided_access): Remove support for
	strided LUTI2 and LUTI4.

2024-03-05  Richard Earnshaw  <rearnsha@arm.com>

	PR target/113510
	* config/arm/thumb1.md (peephole2 to fuse mov imm/add SP): Use
	low_register_operand.

2024-03-05  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.md: Add two RTL peepholes for PLUS, IOR and AND
	in HI, PSI, SI that swap operation order from "X = CST, X o= Y"
	to "X = Y, X o= CST".

2024-03-05  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.h (ADDITIONAL_REGISTER_NAMES): Add
	s9 as an alias of r22.

2024-03-05  Roger Sayle  <roger@nextmovesoftware.com>

	* config/avr/avr-protos.h (avr_out_insv): New proto.
	* config/avr/avr.cc (avr_out_insv): New function.
	(avr_adjust_insn_length) [ADJUST_LEN_INSV]: Handle case.
	(avr_cbranch_cost) [ZERO_EXTRACT]: Adjust rtx costs.
	* config/avr/avr.md (define_attr "adjust_len") Add insv.
	(andhi3, *andhi3, andpsi3, *andpsi3, andsi3, *andsi3):
	Add constraint alternative where the 3rd operand is a power
	of 2, and the source register may differ from the destination.
	(*insv.any_shift.<mode>_split): Call avr_out_insv to output
	instructions.  Set attr "length" to "insv".
	* config/avr/constraints.md (Cb2, Cb3, Cb4): New constraints.

2024-03-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114231
	* tree-vect-slp.cc (vect_analyze_slp): Lookup patterns when
	processing a BB SLP root.

2024-03-05  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/114211
	* lower-subreg.cc (resolve_simple_move): For double-word
	rotates by BITS_PER_WORD if there is overlap between source
	and destination use a temporary.

2024-03-05  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114157
	* gimple-lower-bitint.cc: Include stor-layout.h.
	(mergeable_op): Return true for BIT_FIELD_REF.
	(struct bitint_large_huge): Declare handle_bit_field_ref method.
	(bitint_large_huge::handle_bit_field_ref): New method.
	(bitint_large_huge::handle_stmt): Use it for BIT_FIELD_REF.

2024-03-05  Jakub Jelinek  <jakub@redhat.com>

	PR target/114116
	* config/i386/i386.h (enum call_saved_registers_type): Add
	TYPE_NO_CALLEE_SAVED_REGISTERS_EXCEPT_BP enumerator.
	* config/i386/i386-options.cc (ix86_set_func_type): Remove
	has_no_callee_saved_registers variable, add no_callee_saved_registers
	instead, initialize it depending on whether it is
	no_callee_saved_registers function or not.  Don't set it if
	no_caller_saved_registers attribute is present.  Adjust users.
	* config/i386/i386.cc (ix86_function_ok_for_sibcall): Handle
	TYPE_NO_CALLEE_SAVED_REGISTERS_EXCEPT_BP like
	TYPE_NO_CALLEE_SAVED_REGISTERS.
	(ix86_save_reg): Handle TYPE_NO_CALLEE_SAVED_REGISTERS_EXCEPT_BP.

2024-03-05  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv.cc (riscv_v_adjust_bytesize): Cleanup unused
	mode_size related code.

2024-03-05  Patrick Palka  <ppalka@redhat.com>

	* doc/invoke.texi (-Wno-global-module): Document.

2024-03-04  David Faust  <david.faust@oracle.com>

	* config/bpf/bpf-protos.h (bpf_expand_setmem): New prototype.
	* config/bpf/bpf.cc (bpf_expand_setmem): New.
	* config/bpf/bpf.md (setmemdi): New define_expand.

2024-03-04  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/113010
	* combine.cc (simplify_comparison): Guard the
	WORD_REGISTER_OPERATIONS check on scalar_int_mode of SUBREG_REG
	and initialize inner_mode.

2024-03-04  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/arm/iterators.md (supf): Remove VMLALDAVXQ_U, VMLALDAVXQ_P_U,
	VMLALDAVAXQ_U cases.
	(VMLALDAVXQ): Remove iterator.
	(VMLALDAVXQ_P): Likewise.
	(VMLALDAVAXQ): Likewise.
	* config/arm/mve.md (mve_vstrwq_p_fv4sf): Replace use of <MVE_VPRED>
	mode iterator attribute with V4BI mode.
	* config/arm/unspecs.md (VMLALDAVXQ_U, VMLALDAVXQ_P_U,
	VMLALDAVAXQ_U): Remove unused unspecs.

2024-03-04  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/arm/arm.md (mve_safe_imp_xlane_pred): New attribute.
	* config/arm/iterators.md (mve_vmaxmin_safe_imp): New iterator
	attribute.
	* config/arm/mve.md (vaddvq_s, vaddvq_u, vaddlvq_s, vaddlvq_u,
	vaddvaq_s, vaddvaq_u, vmaxavq_s, vmaxvq_u, vmladavq_s, vmladavq_u,
	vmladavxq_s, vmlsdavq_s, vmlsdavxq_s, vaddlvaq_s, vaddlvaq_u,
	vmlaldavq_u, vmlaldavq_s, vmlaldavq_u, vmlaldavxq_s, vmlsldavq_s,
	vmlsldavxq_s, vrmlaldavhq_u, vrmlaldavhq_s, vrmlaldavhxq_s,
	vrmlsldavhq_s, vrmlsldavhxq_s, vrmlaldavhaq_s, vrmlaldavhaq_u,
	vrmlaldavhaxq_s, vrmlsldavhaq_s, vrmlsldavhaxq_s, vabavq_s, vabavq_u,
	vmladavaq_u, vmladavaq_s, vmladavaxq_s, vmlsdavaq_s, vmlsdavaxq_s,
	vmlaldavaq_s, vmlaldavaq_u, vmlaldavaxq_s, vmlsldavaq_s,
	vmlsldavaxq_s): Added mve_safe_imp_xlane_pred.

2024-03-04  Stam Markianos-Wright  <stam.markianos-wright@arm.com>

	* config/arm/arm.md (mve_unpredicated_insn): New attribute.
	* config/arm/arm.h (MVE_VPT_PREDICATED_INSN_P): New define.
	(MVE_VPT_UNPREDICATED_INSN_P): Likewise.
	(MVE_VPT_PREDICABLE_INSN_P): Likewise.
	* config/arm/vec-common.md (mve_vshlq_<supf><mode>): Add attribute.
	* config/arm/mve.md (arm_vcx1q<a>_p_v16qi): Add attribute.
	(arm_vcx1q<a>v16qi): Likewise.
	(arm_vcx1qav16qi): Likewise.
	(arm_vcx1qv16qi): Likewise.
	(arm_vcx2q<a>_p_v16qi): Likewise.
	(arm_vcx2q<a>v16qi): Likewise.
	(arm_vcx2qav16qi): Likewise.
	(arm_vcx2qv16qi): Likewise.
	(arm_vcx3q<a>_p_v16qi): Likewise.
	(arm_vcx3q<a>v16qi): Likewise.
	(arm_vcx3qav16qi): Likewise.
	(arm_vcx3qv16qi): Likewise.
	(@mve_<mve_insn>q_<supf><mode>): Likewise.
	(@mve_<mve_insn>q_int_<supf><mode>): Likewise.
	(@mve_<mve_insn>q_<supf>v4si): Likewise.
	(@mve_<mve_insn>q_n_<supf><mode>): Likewise.
	(@mve_<mve_insn>q_r_<supf><mode>): Likewise.
	(@mve_<mve_insn>q_f<mode>): Likewise.
	(@mve_<mve_insn>q_m_<supf><mode>): Likewise.
	(@mve_<mve_insn>q_m_n_<supf><mode>): Likewise.
	(@mve_<mve_insn>q_m_r_<supf><mode>): Likewise.
	(@mve_<mve_insn>q_m_f<mode>): Likewise.
	(@mve_<mve_insn>q_int_m_<supf><mode>): Likewise.
	(@mve_<mve_insn>q_p_<supf>v4si): Likewise.
	(@mve_<mve_insn>q_p_<supf><mode>): Likewise.
	(@mve_<mve_insn>q<mve_rot>_<supf><mode>): Likewise.
	(@mve_<mve_insn>q<mve_rot>_f<mode>): Likewise.
	(@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): Likewise.
	(@mve_<mve_insn>q<mve_rot>_m_f<mode>): Likewise.
	(mve_v<absneg_str>q_f<mode>): Likewise.
	(mve_<mve_addsubmul>q<mode>): Likewise.
	(mve_<mve_addsubmul>q_f<mode>): Likewise.
	(mve_vadciq_<supf>v4si): Likewise.
	(mve_vadciq_m_<supf>v4si): Likewise.
	(mve_vadcq_<supf>v4si): Likewise.
	(mve_vadcq_m_<supf>v4si): Likewise.
	(mve_vandq_<supf><mode>): Likewise.
	(mve_vandq_f<mode>): Likewise.
	(mve_vandq_m_<supf><mode>): Likewise.
	(mve_vandq_m_f<mode>): Likewise.
	(mve_vandq_s<mode>): Likewise.
	(mve_vandq_u<mode>): Likewise.
	(mve_vbicq_<supf><mode>): Likewise.
	(mve_vbicq_f<mode>): Likewise.
	(mve_vbicq_m_<supf><mode>): Likewise.
	(mve_vbicq_m_f<mode>): Likewise.
	(mve_vbicq_m_n_<supf><mode>): Likewise.
	(mve_vbicq_n_<supf><mode>): Likewise.
	(mve_vbicq_s<mode>): Likewise.
	(mve_vbicq_u<mode>): Likewise.
	(@mve_vclzq_s<mode>): Likewise.
	(mve_vclzq_u<mode>): Likewise.
	(@mve_vcmp_<mve_cmp_op>q_<mode>): Likewise.
	(@mve_vcmp_<mve_cmp_op>q_n_<mode>): Likewise.
	(@mve_vcmp_<mve_cmp_op>q_f<mode>): Likewise.
	(@mve_vcmp_<mve_cmp_op>q_n_f<mode>): Likewise.
	(@mve_vcmp_<mve_cmp_op1>q_m_f<mode>): Likewise.
	(@mve_vcmp_<mve_cmp_op1>q_m_n_<supf><mode>): Likewise.
	(@mve_vcmp_<mve_cmp_op1>q_m_<supf><mode>): Likewise.
	(@mve_vcmp_<mve_cmp_op1>q_m_n_f<mode>): Likewise.
	(mve_vctp<MVE_vctp>q<MVE_vpred>): Likewise.
	(mve_vctp<MVE_vctp>q_m<MVE_vpred>): Likewise.
	(mve_vcvtaq_<supf><mode>): Likewise.
	(mve_vcvtaq_m_<supf><mode>): Likewise.
	(mve_vcvtbq_f16_f32v8hf): Likewise.
	(mve_vcvtbq_f32_f16v4sf): Likewise.
	(mve_vcvtbq_m_f16_f32v8hf): Likewise.
	(mve_vcvtbq_m_f32_f16v4sf): Likewise.
	(mve_vcvtmq_<supf><mode>): Likewise.
	(mve_vcvtmq_m_<supf><mode>): Likewise.
	(mve_vcvtnq_<supf><mode>): Likewise.
	(mve_vcvtnq_m_<supf><mode>): Likewise.
	(mve_vcvtpq_<supf><mode>): Likewise.
	(mve_vcvtpq_m_<supf><mode>): Likewise.
	(mve_vcvtq_from_f_<supf><mode>): Likewise.
	(mve_vcvtq_m_from_f_<supf><mode>): Likewise.
	(mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
	(mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
	(mve_vcvtq_m_to_f_<supf><mode>): Likewise.
	(mve_vcvtq_n_from_f_<supf><mode>): Likewise.
	(mve_vcvtq_n_to_f_<supf><mode>): Likewise.
	(mve_vcvtq_to_f_<supf><mode>): Likewise.
	(mve_vcvttq_f16_f32v8hf): Likewise.
	(mve_vcvttq_f32_f16v4sf): Likewise.
	(mve_vcvttq_m_f16_f32v8hf): Likewise.
	(mve_vcvttq_m_f32_f16v4sf): Likewise.
	(mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
	(mve_vdwdupq_wb_u<mode>_insn): Likewise.
	(mve_veorq_s><mode>): Likewise.
	(mve_veorq_u><mode>): Likewise.
	(mve_veorq_f<mode>): Likewise.
	(mve_vidupq_m_wb_u<mode>_insn): Likewise.
	(mve_vidupq_u<mode>_insn): Likewise.
	(mve_viwdupq_m_wb_u<mode>_insn): Likewise.
	(mve_viwdupq_wb_u<mode>_insn): Likewise.
	(mve_vldrbq_<supf><mode>): Likewise.
	(mve_vldrbq_gather_offset_<supf><mode>): Likewise.
	(mve_vldrbq_gather_offset_z_<supf><mode>): Likewise.
	(mve_vldrbq_z_<supf><mode>): Likewise.
	(mve_vldrdq_gather_base_<supf>v2di): Likewise.
	(mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
	(mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
	(mve_vldrdq_gather_base_z_<supf>v2di): Likewise.
	(mve_vldrdq_gather_offset_<supf>v2di): Likewise.
	(mve_vldrdq_gather_offset_z_<supf>v2di): Likewise.
	(mve_vldrdq_gather_shifted_offset_<supf>v2di): Likewise.
	(mve_vldrdq_gather_shifted_offset_z_<supf>v2di): Likewise.
	(mve_vldrhq_<supf><mode>): Likewise.
	(mve_vldrhq_fv8hf): Likewise.
	(mve_vldrhq_gather_offset_<supf><mode>): Likewise.
	(mve_vldrhq_gather_offset_fv8hf): Likewise.
	(mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
	(mve_vldrhq_gather_offset_z_fv8hf): Likewise.
	(mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
	(mve_vldrhq_gather_shifted_offset_fv8hf): Likewise.
	(mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
	(mve_vldrhq_gather_shifted_offset_z_fv8hf): Likewise.
	(mve_vldrhq_z_<supf><mode>): Likewise.
	(mve_vldrhq_z_fv8hf): Likewise.
	(mve_vldrwq_<supf>v4si): Likewise.
	(mve_vldrwq_fv4sf): Likewise.
	(mve_vldrwq_gather_base_<supf>v4si): Likewise.
	(mve_vldrwq_gather_base_fv4sf): Likewise.
	(mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
	(mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
	(mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
	(mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
	(mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
	(mve_vldrwq_gather_base_z_fv4sf): Likewise.
	(mve_vldrwq_gather_offset_<supf>v4si): Likewise.
	(mve_vldrwq_gather_offset_fv4sf): Likewise.
	(mve_vldrwq_gather_offset_z_<supf>v4si): Likewise.
	(mve_vldrwq_gather_offset_z_fv4sf): Likewise.
	(mve_vldrwq_gather_shifted_offset_<supf>v4si): Likewise.
	(mve_vldrwq_gather_shifted_offset_fv4sf): Likewise.
	(mve_vldrwq_gather_shifted_offset_z_<supf>v4si): Likewise.
	(mve_vldrwq_gather_shifted_offset_z_fv4sf): Likewise.
	(mve_vldrwq_z_<supf>v4si): Likewise.
	(mve_vldrwq_z_fv4sf): Likewise.
	(mve_vmvnq_s<mode>): Likewise.
	(mve_vmvnq_u<mode>): Likewise.
	(mve_vornq_<supf><mode>): Likewise.
	(mve_vornq_f<mode>): Likewise.
	(mve_vornq_m_<supf><mode>): Likewise.
	(mve_vornq_m_f<mode>): Likewise.
	(mve_vornq_s<mode>): Likewise.
	(mve_vornq_u<mode>): Likewise.
	(mve_vorrq_<supf><mode>): Likewise.
	(mve_vorrq_f<mode>): Likewise.
	(mve_vorrq_m_<supf><mode>): Likewise.
	(mve_vorrq_m_f<mode>): Likewise.
	(mve_vorrq_m_n_<supf><mode>): Likewise.
	(mve_vorrq_n_<supf><mode>): Likewise.
	(mve_vorrq_s<mode>): Likewise.
	(mve_vorrq_s<mode>): Likewise.
	(mve_vsbciq_<supf>v4si): Likewise.
	(mve_vsbciq_m_<supf>v4si): Likewise.
	(mve_vsbcq_<supf>v4si): Likewise.
	(mve_vsbcq_m_<supf>v4si): Likewise.
	(mve_vshlcq_<supf><mode>): Likewise.
	(mve_vshlcq_m_<supf><mode>): Likewise.
	(mve_vshrq_m_n_<supf><mode>): Likewise.
	(mve_vshrq_n_<supf><mode>): Likewise.
	(mve_vstrbq_<supf><mode>): Likewise.
	(mve_vstrbq_p_<supf><mode>): Likewise.
	(mve_vstrbq_scatter_offset_<supf><mode>_insn): Likewise.
	(mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
	(mve_vstrdq_scatter_base_<supf>v2di): Likewise.
	(mve_vstrdq_scatter_base_p_<supf>v2di): Likewise.
	(mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
	(mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
	(mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
	(mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
	(mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
	(mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
	(mve_vstrhq_<supf><mode>): Likewise.
	(mve_vstrhq_fv8hf): Likewise.
	(mve_vstrhq_p_<supf><mode>): Likewise.
	(mve_vstrhq_p_fv8hf): Likewise.
	(mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
	(mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
	(mve_vstrhq_scatter_offset_p_<supf><mode>_insn): Likewise.
	(mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
	(mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
	(mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
	(mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
	(mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
	(mve_vstrwq_<supf>v4si): Likewise.
	(mve_vstrwq_fv4sf): Likewise.
	(mve_vstrwq_p_<supf>v4si): Likewise.
	(mve_vstrwq_p_fv4sf): Likewise.
	(mve_vstrwq_scatter_base_<supf>v4si): Likewise.
	(mve_vstrwq_scatter_base_fv4sf): Likewise.
	(mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
	(mve_vstrwq_scatter_base_p_fv4sf): Likewise.
	(mve_vstrwq_scatter_base_wb_<supf>v4si): Likewise.
	(mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
	(mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
	(mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
	(mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
	(mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
	(mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
	(mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
	(mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
	(mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
	(mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
	(mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.

2024-03-04  Marek Polacek  <polacek@redhat.com>

	* doc/extend.texi: Update [[gnu::no_dangling]].

2024-03-04  Andrew Stubbs  <ams@baylibre.com>

	* dojump.cc (do_compare_and_jump): Use full-width integers for shifts.
	* expr.cc (store_constructor): Likewise.
	(do_store_flag): Likewise.

2024-03-04  Mark Wielaard  <mark@klomp.org>

	* common.opt.urls: Regenerate.
	* config/avr/avr.opt.urls: Likewise.
	* config/i386/i386.opt.urls: Likewise.
	* config/pru/pru.opt.urls: Likewise.
	* config/riscv/riscv.opt.urls: Likewise.
	* config/rs6000/rs6000.opt.urls: Likewise.

2024-03-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114197
	* tree-if-conv.cc (bitfields_to_lower_p): Do not lower if
	there are volatile bitfield accesses.
	(pass_if_conversion::execute): Throw away result if the
	if-converted and original loops are not nested as expected.

2024-03-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114164
	* tree-vect-stmts.cc (vectorizable_simd_clone_call): Fail if
	the code generated for mask argument setup is not supported.

2024-03-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114203
	* tree-ssa-loop-niter.cc (build_cltz_expr): Apply CTZ->CLZ
	adjustment before making the result defined at zero.

2024-03-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114192
	* tree-vect-loop.cc (vect_create_epilog_for_reduction): Use the
	appropriate def for the live out stmt in case of an alternate
	exit.

2024-03-04  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114209
	* gimple-lower-bitint.cc (bitint_large_huge::limb_access): Call
	unshare_expr when creating a MEM_REF from MEM_REF.
	(bitint_large_huge::lower_stmt): Call unshare_expr.

2024-03-04  Jakub Jelinek  <jakub@redhat.com>

	PR target/114184
	* config/i386/i386-expand.cc (ix86_expand_move): If XFmode op1
	is SUBREG of CONSTANT_P, force the SUBREG_REG into memory or
	register.

2024-03-04  Roger Sayle  <roger@nextmovesoftware.com>

	PR target/114187
	* simplify-rtx.cc (simplify_context::simplify_subreg): Call
	lowpart_subreg to perform type conversion, to avoid confusion
	over the offset to use in the call to simplify_reg_subreg.

2024-03-03  Greg McGary  <gkm@rivosinc.com>

	PR rtl-optimization/113010
	* combine.cc (simplify_comparison): Simplify a SUBREG on
	WORD_REGISTER_OPERATIONS targets only if it is a zero-extending
	MEM load.

2024-03-03  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc: Resolve ATTRIBUTE_UNUSED.
	Use bool in place of int for boolean logic (if possible).
	Move declarations to definitions (if possible).
	* config/avr/avr.md: Use C++ comments.  Fix some indentation glitches.
	* config/avr/avr-dimode.md: Same.
	* config/avr/constraints.md: Same.
	* config/avr/predicates.md: Same.

2024-03-03  Uros Bizjak  <ubizjak@gmail.com>

	PR target/113720
	* config/alpha/alpha.md (umuldi3_highpart): Remove expander.
	(*umuldi3_highpart_reg): Rename to umuldi3_highpart and
	simplify insn RTX using UMUL_HIGHPART rtx_code.
	(*umuldi3_highpart_const): Remove.

2024-03-03  Georg-Johann Lay  <avr@gjlay.de>

	PR target/114100
	* config/avr/avr-protos.h (_reg_unused_after): Remove proto.
	* config/avr/avr.cc (_reg_unused_after): Make static.  And
	add 3rd argument to skip the current insn.
	(reg_unused_after): Adjust call of reg_unused_after.
	(avr_out_plus_1) [AVR_TINY && -mfuse-add >= 2]: Don't output
	unneeded frame pointer adjustments.

2024-03-03  Georg-Johann Lay  <avr@gjlay.de>

	PR target/92729
	* config/avr/avr.md (define_attr "cc"): Remove.
	* config/avr/avr-protos.h (avr_out_plus): Remove pcc argument
	from prototype.
	* config/avr/avr.cc (avr_out_plus_1): Remove pcc argument and
	its uses.  Add insn argument.
	(avr_out_plus_symbol): Remove pcc argument and its uses.
	(avr_out_plus): Remove pcc argument and its uses.
	Adjust calls of avr_out_plus_symbol and avr_out_plus_1.
	(avr_out_round): Adjust call of avr_out_plus.

2024-03-03  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (avr_init_cumulative_args): Fix a typo
	from  r14-9273.

2024-03-03  Oleg Endo  <olegendo@gcc.gnu.org>

	PR target/101737
	* config/sh/sh.cc (sh_is_nott_insn): Handle case where the input
	is not an insn, but e.g. a code label.

2024-03-02  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.md (REG_0, ... REG_36): New define_constants.
	* config/avr/avr.cc: Use them instead of magic numbers when it
	means a register number.

2024-03-02  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc: Adjust some comments.

2024-03-02  Georg-Johann Lay  <avr@gjlay.de>

	PR target/114100
	* config/avr/avr.cc (avr_out_plus_1) [-mtiny-stack]: Only adjust
	the low part of the frame pointer with 8-bit stack pointer.

2024-03-01  Patrick Palka  <ppalka@redhat.com>

	PR c++/104919
	PR c++/106009
	* tree-inline.cc (remap_decl): Handle copy_decl returning the
	original decl.
	(remap_decls): Handle remap_decl returning the original decl.
	(copy_fn): Adjust copy_decl callback to skip TYPE_DECL and
	CONST_DECL.

2024-03-01  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.md (zero_extendqi<SUPERQI:mode>2_internal): Fix
	type attribute.
	(extendsidi2_internal, movhf_hardfloat, movhf_softfloat): Likewise.
	(movdi_32bit, movdi_64bit, movsi_internal): Likewise.
	(movhi_internal, movqi_internal): Likewise.
	(movsf_softfloat, movsf_hardfloat): Likewise.
	(movdf_hardfloat_rv32, movdf_hardfloat_rv64): Likewise.
	(movdf_softfloat): Likewise.

2024-03-01  Marek Polacek  <polacek@redhat.com>

	PR c++/110358
	PR c++/109642
	* doc/extend.texi: Document gnu::no_dangling.
	* doc/invoke.texi: Mention that gnu::no_dangling disables
	-Wdangling-reference.

2024-03-01  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.opt: Overhaul help screen.

2024-03-01  Jakub Jelinek  <jakub@redhat.com>
	    Tobias Burnus  <tburnus@baylibre.com>

	PR c++/110347
	* gimplify.cc (omp_notice_variable): Fix 'shared' arg to
	lang_hooks.decls.omp_disregard_value_expr for
	(first)private in target regions.

2024-03-01  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114136
	* calls.cc (expand_call): For TYPE_NO_NAMED_ARGS_STDARG_P set
	n_named_args initially before INIT_CUMULATIVE_ARGS to
	structure_value_addr_parm rather than 0, after it don't modify
	it if strict_argument_naming and clear only if
	!pretend_outgoing_varargs_named.

2024-03-01  Jakub Jelinek  <jakub@redhat.com>

	PR debug/114015
	* dwarf2out.cc (should_move_die_to_comdat): Return false for
	aggregates without DW_AT_byte_size attribute or with non-constant
	DW_AT_byte_size.

2024-03-01  Georg-Johann Lay  <avr@gjlay.de>

	* doc/invoke.texi (AVR Options) <-mfuse-add=level>: Document
	valid values for level.

2024-03-01  Richard Biener  <rguenther@suse.de>

	PR middle-end/114070
	* match.pd ((c ? a : b) op d  -->  c ? (a op d) : (b op d)):
	Allow the folding if before lowering and the current IL
	isn't supported with vcond_mask.

2024-03-01  xuli  <xuli1@eswincomputing.com>

	* config/riscv/riscv.cc (TARGET_GNU_ATTRIBUTES): Add riscv_vector_cc
	attribute to riscv_attribute_table.
	(riscv_vector_cc_function_p): Return true if FUNC is a riscv_vector_cc function.
	(riscv_fntype_abi): Add riscv_vector_cc attribute check.
	* doc/extend.texi: Add riscv_vector_cc attribute description.

2024-03-01  Pan Li  <pan2.li@intel.com>

	PR target/112817
	* config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Replace
	RVV_FIXED_VLMAX to RVV_VECTOR_BITS_ZVL.
	* config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Remove.
	(enum rvv_vector_bits_enum): New enum for different RVV vector bits.
	* config/riscv/riscv-selftests.cc (riscv_run_selftests): Update
	comments for option replacement.
	* config/riscv/riscv-v.cc (autovec_use_vlmax_p): Replace enum of
	riscv_autovec_preference to rvv_vector_bits.
	(vls_mode_valid_p): Ditto.
	(estimated_poly_value): Ditto.
	* config/riscv/riscv.cc (riscv_convert_vector_chunks): Rename to
	vector chunks and honor new option mrvv-vector-bits.
	(riscv_override_options_internal): Update comments and rename the
	vector chunks.
	* config/riscv/riscv.opt: Add option mrvv-vector-bits and remove
	internal option param=riscv-autovec-preference.

2024-03-01  Jakub Jelinek  <jakub@redhat.com>

	* function.cc (assign_parms): Only call assign_parms_setup_varargs
	early for TYPE_NO_NAMED_ARGS_STDARG_P functions if fnargs is empty.

2024-03-01  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114156
	* gimple-lower-bitint.cc (bitint_large_huge::lower_stmt): Allow
	rhs1 of a VCE to have no underlying variable if it is a load and
	handle that case.

2024-02-29  David Malcolm  <dmalcolm@redhat.com>

	PR analyzer/114159
	* function.cc (function_name): Make param const.
	* function.h (function_name): Likewise.

2024-02-29  Georg-Johann Lay  <avr@gjlay.de>

	PR target/114100
	* doc/invoke.texi (AVR Options) <-mfuse-add>: Document.
	* config/avr/avr.opt (-mfuse-add=): New target option.
	* common/config/avr/avr-common.cc (avr_option_optimization_table)
	[OPT_LEVELS_1_PLUS]: Set -mfuse-add=1.
	[OPT_LEVELS_2_PLUS]: Set -mfuse-add=2.
	* config/avr/avr-passes.def (avr_pass_fuse_add): Insert new pass.
	* config/avr/avr-protos.h (avr_split_tiny_move)
	(make_avr_pass_fuse_add): New protos.
	* config/avr/avr.md [AVR_TINY]: New post-reload splitter uses
	avr_split_tiny_move to split indirect memory accesses.
	(gen_move_clobbercc): New define_expand helper.
	* config/avr/avr.cc (avr_pass_data_fuse_add): New pass data.
	(avr_pass_fuse_add): New class from rtl_opt_pass.
	(make_avr_pass_fuse_add, avr_split_tiny_move): New functions.
	(reg_seen_between_p, emit_move_ccc, emit_move_ccc_after): New functions.
	(avr_legitimate_address_p) [AVR_TINY]: Don't restrict offsets
	of PLUS addressing for AVR_TINY.
	(avr_regno_mode_code_ok_for_base_p) [AVR_TINY]: Ignore -mstrict-X.
	(avr_out_plus_1) [AVR_TINY]: Tweak ++Y and --Y.
	(avr_mode_code_base_reg_class) [AVR_TINY]: Always return POINTER_REGS.

2024-02-29  Georg-Johann Lay  <avr@gjlay.de>

	PR target/114132
	* config/avr/avr.h (CUMULATIVE_ARGS) <has_stack_args>: New field.
	* config/avr/avr.cc (avr_init_cumulative_args): Initialize it.
	(avr_function_arg): Set it.
	(avr_frame_pointer_required_p): Use it instead of .nregs.

2024-02-29  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/108174
	* config/aarch64/aarch64-builtins.cc (aarch64_memtag_builtin_data): Make
	static and mark with GTY.

2024-02-29  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.md
	(loongarch_<crc>_w_<size>_w_extended): New define_insn.

2024-02-29  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.md (CRC): New define_int_iterator.
	(crc): New define_int_attr.
	(loongarch_crc_w_<size>_w, loongarch_crcc_w_<size>_w): Unify
	into ...
	(loongarch_<crc>_w_<size>_w): ... here.

2024-02-29  Kito Cheng  <kito.cheng@sifive.com>

	PR target/114130
	* config/riscv/sync.md (atomic_compare_and_swap<mode>): Sign
	extend the expected value if needed.

2024-02-28  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* config.gcc (target_gtfiles): Change coreout to btfext-out.
	(extra_objs): Change coreout to btfext-out.
	* config/bpf/coreout.cc: Rename to btfext-out.cc.
	* config/bpf/btfext-out.cc: Add.
	* config/bpf/coreout.h: Rename to btfext-out.h.
	* config/bpf/btfext-out.h: Add.
	* config/bpf/core-builtins.cc: Change include.
	* config/bpf/core-builtins.h: Change include.
	* config/bpf/t-bpf: Accomodate renamed files.

2024-02-28  Cupertino Miranda  <cupertino.miranda@oracle.com>

	PR target/113453
	* config/bpf/bpf.cc (bpf_function_prologue): Define target
	hook.
	* config/bpf/coreout.cc (brf_ext_info_section)
	(btf_ext_info): Move from coreout.h
	(btf_ext_funcinfo, btf_ext_lineinfo): Add struct.
	(bpf_core_reloc): Rename to btf_ext_core_reloc.
	(btf_ext): Add static variable.
	(btfext_info_sec_find_or_add, SEARCH_NODE_AND_RETURN)
	(bpf_create_or_find_funcinfo, bpt_create_core_reloc)
	(btf_ext_add_string, btf_funcinfo_type_callback)
	(btf_add_func_info_for, btf_validate_funcinfo)
	(btf_ext_info_len, output_btfext_func_info): Add function.
	(output_btfext_header, bpf_core_reloc_add)
	(output_btfext_core_relocs, btf_ext_init, btf_ext_output):
	Change to support new structs.
	* config/bpf/coreout.h (btf_ext_funcinfo, btf_ext_lineinfo):
	Move and change in coreout.cc.
	(btf_add_func_info_for, btf_ext_add_string): Add prototypes.

2024-02-28  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* config/bpf/bpf.cc (bpf_option_override): Make .BTF.ext
	enabled by default for BPF.
	(bpf_file_end): Call BTF deallocation.
	(bpf_asm_init_sections): Correct condition.
	* dwarf2ctf.cc (ctf_debug_finalize): Conditionally execute BTF
	deallocation.
	(ctf_debuf_finish): Correct condition for calling
	ctf_debug_finalize.

2024-02-28  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* btfout.cc (output_btf_func_types): Use FOR_EACH_VEC_ELT.
	(traverse_btf_func_types): Define function.
	* ctfc.h (funcs_traverse_callback): Typedef for function
	prototype.
	(traverse_btf_func_types): Add prototype.

2024-02-28  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* btfout.cc (btf_collect_dataset): Corrects BTF type id.

2024-02-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113831
	PR tree-optimization/108355
	* tree-ssa-sccvn.cc (copy_reference_ops_from_ref): Revert
	PR113831 fix.

2024-02-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114121
	* tree-ssa-sccvn.h (vn_reference_s::offset,
	vn_reference_s::max_size): New fields.
	(vn_reference_insert_pieces): Adjust prototype.
	* tree-ssa-pre.cc (phi_translate_1): Preserve offset/max_size.
	* tree-ssa-sccvn.cc (vn_reference_eq): Compare offset and
	size, allow using "don't know" state.
	(vn_walk_cb_data::finish): Pass along offset/max_size.
	(vn_reference_lookup_or_insert_for_pieces): Take offset and
	max_size as argument and use it.
	(vn_reference_lookup_3): Properly adjust offset and max_size
	according to the adjusted ao_ref.
	(vn_reference_lookup_pieces): Initialize offset and max_size.
	(vn_reference_lookup): Likewise.
	(vn_reference_lookup_call): Likewise.
	(vn_reference_insert): Likewise.
	(visit_reference_op_call): Likewise.
	(vn_reference_insert_pieces): Take offset and max_size
	as argument and use it.

2024-02-28  Juergen Christ  <jchrist@linux.ibm.com>

	PR tree-optimization/114075
	* tree-vect-stmts.cc (vectorizable_operation): Don't emulate floating
	point vectors

2024-02-28  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114041
	* graphite-sese-to-poly.cc (add_conditions_to_domain): Check for
	INTEGRAL_TYPE_P check rather than INTEGER_TYPE.

2024-02-28  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113988
	* stor-layout.h (bitwise_mode_for_size): Declare.
	* stor-layout.cc (bitwise_mode_for_size): New function.
	* gimple-fold.cc (gimple_fold_builtin_memory_op): Use it.
	Use bitwise_type_for_mode instead of build_nonstandard_integer_type.
	Use BITS_PER_UNIT instead of 8.

2024-02-27  Uros Bizjak  <ubizjak@gmail.com>

	PR target/113871
	* config/i386/mmx.md (V248FI): Add V2BF mode.
	(V24FI_32): Ditto.

2024-02-27  Eric Botcazou  <ebotcazou@adacore.com>

	* tree-ssa-dse.cc (compute_trims): Fix description.  Return early
	if either ref->offset is not byte aligned or ref->size is not known
	to be equal to ref->max_size.
	(maybe_trim_complex_store): Fix description.
	(maybe_trim_constructor_store): Likewise.
	(maybe_trim_partially_dead_store): Likewise.

2024-02-27  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/mmintrin.h: Warn if this header is included without
	defining __ENABLE_DEPRECATED_IWMMXT.

2024-02-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114074
	* tree-chrec.h (chrec_convert_rhs): Default at_stmt arg to NULL.
	* tree-chrec.cc (chrec_fold_multiply): Canonicalize inputs.
	Handle poly vs. non-poly multiplication correctly with respect
	to undefined behavior on overflow.

2024-02-27  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/114044
	* internal-fn.def (CLRSB, CLZ, CTZ, FFS, PARITY): Use
	DEF_INTERNAL_INT_EXT_FN macro rather than DEF_INTERNAL_INT_FN.
	* internal-fn.h (expand_CLRSB, expand_CLZ, expand_CTZ, expand_FFS,
	expand_PARITY): Declare.
	* internal-fn.cc (expand_bitquery, expand_CLRSB, expand_CLZ,
	expand_CTZ, expand_FFS, expand_PARITY): New functions.
	(expand_POPCOUNT): Use expand_bitquery.

2024-02-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114081
	* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
	Perform manual dominator update for prologue peeling.
	(vect_do_peeling): Properly update dominators after adding the
	prologue-around guard.

2024-02-26  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.opt (mcall-prologues, mrelax, maccumulate-args)
	(mstrict-X): Tag as "Optimization".

2024-02-26  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (avr_out_compare) [AVR_TINY]: Remove code in
	an "if avr_adiw_reg_p()" block that's dead for AVR_TINY.

2024-02-26  Jakub Jelinek  <jakub@redhat.com>
	    H.J. Lu  <hjl.tools@gmail.com>

	PR rtl-optimization/113617
	* varasm.cc (default_elf_select_rtx_section): For
	references to private symbols in comdat sections
	use .data.relro.local.pool.<comdat>, .data.relro.pool.<comdat>
	or .rodata.<comdat> comdat sections.

2024-02-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114099
	* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
	Create and fill in a needed virtual LC PHI for the alternate
	exits.  Remove code dealing with that missing.

2024-02-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114068
	* tree-vect-loop-manip.cc (get_live_virtual_operand_on_edge):
	New function.
	(slpeel_tree_duplicate_loop_to_edge_cfg): Add a virtual LC PHI
	on the main exit if needed.  Remove band-aid for the case
	it was missing.

2024-02-26  H.J. Lu  <hjl.tools@gmail.com>

	PR target/114097
	* config/i386/i386-options.cc (ix86_set_func_type): Check
	interrupt instead of noreturn attribute.

2024-02-26  Jakub Jelinek  <jakub@redhat.com>

	* config/i386/i386.cc (ix86_bitint_type_info): Add support for
	!TARGET_64BIT.

2024-02-26  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114090
	* match.pd ((x >= 0 ? x : 0) + (x <= 0 ? -x : 0) -> abs x):
	Restrict pattern to ANY_INTEGRAL_TYPE_P and TYPE_OVERFLOW_UNDEFINED
	types.
	((x <= 0 ? -x : 0) -> max(-x, 0)): Likewise.

2024-02-26  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114084
	* fold-const.cc (fold_binary_loc): Avoid the final associate_trees
	if all subtrees of var0 come from one of the op0 or op1 operands
	and all subtrees of con0 come from the other one.  Don't clear
	variables which are never used afterwards.

2024-02-26  Richard Biener  <rguenther@suse.de>

	PR middle-end/114070
	* genmatch.cc (parser::parse_c_expr): Do not record operand
	lists but only mark operators used.
	* match.pd ((c ? a : b) op (c ? d : e)  -->  c ? (a op d) : (b op e)):
	Properly guard the case of tcc_comparison changing the VEC_COND
	value operand type.

2024-02-26  Jakub Jelinek  <jakub@redhat.com>

	PR target/114094
	* config/i386/i386.cc (x86_function_profiler): Add missing new-line
	to printed instruction.

2024-02-26  H.J. Lu  <hjl.tools@gmail.com>

	PR target/114098
	* config/i386/amxtileintrin.h (_tile_loadconfig): Use
	__builtin_ia32_ldtilecfg.
	(_tile_storeconfig): Use __builtin_ia32_sttilecfg.
	* config/i386/i386-builtin.def (BDESC): Add
	__builtin_ia32_ldtilecfg and __builtin_ia32_sttilecfg.
	* config/i386/i386-expand.cc (ix86_expand_builtin): Handle
	IX86_BUILTIN_LDTILECFG and IX86_BUILTIN_STTILECFG.
	* config/i386/i386.md (ldtilecfg): New pattern.
	(sttilecfg): Likewise.

2024-02-24  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/113205
	* tree-vect-slp.cc (vect_optimize_slp_pass::forward_cost): Reject
	the proposed layout if it does not allow a source partition with
	layout 2 to keep that layout.

2024-02-24  Jakub Jelinek  <jakub@redhat.com>

	* builtins.cc (fold_builtin_isascii): Use HOST_WIDE_INT_UC macro.
	* combine.cc (make_field_assignment): Use HOST_WIDE_INT_1U macro.
	* double-int.cc (double_int::mask): Use HOST_WIDE_INT_UC macros.
	* genattrtab.cc (attr_alt_complement): Use HOST_WIDE_INT_1 macro.
	(mk_attr_alt): Use HOST_WIDE_INT_0 macro.
	* genautomata.cc (bitmap_set_bit, CLEAR_BIT): Use HOST_WIDE_INT_1
	macros.
	* ipa-strub.cc (can_strub_internally_p): Use HOST_WIDE_INT_1 macro.
	* loop-iv.cc (implies_p): Use HOST_WIDE_INT_1U macro.
	* pretty-print.cc (test_pp_format): Use HOST_WIDE_INT_C and
	HOST_WIDE_INT_UC macros.
	* rtlanal.cc (nonzero_bits1): Use HOST_WIDE_INT_UC macro.
	* tree.cc (build_replicated_int_cst): Use HOST_WIDE_INT_1U macro.
	* tree.h (DECL_OFFSET_ALIGN): Use HOST_WIDE_INT_1U macro.
	* tree-ssa-structalias.cc (dump_varinfo): Use ~HOST_WIDE_INT_0U
	macros.
	* wide-int.cc (divmod_internal_2): Use HOST_WIDE_INT_1U macro.
	* config/i386/constraints.md (define_constraint "L"): Use
	HOST_WIDE_INT_C macro.
	* config/i386/i386.md (movabsq split peephole2): Use HOST_WIDE_INT_C
	macro.
	(movl + movb peephole2): Likewise.
	* config/i386/predicates.md (x86_64_zext_immediate_operand): Likewise.
	(const_32bit_mask): Likewise.

2024-02-24  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/114073
	* gimple-lower-bitint.cc (bitint_large_huge::lower_stmt): Handle
	VIEW_CONVERT_EXPRs between large/huge _BitInt and non-integer/pointer
	types like vector or complex types.
	(gimple_lower_bitint): Don't merge VIEW_CONVERT_EXPRs to non-integral
	types.  Fix up VIEW_CONVERT_EXPR handling.  Allow merging
	VIEW_CONVERT_EXPR from non-integral/pointer types with a store.

2024-02-23  Robin Dapp  <rdapp@ventanamicro.com>

	PR target/114028
	* config/riscv/riscv-v.cc (rvv_builder::can_duplicate_repeating_sequence_p):
	Return false if inner mode is already Pmode.
	(rvv_builder::is_all_same_sequence): New function.
	(expand_vec_init): Emit broadcast if sequence is all same.

2024-02-23  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113613
	* config/aarch64/aarch64-early-ra.cc
	(early_ra::m_current_region): New member variable.
	(early_ra::m_fpr_recency): Likewise.
	(early_ra::start_new_region): Bump m_current_region.
	(early_ra::allocate_colors): Prefer less recently used registers
	in the event of a tie.  Add a comment to explain why we prefer(ed)
	higher-numbered registers.
	(early_ra::find_oldest_color): Prefer less recently used registers
	here too.
	(early_ra::finalize_allocation): Update recency information for
	allocated registers.
	(early_ra::process_blocks): Initialize m_current_region and
	m_fpr_recency.

2024-02-23  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113295
	* config/aarch64/aarch64-early-ra.cc
	(early_ra::test_strictness): New enum.
	(early_ra::is_chain_candidate): Add a strictness parameter to
	control whether only correctness matters, or whether both correctness
	and heuristics should be used.  Handle multiple levels of equivalence.
	(early_ra::find_related_start): Update call accordingly.
	(early_ra::strided_polarity_pref): Likewise.
	(early_ra::form_chains): Likewise.
	(early_ra::try_to_chain_allocnos): Use is_chain_candidate in
	correctness mode rather than trying to inline the test.

2024-02-23  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113295
	* config/aarch64/aarch64-early-ra.cc
	(early_ra::find_related_start): Account for definitions by shared
	registers when testing for a single register definition.
	(early_ra::accumulate_defs): New function.
	(early_ra::record_copy): If A shares B's register, fold A's
	definition information into B's.  Fold A's use information into B's.

2024-02-23  H.J. Lu  <hjl.tools@gmail.com>

	* configure.ac (HAVE_AS_R_X86_64_CODE_6_GOTTPOFF): Defined as 1
	if R_X86_64_CODE_6_GOTTPOFF is supported.
	* config.in: Regenerated.
	* configure: Likewise.
	* config/i386/predicates.md (apx_ndd_add_memory_operand): Allow
	UNSPEC_GOTNTPOFF if R_X86_64_CODE_6_GOTTPOFF is supported.

2024-02-23  Richard Earnshaw  <rearnsha@arm.com>

	PR target/108120
	* config/arm/neon.md (div<VCVTF:mode>3): Rename from div<mode>3.
	Gate with ARM_HAVE_NEON_<MODE>_ARITH.

2024-02-23  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/114054
	* expr.cc (expand_expr_real_2) <case MULT_EXPR>: Use
	temp variable instead of target parameter for result.

2024-02-23  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114040
	* gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow):
	Use EQ_EXPR rather than LT_EXPR for g2 condition and change its
	probability from likely to unlikely.  When handling the true true
	store, first cast to limb_access_type and then to l's type.

2024-02-23  Richard Biener  <rguenther@suse.de>

	PR target/90785
	* config.gcc: Add ia64*-*-* to the list of obsoleted targets.

2024-02-23  Palmer Dabbelt  <palmer@rivosinc.com>

	PR other/109668
	* config/riscv/arch-canonicalize: Move to python3
	* config/riscv/multilib-generator: Likewise

2024-02-23  Palmer Dabbelt  <palmer@rivosinc.com>

	* doc/invoke.texi: Document -mcpu.

2024-02-23  Lulu Cheng  <chenglulu@loongson.cn>

	* configure: Regenerate.
	* configure.ac: Add parameter "--fatal-warnings" to assemble
	when checking whether the assemble support conditional branch
	relaxation.

2024-02-22  Jakub Jelinek  <jakub@redhat.com>

	PR c/114007
	* doc/extend.texi: (__extension__): Remove comments about scope
	tokens vs. two colons.

2024-02-22  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/109804
	* gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle
	DEMANGLE_COMPONENT_UNNAMED_TYPE.

2024-02-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114048
	* tree-ssa-sccvn.cc (copy_reference_ops_from_ref): MEM_REF
	can also produce -1 off.

2024-02-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/114027
	* tree-vect-loop.cc (vecctorizable_reduction): Use optimized
	condition reduction classification only for single-element
	chains.

2024-02-22  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/111960
	* profile-count.h (profile_count::dump): Remove overload with
	char * first argument.
	* profile-count.cc (profile_count::dump): Change overload with char *
	first argument which uses sprintf into the overfload with FILE *
	first argument and use fprintf instead.  Remove overload which wrapped
	it.

2024-02-22  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113993
	* tree-call-cdce.cc (get_no_error_domain): Handle
	BUILT_IN_{COSH,SINH,EXP{,M1,2}}{F32X,F64X}.  Handle
	BUILT_IN_{COSH,SINH,EXP{,M1,2}}L for
	REAL_MODE_FORMAT (TYPE_MODE (long_double_type_node))->emax == 16384
	the as the F128 suffixed cases, otherwise as non-suffixed ones.
	Handle BUILT_IN_{EXP,POW}10L for
	REAL_MODE_FORMAT (TYPE_MODE (long_double_type_node))->emax == 16384
	as (-inf, 4932).

2024-02-22  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/114038
	* gimple-lower-bitint.cc (bitint_large_huge::lower_mul_overflow): Fix
	loop exit condition if end is divisible by limb_prec.

2024-02-22  YunQiang Su  <syq@gcc.gnu.org>

	* doc/invoke.texi(MIPS Options): Fix skipping UrlSuffix
	problem of mabi=, mno-flush-func, mexplicit-relocs;
	add missing leading - of mbranch-cost option.
	* config/mips/mips.opt.urls: Regenerate.

2024-02-22  Kewen Lin  <linkw@linux.ibm.com>

	PR target/109987
	* config/rs6000/constraints.md (we): Update internal doc without
	referring to option -mpower9-vector.
	* config/rs6000/driver-rs6000.cc (asm_names): Remove mpower9-vector
	special handlings.
	* config/rs6000/rs6000-cpus.def (OTHER_P9_VECTOR_MASKS,
	OTHER_P8_VECTOR_MASKS): Merge to ...
	(OTHER_VSX_VECTOR_MASKS): ... here.
	* config/rs6000/rs6000.cc (rs6000_option_override_internal): Remove
	some error message handlings and explicit option mask adjustments on
	explicit option power{8,9}-vector conflicting with other options.
	(rs6000_print_isa_options): Update comments.
	(rs6000_disable_incompatible_switches): Remove power{8,9}-vector
	related array items and handlings.
	* config/rs6000/rs6000.h (ASM_CPU_SPEC): Remove mpower9-vector
	special handlings.
	* config/rs6000/rs6000.opt: Make option power{8,9}-vector as
	WarnRemoved.
	* doc/extend.texi: Remove documentation referring to option
	-mpower8-vector.
	* doc/invoke.texi: Remove documentation for option
	-mpower{8,9}-vector and adjust some documentation referring to them.
	* doc/md.texi: Update documentation for constraint we.
	* doc/sourcebuild.texi: Remove documentation for powerpc_p8vector_ok.

2024-02-22  Pan Li  <pan2.li@intel.com>

	PR target/114017
	* config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Upgrade
	the version to 0.12.

2024-02-21  Edwin Lu  <ewlu@rivosinc.com>

	* config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert

2024-02-21  Edwin Lu  <ewlu@rivosinc.com>
	    Robin Dapp  <rdapp.gcc@gmail.com>

	* config/riscv/generic-ooo.md (generic_ooo): Move reservation
	(generic_ooo_vec_load): Ditto
	(generic_ooo_vec_store): Ditto
	(generic_ooo_vec_loadstore_seg): Ditto
	(generic_ooo_vec_alu): Ditto
	(generic_ooo_vec_fcmp): Ditto
	(generic_ooo_vec_imul): Ditto
	(generic_ooo_vec_fadd): Ditto
	(generic_ooo_vec_fmul): Ditto
	(generic_ooo_crypto): Ditto
	(generic_ooo_perm): Ditto
	(generic_ooo_vec_reduction): Ditto
	(generic_ooo_vec_ordered_reduction): Ditto
	(generic_ooo_vec_idiv): Ditto
	(generic_ooo_vec_float_divsqrt): Ditto
	(generic_ooo_vec_mask): Ditto
	(generic_ooo_vec_vesetvl): Ditto
	(generic_ooo_vec_setrm): Ditto
	(generic_ooo_vec_readlen): Ditto
	* config/riscv/riscv.md: Include generic-vector-ooo
	* config/riscv/generic-vector-ooo.md: New file. To here

2024-02-21  Edwin Lu  <ewlu@rivosinc.com>

	* config/riscv/generic-ooo.md (generic_ooo_sfb_alu): Add reservation
	(generic_ooo_branch): Ditto
	* config/riscv/generic.md (generic_sfb_alu): Ditto
	(generic_fmul_half): Ditto
	* config/riscv/riscv.md: Remove cbo, pushpop, and rdfrm types
	* config/riscv/sifive-7.md (sifive_7_hfma): Add reservation
	(sifive_7_popcount): Ditto
	* config/riscv/sifive-p400.md (sifive_p400_clmul): Ditto
	* config/riscv/sifive-p600.md (sifive_p600_clmul): Ditto
	* config/riscv/vector.md: Change rdfrm to fmove
	* config/riscv/zc.md: Change pushpop to load/store

2024-02-21  Jonathan Wakely  <jwakely@redhat.com>

	* doc/invoke.texi (Warning Options): Fix typos.

2024-02-21  David Faust  <david.faust@oracle.com>

	* config/bpf/bpf-protos.h (bpf_expand_cpymem): New.
	* config/bpf/bpf.cc: (emit_move_loop, bpf_expand_cpymem): New.
	* config/bpf/bpf.md: (cpymemdi, movmemdi): New define_expands.

2024-02-21  Martin Jambor  <mjambor@suse.cz>

	PR ipa/113476
	* ipa-prop.h (ipa_node_params): Convert lattices to a vector, adjust
	initializers in the contructor.
	(ipa_node_params::~ipa_node_params): Release lattices as a vector.
	* ipa-cp.h: New file.
	* ipa-cp.cc: Include sreal.h and ipa-cp.h.
	(ipcp_value_source): Move to ipa-cp.h.
	(ipcp_value_base): Likewise.
	(ipcp_value): Likewise.
	(ipcp_lattice): Likewise.
	(ipcp_agg_lattice): Likewise.
	(ipcp_bits_lattice): Likewise.
	(ipcp_vr_lattice): Likewise.
	(ipcp_param_lattices): Likewise.
	(ipa_get_parm_lattices): Remove assert latticess is non-NULL.
	(ipa_value_from_jfunc): Adjust a check for empty lattices.
	(ipa_context_from_jfunc): Likewise.
	(ipa_agg_value_from_jfunc): Likewise.
	(merge_agg_lats_step): Do not memset new aggregate lattices to zero.
	(ipcp_propagate_stage): Allocate lattices in a vector as opposed to
	just in contiguous memory.
	(ipcp_store_vr_results): Adjust a check for empty lattices.
	* auto-profile.cc: Include sreal.h and ipa-cp.h.
	* cgraph.cc: Likewise.
	* cgraphclones.cc: Likewise.
	* cgraphunit.cc: Likewise.
	* config/aarch64/aarch64.cc: Likewise.
	* config/i386/i386-builtins.cc: Likewise.
	* config/i386/i386-expand.cc: Likewise.
	* config/i386/i386-features.cc: Likewise.
	* config/i386/i386-options.cc: Likewise.
	* config/i386/i386.cc: Likewise.
	* config/rs6000/rs6000.cc: Likewise.
	* config/s390/s390.cc: Likewise.
	* gengtype.cc (open_base_files): Added sreal.h and ipa-cp.h to the
	files to be included in gtype-desc.cc.
	* gimple-range-fold.cc: Include sreal.h and ipa-cp.h.
	* ipa-devirt.cc: Likewise.
	* ipa-fnsummary.cc: Likewise.
	* ipa-icf.cc: Likewise.
	* ipa-inline-analysis.cc: Likewise.
	* ipa-inline-transform.cc: Likewise.
	* ipa-inline.cc: Include ipa-cp.h, move inclusion of sreal.h higher.
	* ipa-modref.cc: Include sreal.h and ipa-cp.h.
	* ipa-param-manipulation.cc: Likewise.
	* ipa-predicate.cc: Likewise.
	* ipa-profile.cc: Likewise.
	* ipa-prop.cc: Likewise.
	(ipa_node_params_t::duplicate): Assert new lattices remain empty
	instead of setting them to NULL.
	* ipa-pure-const.cc: Include sreal.h and ipa-cp.h.
	* ipa-split.cc: Likewise.
	* ipa-sra.cc: Likewise.
	* ipa-strub.cc: Likewise.
	* ipa-utils.cc: Likewise.
	* ipa.cc: Likewise.
	* toplev.cc: Likewise.
	* tree-ssa-ccp.cc: Likewise.
	* tree-ssa-sccvn.cc: Likewise.
	* tree-vrp.cc: Likewise.

2024-02-21  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-arches.def (AARCH64_ARCH): Remove LS64 from
	Armv8.7-a.

2024-02-21  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state):
	Use aarch64_gen_compare_zero_and_branch rather than emitting
	a CBZ directly.

2024-02-21  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.cc (aarch64_option_valid_attribute_p):
	Remove duplicated call.

2024-02-21  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.cc (aarch64_function_ok_for_sibcall):
	Check that each individual piece of state is shared in the same
	way, rather than using an aggregate check for PSTATE.ZA.

2024-02-21  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state):
	In the code that commits a lazy save, only zero ZA if the function
	has ZA state.  Similarly zero ZT0 if the function has ZT0 state.

2024-02-21  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sme.md (aarch64_commit_lazy_save): Remove,
	directly inserting the associated sequence
	* config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state):
	...here instead.

2024-02-21  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113995
	* config/aarch64/aarch64.cc (aarch64_expand_prologue): Don't
	fold the SVE allocation into the initial allocation if the
	initial allocation includes a VG save.

2024-02-21  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113220
	* cfgrtl.cc (commit_one_edge_insertion): Handle sequences that
	contain jumps even if called after initial RTL expansion.
	* mode-switching.cc: Include cfgbuild.h.
	(optimize_mode_switching): Allow the sequence returned by the
	emit hook to contain internal jumps.  Record which blocks
	contain such jumps and split the blocks at the end.
	* config/aarch64/aarch64.cc (aarch64_mode_emit): Check for
	non-debug insns when scanning the sequence.

2024-02-21  Tobias Burnus  <tburnus@baylibre.com>

	* config/nvptx/gen-omp-device-properties.sh: Add 'nvptx64' to arch.
	* config/nvptx/nvptx.cc (nvptx_omp_device_kind_arch_isa): Likewise.

2024-02-21  Dimitar Dimitrov  <dimitar@dinux.eu>

	* doc/invoke.texi (-mmcu): Add information about MCU specs.

2024-02-21  Dimitar Dimitrov  <dimitar@dinux.eu>

	* doc/invoke.texi (-minrt): Clarify that main
	must take no arguments.

2024-02-20  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/builtins.def: Use function prototypes of given size
	and signedness.
	* config/avr/avr.cc (avr_init_builtins): Adjust types required
	by builtins.def.
	* doc/extend.texi (AVR Built-in Functions): Adjust accordingly.

2024-02-20  Georg-Johann Lay  <avr@gjlay.de>

	* doc/extend.texi (AVR Built-in Functions): Use @defbuiltin
	instead of @table.

2024-02-20  Will Hawkins  <hawkinsw@obs.cr>

	* config/bpf/bpf.opt: Add help information for -mcpu.

2024-02-20  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113805
	* config/aarch64/aarch64-passes.def (pass_late_track_speculation):
	New pass.
	* config/aarch64/aarch64-protos.h (make_pass_late_track_speculation):
	Declare.
	* config/aarch64/aarch64.md (is_call): New attribute.
	(*and<mode>3nr_compare0): Rename to...
	(@aarch64_and<mode>3nr_compare0): ...this.
	* config/aarch64/aarch64-sme.md (aarch64_get_sme_state)
	(aarch64_tpidr2_save, aarch64_tpidr2_restore): Add is_call attributes.
	* config/aarch64/aarch64-speculation.cc: Update file comment to
	describe the new late pass.
	(aarch64_do_track_speculation): Handle is_call insns like other calls.
	(pass_track_speculation): Add an is_late member variable.
	(pass_track_speculation::gate): Run the late pass for streaming-
	compatible functions and the early pass for other functions.
	(make_pass_track_speculation): Update accordingly.
	(make_pass_late_track_speculation): New function.
	* config/aarch64/aarch64.cc (aarch64_gen_test_and_branch): New
	function.
	(aarch64_guard_switch_pstate_sm): Use it.

2024-02-19  Iain Sandoe  <iain@sandoe.co.uk>

	* config/aarch64/aarch64-builtins.cc (aarch64_init_rng_builtins):
	Register these builtins with a pointer to uint64_t rather than unsigned
	DI mode.

2024-02-19  Thomas Schwinge  <tschwinge@baylibre.com>

	PR target/113615
	* config/gcn/gcn-valu.md (define_expand "reduc_<fexpander>_scal_<mode>"):
	Conditionalize on '!TARGET_RDNA2_PLUS'.
	* config/gcn/gcn.cc (gcn_expand_dpp_shr_insn)
	(gcn_expand_reduc_scalar):
	'gcc_checking_assert (!TARGET_RDNA2_PLUS);'.

2024-02-19  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Restore lost
	'__gfx90a__' target CPU definition.  Add some safeguards for the future.

2024-02-19  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/54052
	* rtl-ssa/blocks.cc (function_info::place_phis): Filter
	local defs by LR_OUT.

2024-02-19  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113967
	* match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): Require
	in condition that @rpos is multiple of vector element size.

2024-02-19  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113696
	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::earliest_fuse_vsetvl_info):
	Suppress vsetvl fusion.

2024-02-18  H.J. Lu  <hjl.tools@gmail.com>

	PR target/113912
	* config/i386/i386.cc (ix86_can_use_push2pop2): New.
	(ix86_pro_and_epilogue_can_use_push2pop2): Use it.
	(ix86_emit_save_regs): Don't generate push2 if
	ix86_can_use_push2pop2 return false.
	(ix86_expand_epilogue): Don't generate pop2 if
	ix86_can_use_push2pop2 return false.

2024-02-18  Georg-Johann Lay  <avr@gjlay.de>

	* doc/invoke.texi (AVR Options) <-mmcu>: Remove "Atmel".
	Note on complete device support.

2024-02-18  Georg-Johann Lay  <avr@gjlay.de>

	* doc/extend.texi (AVR Function Attributes): Fuse description
	of "signal" and "interrupt" attribute.  Link pseudo instruction.

2024-02-18  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/larchintrin.h (__movgr2fcsr): Remove redundant
	symbol type conversions.
	(__cacop_d): Likewise.
	(__cpucfg): Likewise.
	(__asrtle_d): Likewise.
	(__asrtgt_d): Likewise.
	(__lddir_d): Likewise.
	(__ldpte_d): Likewise.
	(__crc_w_b_w): Likewise.
	(__crc_w_h_w): Likewise.
	(__crc_w_w_w): Likewise.
	(__crc_w_d_w): Likewise.
	(__crcc_w_b_w): Likewise.
	(__crcc_w_h_w): Likewise.
	(__crcc_w_w_w): Likewise.
	(__crcc_w_d_w): Likewise.
	(__csrrd_w): Likewise.
	(__csrwr_w): Likewise.
	(__csrxchg_w): Likewise.
	(__csrrd_d): Likewise.
	(__csrwr_d): Likewise.
	(__csrxchg_d): Likewise.
	(__iocsrrd_b): Likewise.
	(__iocsrrd_h): Likewise.
	(__iocsrrd_w): Likewise.
	(__iocsrrd_d): Likewise.
	(__iocsrwr_b): Likewise.
	(__iocsrwr_h): Likewise.
	(__iocsrwr_w): Likewise.
	(__iocsrwr_d): Likewise.
	(__frecipe_s): Likewise.
	(__frecipe_d): Likewise.
	(__frsqrte_s): Likewise.
	(__frsqrte_d): Likewise.

2024-02-18  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/larchintrin.h (__iocsrrd_h): Modify the
	function return value type to unsigned short.

2024-02-16  Edwin Lu  <ewlu@rivosinc.com>

	* doc/sourcebuild.texi: add scan-assembler-bound

2024-02-16  Jason Merrill  <jason@redhat.com>

	* gdbhooks.py: Fix regex syntax.

2024-02-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113895
	* tree-ssa-sccvn.cc (copy_reference_ops_from_ref): Disable
	consistency checking when there are out-of-bound array
	accesses.  Allow -1 off when from an array reference with
	constant index.

2024-02-16  Kito Cheng  <kito.cheng@sifive.com>

	PR target/106543
	* config/riscv/riscv.md (*sge<u>_<X:mode><GPR:mode>): Fix asm
	pattern.

2024-02-16  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* doc/sourcebuild.texi (Effective-Target Keywords, Other
	attribugs): Document linker_plugin.
	(Require Support): Document dg-require-linker-plugin.

2024-02-16  Kito Cheng  <kito.cheng@sifive.com>

	PR target/109349
	* common/config/riscv/riscv-common.cc (riscv_arch_help): New.
	* config/riscv/riscv-protos.h (RISCV_MAJOR_VERSION_BASE): New.
	(RISCV_MINOR_VERSION_BASE): Ditto.
	(RISCV_REVISION_VERSION_BASE): Ditto.
	* config/riscv/riscv-c.cc (riscv_ext_version_value): Use enum
	rather than magic number.
	* config/riscv/riscv.h (riscv_arch_help): New.
	(EXTRA_SPEC_FUNCTIONS): Add riscv_arch_help.
	(DRIVER_SELF_SPECS): Handle -march=help, -print-supported-extensions and
	--print-supported-extensions.
	* config/riscv/riscv.opt (march=help): New.
	(print-supported-extensions): New.
	(-print-supported-extensions): New.
	* doc/invoke.texi (RISC-V Options): Document -march=help.

2024-02-16  Tejas Belagod  <tejas.belagod@arm.com>

	PR target/113780
	* config/arm/arm.cc (arm_function_ok_for_sibcall): Don't allow tailcalls
	for indirect calls with 4 or more arguments in pac-enabled functions.

2024-02-15  David Faust  <david.faust@oracle.com>

	* config/bpf/bpf.md (zero_extendqidi2): Correct asm template to
	use ldxb instead of ldxh.

2024-02-15  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113921
	* cfgrtl.h (prepend_insn_to_edge): New declaration.
	* cfgrtl.cc (insert_insn_on_edge): Clarify behavior in function
	comment.
	(prepend_insn_to_edge): New function.
	* cfgexpand.cc (expand_asm_stmt): Use prepend_insn_to_edge instead of
	insert_insn_on_edge.

2024-02-15  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/111156
	* tree-vect-loop.cc (vect_dissolve_slp_only_groups): Look
	at the pattern stmt if any.

2024-02-15  Georg-Johann Lay  <avr@gjlay.de>

	PR target/113927
	* config/avr/avr.h (AVR_HAVE_ADIW): New macro.
	* config/avr/avr-protos.h (avr_adiw_reg_p): New proto.
	* config/avr/avr.cc (avr_adiw_reg_p): New function.
	(avr_conditional_register_usage) [AVR_TINY]: Don't clear ADDW_REGS.
	Replace test_hard_reg_class (ADDW_REGS, ...) with calls to
	* config/avr/avr.md: Same.
	(attr "isa") <tiny, no_tiny>: Remove.
	<adiw, no_adiw>: Add.
	(define_insn, define_insn_and_split): When an alternative has
	constraint "w", then set attribute "isa" to "adiw".
	* config/avr/avr-c.cc (avr_cpu_cpp_builtins) [AVR_HAVE_ADIW]:
	Built-in define __AVR_HAVE_ADIW__.
	* doc/invoke.texi (AVR Options): Document it.

2024-02-15  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn-valu.md
	(vec_extract<V_MOV:mode><V_MOV_ALT:mode>): Add conditions for RDNA.
	* config/gcn/gcn.cc (gcn_vectorize_vec_perm_const): Check permutation
	details are supported on RDNA devices.

2024-02-15  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/113508
	* doc/md.texi (sdot_prod@var{m}, udot_prod@var{m},
	usdot_prod@var{m}, ssad@var{m}, usad@var{m}, widen_usum@var{m}3,
	smulhs@var{m}3, umulhs@var{m}3, smulhrs@var{m}3, umulhrs@var{m}3):
	Add sentence about what the mode m is.

2024-02-15  Andrew Pinski  <quic_apinski@quicinc.com>

	* doc/md.texi (widen_ssum, widen_usum, smulhs, umulhs,
	smulhrs, umulhrs, sdiv_pow2): Move the 3 outside of the
	var.

2024-02-15  Richard Biener  <rguenther@suse.de>

	* tree-ssa-tail-merge.cc (same_succ_hash): Skip debug
	stmts.

2024-02-15  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113567
	* gimple-lower-bitint.cc (gimple_lower_bitint): For large/huge
	_BitInt multiplication, division or modulo with
	SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs and at least one of rhs1 and rhs2
	force the affected inputs into a new SSA_NAME.

2024-02-14  Uros Bizjak  <ubizjak@gmail.com>

	PR target/113871
	* config/i386/mmx.md (V248FI): New mode iterator.
	(V24FI_32): DItto.
	(vec_shl_<V248FI:mode>): New expander.
	(vec_shl_<V24FI_32:mode>): Ditto.
	(vec_shr_<V248FI:mode>): Ditto.
	(vec_shr_<V24FI_32:mode>): Ditto.
	* config/i386/sse.md (vec_shl_<V_128:mode>): Simplify expander.
	(vec_shr_<V248FI:mode>): Ditto.

2024-02-14  Jan Hubicka  <jh@suse.cz>

	PR tree-optimization/111054
	* tree-ssa-loop-split.cc (split_loop): Check for profile being present.

2024-02-14  Tamar Christina  <tamar.christina@arm.com>

	* tree-cfg.cc (replace_loop_annotate): Inspect loop edges for annotations.

2024-02-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113910
	* bitmap.cc (bitmap_hash): Mix the full element "hash" to
	the hashval_t hash.

2024-02-14  Jakub Jelinek  <jakub@redhat.com>

	* pretty-print.cc (PTRDIFF_MAX): Define if not yet defined.
	(pp_integer_with_precision): For unsigned ptrdiff_t printing
	with u, o or x print ptrdiff_t argument converted to
	unsigned long long and masked with 2ULL * PTRDIFF_MAX + 1.

2024-02-14  Richard Biener  <rguenther@suse.de>

	PR middle-end/113576
	* expr.cc (do_store_flag): For vector bool compares of vectors
	with padding zero that.
	* dojump.cc (do_compare_and_jump): Likewise.

2024-02-14  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/install.texi (Prerequisites): Update gettext link.

2024-02-13  H.J. Lu  <hjl.tools@gmail.com>

	PR target/113876
	* config/i386/i386.cc (ix86_pro_and_epilogue_can_use_push2pop2):
	Return false if the incoming stack isn't 16-byte aligned.

2024-02-13  Tobias Burnus  <tburnus@baylibre.com>

	PR middle-end/113904
	* omp-general.cc (struct omp_ts_info): Update for splitting of
	OMP_TRAIT_PROPERTY_EXPR into OMP_TRAIT_PROPERTY_{DEV_NUM,BOOL}_EXPR.
	* omp-selectors.h (enum omp_tp_type): Replace
	OMP_TRAIT_PROPERTY_EXPR by OMP_TRAIT_PROPERTY_{DEV_NUM,BOOL}_EXPR.

2024-02-13  Monk Chiang  <monk.chiang@sifive.com>

	PR target/113742
	* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix
	recognizes UNSPEC_AUIPC for RISCV_FUSE_LUI_ADDI.

2024-02-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113895
	* tree-ssa-sccvn.cc (copy_reference_ops_from_ref): Track
	offset to discover constant array indices in bits, handle
	COMPONENT_REF to bitfields.

2024-02-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113831
	* tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference): Fix
	typo in comment.

2024-02-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113902
	* tree-vect-loop.cc (move_early_exit_stmts): Track
	last_seen_vuse for VUSE updating.

2024-02-13  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113734
	* tree-vect-loop.cc (vect_transform_loop): Treat the final iteration of
	an early break loop as partial.

2024-02-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113898
	* tree-ssa-sccvn.cc (copy_reference_ops_from_ref): Add
	missing accumulated off adjustment.

2024-02-13  Jakub Jelinek  <jakub@redhat.com>

	* hwint.h (GCC_PRISZ, fmt_size_t): Fix preprocessor conditions,
	instead of comparing SIZE_MAX against INT_MAX and LONG_MAX compare
	it against UINT_MAX and ULONG_MAX.

2024-02-13  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-core.h (emit_diagnostic_valist): Rename overload
	to...
	(emit_diagnostic_valist_meta): ...this.
	* diagnostic.cc (emit_diagnostic_valist): Likewise, to...
	(emit_diagnostic_valist_meta): ...this.

2024-02-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113849
	* gimple-lower-bitint.cc (bitint_large_huge::handle_cast): Don't use
	fast path for widening casts where !m_upwards_2limb and lhs_type
	has precision which is a multiple of limb_prec.

2024-02-12  Jakub Jelinek  <jakub@redhat.com>

	PR c++/113674
	* attribs.cc (extract_attribute_substring): Remove.
	(lookup_scoped_attribute_spec): Don't call it.

2024-02-12  Jakub Jelinek  <jakub@redhat.com>

	* gengtype.cc (adjust_field_rtx_def): Use HOST_SIZE_T_PRINT_UNSIGNED
	and cast to fmt_size_t instead of %lu and cast to unsigned long.

2024-02-12  Christophe Lyon  <christophe.lyon@linaro.org>

	* Makefile.in: Add no-info dependency.
	* configure.ac: Set BUILD_INFO=no-info if makeinfo is not
	available.
	* configure: Regenerate.

2024-02-12  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/113855
	* config/i386/darwin.h (DARWIN_HEAP_T_LIB): Moved to be
	available to all sub-targets.
	* config/i386/darwin32-biarch.h (DARWIN_HEAP_T_LIB): Delete.
	* config/i386/darwin64-biarch.h (DARWIN_HEAP_T_LIB): Delete.

2024-02-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113831
	PR tree-optimization/108355
	* tree-ssa-sccvn.cc (copy_reference_ops_from_ref): When
	we see variable array indices and get_ref_base_and_extent
	can resolve those to constants fix up the ops to constants
	as well.
	(ao_ref_init_from_vn_reference): Use 'off' member for
	ARRAY_REF and ARRAY_RANGE_REF instead of recomputing it.
	(valueize_refs_1): Also fixup 'off' of ARRAY_RANGE_REF.

2024-02-12  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv-vector-builtins.cc (resolve_overloaded_builtin):
	Replace args to arguments for misspelled term.

2024-02-12  Georg-Johann Lay  <avr@gjlay.de>

	PR target/112944
	* config/avr/gen-avr-mmcu-specs.cc (print_mcu) [have_flmap]:
	<*link_rodata_in_ram>: Spec undefs symbol __do_flmap_init
	when not linked with -mrodata-in-ram.

2024-02-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113863
	* tree-vect-data-refs.cc (vect_analyze_early_break_dependences):
	Record crossed virtual PHIs.
	* tree-vect-loop.cc (move_early_exit_stmts): Elide crossed
	virtual PHIs.

2024-02-10  Marek Polacek  <polacek@redhat.com>

	DR 2237
	PR c++/107126
	PR c++/97202
	* doc/invoke.texi: Document -Wtemplate-id-cdtor.

2024-02-10  Jakub Jelinek  <jakub@redhat.com>

	* gimple-lower-bitint.cc (itint_large_huge::lower_addsub_overflow): Fix
	computation of idx for i == 4 of bitint_prec_huge.

2024-02-10  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/110754
	* gimple-low.cc (assumption_copy_decl): For TREE_THIS_VOLATILE
	decls create PARM_DECL with pointer to original type, set
	TREE_READONLY and keep TREE_THIS_VOLATILE, TREE_ADDRESSABLE,
	DECL_NOT_GIMPLE_REG_P and DECL_BY_REFERENCE cleared.
	(adjust_assumption_stmt_op): For remapped TREE_THIS_VOLATILE decls
	wrap PARM_DECL into a simple TREE_THIS_NO_TRAP MEM_REF.
	(lower_assumption): For TREE_THIS_VOLATILE vars pass ADDR_EXPR
	of the var as argument.

2024-02-10  Jakub Jelinek  <jakub@redhat.com>

	* pretty-print.cc (pp_integer_with_precision): Handle precision 3 for
	size_t and precision 4 for ptrdiff_t.  Formatting fix.
	(pp_format): Document %{t,z}{d,i,u,o,x}.  Implement t and z modifiers.
	Formatting fixes.
	(test_pp_format): Test t and z modifiers.
	* gcc.cc (read_specs): Use %td instead of %ld and casts to long.

2024-02-10  Jakub Jelinek  <jakub@redhat.com>

	* ipa-icf.cc (sem_item_optimizer::process_cong_reduction,
	sem_item_optimizer::dump_cong_classes): Use HOST_SIZE_T_PRINT_UNSIGNED
	and casts to fmt_size_t instead of "%lu" and casts to unsigned long.
	* tree.cc (print_debug_expr_statistics): Use HOST_SIZE_T_PRINT_DEC
	and casts to fmt_size_t instead of "%ld" and casts to long.
	(print_value_expr_statistics, print_type_hash_statistics): Likewise.
	* dwarf2out.cc (output_macinfo_op): Use HOST_WIDE_INT_PRINT_UNSIGNED
	instead of "%lu" and casts to unsigned long.
	* gcov-dump.cc (dump_gcov_file): Use %u instead of %lu and casts to
	unsigned long.
	* tree-ssa-dom.cc (htab_statistics): Use HOST_SIZE_T_PRINT_DEC
	and casts to fmt_size_t instead of "%ld" and casts to long.
	* cfgexpand.cc (dump_stack_var_partition): Use
	HOST_SIZE_T_PRINT_UNSIGNED and casts to fmt_size_t instead of "%lu"
	and casts to unsigned long.
	* gengtype.cc (adjust_field_rtx_def): Likewise.
	* tree-into-ssa.cc (htab_statistics): Use HOST_SIZE_T_PRINT_DEC
	and casts to fmt_size_t instead of "%ld" and casts to long.
	* postreload-gcse.cc (dump_hash_table): Likewise.
	* ggc-page.cc (alloc_page): Use HOST_SIZE_T_PRINT_UNSIGNED
	and casts to fmt_size_t instead of "%lu" and casts to unsigned long.
	(ggc_internal_alloc, ggc_free): Likewise.
	* genpreds.cc (write_lookup_constraint_1): Likewise.
	(write_insn_constraint_len): Likewise.
	* tree-dfa.cc (dump_dfa_stats): Use HOST_SIZE_T_PRINT_DEC
	and casts to fmt_size_t instead of "%ld" and casts to long.
	* varasm.cc (output_constant_pool_contents): Use
	HOST_WIDE_INT_PRINT_DEC instead of "%ld" and casts to long.
	* var-tracking.cc (dump_var): Likewise.

2024-02-09  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113783
	* gimple-lower-bitint.cc (bitint_large_huge::lower_stmt): Look
	through VIEW_CONVERT_EXPR for final cast checks.  Handle
	VIEW_CONVERT_EXPRs from large/huge _BitInt to > MAX_FIXED_MODE_SIZE
	INTEGER_TYPEs.
	(gimple_lower_bitint): Don't merge mergeable operations or other
	casts with VIEW_CONVERT_EXPRs to > MAX_FIXED_MODE_SIZE INTEGER_TYPEs.
	* expr.cc (expand_expr_real_1): Don't use convert_modes if either
	mode is BLKmode.

2024-02-09  Jakub Jelinek  <jakub@redhat.com>

	* hwint.h (GCC_PRISZ, fmt_size_t, HOST_SIZE_T_PRINT_DEC,
	HOST_SIZE_T_PRINT_UNSIGNED, HOST_SIZE_T_PRINT_HEX,
	HOST_SIZE_T_PRINT_HEX_PURE): Define.
	* ira-conflicts.cc (build_conflict_bit_table): Use it.  Formatting
	fixes.

2024-02-09  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113415
	* cfgexpand.cc (expand_asm_stmt): For asm goto, use
	duplicate_insn_chain to duplicate after_rtl_seq sequence instead
	of hand written loop with emit_insn of copy_insn and emit original
	after_rtl_seq on the last edge.

2024-02-09  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113818
	* gimple-lower-bitint.cc (add_eh_edge): New function.
	(bitint_large_huge::handle_load,
	bitint_large_huge::lower_mergeable_stmt,
	bitint_large_huge::lower_muldiv_stmt): Use it.

2024-02-09  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113774
	* gimple-lower-bitint.cc (bitint_large_huge::handle_cast): Don't
	emit any comparison if m_first and low + 1 is equal to
	m_upwards_2limb, simplify condition for that.  If not
	single_comparison, not m_first and we can prove that the idx <= low
	comparison will be always true, emit instead of idx <= low
	comparison low <= low such that cfg cleanup will optimize it at
	the end of the pass.

2024-02-08  Aldy Hernandez  <aldyh@redhat.com>

	PR tree-optimization/113735
	* value-relation.cc (equiv_oracle::add_equiv_to_block): Call
	limit_check().

2024-02-08  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/gen-avr-mmcu-specs.cc (struct McuInfo): New.
	(main, print_mcu, diagnose_mrodata_in_ram): Pass it down.

2024-02-08  H.J. Lu  <hjl.tools@gmail.com>

	PR target/113711
	PR target/113733
	* config/i386/constraints.md: List all constraints with j prefix.
	(j>): Change auto-dec to auto-inc in documentation.
	(je): Changed to a memory constraint with APX NDD TLS operand
	check.
	(jM): New memory constraint for APX NDD instructions.
	(jO): Likewise.
	* config/i386/i386-protos.h (x86_poff_operand_p): Removed.
	* config/i386/i386.cc (x86_poff_operand_p): Likewise.
	* config/i386/i386.md (*add<dwi>3_doubleword): Use rjO.
	(*add<mode>_1[SWI48]): Use je and jM.
	(addsi_1_zext): Use jM.
	(*addv<dwi>4_doubleword_1[DWI]): Likewise.
	(*sub<mode>_1[SWI]): Use jM.
	(@add<mode>3_cc_overflow_1[SWI]): Likewise.
	(*add<dwi>3_doubleword_cc_overflow_1): Use rjO.
	(*and<dwi>3_doubleword): Likewise.
	(*anddi_1): Use jM.
	(*andsi_1_zext): Likewise.
	(*and<mode>_1[SWI24]): Likewise.
	(*<code><dwi>3_doubleword[any_or]): Use rjO
	(*code<mode>_1[any_or SWI248]): Use jM.
	(*<code>si_1_zext[zero_extend + any_or]): Likewise.
	* config/i386/predicates.md (apx_ndd_memory_operand): New.
	(apx_ndd_add_memory_operand): Likewise.

2024-02-08  Georg-Johann Lay  <avr@gjlay.de>

	PR target/113824
	* config/avr/avr-mcus.def (ata5797): Move from avr5 to avr4.
	* doc/avr-mmcu.texi: Rebuild.

2024-02-08  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113808
	* tree-vect-loop.cc (vectorizable_live_operation): Don't cache the
	value cross iterations.

2024-02-08  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/gen-avr-mmcu-specs.cc (print_mcu) <*cpp_mcu>: Spec always
	defines __AVR_PM_BASE_ADDRESS__ if the core has it.

2024-02-08  Richard Biener  <rguenther@suse.de>

	* tree-vect-data-refs.cc (vect_analyze_early_break_dependences):
	Revert last change to dr_may_alias_p.

2024-02-08  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/gen-avr-mmcu-specs.cc: Rename spec cc1_misc to
	cc1_rodata_in_ram.  Rename spec link_misc to link_rodata_in_ram.
	Remove spec asm_misc.
	* config/avr/specs.h: Same.

2024-02-08  Pan Li  <pan2.li@intel.com>

	PR target/113766
	* config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Make
	sure the c.arg_num is >= 2 before checking.
	(struct build_frm_base): Ditto.
	(struct narrow_alu_def): Ditto.

2024-02-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113796
	* tree-if-conv.cc (combine_blocks): Wipe range-info before
	replacing PHIs and inserting predicates.

2024-02-07  Roger Sayle  <roger@nextmovesoftware.com>
	    Uros Bizjak  <ubizjak@gmail.com>

	PR target/113690
	* config/i386/i386-features.cc (timode_convert_cst): New helper
	function to convert a TImode CONST_SCALAR_INT_P to a V1TImode
	CONST_VECTOR.
	(timode_scalar_chain::convert_op): Use timode_convert_cst.
	(timode_scalar_chain::convert_insn): Delete REG_EQUAL notes.
	Use timode_convert_cst.

2024-02-07  Victor Do Nascimento  <victor.donascimento@arm.com>

	* config/aarch64/aarch64-sys-regs.def: Copy from Binutils.
	* config/aarch64/aarch64.h (AARCH64_FL_AIE): New.
	(AARCH64_FL_DEBUGv8p9): Likewise.
	(AARCH64_FL_FGT2): Likewise.Likewise.
	(AARCH64_FL_ITE): Likewise.
	(AARCH64_FL_PFAR): Likewise.
	(AARCH64_FL_PMUv3_ICNTR): Likewise.
	(AARCH64_FL_PMUv3_SS): Likewise.
	(AARCH64_FL_PMUv3p9): Likewise.
	(AARCH64_FL_RASv2): Likewise.
	(AARCH64_FL_S1PIE): Likewise.
	(AARCH64_FL_S1POE): Likewise.
	(AARCH64_FL_S2PIE): Likewise.
	(AARCH64_FL_S2POE): Likewise.
	(AARCH64_FL_SCTLR2): Likewise.
	(AARCH64_FL_SEBEP): Likewise.
	(AARCH64_FL_SPE_FDS): Likewise.
	(AARCH64_FL_TCR2): Likewise.

2024-02-07  Richard Biener  <rguenther@suse.de>

	* tree-vect-data-refs.cc (vect_analyze_early_break_dependences):
	Only check whether reads are in-bound in places that are not safe.
	Fix dependence check.  Add missing newline.  Clarify comments.

2024-02-07  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113750
	* tree-vect-data-refs.cc (vect_analyze_early_break_dependences): Check
	for single predecessor when doing early break vect.
	* tree-vect-loop.cc (move_early_exit_stmts): Get gsi at the start but
	after labels.

2024-02-07  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113731
	* gimple-iterator.cc (gsi_move_before): Take new parameter for update
	method.
	* gimple-iterator.h (gsi_move_before): Default new param to
	GSI_SAME_STMT.
	* tree-vect-loop.cc (move_early_exit_stmts): Call gsi_move_before with
	GSI_NEW_STMT.

2024-02-07  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113756
	* range-op.cc (update_known_bitmask): For GIMPLE_UNARY_RHS,
	use TYPE_SIGN (lh.type ()) instead of sign for widest_int::from
	of lh_bits value and mask.

2024-02-07  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113753
	* wide-int.cc (wi::mul_internal): Unpack op1val and op2val with
	UNSIGNED rather than SIGNED.  If high or needs_overflow and prec is
	not a multiple of HOST_BITS_PER_WIDE_INT, shift left bits above prec
	so that they start with r[half_blocks_needed] lowest bit.  Fix up
	computation of top mask for SIGNED.

2024-02-07  Pan Li  <pan2.li@intel.com>

	PR target/113766
	* config/riscv/riscv-protos.h (resolve_overloaded_builtin): Adjust
	the signature of func.
	* config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): Ditto.
	* config/riscv/riscv-vector-builtins.cc (resolve_overloaded_builtin): Make
	overloaded func with empty args error.

2024-02-06  H.J. Lu  <hjl.tools@gmail.com>

	PR target/113689
	* config/i386/i386.cc (x86_64_select_profile_regnum): Return
	R10_REG after sorry.

2024-02-06  Andrew Carlotti  <andrew.carlotti@arm.com>

	* config/aarch64/aarch64.cc (aarch64_mangle_decl_assembler_name):
	Move before new caller, and add ".default" suffix.
	(get_suffixed_assembler_name): New.
	(make_resolver_func): Use get_suffixed_assembler_name.
	(aarch64_generate_version_dispatcher_body): Redo name mangling.

2024-02-06  Jakub Jelinek  <jakub@redhat.com>

	PR target/113763
	* config/aarch64/aarch64.cc (aarch64_output_sme_zero_za): Change tiles
	element from std::pair<unsigned int, char> to an unnamed struct.
	Adjust uses of tile range variable.

2024-02-06  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Fix inifinite compilation.
	(pre_vsetvl::remove_vsetvl_pre_insns): Ditto.

2024-02-06  Jakub Jelinek  <jakub@redhat.com>

	PR sanitizer/110676
	* gimple-fold.cc (gimple_fold_builtin_strlen): For -fsanitize=address
	reset maxlen to sizetype maximum.

2024-02-06  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113736
	* gimple-lower-bitint.cc (bitint_large_huge::limb_access): Use
	var's address space for MEM_REF or VIEW_CONVERT_EXPRs.

2024-02-06  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113759
	* tree-ssa-math-opts.cc (convert_mult_to_widen): If actual_precision
	or from_unsignedN differs from properties of typeN, update typeN
	to build_nonstandard_integer_type.  If TREE_TYPE (rhsN) is not
	uselessly convertible to typeN, convert it using fold_convert or
	build_and_insert_cast depending on if rhsN is INTEGER_CST or not.
	(convert_plusminus_to_widen): Likewise.

2024-02-06  Tejas Belagod  <tejas.belagod@arm.com>

	PR target/112577
	* config/aarch64/aarch64.cc (aarch64_class_max_nregs): Handle 64-bit
	vector structure modes correctly.

2024-02-05  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/thead.cc (th_print_operand_address): Fix compiler
	warning.

2024-02-05  H.J. Lu  <hjl.tools@gmail.com>

	PR target/113689
	* config/i386/i386.cc (x86_64_select_profile_regnum): New.
	(x86_function_profiler): Call x86_64_select_profile_regnum to
	get a scratch register for large model profiling.

2024-02-05  Richard Ball  <richard.ball@arm.com>

	* config/arm/arm.cc (arm_output_mi_thunk): Emit
	insn for bti_c when bti is enabled.

2024-02-05  Xi Ruoyao  <xry111@xry111.site>

	* config/mips/mips-msa.md (neg<mode:MSA>2): Add missing mode for
	neg.

2024-02-05  Xi Ruoyao  <xry111@xry111.site>

	* config/mips/mips-msa.md (elmsgnbit): New define_mode_attr.
	(neg<mode>2): Change the mode iterator from MSA to IMSA because
	in FP arithmetic we cannot use (0 - x) for -x.
	(neg<mode>2): New define_insn to implement FP vector negation,
	using a bnegi instruction to negate the sign bit.

2024-02-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113707
	* tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): After
	checking the avail set treat out-of-region defines as
	available.

2024-02-05  Richard Biener  <rguenther@suse.de>

	* tree-vect-data-refs.cc (vect_create_data_ref_ptr): Use
	the default mode when building a pointer.

2024-02-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113737
	* gimple-lower-bitint.cc (gimple_lower_bitint): If GIMPLE_SWITCH
	has just a single label, remove it and make single successor edge
	EDGE_FALLTHRU.

2024-02-05  Jakub Jelinek  <jakub@redhat.com>

	PR target/113059
	* config/i386/i386-features.cc (rest_of_handle_insert_vzeroupper):
	Remove REG_DEAD/REG_UNUSED notes at the end of the pass before
	df_analyze call.

2024-02-05  Richard Biener  <rguenther@suse.de>

	PR target/113255
	* config/i386/i386-expand.cc
	(expand_set_or_cpymem_prologue_epilogue_by_misaligned_moves):
	Use a new pseudo for the skipped number of bytes.

2024-02-05  Monk Chiang  <monk.chiang@sifive.com>

	* config/riscv/riscv-cores.def: Add sifive-p450, sifive-p670.
	* doc/invoke.texi (RISC-V Options): Add sifive-p450,
	sifive-p670.

2024-02-05  Monk Chiang  <monk.chiang@sifive.com>

	* config/riscv/riscv.md: Include sifive-p400.md.
	* config/riscv/sifive-p400.md: New file.
	* config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
	* config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
	Add sifive_p400.
	* config/riscv/riscv.cc (sifive_p400_tune_info): New.
	* config/riscv/riscv.h (TARGET_SFB_ALU): Update.
	* doc/invoke.texi (RISC-V Options): Add sifive-p400-series

2024-02-04  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.md (*eqne_zero_masked_bits):
	Add missing ":SI" to the match_operator.

2024-02-04  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/xtensa.md (SHI): New mode iterator.
	(2 split patterns related to constsynth):
	Change to also accept HImode operands.

2024-02-04  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_rtx_costs): Handle SUBREG and REG
	similarly.

2024-02-04  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/lsx.md (neg<mode:FLSX>2): Remove the
	incorrect expand.
	* config/loongarch/simd.md (simdfmt_as_i): New define_mode_attr.
	(elmsgnbit): Likewise.
	(neg<mode:FVEC>2): New define_insn.
	* config/loongarch/lasx.md (negv4df2, negv8sf2): Remove as they
	are now instantiated in simd.md.

2024-02-04  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.cc (loongarch_symbol_insns): Do not
	use LSX_SUPPORTED_MODE_P or LASX_SUPPORTED_MODE_P if mode is
	MAX_MACHINE_MODE.

2024-02-04  Li Wei  <liwei@loongson.cn>

	* config/loongarch/loongarch.cc (loongarch_expand_vselect): Adjust.
	(loongarch_expand_vselect_vconcat): Ditto.
	(loongarch_try_expand_lsx_vshuf_const): New, use vshuf to implement
	all 128-bit constant permutation situations.
	(loongarch_expand_lsx_shuffle): Adjust and rename function name.
	(loongarch_is_imm_set_shuffle): Renamed function name.
	(loongarch_expand_vec_perm_even_odd): Function forward declaration.
	(loongarch_expand_vec_perm_even_odd_1): Add implement for 128-bit
	extract-even and extract-odd permutations.
	(loongarch_is_odd_extraction): Delete.
	(loongarch_is_even_extraction): Ditto.
	(loongarch_expand_vec_perm_const): Adjust.

2024-02-03  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113722
	* wide-int.cc (wi::bswap_large): Rename third argument from
	len to xlen and adjust use in safe_uhwi.  Add len variable, set
	it to BLOCKS_NEEDED (precision) and use it for clearing of val
	and as canonize argument.  Clear val using memset instead of
	a loop.

2024-02-03  Jakub Jelinek  <jakub@redhat.com>

	* ggc-common.cc (gt_pch_save): Allow addr to be equal to
	mmi.preferred_base + mmi.size - sizeof (void *).

2024-02-03  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch-def.h (abi_minimal_isa): Declare.
	* config/loongarch/loongarch-opts.cc (abi_minimal_isa): Remove
	the ODR-violating locale declaration.

2024-02-02  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113588
	PR tree-optimization/113467
	* tree-vect-data-refs.cc
	(vect_analyze_data_ref_dependence):  Choose correct dest and fix checks.
	(vect_analyze_early_break_dependences): Update comments.

2024-02-02  John David Anglin  <danglin@gcc.gnu.org>

	PR target/59778
	* config/pa/pa.cc (enum pa_builtins): Add PA_BUILTIN_GET_FPSR
	and PA_BUILTIN_SET_FPSR builtins.
	* (pa_builtins_icode): Declare.
	* (def_builtin, pa_fpu_init_builtins): New.
	* (pa_init_builtins): Initialize FPU builtins.
	* (pa_builtin_decl, pa_expand_builtin_1): New.
	* (pa_expand_builtin): Handle PA_BUILTIN_GET_FPSR and
	PA_BUILTIN_SET_FPSR builtins.
	* (pa_atomic_assign_expand_fenv): New.
	* config/pa/pa.md (UNSPECV_GET_FPSR, UNSPECV_SET_FPSR): New
	UNSPECV constants.
	(get_fpsr, put_fpsr): New expanders.
	(get_fpsr_32, get_fpsr_64, set_fpsr_32, set_fpsr_64): New
	insn patterns.

2024-02-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113697
	* config/riscv/riscv-v.cc (expand_reduction): Pass VLMAX avl to scalar move.

2024-02-02  Jonathan Wakely  <jwakely@redhat.com>

	* doc/extend.texi (Common Type Attributes): Fix typo in
	description of hardbool.

2024-02-02  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113692
	* gimple-lower-bitint.cc (bitint_large_huge::lower_stmt): Handle casts
	from large/huge BITINT_TYPEs to POINTER_TYPE/REFERENCE_TYPE as
	final_cast_p.

2024-02-02  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113699
	* gimple-lower-bitint.cc (bitint_large_huge::lower_asm): Handle
	uninitialized large/huge _BitInt SSA_NAME inputs.

2024-02-02  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113705
	* tree-ssa-math-opts.cc (is_widening_mult_rhs_p): Use wide_int_from
	around wi::to_wide in order to compare value in prec precision.

2024-02-02  Lehua Ding  <lehua.ding@rivai.ai>

	Revert:
	2024-02-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv.cc (riscv_legitimize_move): Fix poly_int dest generation.

2024-02-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv.cc (riscv_legitimize_move): Fix poly_int dest generation.

2024-02-02  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv.cc (riscv_get_arg_info): Cleanup comments.
	(riscv_pass_by_reference): Ditto.
	(riscv_fntype_abi): Ditto.

2024-02-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vsetvl.cc (vsetvl_pre_insn_p): New function.
	(pre_vsetvl::cleaup): Remove vsetvl_pre.
	(pre_vsetvl::remove_vsetvl_pre_insns): New function.

2024-02-02  Jiahao Xu  <xujiahao@loongson.cn>

	* config/loongarch/larchintrin.h
	(__frecipe_s): Update function return type.
	(__frecipe_d): Ditto.
	(__frsqrte_s): Ditto.
	(__frsqrte_d): Ditto.

2024-02-02  Li Wei  <liwei@loongson.cn>

	* config/loongarch/loongarch.cc (loongarch_multiply_add_p): New.
	(loongarch_vector_costs::add_stmt_cost): Adjust.

2024-02-02  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.md (unspec): Add
	UNSPEC_LA_PCREL_64_PART1 and UNSPEC_LA_PCREL_64_PART2.
	(la_pcrel64_two_parts): New define_insn.
	* config/loongarch/loongarch.cc (loongarch_tls_symbol): Fix a
	typo in the comment.
	(loongarch_call_tls_get_addr): If -mcmodel=extreme
	-mexplicit-relocs={always,auto}, use la_pcrel64_two_parts for
	addressing the TLS symbol and __tls_get_addr.  Emit an REG_EQUAL
	note to allow CSE addressing __tls_get_addr.
	(loongarch_legitimize_tls_address): If -mcmodel=extreme
	-mexplicit-relocs={always,auto}, address TLS IE symbols with
	la_pcrel64_two_parts.
	(loongarch_split_symbol): If -mcmodel=extreme
	-mexplicit-relocs={always,auto}, address symbols with
	la_pcrel64_two_parts.
	(loongarch_output_mi_thunk): Clean up unreachable code.  If
	-mcmodel=extreme -mexplicit-relocs={always,auto}, address the MI
	thunks with la_pcrel64_two_parts.

2024-02-02  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch.cc (loongarch_call_tls_get_addr):
	Add support for call36.

2024-02-02  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
	When the code model of the symbol is extreme and -mexplicit-relocs=auto,
	the macro instruction loading symbol address is not applicable.
	(loongarch_call_tls_get_addr): Adjust code.
	(loongarch_legitimize_tls_address): Likewise.

2024-02-02  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch-protos.h (loongarch_symbol_extreme_p):
	Add function declaration.
	* config/loongarch/loongarch.cc (loongarch_symbolic_constant_p):
	For SYMBOL_PCREL64, non-zero addend of "la.local $rd,$rt,sym+addend"
	is not allowed
	(loongarch_load_tls): Added macro support in extreme mode.
	(loongarch_call_tls_get_addr): Likewise.
	(loongarch_legitimize_tls_address): Likewise.
	(loongarch_force_address): Likewise.
	(loongarch_legitimize_move): Likewise.
	(loongarch_output_mi_thunk): Likewise.
	(loongarch_option_override_internal): Remove the code that detects
	explicit relocs status.
	(loongarch_handle_model_attribute): Likewise.
	* config/loongarch/loongarch.md (movdi_symbolic_off64): New template.
	* config/loongarch/predicates.md (symbolic_off64_operand): New predicate.
	(symbolic_off64_or_reg_operand): Likewise.

2024-02-02  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch.cc (loongarch_load_tls):
	Load all types of tls symbols through one function.
	(loongarch_got_load_tls_gd): Delete.
	(loongarch_got_load_tls_ld): Delete.
	(loongarch_got_load_tls_ie): Delete.
	(loongarch_got_load_tls_le): Delete.
	(loongarch_call_tls_get_addr): Modify the called function name.
	(loongarch_legitimize_tls_address): Likewise.
	* config/loongarch/loongarch.md (@got_load_tls_gd<mode>): Delete.
	(@load_tls<mode>): New template.
	(@got_load_tls_ld<mode>): Delete.
	(@got_load_tls_le<mode>): Delete.
	(@got_load_tls_ie<mode>): Delete.

2024-02-02  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch.cc (mem_shadd_or_shadd_rtx_p): New function.
	(loongarch_legitimize_address): Add logical transformation code.

2024-02-01  Marek Polacek  <polacek@redhat.com>

	* doc/invoke.texi: Update -Wdangling-reference documentation.

2024-02-01  Uros Bizjak  <ubizjak@gmail.com>

	PR target/113701
	* config/i386/i386.md (*cmp<dwi>_doubleword):
	Do not force SUBREG pieces to pseudos.

2024-02-01  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.md (atomic_storedi_1): Fix bug in
	alternative 1.

2024-02-01  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc: Tabify.

2024-02-01  Richard Ball  <richard.ball@arm.com>

	PR tree-optimization/111268
	* tree-vect-slp.cc (vectorizable_slp_permutation_1):
	Add variable-length check for vector input arguments
	to a function.

2024-02-01  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/gcn/gcn.cc (gcn_hsa_declare_function_name): Don't
	hard-code number of SGPR/VGPR/AVGPR registers.
	* config/gcn/gcn.h: Add a 'STATIC_ASSERT's for number of
	SGPR/VGPR/AVGPR registers.

2024-02-01  Monk Chiang  <monk.chiang@sifive.com>

	* config/riscv/riscv.md: Add "fcvt_i2f", "fcvt_f2i" type
	attribute, and include sifive-p600.md.
	* config/riscv/generic-ooo.md: Update type attribute.
	* config/riscv/generic.md: Update type attribute.
	* config/riscv/sifive-7.md: Update type attribute.
	* config/riscv/sifive-p600.md: New file.
	* config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
	* config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
	Add sifive_p600.
	* config/riscv/riscv.cc (sifive_p600_tune_info): New.
	* config/riscv/riscv.h (TARGET_SFB_ALU): Update.
	* doc/invoke.texi (RISC-V Options): Add sifive-p600-series

2024-02-01  Monk Chiang  <monk.chiang@sifive.com>

	* common/config/riscv/riscv-common.cc: Add Za64rs, Za128rs,
	Ziccif, Ziccrse, Ziccamoa, Zicclsm, Zic64b items.
	* config/riscv/riscv.opt: New macro for 7 new unprivileged
	extensions.
	* doc/invoke.texi (RISC-V Options): Add Za64rs, Za128rs,
	Ziccif, Ziccrse, Ziccamoa, Zicclsm, Zic64b extensions.

2024-02-01  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	* config/sol2.h (LIBASAN_EARLY_SPEC): Add -z now unless
	-static-libasan.  Add missing whitespace.

2024-02-01  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/gcn/gcn.md (FIRST_SGPR_REG, LAST_SGPR_REG)
	(FIRST_VGPR_REG, LAST_VGPR_REG, FIRST_AVGPR_REG, LAST_AVGPR_REG):
	Don't 'define_constants'.

2024-02-01  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/gcn/gcn.h (SGPR_OR_VGPR_REGNO_P): Remove.

2024-02-01  Thomas Schwinge  <tschwinge@baylibre.com>

	* config/gcn/gcn.md (sync_compare_and_swap<mode>_lds_insn)
	[TARGET_RDNA3]: Adjust.

2024-02-01  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113693
	* tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Honor avail
	data when available.

2024-02-01  Jakub Jelinek  <jakub@redhat.com>
	    Jason Merrill  <jason@redhat.com>

	PR c++/113531
	* gimple-low.cc (lower_stmt): Remove .ASAN_MARK calls
	on variables which were promoted to TREE_STATIC.

2024-02-01  Roger Sayle  <roger@nextmovesoftware.com>
	    Richard Biener  <rguenther@suse.de>

	PR target/113560
	* tree-ssa-math-opts.cc (is_widening_mult_rhs_p): Use range
	information via tree_non_zero_bits to check if this operand
	is suitably extended for a widening (or highpart) multiplication.
	(convert_mult_to_widen): Insert explicit casts if the RHS or LHS
	isn't already of the claimed type.

2024-02-01  Edwin Lu  <ewlu@rivosinc.com>

	Revert:
	2024-02-01  Edwin Lu  <ewlu@rivosinc.com>

	* config/riscv/generic-ooo.md (generic_ooo_sfb_alu): Add reservation
	(generic_ooo_branch): ditto
	* config/riscv/generic.md (generic_sfb_alu): ditto
	(generic_fmul_half): ditto
	* config/riscv/riscv.md: Remove cbo, pushpop, and rdfrm types
	* config/riscv/sifive-7.md (sifive_7_hfma):Add reservation
	(sifive_7_popcount): ditto
	* config/riscv/vector.md: change rdfrm to fmove
	* config/riscv/zc.md: change pushpop to load/store

2024-02-01  Edwin Lu  <ewlu@rivosinc.com>

	Revert:
	2024-02-01  Edwin Lu  <ewlu@rivosinc.com>
		    Robin Dapp  <rdapp.gcc@gmail.com>

	* config/riscv/generic-ooo.md (generic_ooo): Move reservation
	(generic_ooo_vec_load): ditto
	(generic_ooo_vec_store): ditto
	(generic_ooo_vec_loadstore_seg): ditto
	(generic_ooo_vec_alu): ditto
	(generic_ooo_vec_fcmp): ditto
	(generic_ooo_vec_imul): ditto
	(generic_ooo_vec_fadd): ditto
	(generic_ooo_vec_fmul): ditto
	(generic_ooo_crypto): ditto
	(generic_ooo_perm): ditto
	(generic_ooo_vec_reduction): ditto
	(generic_ooo_vec_ordered_reduction): ditto
	(generic_ooo_vec_idiv): ditto
	(generic_ooo_vec_float_divsqrt): ditto
	(generic_ooo_vec_mask): ditto
	(generic_ooo_vec_vesetvl): ditto
	(generic_ooo_vec_setrm): ditto
	(generic_ooo_vec_readlen): ditto
	* config/riscv/riscv.md: include generic-vector-ooo
	* config/riscv/generic-vector-ooo.md: New file. to here

2024-02-01  Edwin Lu  <ewlu@rivosinc.com>

	Revert:
	2024-02-01  Edwin Lu  <ewlu@rivosinc.com>

	* config/riscv/riscv.cc (riscv_sched_variable_issue): enable assert

2024-02-01  Edwin Lu  <ewlu@rivosinc.com>

	* config/riscv/riscv.cc (riscv_sched_variable_issue): enable assert

2024-02-01  Edwin Lu  <ewlu@rivosinc.com>
	    Robin Dapp  <rdapp.gcc@gmail.com>

	* config/riscv/generic-ooo.md (generic_ooo): Move reservation
	(generic_ooo_vec_load): ditto
	(generic_ooo_vec_store): ditto
	(generic_ooo_vec_loadstore_seg): ditto
	(generic_ooo_vec_alu): ditto
	(generic_ooo_vec_fcmp): ditto
	(generic_ooo_vec_imul): ditto
	(generic_ooo_vec_fadd): ditto
	(generic_ooo_vec_fmul): ditto
	(generic_ooo_crypto): ditto
	(generic_ooo_perm): ditto
	(generic_ooo_vec_reduction): ditto
	(generic_ooo_vec_ordered_reduction): ditto
	(generic_ooo_vec_idiv): ditto
	(generic_ooo_vec_float_divsqrt): ditto
	(generic_ooo_vec_mask): ditto
	(generic_ooo_vec_vesetvl): ditto
	(generic_ooo_vec_setrm): ditto
	(generic_ooo_vec_readlen): ditto
	* config/riscv/riscv.md: include generic-vector-ooo
	* config/riscv/generic-vector-ooo.md: New file. to here

2024-02-01  Edwin Lu  <ewlu@rivosinc.com>

	* config/riscv/generic-ooo.md (generic_ooo_sfb_alu): Add reservation
	(generic_ooo_branch): ditto
	* config/riscv/generic.md (generic_sfb_alu): ditto
	(generic_fmul_half): ditto
	* config/riscv/riscv.md: Remove cbo, pushpop, and rdfrm types
	* config/riscv/sifive-7.md (sifive_7_hfma):Add reservation
	(sifive_7_popcount): ditto
	* config/riscv/vector.md: change rdfrm to fmove
	* config/riscv/zc.md: change pushpop to load/store

2024-02-01  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/113657
	* config/aarch64/aarch64-simd.md (split for movv8di):
	For strict aligned mode, use DImode instead of TImode.

2024-01-31  Robin Dapp  <rdapp@ventanamicro.com>

	PR middle-end/113607
	* match.pd: Make sure else values match when folding a
	vec_cond into a conditional operation.

2024-01-31  Marek Polacek  <polacek@redhat.com>

	* doc/invoke.texi: Mention that -fconcepts-ts was deprecated in GCC 14.

2024-01-31  Tamar Christina  <tamar.christina@arm.com>
	    Matthew Malcomson  <matthew.malcomson@arm.com>

	PR sanitizer/112644
	* asan.h (asan_intercepted_p): Incercept memset, memmove, memcpy and
	memcmp.
	* builtins.cc (expand_builtin): Include HWASAN when checking for
	builtin inlining.

2024-01-31  Richard Biener  <rguenther@suse.de>

	PR middle-end/110176
	* match.pd (zext (bool) <= (int) 4294967295u): Make sure
	to match INTEGER_CST only without outstanding conversion.

2024-01-31  Alex Coplan  <alex.coplan@arm.com>

	PR target/111677
	* config/aarch64/aarch64.cc (aarch64_reg_save_mode): Use
	V16QImode for the full 16-byte FPR saves in the vector PCS case.

2024-01-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/111444
	* tree-ssa-sccvn.cc (vn_reference_lookup_3): Do not use
	vn_reference_lookup_2 when optimistically skipping may-defs.

2024-01-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113630
	* tree-ssa-pre.cc (compute_avail): Avoid registering a
	reference with a representation with not matching base
	access size.

2024-01-31  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/113656
	* simplify-rtx.cc (simplify_context::simplify_unary_operation_1)
	<case FLOAT_TRUNCATE>: Fix up last argument to simplify_gen_unary.

2024-01-31  Jakub Jelinek  <jakub@redhat.com>

	PR debug/113637
	* dwarf2out.cc (loc_list_from_tree_1): Assume integral types
	with BLKmode are larger than DWARF2_ADDR_SIZE.

2024-01-31  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113639
	* gimple-lower-bitint.cc (bitint_large_huge::handle_operand_addr):
	For VIEW_CONVERT_EXPR set rhs1 to its operand.

2024-01-31  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113670
	* tree-vect-data-refs.cc (vect_check_gather_scatter):
	Make sure we can take the address of the reference base.

2024-01-31  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-mcus.def: Add AVR64DU28, AVR64DU32, ATA5787,
	ATA5835, ATtiny64AUTO, ATA5700M322.
	* doc/avr-mmcu.texi: Rebuild.

2024-01-31  Alexandre Oliva  <oliva@adacore.com>

	PR debug/113394
	* ipa-strub.cc (build_ref_type_for): Drop nonaliased.  Adjust
	caller.

2024-01-31  Alexandre Oliva  <oliva@adacore.com>

	PR middle-end/112917
	PR middle-end/113100
	* builtins.cc (expand_builtin_stack_address): Use
	STACK_ADDRESS_OFFSET.
	* doc/extend.texi (__builtin_stack_address): Adjust.
	* config/sparc/sparc.h (STACK_ADDRESS_OFFSET): Define.
	* doc/tm.texi.in (STACK_ADDRESS_OFFSET): Document.
	* doc/tm.texi: Rebuilt.

2024-01-31  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113495
	* config/riscv/riscv-vsetvl.cc (extract_single_source): Remove.
	(pre_vsetvl::compute_vsetvl_def_data): Fix compile time issue.
	(pre_vsetvl::compute_transparent): New function.
	(pre_vsetvl::compute_lcm_local_properties): Fix compile time time issue.

2024-01-30  Fangrui Song  <maskray@google.com>

	PR target/105576
	* config/i386/constraints.md: Define constraint "Ws".
	* doc/md.texi: Document it.

2024-01-30  Marek Polacek  <polacek@redhat.com>

	PR c++/110358
	PR c++/109640
	* doc/invoke.texi: Update -Wdangling-reference description.

2024-01-30  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	* config/xtensa/constraints.md (R, T, U):
	Change define_constraint to define_memory_constraint.
	* config/xtensa/predicates.md (move_operand): Don't check that a
	constant pool operand size is a multiple of UNITS_PER_WORD.
	* config/xtensa/xtensa.cc
	(xtensa_lra_p, TARGET_LRA_P): Remove.
	(xtensa_emit_move_sequence): Remove "if (reload_in_progress)"
	clause as it can no longer be true.
	(fixup_subreg_mem): Drop function.
	(xtensa_output_integer_literal_parts): Consider 16-bit wide
	constants.
	(xtensa_legitimate_constant_p): Add short-circuit path for
	integer load instructions. Don't check that mode size is
	at least UNITS_PER_WORD.
	* config/xtensa/xtensa.md (movsf): Use can_create_pseudo_p()
	rather reload_in_progress and reload_completed.
	(doloop_end): Drop operand 2.
	(movhi_internal): Add alternative loading constant from a
	literal pool.
	(define_split for DI register_operand): Don't limit to
	!TARGET_AUTO_LITPOOLS.
	* config/xtensa/xtensa.opt (mlra): Change to no effect.

2024-01-30  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv.cc (riscv_v_vls_mode_aggregate_gpr_count): New function to
	calculate the gpr count required by vls mode.
	(riscv_v_vls_to_gpr_mode): New function convert vls mode to gpr mode.
	(riscv_pass_vls_aggregate_in_gpr): New function to return the rtx of gpr
	for vls mode.
	(riscv_get_arg_info): Add vls mode handling.
	(riscv_pass_by_reference): Return false if arg info has no zero gpr count.

2024-01-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113659
	* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
	Handle main exit without virtual use.

2024-01-30  Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv.md: Move UNSPEC_XTHEADFMV* to unspec enum.

2024-01-30  Iain Sandoe  <iain@sandoe.co.uk>

	PR libgcc/113403
	* config/darwin.h (DARWIN_SHARED_WEAK_ADDS, DARWIN_WEAK_CRTS): New.
	(REAL_LIBGCC_SPEC): Move weak CRT handling to separate spec.
	* config/i386/darwin.h (DARWIN_HEAP_T_LIB): New.
	* config/i386/darwin32-biarch.h (DARWIN_HEAP_T_LIB): New.
	* config/i386/darwin64-biarch.h (DARWIN_HEAP_T_LIB): New.
	* config/rs6000/darwin.h (DARWIN_HEAP_T_LIB): New.

2024-01-30  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113623
	* config/aarch64/aarch64-early-ra.cc (early_ra::preprocess_insns):
	Mark all registers that occur in addresses as needing a GPR.

2024-01-30  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113636
	* config/aarch64/aarch64-early-ra.cc (early_ra::replace_regs): Take
	the containing insn as an extra parameter.  Reset debug instructions
	if they reference a register that is no longer used by real insns.
	(early_ra::apply_allocation): Update calls accordingly.

2024-01-30  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113603
	* tree-ssa-strlen.cc (strlen_pass::handle_store): After
	count_nonzero_bytes call refetch si using get_strinfo in case it
	has been unshared in the meantime.

2024-01-30  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/101195
	* except.cc (expand_builtin_eh_return_data_regno): If which doesn't
	fit into unsigned HOST_WIDE_INT, return constm1_rtx.

2024-01-30  Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/thead.cc (th_print_operand_address): Change %ld
	to %lld.

2024-01-29  Manos Anagnostakis  <manos.anagnostakis@vrull.eu>
	    Manolis Tsamis  <manolis.tsamis@vrull.eu>
	    Philipp Tomsich  <philipp.tomsich@vrull.eu>

	* config/aarch64/aarch64-ldpstp.md: Remove unused mode.
	* config/aarch64/aarch64-protos.h (aarch64_operands_ok_for_ldpstp):
	Likewise.
	* config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
	Call on framework moved later.

2024-01-29  Jose E. Marchesi  <jose.marchesi@oracle.com>

	* config/bpf/bpf.cc (bpf_expand_epilogue): Do not emit a return
	instruction in naked function epilogues.

2024-01-29  YunQiang Su  <syq@gcc.gnu.org>

	PR target/113655
	* configure.ac: Fix typo gcc_cv_as_mips_explicit should be
	gcc_cv_as_mips_explicit_relocs.
	* configure: Regnerated.

2024-01-29  Matthieu Longo  <matthieu.longo@arm.com>

	PR target/108933
	* config/arm/arm.md (arm_rev16si2): Convert to define_insn.
	Correct generated RTL.
	(arm_rev16si2_alt1): Correctly handle conditional execution.
	(arm_rev16si2_alt2): Likewise.

2024-01-29  Richard Biener  <rguenther@suse.de>

	PR middle-end/113622
	* expr.cc (expand_assignment): Spill hard registers if
	we index them with a variable offset.

2024-01-29  Richard Biener  <rguenther@suse.de>

	PR middle-end/113622
	* gimple-isel.cc (gimple_expand_vec_set_extract_expr):
	Also allow DECL_HARD_REGISTER variables.

2024-01-29  Alex Coplan  <alex.coplan@arm.com>

	PR target/113616
	* config/aarch64/aarch64-ldp-fusion.cc (fixup_debug_uses_trailing_add):
	Use iterate_safely when iterating over debug uses.
	(fixup_debug_uses): Likewise.
	(ldp_bb_info::cleanup_tombstones): Use iterate_safely to iterate
	over nondebug insns instead of manually maintaining the next insn.
	* iterator-utils.h (class safe_iterator): New.
	(iterate_safely): New.

2024-01-29  H.J. Lu  <hjl.tools@gmail.com>

	PR target/38534
	* config/i386/i386-options.cc (ix86_set_func_type): Save
	callee-saved registers in noreturn functions for -O0/-Og.

2024-01-29  Tobias Burnus  <tburnus@baylibre.com>

	PR target/113615
	* config/gcn/gcn-valu.md (fold_left_plus_<mode>): Only
	define for !TARGET_RDNA2_PLUS.

2024-01-29  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113281
	* tree-vect-patterns.cc (vect_recog_over_widening_pattern): Remove
	workaround for right shifts.
	(vect_truncatable_operation_p): Handle NEGATE_EXPR and BIT_NOT_EXPR.
	(vect_determine_precisions_from_range): Be more selective about
	which codes can be narrowed based on their input and output ranges.
	For shifts, require at least one more bit of precision than the
	maximum shift amount.

2024-01-29  Tobias Burnus  <tburnus@baylibre.com>

	* config/nvptx/nvptx.opt (march-map=): Add sm_89 and sm_90a.

2024-01-29  Tobias Burnus  <tburnus@baylibre.com>

	* doc/install.texi (amdgcn): Recommend LLVM 15+ and newlib 4.4+,
	but keep requiring only newlib 4.3+ and, if gfx1100 is disabled,
	LLVM 13.0.1+.

2024-01-29  Tobias Burnus  <tburnus@baylibre.com>

	PR other/111966
	* config/gcn/mkoffload.cc (SET_XNACK_UNSET, TEST_SRAM_ECC_UNSET): New.
	(SET_SRAM_ECC_UNSUPPORTED): Renamed to ...
	(SET_SRAM_ECC_UNSET): ... this.
	(copy_early_debug_info): Remove gfx900 special case, now handled as
	part of the generic handling.
	(main): Update SRAM_ECC and XNACK for the -march as done in gcn-hsa.h.

2024-01-29  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/110603
	* tree-ssa-strlen.cc (get_range_strlen_dynamic): Remove incorrect
	setting of pdata->maxlen to vr.upper_bound (which is unconditionally
	overwritten anyway).  Avoid creating invalid range with minlen
	larger than maxlen.  Formatting fix.

2024-01-29  Richard Biener  <rguenther@suse.de>

	PR debug/103047
	* tree-inline.cc (initialize_inlined_parameters): Reverse
	the decl chain of inlined parameters.

2024-01-28  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.cc (darwin_build_constant_cfstring): Prevent over-
	alignment of CFString constants by setting DECL_USER_ALIGN.

2024-01-28  Iain Sandoe  <iain@sandoe.co.uk>
	    Jakub Jelinek   <jakub@redhat.com>

	PR libgcc/113402
	* builtins.cc (expand_builtin): Handle BUILT_IN_GCC_NESTED_PTR_CREATED
	and BUILT_IN_GCC_NESTED_PTR_DELETED.
	* builtins.def (BUILT_IN_GCC_NESTED_PTR_CREATED,
	BUILT_IN_GCC_NESTED_PTR_DELETED): Make these builtins LIB-EXT and
	rename the library fallbacks to __gcc_nested_func_ptr_created and
	__gcc_nested_func_ptr_deleted.
	* doc/invoke.texi: Rename these to __gcc_nested_func_ptr_created
	and __gcc_nested_func_ptr_deleted.
	* tree-nested.cc (finalize_nesting_tree_1): Use builtin_explicit for
	BUILT_IN_GCC_NESTED_PTR_CREATED and BUILT_IN_GCC_NESTED_PTR_DELETED.
	* tree.cc (build_common_builtin_nodes): Build the
	BUILT_IN_GCC_NESTED_PTR_CREATED and BUILT_IN_GCC_NESTED_PTR_DELETED local
	builtins only for non-explicit.

2024-01-28  YunQiang Su  <syq@gcc.gnu.org>

	* doc/invoke.texi: Remove duplicate MIPS explicit-relocs option.

2024-01-27  H.J. Lu  <hjl.tools@gmail.com>

	PR target/38534
	* config/i386/i386-options.cc (ix86_set_func_type): Don't
	save and restore callee saved registers for a noreturn function
	with nothrow or compiled with -fno-exceptions.

2024-01-27  H.J. Lu  <hjl.tools@gmail.com>

	PR target/103503
	PR target/113312
	* config/i386/i386-expand.cc (ix86_expand_call): Replace
	no_caller_saved_registers check with call_saved_registers check.
	Clobber all registers that are not used by the callee with
	no_callee_saved_registers attribute.
	* config/i386/i386-options.cc (ix86_set_func_type): Set
	call_saved_registers to TYPE_NO_CALLEE_SAVED_REGISTERS for
	noreturn function.  Disallow no_callee_saved_registers with
	interrupt or no_caller_saved_registers attributes together.
	(ix86_set_current_function): Replace no_caller_saved_registers
	check with call_saved_registers check.
	(ix86_handle_no_caller_saved_registers_attribute): Renamed to ...
	(ix86_handle_call_saved_registers_attribute): This.
	(ix86_gnu_attributes): Add
	ix86_handle_call_saved_registers_attribute.
	* config/i386/i386.cc (ix86_conditional_register_usage): Replace
	no_caller_saved_registers check with call_saved_registers check.
	(ix86_function_ok_for_sibcall): Don't allow callee with
	no_callee_saved_registers attribute when the calling function
	has callee-saved registers.
	(ix86_comp_type_attributes): Also check
	no_callee_saved_registers.
	(ix86_epilogue_uses): Replace no_caller_saved_registers check
	with call_saved_registers check.
	(ix86_hard_regno_scratch_ok): Likewise.
	(ix86_save_reg): Replace no_caller_saved_registers check with
	call_saved_registers check.  Don't save any registers for
	TYPE_NO_CALLEE_SAVED_REGISTERS.  Save all registers with
	TYPE_DEFAULT_CALL_SAVED_REGISTERS if function with
	no_callee_saved_registers attribute is called.
	(find_drap_reg): Replace no_caller_saved_registers check with
	call_saved_registers check.
	* config/i386/i386.h (call_saved_registers_type): New enum.
	(machine_function): Replace no_caller_saved_registers with
	call_saved_registers.
	* doc/extend.texi: Document no_callee_saved_registers attribute.

2024-01-27  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113614
	* gimple-lower-bitint.cc (gimple_lower_bitint): Don't merge
	widening casts from signed to unsigned types with TRUNC_DIV_EXPR,
	TRUNC_MOD_EXPR or FLOAT_EXPR uses.

2024-01-27  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113568
	* gimple-lower-bitint.cc (bitint_large_huge::lower_mergeable_stmt):
	For VIEW_CONVERT_EXPR use first operand of rhs1 instead of rhs1
	in the widening extension checks.

2024-01-27  Jakub Jelinek  <jakub@redhat.com>

	* gimple-lower-bitint.cc (gimple_lower_bitint): For
	TDF_DETAILS dump mapping of SSA_NAMEs to decls.

2024-01-26  Hans-Peter Nilsson  <hp@axis.com>

	* cgraphunit.cc (process_function_and_variable_attributes): Tweak
	the warning for an attribute-always_inline without inline declaration.

2024-01-26  Robin Dapp  <rdapp@ventanamicro.com>

	PR other/113575
	* genopinit.cc (main): Split init_all_optabs into functions
	of 1000 patterns each.

2024-01-26  Tobias Burnus  <tburnus@baylibre.com>

	* config.gcc (amdgcn-*-*): Add gfx1030 and gfx1100 to
	TM_MULTILIB_CONFIG.
	* doc/install.texi (Configuration amdgcn-*-*): Mention gfx1030/gfx1100.
	* doc/invoke.texi (AMD GCN Options): Add gfx1030 and gfx1100 to
	-march/-mtune.

2024-01-26  Andrew Stubbs  <ams@baylibre.com>

	* config/gcn/gcn-opts.h (TARGET_PACKED_WORK_ITEMS): Add TARGET_RDNA3.
	* config/gcn/gcn-valu.md (all_convert): New iterator.
	(<convop><V_INT_1REG_ALT:mode><V_INT_1REG:mode>2<exec>): New
	define_expand, and rename the old one to ...
	(*<convop><V_INT_1REG_ALT:mode><V_INT_1REG:mode>_sdwa<exec>): ... this.
	(extend<V_INT_1REG_ALT:mode><V_INT_1REG:mode>2<exec>): Likewise, to ...
	(extend<V_INT_1REG_ALT:mode><V_INT_1REG:mode>_sdwa<exec>): .. this.
	(*<convop><V_INT_1REG_ALT:mode><V_INT_1REG:mode>_shift<exec>): New.
	* config/gcn/gcn.cc (gcn_global_address_p): Use "offsetbits" correctly.
	(gcn_hsa_declare_function_name): Update the vgpr counting for gfx1100.
	* config/gcn/gcn.md (<u>mulhisi3): Disable on RDNA3.
	(<u>mulqihi3_scalar): Likewise.

2024-01-26  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113602
	* tree-data-ref.cc (dr_analyze_innermost): Fail when
	the base object isn't addressable.

2024-01-26  Tobias Burnus  <tburnus@baylibre.com>

	* config/gcn/gcn-hsa.h (ABI_VERSION_SPEC): New; creates the
	"--amdhsa-code-object-version=" argument.
	(ASM_SPEC): Use it; replace previous version of it.

2024-01-26  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::earliest_fuse_vsetvl_info): Refine some codes.
	(pre_vsetvl::emit_vsetvl): Ditto.

2024-01-26  Jiahao Xu  <xujiahao@loongson.cn>

	* config/loongarch/lasx.md (vec_extract<mode>_0):
	New define_insn_and_split patten.

2024-01-26  Jiahao Xu  <xujiahao@loongson.cn>

	* config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Define.

2024-01-26  Li Wei  <liwei@loongson.cn>

	* config/loongarch/loongarch.cc (loongarch_emit_swdivsf): Adjust.

2024-01-26  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113469
	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Fix bug.

2024-01-26  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/100212
	* config/aarch64/aarch64.cc (aarch64_classify_index): Avoid
	undefined shift after the call to exact_log2.

2024-01-25  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/100204
	* config/aarch64/constraints.md (J): Cast to `unsigned HOST_WIDE_INT`
	before taking the negative of it.

2024-01-25  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/113526
	* lra-constraints.cc (curr_insn_transform): Change class even for
	spilled pseudo successfully matched with with NO_REGS.

2024-01-25  Georg-Johann Lay  <avr@gjlay.de>

	PR target/113601
	* config/avr/avr-mcus.def (atmega3208, atmega3209): Fix data_section_start.

2024-01-25  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	PR target/112987
	* config/aarch64/aarch64.cc (aarch64_gen_compare_zero_and_branch): New.
	(aarch64_expand_epilogue): Use the new function.
	(aarch64_split_compare_and_swap): Likewise.
	(aarch64_split_atomic_op): Likewise.

2024-01-25  Robin Dapp  <rdapp.gcc@gmail.com>

	PR middle-end/112971
	* fold-const.cc (simplify_const_binop): New function for binop
	simplification of two constant vectors when element-wise
	handling is not necessary.
	(const_binop): Call new function.

2024-01-25  Mary Bennett  <mary.bennett@embecosm.com>

	* common/config/riscv/riscv-common.cc: Add XCVbitmanip.
	* config/riscv/constraints.md: Likewise.
	* config/riscv/corev.def: Likewise.
	* config/riscv/corev.md: Likewise.
	* config/riscv/predicates.md: Likewise.
	* config/riscv/riscv-builtins.cc (AVAIL): Likewise.
	* config/riscv/riscv-ftypes.def: Likewise.
	* config/riscv/riscv.opt: Likewise.
	* config/riscv/riscv.cc (riscv_print_operand): Add new operand 'Y'.
	* doc/extend.texi: Add XCVbitmanip builtin documentation.
	* doc/sourcebuild.texi: Likewise.

2024-01-25  Tobias Burnus  <tburnus@baylibre.com>

	* config/gcn/gcn-hsa.h (ASM_SPEC): Add space after -mxnack= argument.

2024-01-25  Yanzhang Wang  <yanzhang.wang@intel.com>

	PR target/113538
	* config/riscv/riscv.cc (riscv_get_arg_info): Remove the flag.
	(riscv_fntype_abi): Ditto.
	* config/riscv/riscv.opt: Ditto.

2024-01-25  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113574
	* convert.cc (convert_to_integer_1) <case LSHIFT_EXPR>: Compare shift
	count against TYPE_PRECISION rather than TYPE_SIZE.

2024-01-25  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113572
	* config/aarch64/aarch64-sve-builtins.cc (vector_cst_all_same):
	Check VECTOR_CST_ELT instead of VECTOR_CST_ENCODED_ELT

2024-01-25  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113550
	* config/aarch64/aarch64-simd.md: In the movv8di splitter, check
	whether each split instruction is a load that clobbers the source
	address.  Emit that instruction last if so.

2024-01-25  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113485
	* config/aarch64/aarch64-simd.md (aarch64_zip1<mode>_low): New
	pattern.
	(<optab><Vnarrowq><mode>2): Use it instead of generating a
	paradoxical subreg for the input.

2024-01-25  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vsetvl.cc (get_all_predecessors): New function.
	(pre_vsetvl::pre_global_vsetvl_info): Add LCM delete block all
	predecessors dump information.

2024-01-25  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_vsetvl_def_data): Remove
	redundant full available computation.
	(pre_vsetvl::pre_global_vsetvl_info): Ditto.

2024-01-25  Jakub Jelinek  <jakub@redhat.com>

	* doc/generic.texi (VECTOR_CST): Fix typo - petterns -> patterns.
	* doc/rtl.texi (CONST_VECTOR): Likewise.

2024-01-25  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-opts.h (enum vsetvl_strategy_enum): Add optim-no-fusion option.
	* config/riscv/riscv-vsetvl.cc (pass_vsetvl::lazy_vsetvl): Ditto.
	(pass_vsetvl::execute): Ditto.
	* config/riscv/riscv.opt: Ditto.

2024-01-25  Jiahao Xu  <xujiahao@loongson.cn>

	* config/loongarch/lasx.md (@vec_concatz<mode>): Remove this define_insn pattern.
	* config/loongarch/loongarch.cc (loongarch_expand_vector_group_init): Use vec_concat<mode>.

2024-01-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113576
	* tree-vect-loop.cc (vec_init_loop_exit_info): Only allow
	exits with may_be_zero niters when its the last one.

2024-01-25  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch.cc (loongarch_symbolic_constant_p):
	For symbols of type tls, non-zero Offset is not generated.

2024-01-25  Haochen Gui  <guihaoc@gcc.gnu.org>

	* config/rs6000/rs6000-string.cc (expand_block_compare): Enable
	P9 with m32 and mpowerpc64.

2024-01-25  liuhongt  <hongtao.liu@intel.com>

	* config/i386/i386-options.cc (ix86_option_override_internal):
	Enable -mlam=u57 by default when compiled with
	-fsanitize=hwaddress.

2024-01-25  Palmer Dabbelt  <palmer@rivosinc.com>

	* common/config/riscv/riscv-common.cc (riscv_implied_info):
	Remove {"ztso", "a"}.

2024-01-24  Martin Jambor  <mjambor@suse.cz>

	PR ipa/108007
	PR ipa/112616
	* cgraph.h (cgraph_edge): Add a parameter to
	redirect_call_stmt_to_callee.
	* ipa-param-manipulation.h (ipa_param_adjustments): Add a
	parameter to modify_call.
	(ipa_release_ssas_in_hash): Declare.
	* cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
	parameter killed_ssas, pass it to padjs->modify_call.
	* ipa-param-manipulation.cc (purge_all_uses): New function.
	(ipa_param_adjustments::modify_call): New parameter killed_ssas.
	Instead of substituting uses, invoke purge_all_uses.  If
	hash of killed SSAs has not been provided, create a temporary one
	and release SSAs that have been added to it.
	(compare_ssa_versions): New function.
	(ipa_release_ssas_in_hash): Likewise.
	* tree-inline.cc (redirect_all_calls): Create
	id->killed_new_ssa_names earlier, pass it to edge redirection,
	adjust a comment.
	(copy_body): Release SSAs in id->killed_new_ssa_names.

2024-01-24  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/113486
	* config/aarch64/aarch64.cc (aarch64_get_reg_raw_mode): For
	TARGET_GENERAL_REGS_ONLY, return VOIDmode for non-GP_REGNUM_P regno.

2024-01-24  Monk Chiang  <monk.chiang@sifive.com>

	PR target/113095
	* config/riscv/sfb.md: New splitters to rewrite single bit
	sign extension as the condition to SFB instructions.

2024-01-24  Jan Hubicka  <jh@suse.cz>

	PR middle-end/88345
	* common.opt: (flimit-function-alignment): Reorder alphabeticaly
	(fmin-function-alignment): New parameter.
	* doc/invoke.texi: (-fmin-function-alignment): Document.
	(-falign-functions,-falign-loops,-falign-labels): Mention that
	aglinments are ignored in cold code.
	* varasm.cc (assemble_start_function): Handle min-function-alignment.

2024-01-24  Tamar Christina  <tamar.christina@arm.com>

	PR target/109636
	* config/aarch64/aarch64-simd.md (<su_optab>div<mode>3,
	mulv2di3): Remove.
	* config/aarch64/iterators.md (VQDIV): Remove.
	(SVE_FULL_SDI_SIMD, SVE_FULL_HSDI_SIMD_DI,
	SVE_I_SIMD_DI): New.
	(VPRED, sve_lane_con): Add V4SI and V2DI.
	* config/aarch64/aarch64-sve.md (<optab><mode>3,
	@aarch64_pred_<optab><mode>): Support Advanced SIMD types.
	(mul<mode>3): New, split from <optab><mode>3.
	(@aarch64_pred_<optab><mode>, *post_ra_<optab><mode>3): New.
	* config/aarch64/aarch64-sve2.md (@aarch64_mul_lane_<mode>,
	*aarch64_mul_unpredicated_<mode>): Change SVE_FULL_HSDI to
	SVE_FULL_HSDI_SIMD_DI.

2024-01-24  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113552
	* config/aarch64/aarch64.cc
	(aarch64_simd_clone_compute_vecsize_and_simdlen): Block simdlen 1.

2024-01-24  Martin Jambor  <mjambor@suse.cz>

	PR ipa/113490
	* ipa-cp.cc (ipcp_lattice<valtype>::add_value): Bail out if value
	count is equal or greater than the limit.  Use the limit from the
	callee.

2024-01-24  YunQiang Su  <syq@gcc.gnu.org>

	* configure.ac: Detect the explicit relocs support for
	mips, and define C macro MIPS_EXPLICIT_RELOCS.
	* config.in: Regenerated.
	* configure: Regenerated.
	* doc/invoke.texi(MIPS Options): Add -mexplicit-relocs.
	* config/mips/mips-opts.h: Define enum mips_explicit_relocs.
	* config/mips/mips.cc(mips_set_compression_mode): Sorry if
	!TARGET_EXPLICIT_RELOCS instead of just set it.
	* config/mips/mips.h: Define TARGET_EXPLICIT_RELOCS and
	TARGET_EXPLICIT_RELOCS_PCREL with mips_opt_explicit_relocs.
	* config/mips/mips.opt: Introduce -mexplicit-relocs= option
	and define -m(no-)explicit-relocs as aliases.

2024-01-24  Alex Coplan  <alex.coplan@arm.com>

	* config/aarch64/aarch64.opt (-mearly-ldp-fusion): Set default
	to 1.
	(-mlate-ldp-fusion): Likewise.

2024-01-24  Tamar Christina  <tamar.christina@arm.com>

	* tree-vect-loop.cc (vect_get_vect_def,
	vect_create_epilog_for_reduction): Rename main_exit_p to
	last_val_reduc_p.

2024-01-24  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113364
	* tree-vect-loop.cc (vect_create_epilog_for_reduction): If all exits all
	early exits then we must reduce from the first offset for all of them.

2024-01-24  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113495
	* config/riscv/riscv-vsetvl.cc (get_expr_id): Remove.
	(get_regno): Ditto.
	(get_bb_index): Ditto.
	(pre_vsetvl::compute_avl_def_data): Ditto.
	(pre_vsetvl::earliest_fuse_vsetvl_info): Fix large memory usage.
	(pre_vsetvl::pre_global_vsetvl_info): Ditto.

2024-01-23  Andrew Pinski  <quic_apinski@quicinc.com>
	    Richard Sandiford  <richard.sandiford@arm.com>

	PR target/100942
	* ccmp.cc (ccmp_candidate_p): Add outer argument.
	Allow if the outer is true and the lhs is used more
	than once.
	(expand_ccmp_expr): Update call to ccmp_candidate_p.
	* expr.h (expand_expr_real_gassign): Declare.
	* expr.cc (expand_expr_real_gassign): New function, split out from...
	(expand_expr_real_1): ...here.
	* cfgexpand.cc (expand_gimple_stmt_1): Use expand_expr_real_gassign.

2024-01-23  Alex Coplan  <alex.coplan@arm.com>

	PR target/113089
	* config/aarch64/aarch64-ldp-fusion.cc (reset_debug_use): New.
	(fixup_debug_use): New.
	(fixup_debug_uses_trailing_add): New.
	(fixup_debug_uses): New. Use it ...
	(ldp_bb_info::fuse_pair): ... here.
	(try_promote_writeback): Call fixup_debug_uses_trailing_add to
	fix up debug uses of the base register that are affected by
	folding in the trailing add insn.

2024-01-23  Alex Coplan  <alex.coplan@arm.com>

	PR target/113089
	* config/aarch64/aarch64-ldp-fusion.cc (ldp_bb_info::fuse_pair):
	Update trailing nondebug uses of the base register in the case
	of cancelling writeback.

2024-01-23  Alex Coplan  <alex.coplan@arm.com>

	PR target/113089
	* rtl-ssa/accesses.h (use_info::next_debug_insn_use): New.
	(debug_insn_use_iterator): New.
	(set_info::first_debug_insn_use): New.
	(set_info::debug_insn_uses): New.
	* rtl-ssa/member-fns.inl (use_info::next_debug_insn_use): New.
	(set_info::first_debug_insn_use): New.
	(set_info::debug_insn_uses): New.

2024-01-23  Alex Coplan  <alex.coplan@arm.com>

	PR target/113356
	* config/aarch64/aarch64-ldp-fusion.cc (ldp_bb_info::try_fuse_pair):
	Don't record hazards against the opposite insn in the pair.

2024-01-23  Alex Coplan  <alex.coplan@arm.com>

	PR target/113070
	* config/aarch64/aarch64-ldp-fusion.cc
	(struct stp_change_builder): New.
	(decide_stp_strategy): Reanme to ...
	(try_repurpose_store): ... this.
	(ldp_bb_info::fuse_pair): Refactor to use stp_change_builder to
	construct stp changes.  Fix up uses when inserting new stp insns.

2024-01-23  Alex Coplan  <alex.coplan@arm.com>

	PR target/113070
	* rtl-ssa.h: Include hash-set.h.
	* rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add
	new_sets parameter and use it to keep track of new user-created sets.
	(function_info::apply_changes_to_insn): Also call add_def on new sets.
	(function_info::change_insns): Add hash_set to keep track of new
	user-created defs.  Plumb it through.
	* rtl-ssa/functions.h: Add hash_set parameter to finalize_new_accesses and
	apply_changes_to_insn.

2024-01-23  Alex Coplan  <alex.coplan@arm.com>

	PR target/113070
	* rtl-ssa/accesses.cc (function_info::create_use): New.
	* rtl-ssa/changes.cc (function_info::finalize_new_accesses):
	Ensure new uses end up referring to permanent defs.
	* rtl-ssa/functions.h (function_info::create_use): Declare.

2024-01-23  Alex Coplan  <alex.coplan@arm.com>

	PR target/113070
	* rtl-ssa/changes.cc (function_info::change_insns): Split out the call
	to finalize_new_accesses from the backwards placement loop, run it
	forwards in a separate loop.

2024-01-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113552
	* tree-vect-stmts.cc (vectorizable_simd_clone_call): Use
	floor_log2 instead of exact_log2 on the number of calls.

2024-01-23  Jeff Law  <jlaw@ventanamicro.com>
	    Jakub Jelinek  <jakub@redhat.com>

	* config/ia64/ia64.cc (ia64_start_function): Add ATTRIBUTE_UNUSED to
	decl.

2024-01-23  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
	Separate single and multi-exit case when creating PHIs between
	the main and epilogue.

2024-01-23  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/112989
	* config/aarch64/aarch64-sve-builtins-shapes.cc (build_one): Skip
	MODE_single variants of functions that don't take tuple arguments.

2024-01-23  Alex Coplan  <alex.coplan@arm.com>

	PR target/113114
	* config/aarch64/aarch64-ldp-fusion.cc (try_promote_writeback):
	Don't assert recog success, just punt if the writeback pair
	isn't recognized.

2024-01-23  Jakub Jelinek  <jakub@redhat.com>

	* config/gcn/gcn.cc (gcn_hsa_declare_function_name): Add
	ATTRIBUTE_UNUSED to decl.

2024-01-23  Richard Biener  <rguenther@suse.de>

	PR debug/107058
	* dwarf2out.cc (dwarf2out_die_ref_for_decl): Gracefully
	handle unexpected but bogus DIE contexts when not checking
	enabled.

2024-01-23  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113462
	* fold-const.cc (native_interpret_int): Don't punt if total_bytes
	is larger than HOST_BITS_PER_DOUBLE_INT / BITS_PER_UNIT.
	(fold_view_convert_expr): Use XALLOCAVEC buffers for types with
	sizes between 129 and 8192 bytes.

2024-01-23  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
	If la_opt_explicit_relocs is EXPLICIT_RELOCS_AUTO, return false
	for SYMBOL_TLS_LDM and SYMBOL_TLS_GD.
	(loongarch_call_tls_get_addr): Do not split symbols of
	SYMBOL_TLS_LDM or SYMBOL_TLS_GD if la_opt_explicit_relocs is
	EXPLICIT_RELOCS_AUTO.

2024-01-23  Richard Biener  <rguenther@suse.de>

	* alias.cc (known_base_value_p): Remove.
	(find_base_value): Remove PLUS/MINUS handling
	when both operands are not CONST_INT_P.

2024-01-23  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/113255
	* alias.cc (find_base_term): Remove PLUS/MINUS handling
	when both operands are not CONST_INT_P.

2024-01-23  Richard Biener  <rguenther@suse.de>

	PR debug/112718
	* dwarf2out.cc (dwarf2out_finish): Reset all type units
	for the fat part of an LTO compile.

2024-01-23  chenxiaolong  <chenxiaolong@loongson.cn>

	* doc/sourcebuild.texi: Add attributes for keywords.

2024-01-23  Sandra Loosemore  <sandra@codesourcery.com>

	PR c++/90463
	* doc/invoke.texi (Warning Options): Correct lists of options
	enabled by -Wall and -Wextra by checking against common.opt
	and c-family/c.opt.

2024-01-22  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/113030
	* config/arm/parsecpu.awk (check_cpu): Use cpu_opt_alias
	instead of cpu_optaliases.
	(check_arch): Use arch_opt_alias instead of arch_optaliases.

2024-01-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-protos.h (splat_to_scalar_move_p): New function.
	* config/riscv/riscv-v.cc (splat_to_scalar_move_p): Ditto.
	* config/riscv/vector.md: Simplify vmv.v.x. into vmv.s.x.

2024-01-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/109092
	* config/riscv/riscv.md: Use reg instead of subreg.

2024-01-22  Tobias Burnus  <tburnus@baylibre.com>

	PR other/111966
	* config/gcn/mkoffload.cc (elf_arch): Change default to gfx900
	to match the compiler default.
	(simple_object_copy_lto_debug_sections): Never unlink the outfile
	on error as the caller does so.
	(maybe_unlink, compile_native): Use %<...%> and %qs in fatal_error.
	(main): Likewise. Fix 'mkoffload.dbg.o' cleanup.

2024-01-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113373
	* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
	Create LC PHIs in the exit blocks where necessary.
	* tree-vect-loop.cc (vectorizable_live_operation): Do not try
	to handle missing LC PHIs.
	(find_connected_edge): Remove.
	(vect_create_epilog_for_reduction): Cleanup use of auto_vec.

2024-01-22  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/vector.md: Fix vfirst/vmsbf/vmsof ratio attributes.

2024-01-22  xuli  <xuli1@eswincomputing.com>

	PR target/113420
	* config/riscv/riscv-vector-builtins.cc (has_vxrm_or_frm_p):remove.
	(registered_function::overloaded_hash):refactor.
	(resolve_overloaded_builtin):avoid internal ICE.

2024-01-21  Mikael Pettersson  <mikpelinux@gmail.com>

	PR target/82420
	PR target/111279
	* calls.cc (emit_library_call_value_1): Pass valid TYPE
	to emit_push_insn.
	* expr.cc (emit_push_insn): Likewise.

2024-01-21  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_init_cumulative_args): Install
	correcction version of last change.

2024-01-21  Jeff Law  <jlaw@ventanamicro.com>

	* config/riscv/riscv.cc (riscv_init_cumulative_args): Update and
	fix bugs in signature.

2024-01-21  Roger Sayle  <roger@nextmovesoftware.com>
	    Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/111267
	* fwprop.cc (fwprop_propagation::profitabe_p): Rename
	profitable_p method to likely_profitable_p.
	(try_fwprop_subst_node): Update call to likely_profitable_p.
	Only bail-out early when !prop.likely_profitable_p for instructions
	that are not single sets.  When comparing costs, bail-out if the
	cost is unchanged and !prop.likely_profitable_p.

2024-01-21  Sandra Loosemore  <sandra@codesourcery.com>

	PR c++/90464
	* doc/invoke.texi (Warning Options): Document that -Wunused-parameter
	isn't enabled by -Wunused unless -Wextra is provided, and that
	-Wunused does enable -Wunused-const-variable=1 for C.  Clarify that
	-Wunused doesn't enable -Wunused-* options documented as behaving
	otherwise, and list them explicitly.

2024-01-21  Sandra Loosemore  <sandra@codesourcery.com>

	PR c/109708
	* doc/invoke.texi (Warning Options): Fix broken example and
	clean up/reorganize the others.  Also describe what the short-form
	options mean.

2024-01-20  Sandra Loosemore  <sandra@codesourcery.com>

	PR c/102998
	* doc/invoke.texi (Option Summary): Add -Warray-parameter.
	(Warning Options): Correct/edit discussion of -Warray-parameter
	to make the first example less confusing, and fill in missing info.

2024-01-20  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113462
	* gimple-lower-bitint.cc (bitint_large_huge::handle_cast):
	Handle rhs1 INTEGER_CST like SSA_NAME.

2024-01-20  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113491
	* tree-switch-conversion.cc (switch_conversion::build_constructors):
	If elt.index has precision higher than sizetype, fold_convert it to
	sizetype.
	(switch_conversion::array_value_type): Return type if type is
	BITINT_TYPE with precision above MAX_FIXED_MODE_SIZE or with BLKmode.
	(switch_conversion::build_arrays): Use unsigned_type_for rather than
	lang_hooks.types.type_for_mode if utype is BITINT_TYPE with precision
	above MAX_FIXED_MODE_SIZE or with BLKmode.  If utype has precision
	higher than sizetype, use sizetype as tidx type and fold_convert the
	subtraction to sizetype.

2024-01-20  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv.cc (riscv_init_cumulative_args): Suppress warning.
	(riscv_vector_mode_supported_any_target_p): Ditto.

2024-01-19  Mikael Pettersson  <mikpelinux@gmail.com>

	PR target/110934
	* config/m68k/m68k.cc (m68k_zero_call_used_regs): New function.
	(TARGET_ZERO_CALL_USED_REGS): Define.

2024-01-19  Mikael Pettersson  <mikpelinux@gmail.com>

	PR target/108640
	* config/m68k/m68k.cc (output_andsi3): Use QImode for
	address adjusted for 1-byte RMW access.
	(output_iorsi3): Likewise.
	(output_xorsi3): Likewise.

2024-01-19  Kito Cheng  <kito.cheng@sifive.com>

	* doc/invoke.texi (RISC-V Options): Add list of supported
	extensions.

2024-01-19  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113495
	* config/riscv/riscv-protos.h (RVV_VLMAX): Change to regno_reg_rtx[X0_REGNUM].
	(RVV_VUNDEF): Ditto.
	* config/riscv/riscv-vsetvl.cc: Add timevar.

2024-01-19  Richard Biener  <rguenther@suse.de>

	PR debug/113488
	* lto-streamer-in.cc (lto_read_tree_1): When there isn't
	an early DIE but there should be, do not pretend there is.

2024-01-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113494
	* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
	Handle endless loop on exit.  Handle re-allocated PHI.

2024-01-19  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113464
	* gimple-lower-bitint.cc (gimple_lower_bitint): Don't try to
	optimize loads into GIMPLE_ASM stmts.

2024-01-19  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113463
	* gimple-ssa-warn-restrict.cc (builtin_memref::extend_offset_range):
	Only look through NOP_EXPRs if rhs1 doesn't have wider type than
	lhs.

2024-01-19  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113459
	* tree-ssa-sccvn.cc (vn_walk_cb_data::push_partial_def): Use
	TREE_INT_CST_LOW of TYPE_SIZE_UNIT rather than GET_MODE_SIZE
	of SCALAR_INT_TYPE_MODE if type has BLKmode.
	(vn_reference_lookup_3): Likewise.  Formatting fix.

2024-01-19  Jakub Jelinek  <jakub@redhat.com>
	    Richard Biener  <rguenther@suse.de>

	* cfgexpand.cc (discover_nonconstant_array_refs_r): Force non-BLKmode
	VAR_DECLs referenced in BLKmode VIEW_CONVERT_EXPRs into memory.
	* expr.cc (expand_expr_real_1) <case VIEW_CONVERT_EXPR>: Do nothing
	but adjust_address also for BLKmode mode and MEM op0.

2024-01-19  Palmer Dabbelt  <palmer@rivosinc.com>

	* common/config/riscv/riscv-common.cc: Add Zihpm and Zicnttr
	extensions.

2024-01-19  Kito Cheng  <kito.cheng@sifive.com>

	* doc/invoke.texi (RISC-V Options): Document the syntax of -march.

2024-01-19  Kito Cheng  <kito.cheng@sifive.com>

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::parse_std_ext): Remove.
	(riscv_subset_list::parse_multiletter_ext): Remove.
	* config/riscv/riscv-subset.h
	(riscv_subset_list::parse_std_ext): Remove.
	(riscv_subset_list::parse_multiletter_ext): Remove.

2024-01-19  Kito Cheng  <kito.cheng@sifive.com>

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::parse_single_std_ext): New parameter.
	(riscv_subset_list::parse_single_multiletter_ext): Ditto.
	(riscv_subset_list::parse_single_ext): Ditto.
	(riscv_subset_list::parse): Relax the order for the input of ISA
	string.
	* config/riscv/riscv-subset.h
	(riscv_subset_list::parse_single_std_ext): New parameter.
	(riscv_subset_list::parse_single_multiletter_ext): Ditto.
	(riscv_subset_list::parse_single_ext): Ditto.

2024-01-19  Kito Cheng  <kito.cheng@sifive.com>

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::parse_base_ext): New.
	(riscv_subset_list::parse): Extract part of logic into
	riscv_subset_list::parse_base_ext.
	* config/riscv/riscv-subset.h (riscv_subset_list::parse_base_ext):
	New.

2024-01-19  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv.cc (riscv_override_options_internal): Tweak
	sorry message.

2024-01-19  Kuan-Lin Chen  <rufus@andestech.com>

	* config/riscv/vector-crypto.md (UNSPEC_CLMUL): Rename to
	UNSPEC_CLMUL_VC.

2024-01-19  Sandra Loosemore  <sandra@codesourcery.com>

	PR c/110029
	* doc/extend.texi (Common Variable Attributes): Explain what
	happens when multiple variables with cleanups are in the same scope.

2024-01-18  Sandra Loosemore  <sandra@codesourcery.com>

	PR ipa/108470
	* doc/extend.texi (Common Function Attributes): Document that
	noinline also disables some interprocedural optimizations and
	improve flow to the part about using inline asm instead to
	disable calls from being optimized away completely.  Remove the
	sentence that says noipa is mainly for internal compiler testing.

2024-01-18  John David Anglin  <danglin@gcc.gnu.org>

	PR tree-optimization/69807
	* config/pa/pa.cc (pa_option_override): Set flag_pie on TARGET_64BIT.

2024-01-18  Brian Inglis  <Brian.Inglis@Shaw.ca>

	PR target/108521
	* doc/invoke.texi (Option Summary): Remove -mcygwin and -mno-cygwin
	from x86 Windows Options.

2024-01-18  Sandra Loosemore  <sandra@codesourcery.com>

	PR c/107942
	* doc/extend.texi (C Extensions): Add new section to menu.
	(Function Attributes):  Move dangling index entries to....
	(Const and Volatile Functions): New section.

2024-01-18  David Malcolm  <dmalcolm@redhat.com>

	PR middle-end/112684
	* toplev.cc (toplev::main): Don't ICE in
	-fdiagnostics-generate-patch when exiting after options,
	since no edit context will have been created.

2024-01-18  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (vectorizable_store): Do not pre-allocate
	operands vector.

2024-01-18  Iain Sandoe  <iain@sandoe.co.uk>

	* Makefile.in: Emit ENABLE_DARWIN_AT_RPATH into site.exp
	when ENABLE_DARWIN_AT_RPATH_TRUE is not '#'.

2024-01-18  Jun Sha (Joshua)  <cooper.joshua@linux.alibaba.com>
	    Jin Ma  <jinma@linux.alibaba.com>
	    Xianmiao Qu  <cooper.qu@linux.alibaba.com>
	    Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/thead.cc
	(th_asm_output_opcode): Rewrite some instructions.

2024-01-18  Jun Sha (Joshua)  <cooper.joshua@linux.alibaba.com>
	    Jin Ma  <jinma@linux.alibaba.com>
	    Xianmiao Qu  <cooper.qu@linux.alibaba.com>
	    Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv.md (none,thv,rvv): New attribute.
	(no,yes): Add an attribute to disable alternative
	for xtheadvector or RVV1.0.
	* config/riscv/vector.md:
	Disable alternatives that destination register overlaps
	source register group for xtheadvector.

2024-01-18  Jun Sha (Joshua)  <cooper.joshua@linux.alibaba.com>
	    Jin Ma  <jinma@linux.alibaba.com>
	    Xianmiao Qu  <cooper.qu@linux.alibaba.com>
	    Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv-vector-builtins-bases.cc
	(class th_loadstore_width): Define new builtin bases.
	(class th_extract): Define new builtin bases.
	(BASE): Define new builtin bases.
	* config/riscv/riscv-vector-builtins-bases.h:
	Define new builtin class.
	* config/riscv/riscv-vector-builtins-shapes.cc
	(struct th_loadstore_width_def): Define new builtin shapes.
	(struct th_indexed_loadstore_width_def):
	Define new builtin shapes.
	(struct th_extract_def): Define new builtin shapes.
	(SHAPE): Define new builtin shapes.
	* config/riscv/riscv-vector-builtins-shapes.h:
	Define new builtin shapes.
	* config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION):
	Redefine DEF_RVV_FUNCTION for XTheadVector special intrinsics.
	* config/riscv/riscv-vector-builtins.h
	(enum required_ext): Add new XTheadVector member.
	(struct function_group_info): Likewise.
	* config/riscv/t-riscv:
	Add thead-vector-builtins-functions.def
	* config/riscv/thead-vector.md
	(@pred_mov_width<vlmem_op_attr><mode>): Add new patterns.
	(*pred_mov_width<vlmem_op_attr><mode>): Likewise.
	(@pred_store_width<vlmem_op_attr><mode>): Likewise.
	(@pred_strided_load_width<vlmem_op_attr><mode>): Likewise.
	(@pred_strided_store_width<vlmem_op_attr><mode>): Likewise.
	(@pred_indexed_load_width<vlmem_op_attr><mode>): Likewise.
	(@pred_th_extract<mode>): Likewise.
	(*pred_th_extract<mode>): Likewise.
	* config/riscv/thead-vector-builtins-functions.def: New file.

2024-01-18  Jun Sha (Joshua)  <cooper.joshua@linux.alibaba.com>
	    Jin Ma  <jinma@linux.alibaba.com>
	    Xianmiao Qu  <cooper.qu@linux.alibaba.com>
	    Christoph Müllner  <christoph.muellner@vrull.eu>

	* config.gcc:  Add files for XTheadVector intrinsics.
	* config/riscv/autovec.md: Guard XTheadVector.
	* config/riscv/predicates.md: Disable immediate vl
	for XTheadVector.
	* config/riscv/riscv-c.cc (riscv_pragma_intrinsic):
	Add pragma for XTheadVector.
	* config/riscv/riscv-string.cc (riscv_expand_block_move):
	Guard XTheadVector.
	* config/riscv/riscv-v.cc (vls_mode_valid_p):
	Avoid autovec.
	* config/riscv/riscv-vector-builtins-bases.cc:
	Do not normalize vsetvl instructions for XTheadVector.
	* config/riscv/riscv-vector-builtins-shapes.cc (check_type):
	New check type function.
	(build_one): Adjust for XTheadVector.
	* config/riscv/riscv-vector-switch.def (ENTRY):
	Disable fractional mode for the XTheadVector extension.
	(TUPLE_ENTRY): Likewise.
	* config/riscv/riscv.cc (riscv_v_adjust_bytesize):
	Guard XTheadVector.
	(riscv_preferred_simd_mode): Likewsie.
	(riscv_autovectorize_vector_modes): Likewise.
	(riscv_vector_mode_supported_any_target_p): Likewise.
	(TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
	* config/riscv/thead.cc (th_asm_output_opcode):
	Rewrite vsetvl instructions.
	* config/riscv/vector.md:
	Include thead-vector.md and change fractional LMUL
	into 1 for vbool.
	* config/riscv/riscv_th_vector.h: New file.
	* config/riscv/thead-vector.md: New file.

2024-01-18  Jun Sha (Joshua)  <cooper.joshua@linux.alibaba.com>
	    Jin Ma  <jinma@linux.alibaba.com>
	    Xianmiao Qu  <cooper.qu@linux.alibaba.com>
	    Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/riscv-protos.h (riscv_asm_output_opcode):
	Add new function to add assembler insn code prefix/suffix.
	(th_asm_output_opcode):
	Add Thead function to add assembler insn code prefix/suffix.
	* config/riscv/riscv.cc (riscv_asm_output_opcode):
	Implement function to add assembler insn code prefix/suffix.
	* config/riscv/riscv.h (ASM_OUTPUT_OPCODE):
	Add new function to add assembler insn code prefix/suffix.
	* config/riscv/thead.cc (th_asm_output_opcode):
	Implement Thead function to add assembler insn code
	prefix/suffix.

2024-01-18  Jun Sha (Joshua)  <cooper.joshua@linux.alibaba.com>
	    Jin Ma  <jinma@linux.alibaba.com>
	    Xianmiao Qu  <cooper.qu@linux.alibaba.com>
	    Christoph Müllner  <christoph.muellner@vrull.eu>

	* common/config/riscv/riscv-common.cc
	(riscv_subset_list::parse): Add new vendor extension.
	* config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
	Add test marco.
	* config/riscv/riscv.opt:  Add new mask.

2024-01-18  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.h (DARWIN_RPATH_SPEC): Arrange for the %P spec
	to be conditional on macosx-version-min.

2024-01-18  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.cc (darwin_objc1_section): Use the correct
	meta-data version for constant strings.
	(machopic_select_section): Assert if we fail to handle CFString
	sections as Obejctive-C meta-data or drectly.

2024-01-18  Iain Sandoe  <iain@sandoe.co.uk>

	* lto-section-names.h (OFFLOAD_SECTION_NAME_PREFIX,
	OFFLOAD_VAR_TABLE_SECTION_NAME, OFFLOAD_FUNC_TABLE_SECTION_NAME,
	OFFLOAD_IND_FUNC_TABLE_SECTION_NAME): Provide Mach-O syntax
	versions when the object format is Mach-O.

2024-01-18  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/105522
	* config/darwin.cc (machopic_select_section): Handle C and C++
	CFStrings.
	(darwin_rename_builtins): Move this out of the CFString code.
	(darwin_libc_has_function): Likewise.
	(darwin_build_constant_cfstring): Create an anonymous var to
	hold each CFString.
	* config/darwin.h (ASM_OUTPUT_LABELREF): Handle constant
	CFstrings.

2024-01-18  Maxim Kuvyrkov  <maxim.kuvyrkov@linaro.org>

	PR bootstrap/113445
	* haifa-sched.cc (dep_list_size): Make global.
	* sched-deps.cc (find_inc): Use instead of sd_lists_size().
	* sched-int.h (dep_list_size): Declare.

2024-01-18  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/110422
	* tree-sra.cc (scan_function): Disqualify bases of operands of asm
	gotos.

2024-01-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113475
	* gimple-range-phi.h (phi_analyzer::m_phi_groups): New.
	* gimple-range-phi.cc (phi_analyzer::phi_analyzer): Initialize.
	(phi_analyzer::~phi_analyzer): Deallocate and free collected
	phi_grous.
	(phi_analyzer::process_phi): Record allocated phi_groups.

2024-01-18  Richard Biener  <rguenther@suse.de>

	* tree-vect-stmts.cc (vectorizable_store): Do not allocate
	storage for gvec_oprnds elements.

2024-01-18  Richard Biener  <rguenther@suse.de>

	* tree-vect-loop.cc (vec_init_loop_exit_info): Adjust comment,
	prefer all later exits we can handle.
	(vect_analyze_loop_form): Free the allocated loop body.
	Adjust comments.

2024-01-18  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-log.cc: Tabify.

2024-01-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/autovec.md: Support vi variant.

2024-01-18  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-devices.cc: Tabify.

2024-01-18  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-c.cc: Tabify.

2024-01-18  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/driver-avr.cc: Tabify.

2024-01-18  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/gen-avr-mmcu-texi.cc: Tabify.

2024-01-18  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/gen-avr-mmcu-specs.cc: Tabify.

2024-01-18  Jakub Jelinek  <jakub@redhat.com>

	* config/riscv/riscv.opt (mshorten-memrefs, mrelax, mcsr-check,
	minline-strcmp, minline-strncmp, minline-strlen,
	-param=riscv-vector-abi): Remove Bool keywords.

2024-01-18  Jakub Jelinek  <jakub@redhat.com>

	PR target/113122
	* config/i386/i386.cc (x86_function_profiler): Add -masm=intel
	support.  Add missing space after , in emitted assembly in some
	cases.  Formatting fixes.

2024-01-18  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/loongarch.md (movsi_internal): Remove
	constraint z.

2024-01-18  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/gen-avr-mmcu-specs.cc (diagnose_rodata_in_ram): Fix typo
	in the diagnostic, and capitalize the device name.
	(print_mcu): Generate specs such that:
	<*check_rodata_in_ram>: New.
	<*cc1_misc>: Use check_rodata_in_ram instead of cc1_rodata_in_ram.
	<*link_misc>: Use check_rodata_in_ram instead of link_rodata_in_ram.
	<*cc1_rodata_in_ram, *link_rodata_in_ram>: Remove.

2024-01-18  Jakub Jelinek  <jakub@redhat.com>

	PR other/113399
	* common.opt (ffold-mem-offsets): Remove Target and Bool keywords, add
	Common and Optimization.

2024-01-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113431
	* tree-vect-data-refs.cc (vect_preserves_scalar_order_p):
	When there is an invariant load we might not preserve
	scalar order.

2024-01-18  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113374
	* tree-ssa-operands.h (SET_PHI_ARG_DEF_ON_EDGE): New.
	* tree-vect-loop.cc (move_early_exit_stmts): Update
	virtual LC PHIs.
	* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
	Refactor.  Preserve virtual LC PHIs on all exits.

2024-01-18  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch.cc (loongarch_split_symbol):
	Assign the '/u' attribute to the mem.

2024-01-18  Sandra Loosemore  <sandra@codesourcery.com>

	PR middle-end/110847
	* doc/invoke.texi (Option Summary): Document negative forms of
	-Wtsan and -Wxor-used-as-pow.
	(Warning Options): Likewise.

2024-01-18  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113429
	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::earliest_fuse_vsetvl_info): Fix bug.

2024-01-18  Sandra Loosemore  <sandra@codesourcery.com>

	* doc/extend.texi (Common Function Attributes): Re-alphabetize
	the table.
	(Common Variable Attributes): Likewise.
	(Common Type Attributes): Likewise.

2024-01-17  Sandra Loosemore  <sandra@codesourcery.com>

	PR middle-end/111659
	* doc/extend.texi (Common Variable Attributes): Fix long lines
	in documentation of strict_flex_array + other minor copy-editing.
	Add a cross-reference to -Wstrict-flex-arrays.
	* doc/invoke.texi (Option Summary): Fix whitespace in tables
	before -fstrict-flex-arrays and -Wstrict-flex-arrays.
	(C Dialect Options): Combine the docs for the two
	-fstrict-flex-arrays forms into a single entry.  Note this option
	is for C/C++ only.  Add a cross-reference to -Wstrict-flex-arrays.
	(Warning Options): Note -Wstrict-flex-arrays is for C/C++ only.
	Minor copy-editing.  Add cross references to the strict_flex_array
	attribute and -fstrict-flex-arrays option.  Add note that this
	option depends on -ftree-vrp.

2024-01-17  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/113221
	* config/aarch64/predicates.md (aarch64_ldp_reg_operand): For subreg,
	only allow REG operands instead of allowing all.

2024-01-17  Vineet Gupta  <vineetg@rivosinc.com>

	* config/riscv/riscv-vsetvl.cc (earliest_fuse_vsetvl_info):
	Remove redundant checks in else condition for readablity.
	(earliest_fuse_vsetvl_info) Print iteration count in debug
	prints.
	(earliest_fuse_vsetvl_info) Fix misleading vsetvl info
	dump details in certain cases.

2024-01-17  Vineet Gupta  <vineetg@rivosinc.com>

	* config/riscv/riscv.opt: New -param=vsetvl-strategy.
	* config/riscv/riscv-opts.h: New enum vsetvl_strategy_enum.
	* config/riscv/riscv-vsetvl.cc
	(pre_vsetvl::pre_global_vsetvl_info): Use vsetvl_strategy.
	(pass_vsetvl::execute): Use vsetvl_strategy.

2024-01-17  Jan Hubicka  <jh@suse.cz>

	* ipa-polymorphic-call.cc (ipa_polymorphic_call_context::set_by_invariant): Remove
	accidental hack reseting offset.

2024-01-17  Jan Hubicka  <jh@suse.cz>

	* config/i386/i386-options.cc (ix86_option_override_internal): Fix
	handling of X86_TUNE_AVOID_512FMA_CHAINS.

2024-01-17  Jan Hubicka  <jh@suse.cz>
	    Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/110852
	* predict.cc (expr_expected_value_1): Fix profile merging of PHI and
	binary operations
	(get_predictor_value): Handle PRED_COMBINED_VALUE_PREDICTIONS and
	PRED_COMBINED_VALUE_PREDICTIONS_PHI
	* predict.def (PRED_COMBINED_VALUE_PREDICTIONS): New predictor.
	(PRED_COMBINED_VALUE_PREDICTIONS_PHI): New predictor.

2024-01-17  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113421
	* gimple-lower-bitint.cc (stmt_needs_operand_addr): Adjust function
	comment.
	(bitint_dom_walker::before_dom_children): Add g temporary to simplify
	formatting.  Start at vop rather than cvop even if stmt is a store
	and needs_operand_addr.

2024-01-17  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113410
	* gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
	If access_nelts is integral with larger precision than sizetype,
	fold_convert it to sizetype.

2024-01-17  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113408
	* gimple-lower-bitint.cc (bitint_large_huge::handle_stmt): For
	VIEW_CONVERT_EXPR, pass TREE_OPERAND (rhs1, 0) rather than rhs1
	to handle_cast.

2024-01-17  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113406
	* ipa-strub.cc (pass_ipa_strub::execute): Check aggregate_value_p
	regardless of whether is_gimple_reg_type (restype) or not.

2024-01-17  Jakub Jelinek  <jakub@redhat.com>

	* tree-into-ssa.cc (pass_build_ssa::gate): Fix comment typo,
	funcions -> functions, and use were instead of was.
	* gengtype.cc (dump_typekind): Fix comment typos, funcion -> function
	and guaranteee -> guarantee.
	* attribs.h (struct attr_access): Fix comment typo funcion -> function.

2024-01-17  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113409
	* omp-general.cc (omp_adjust_for_condition): Handle BITINT_TYPE like
	INTEGER_TYPE.
	(omp_extract_for_data): Use build_bitint_type rather than
	build_nonstandard_integer_type if either iter_type or loop->v type
	is BITINT_TYPE.
	* omp-expand.cc (expand_omp_for_generic,
	expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Handle
	BITINT_TYPE like INTEGER_TYPE.

2024-01-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113371
	* tree-vect-data-refs.cc (vect_enhance_data_refs_alignment):
	Do not peel when LOOP_VINFO_EARLY_BREAKS_VECT_PEELED.
	* tree-vect-loop-manip.cc (vect_do_peeling): Assert we do
	not perform prologue peeling when LOOP_VINFO_EARLY_BREAKS_VECT_PEELED.

2024-01-17  Maxim Kuvyrkov  <maxim.kuvyrkov@linaro.org>

	PR rtl-optimization/96388
	PR rtl-optimization/111554
	* sched-deps.cc (find_inc): Avoid exponential behavior.

2024-01-17  Sandra Loosemore  <sandra@codesourcery.com>

	PR c/111693
	* doc/invoke.texi (Option Summary): Move -Wuseless-cast
	from C++ Language Options to Warning Options.  Add entry for
	-Wuse-after-free.
	(C++ Dialect Options): Move -Wuse-after-free and -Wuseless-cast
	from here....
	(Warning Options): ...to here.  Minor copy-editing to fix typo
	and grammar.

2024-01-17  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips.cc (mips_compute_frame_info): If another
	register is used as global_pointer, mark $GP live false.

2024-01-17  Sandra Loosemore  <sandra@codesourcery.com>

	PR target/112973
	* doc/extend.texi (BPF Built-in Functions): Wrap long lines and
	give the section a light copy-editing pass.

2024-01-16  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	* config/aarch64/aarch64-cores.def (AARCH64_CORE): Add 'cobalt-100' CPU.
	* config/aarch64/aarch64-tune.md: Regenerated.
	* doc/invoke.texi (-mcpu): Add cobalt-100 core.

2024-01-16  Wilco Dijkstra  <wilco.dijkstra@arm.com>

	PR target/112573
	* config/aarch64/aarch64.cc (aarch64_legitimize_address): Reassociate
	badly formed CONST expressions.

2024-01-16  Daniel Cederman  <cederman@gaisler.com>

	* config/sparc/sparc.cc (next_active_non_empty_insn): Length 0 treated as empty

2024-01-16  Daniel Cederman  <cederman@gaisler.com>

	* config/sparc/sparc.cc (atomic_insn_for_leon3_p): Treat membar_storeload as atomic
	* config/sparc/sync.md (membar_storeload): Turn into named insn
	and add GR712RC errata workaround.
	(membar_v8): Add GR712RC errata workaround.

2024-01-16  Andreas Larsson  <andreas@gaisler.com>

	* config/sparc/sync.md (*membar_storeload_leon3): Remove
	(*membar_storeload): Enable for LEON

2024-01-16  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113372
	PR middle-end/90348
	PR middle-end/110115
	PR middle-end/111422
	* cfgexpand.cc (add_scope_conflicts_2): New function.
	(add_scope_conflicts_1): Use it.

2024-01-16  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-mcus.def (avr16eb14, avr16eb20, avr16eb28, avr16eb32)
	(avr16ea28, avr16ea32, avr16ea48, avr32ea28, avr32ea32, avr32ea48): Add.
	* doc/avr-mmcu.texi: Regenerate.

2024-01-16  Feng Xue  <fxue@os.amperecomputing.com>

	PR tree-optimization/113091
	* tree-vect-slp.cc (vect_slp_has_scalar_use): New function.
	(vect_bb_slp_mark_live_stmts): New parameter scalar_use_map, check
	scalar use with new function.
	(vect_bb_slp_mark_live_stmts): New function as entry to existing
	overriden functions with same name.
	(vect_slp_analyze_operations): Call new entry function to mark
	live statements.

2024-01-16  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113404
	* config/riscv/riscv.cc (riscv_override_options_internal): Report sorry
	for RVV in big-endian mode.

2024-01-16  Yanzhang Wang  <yanzhang.wang@intel.com>

	* config/riscv/riscv.cc (riscv_arg_has_vector): Delete.
	(riscv_pass_in_vector_p): Delete.
	(riscv_init_cumulative_args): Delete the checking.
	(riscv_get_arg_info): Delete the checking.
	(riscv_function_value): Delete the checking.
	* config/riscv/riscv.h: Delete the member for checking.

2024-01-15  Georg-Johann Lay  <avr@gjlay.de>

	* doc/invoke.texi (AVR Options) [-mskip-bug]: Add documentation.

2024-01-15  Liao Shihua  <shihua@iscas.ac.cn>

	* config.gcc: Include riscv_bitmanip.h.
	* config/riscv/bitmanip.md: Changed mode form X to GPR in orcb and clmul pattern.
	* config/riscv/crypto.md: Changed mode form X to GPR in brev8 pattern.
	* config/riscv/riscv-builtins.cc (AVAIL): Adding new bitmanip builtins.
	(RISCV_BUILTIN_NO_PREFIX): New helper macro.
	* config/riscv/riscv-cmo.def (RISCV_BUILTIN): Add '_32'/'_64' postfix to builtins.
	* config/riscv/riscv-ftypes.def (2): New ftypes.
	* config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): New builtins.
	(RISCV_BUILTIN_NO_PREFIX): Likewise.
	* config/riscv/riscv_bitmanip.h: New file.

2024-01-15  Liao Shihua  <shihua@iscas.ac.cn>

	* config.gcc: Include riscv_crypto.h.
	* config/riscv/riscv_crypto.h: New file.

2024-01-15  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR middle-end/113354
	* lra-constraints.cc (curr_insn_transform): Spill pseudo only used
	in the insn if the corresponding operand does not require hard
	register anymore.

2024-01-15  Georg-Johann Lay  <avr@gjlay.de>

	PR target/107201
	* config/avr/avr.h (EXTRA_SPEC_FUNCTIONS): Add no-devlib, avr_no_devlib.
	* config/avr/driver-avr.cc (avr_no_devlib): New function.
	(avr_devicespecs_file): Use it to remove -nodevicelib from the
	options for cores only.
	* config/avr/avr-arch.h (avr_get_parch): New prototype.
	* config/avr/avr-devices.cc (avr_get_parch): New function.

2024-01-15  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113247
	* config/riscv/riscv-protos.h (struct regmove_vector_cost): Add vector to scalar regmove.
	* config/riscv/riscv-vector-costs.cc (adjust_stmt_cost): Ditto.
	* config/riscv/riscv.cc (riscv_builtin_vectorization_cost): Adjust vec_construct cost.

2024-01-15  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113281
	* config/riscv/riscv-vector-costs.cc (costs::adjust_vect_cost_per_loop): New function.
	(costs::finish_cost): Adjust cost for LOOP LEN with NITERS < VF.
	* config/riscv/riscv-vector-costs.h: New function.

2024-01-15  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113385
	* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
	First redirect, then split the exit edge.

2024-01-15  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vector-costs.cc (costs::analyze_loop_vinfo):
	Remove m_num_vector_iterations.
	* config/riscv/riscv-vector-costs.h: Ditto.

2024-01-15  Andrew Pinski  <quic_apinski@quicinc.com>

	PR target/113156
	* config/avr/avr.opt (-mdouble, -mlong-double): Add "Save" flag.
	(-mbranch-cost): Set "Optimization" flag.

2024-01-15  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113370
	* gimple-lower-bitint.cc (bitint_large_huge::handle_operand): Only
	set rem to prec % (2 * limb_prec) if m_upwards_2limb, otherwise
	set it to just prec % limb_prec.

2024-01-15  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113393
	* config/riscv/vector.md: Fix ternary attributes.

2024-01-14  Georg-Johann Lay  <avr@gjlay.de>

	PR target/112944
	* configure.ac [target=avr]: Check availability of emulations
	avrxmega2_flmap and avrxmega4_flmap, resulting in new config vars
	HAVE_LD_AVR_AVRXMEGA2_FLMAP and HAVE_LD_AVR_AVRXMEGA4_FLMAP.
	* configure: Regenerate.
	* config.in: Regenerate.
	* doc/invoke.texi (AVR Options): Document -mflmap, -mrodata-in-ram,
	__AVR_HAVE_FLMAP__, __AVR_RODATA_IN_RAM__.
	* config/avr/avr.opt (-mflmap, -mrodata-in-ram): New options.
	* config/avr/avr-arch.h (enum avr_device_specific_features):
	Add AVR_ISA_FLMAP.
	* config/avr/avr-mcus.def (AVR_MCU) [avr64*, avr128*]: Set isa flag
	AVR_ISA_FLMAP.
	* config/avr/avr.cc (avr_arch_index, avr_has_rodata_p): New vars.
	(avr_set_core_architecture): Set avr_arch_index.
	(have_avrxmega2_flmap, have_avrxmega4_flmap)
	(have_avrxmega3_rodata_in_flash): Set new static const bool according
	to configure results.
	(avr_rodata_in_flash_p): New function using them.
	(avr_asm_init_sections): Let readonly_data_section->unnamed.callback
	track avr_need_copy_data_p only if not avr_rodata_in_flash_p().
	(avr_asm_named_section): Track avr_has_rodata_p.
	(avr_file_end): Emit __do_copy_data also when avr_has_rodata_p
	and not avr_rodata_in_flash_p ().
	* config/avr/specs.h (CC1_SPEC): Add %(cc1_rodata_in_ram).
	(LINK_SPEC): Add %(link_rodata_in_ram).
	(LINK_ARCH_SPEC): Remove.
	* config/avr/gen-avr-mmcu-specs.cc (have_avrxmega3_rodata_in_flash)
	(have_avrxmega2_flmap, have_avrxmega4_flmap): Set new static
	const bool according to configure results.
	(diagnose_mrodata_in_ram): New function.
	(print_mcu): Generate specs with the following changes:
	<*cc1_misc, *asm_misc, *link_misc>: New specs so that we don't
	need to extend avr/specs.h each time we add a new bell or whistle.
	<*cc1_rodata_in_ram, *link_rodata_in_ram>: New specs to diagnose
	-m[no-]rodata-in-ram.
	<*cpp_rodata_in_ram>: New. Does -D__AVR_RODATA_IN_RAM__=0/1.
	<*cpp_mcu>: Add -D__AVR_AVR_FLMAP__ if it applies.
	<*cpp>: Add %(cpp_rodata_in_ram).
	<*link_arch>: Use emulation avrxmega2_flmap, avrxmega4_flmap as
	requested.
	<*self_spec>: Add -mflmap or %<mflmap as needed.

2024-01-14  Jeff Law  <jlaw@ventanamicro.com>

	* config/mips/mips.md (ior<mode>3_mips16_asmacro): Use SImode,
	not the GPR iterator.  Adjust pattern name and mode attribute
	accordingly.

2024-01-13  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113361
	* gimple-lower-bitint.cc (bitint_large_huge::handle_operand_addr):
	Fix up determination of the type for > limb_prec constants.

2024-01-12  Georg-Johann Lay  <avr@gjlay.de>

	* doc/extend.texi (AVR Named Address Spaces, Limitations and Caveats):
	Add web-link to the avr-gcc wiki.

2024-01-12  Georg-Johann Lay  <avr@gjlay.de>

	* doc/extend.texi (AVR Variable Attributes) [address]: Remove
	documentation for a version without argument, which is not supported.

2024-01-12  Ezra Sitorus  <ezra.sitorus@arm.com>

	* config/arm/arm_neon.h
	(vld1_u8_x4, vld1_u16_x4, vld1_u32_x4, vld1_u64_x4): New.
	(vld1_s8_x4, vld1_s16_x4, vld1_s32_x4, vld1_s64_x4): New.
	(vld1_f16_x4, vld1_f32_x4): New.
	(vld1_p8_x4, vld1_p16_x4, vld1_p64_x4): New.
	(vld1_bf16_x4): New.
	(vld1q_types_x4): Updated to use vld1q_x4
	from arm_neon_builtins.def
	* config/arm/arm_neon_builtins.def
	(vld1_x4): Updated entries.
	(vld1q_x4): New entries, but comes from the old vld1_x4
	* config/arm/neon.md
	(neon_vld1q_x4<mode>): Updated from neon_vld1_x4<mode>.

2024-01-12  Ezra Sitorus  <ezra.sitorus@arm.com>

	* config/arm/arm_neon.h
	(vld1_u8_x3, vld1_u16_x3, vld1_u32_x3, vld1_u64_x3): New.
	(vld1_s8_x3, vld1_s16_x3, vld1_s32_x3, vld1_s64_x3): New.
	(vld1_f16_x3, vld1_f32_x3): New.
	(vld1_p8_x3, vld1_p16_x3, vld1_p64_x3): New.
	(vld1_bf16_x3): New.
	(vld1q_types_x3): Updated to use vld1q_x3 from
	arm_neon_builtins.def
	* config/arm/arm_neon_builtins.def
	(vld1_x3): Updated entries.
	(vld1q_x3): New entries, but comes from the old vld1_x2
	* config/arm/neon.md
	(neon_vld1q_x3<mode>): Updated from neon_vld1_x3<mode>.

2024-01-12  Ezra Sitorus  <ezra.sitorus@arm.com>

	* config/arm/arm_neon.h
	(vld1_u8_x2, vld1_u16_x2, vld1_u32_x2, vld1_u64_x2): New.
	(vld1_s8_x2, vld1_s16_x2, vld1_s32_x2, vld1_s64_x2): New.
	(vld1_f16_x2, vld1_f32_x2): New.
	(vld1_p8_x2, vld1_p16_x2, vld1_p64_x2): New.
	(vld1_bf16_x2): New.
	(vld1q_types_x2): Updated to use vld1q_x2 from
	arm_neon_builtins.def
	* config/arm/arm_neon_builtins.def
	(vld1_x2): Updated entries.
	(vld1q_x2): New entries, but comes from the old vld1_x2
	* config/arm/neon.md
	(neon_vld1<VMEMX2_q>_x2<VDQX:mode>): Updated from
	neon_vld1_x2<mode>.

2024-01-12  Ezra Sitorus  <ezra.sitorus@arm.com>

	* config/arm/arm_neon.h
	(vst1q_u8_x4, vst1q_u16_x4, vst1q_u32_x4, vst1q_u64_x4): New.
	(vst1q_s8_x4, vst1q_s16_x4, vst1q_s32_x4, vst1q_s64_x4): New.
	(vst1q_f16_x4, vst1q_f32_x4): New.
	(vst1q_p8_x4, vst1q_p16_x4, vst1q_p64_x4): New.
	(vst1q_bf16_x4): New.
	* config/arm/arm_neon_builtins.def (vst1q_x4): New entries.
	* config/arm/neon.md
	(neon_vst1q_x4<mode>): New.
	(neon_vst1x4qa<mode>, neon_vst1x4qb<mode>): New.
	* config/arm/unspecs.md
	(UNSPEC_VST1X4A, UNSPEC_VST1X4B): New.

2024-01-12  Ezra Sitorus  <ezra.sitorus@arm.com>

	* config/arm/arm_neon.h
	(vst1q_u8_x3, vst1q_u16_x3, vst1q_u32_x3, vst1q_u64_x3): New.
	(vst1q_s8_x3, vst1q_s16_x3, vst1q_s32_x3, vst1q_s64_x3): New.
	(vst1q_f16_x3, vst1q_f32_x3): New.
	(vst1q_p8_x3, vst1q_p16_x3, vst1q_p64_x3): New.
	(vst1q_bf16_x3): New.
	* config/arm/arm_neon_builtins.def (vst1q_x3): New entries.
	* config/arm/neon.md
	(neon_vst1q_x3<mode>): New.
	(neon_vld1x3qa<mode>, neon_vst1x3qb<mode>): New.
	* config/arm/unspecs.md
	(UNSPEC_VST1X3A, UNSPEC_VST1X3B): New.

2024-01-12  Ezra Sitorus  <ezra.sitorus@arm.com>

	* config/arm/arm_neon.h
	(vst1q_u8_x2, vst1q_u16_x2, vst1q_u32_x2, vst1q_u64_x2): New.
	(vst1q_s8_x2, vst1q_s16_x2, vst1q_s32_x2, vst1q_s64_x2): New.
	(vst1q_f16_x2, vst1q_f32_x2): New.
	(vst1q_p8_x2, vst1q_p16_x2, vst1q_p64_x2): New.
	(vst1q_bf16_x2): New.
	* config/arm/arm_neon_builtins.def (vst1<_x2): New entries.
	* config/arm/neon.md
	(neon_vst1<VMEMX2_q>_x2<VDQX:mode>): Updated from
	neon_vst1_x2<mode>.
	* config/arm/iterators.md
	(VMEMX2): New mode iterator.
	(VMEMX2_q): New mode attribute.

2024-01-12  Ezra Sitorus  <ezra.sitorus@arm.com>

	* config/arm/arm_neon.h
	(vst1_u8_x4, vst1_u16_x4, vst1_u32_x4, vst1_u64_x4): New.
	(vst1_s8_x4, vst1_s16_x4, vst1_s32_x4, vst1_s64_x4): New.
	(vst1_f16_x4, vst1_f32_x4): New.
	(vst1_p8_x4, vst1_p16_x4, vst1_p64_x4): New.
	(vst1_bf16_x4): New.
	* config/arm/arm_neon_builtins.def (vst1_x4): New entries.
	* config/arm/neon.md (vst1_x4<mode>): New.

2024-01-12  Ezra Sitorus  <ezra.sitorus@arm.com>

	* config/arm/arm_neon.h
	(vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New.
	(vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New.
	(vst1_f16_x3, vst1_f32_x3): New.
	(vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New.
	(vst1_bf16_x3): New.
	* config/arm/arm_neon_builtins.def (vst1_x3): New entries.
	* config/arm/neon.md (vst1_x3<mode>): New.

2024-01-12  Ezra Sitorus  <ezra.sitorus@arm.com>

	* config/arm/arm_neon.h
	(vst1_u8_x2, vst1_u16_x2, vst1_u32_x2, vst1_u64_x2): New.
	(vst1_s8_x2, vst1_s16_x2, vst1_s32_x2, vst1_s64_x2): New.
	(vst1_f16_x2, vst1_f32_x2): New.
	(vst1_p8_x2, vst1_p16_x2, vst1_p64_x2): New.
	(vst1_bf16_x2): New.
	* config/arm/arm_neon_builtins.def (vst1_x2): New entries.
	* config/arm/neon.md (vst1_x2<mode>): New.

2024-01-12  Ezra Sitorus  <ezra.sitorus@arm.com>

	* config/arm/arm_neon.h
	(vld1q_u8_x4, vld1q_u16_x4, vld1q_u32_x4, vld1q_u64_x4): New.
	(vld1q_s8_x4, vld1q_s16_x4, vld1q_s32_x4, vld1q_s64_x4): New.
	(vld1q_f16_x4, vld1q_f32_x4): New.
	(vld1q_p8_x4, vld1q_p16_x4, vld1q_p64_x4): New.
	(vld1q_bf16_x4): New.
	* config/arm/arm_neon_builtins.def (vld1_x4): New entries.
	* config/arm/neon.md
	(neon_vld1_x4<mode>): New.
	(neon_vld1x4qa<mode>, neon_vld1x4qb<mode>): New
	* config/arm/unspecs.md
	(UNSPEC_VLD1X4A, UNSPEC_VLD1X4B): New.

2024-01-12  Ezra Sitorus  <ezra.sitorus@arm.com>

	* config/arm/arm_neon.h
	(vld1q_u8_x3, vld1q_u16_x3, vld1q_u32_x3, vld1q_u64_x3): New.
	(vld1q_s8_x3, vld1q_s16_x3, vld1q_s32_x3, vld1q_s64_x3): New.
	(vld1q_f16_x3, vld1q_f32_x3): New.
	(vld1q_p8_x3, vld1q_p16_x3, vld1q_p64_x3): New.
	(vld1q_bf16_x3): New.
	* config/arm/arm_neon_builtins.def (vld1_x3): New entries.
	* config/arm/neon.md
	(neon_vld1_x3<mode>): New.
	(neon_vld1x3qa<mode>, neon_vld1x3qb<mode>): New.
	* config/arm/unspecs.md
	(UNSPEC_VLD1X3A, UNSPEC_VLD1X3B): New.

2024-01-12  Ezra Sitorus  <ezra.sitorus@arm.com>

	* config/arm/arm_neon.h
	(vld1q_u8_x2, vld1q_u16_x2, vld1q_u32_x2, vld1q_u64_x2): New.
	(vld1q_s8_x2, vld1q_s16_x2, vld1q_s32_x2, vld1q_s64_x2): New.
	(vld1q_f16_x2, vld1q_f32_x2): New.
	(vld1q_p8_x2, vld1q_p16_x2, vld1q_p64_x2): New.
	(vld1q_bf16_x2): New.
	* config/arm/arm_neon_builtins.def (vld1_x2): New entries.
	* config/arm/neon.md (vld1_x2<mode>): New.

2024-01-12  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113287
	* doc/sourcebuild.texi (check_effective_target_bitint65535): New.

2024-01-12  Tamar Christina  <tamar.christina@arm.com>

	* tree-vect-loop-manip.cc (vect_loop_versioning): Replace single_exit.
	* tree-vect-loop.cc (vect_transform_loop): Likewise.

2024-01-12  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113178
	* tree-vect-loop.cc (vect_create_epilog_for_reduction): Fill in all
	alternate exits.

2024-01-12  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113237
	* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use
	existing LCSSA variable for exit when all exits are early break.

2024-01-12  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113137
	PR tree-optimization/113136
	PR tree-optimization/113172
	PR tree-optimization/113178
	* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
	Maintain PHIs on inverted loops.
	(vect_do_peeling): Maintain virtual PHIs on inverted loops.
	* tree-vect-loop.cc (vec_init_loop_exit_info): Pick exit closes to
	latch.
	(vect_create_loop_vinfo): Record all conds instead of only alt ones.

2024-01-12  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113135
	* tree-vect-data-refs.cc (vect_analyze_early_break_dependences): Rework
	dependency analysis.

2024-01-12  Iain Sandoe  <iain@sandoe.co.uk>

	* config/rs6000/host-darwin.cc (segv_handler): Use the revised
	diagnostics class member name for abort of error.

2024-01-12  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr.cc (avr_handle_addr_attribute): Move "..." from
	format string to %s argument.

2024-01-12  John David Anglin  <danglin@gcc.gnu.org>
	    Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/113182
	* varasm.cc (process_pending_assemble_externals,
	assemble_external_libcall): Use targetm.strip_name_encoding
	before calling get_identifier.

2024-01-12  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113196
	* config/aarch64/aarch64.h (machine_function::advsimd_zero_insn):
	New member variable.
	* config/aarch64/aarch64-protos.h (aarch64_split_simd_shift_p):
	Declare.
	* config/aarch64/iterators.md (Vnarrowq2): New mode attribute.
	* config/aarch64/aarch64-simd.md
	(vec_unpacku_hi_<mode>, vec_unpacks_hi_<mode>): Recombine into...
	(vec_unpack<su>_hi_<mode>): ...this.  Move the generation of
	zip2 for zero-extends to...
	(aarch64_simd_vec_unpack<su>_hi_<mode>): ...a split of this
	instruction.  Fix big-endian handling.
	(vec_unpacku_lo_<mode>, vec_unpacks_lo_<mode>): Recombine into...
	(vec_unpack<su>_lo_<mode>): ...this.  Move the generation of
	zip1 for zero-extends to...
	(<optab><Vnarrowq><mode>2): ...a split of this instruction.
	Fix big-endian handling.
	(*aarch64_zip1_uxtl): New pattern.
	(aarch64_usubw<mode>_lo_zip, aarch64_uaddw<mode>_lo_zip): Delete
	(aarch64_usubw<mode>_hi_zip, aarch64_uaddw<mode>_hi_zip): Likewise.
	* config/aarch64/aarch64.cc (aarch64_get_shareable_reg): New function.
	(aarch64_gen_shareable_zero): Use it.
	(aarch64_split_simd_shift_p): New function.

2024-01-12  Richard Sandiford  <richard.sandiford@arm.com>

	* emit-rtl.h (rtl_data::x_function_beg_note): New member variable.
	(function_beg_insn): New macro.
	* function.cc (expand_function_start): Initialize function_beg_insn.

2024-01-12  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/112989
	* config/aarch64/aarch64-sve-builtins.h
	(function_builder::m_overload_names): Replace with...
	* config/aarch64/aarch64-sve-builtins.cc (overload_names): ...this
	new global.
	(add_overloaded_function): Update accordingly, using get_identifier
	to get a GGC-friendly record of the name.

2024-01-12  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/112989
	* config/aarch64/aarch64-sve-builtins.def: Don't include
	aarch64-sve-builtins-sme.def.
	(DEF_SME_ZA_FUNCTION_GS, DEF_SME_ZA_FUNCTION): Move to...
	* config/aarch64/aarch64-sve-builtins-sme.def: ...here.
	(DEF_SME_FUNCTION): New macro.  Use it and DEF_SME_FUNCTION_GS
	instead of DEF_SVE_*.  Add AARCH64_FL_SME to anything that
	requires AARCH64_FL_SME2.
	* config/aarch64/aarch64-sve-builtins-sve2.def: Make same
	AARCH64_FL_SME adjustment here.
	* config/aarch64/aarch64-sve-builtins.cc (function_groups): Don't
	include SME intrinsics.
	(sme_function_groups): New array.
	(handle_arm_sve_h): Remove check for AARCH64_FL_SME.
	(handle_arm_sme_h): Use sme_function_groups instead of function_groups.

2024-01-12  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113281
	* config/riscv/riscv-protos.h (struct regmove_vector_cost): New struct.
	(struct cpu_vector_cost): Add regmove struct.
	(get_vector_costs): Export as global.
	* config/riscv/riscv-vector-costs.cc (adjust_stmt_cost): Adjust scalar_to_vec cost.
	(costs::add_stmt_cost): Ditto.
	* config/riscv/riscv.cc (get_common_costs): Export global function.

2024-01-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113334
	* gimple-lower-bitint.cc (bitint_large_huge::handle_operand): Use
	wi::neg_p (wi::to_wide (op)) instead of tree_int_cst_sgn (op) < 0
	to determine if number should be extended by all ones rather than zero
	extended.

2024-01-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113330
	* tree-sra.cc (create_access): Punt for BITINT_TYPE accesses with
	too large size.

2024-01-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113323
	* gimple-lower-bitint.cc (bitint_dom_walker::before_dom_children): Fix
	check for lhs being large/huge _BitInt not in m_names.

2024-01-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113316
	* gimple-lower-bitint.cc (bitint_large_huge::lower_call): Handle
	uninitialized large/huge _BitInt arguments to calls.

2024-01-12  Jakub Jelinek  <jakub@redhat.com>

	* gimple-lower-bitint.cc (mergeable_op): Instead of comparing
	TYPE_SIZE (t) of large/huge BITINT_TYPEs, compare
	CEIL (TYPE_PRECISION (t), limb_prec).
	(bitint_large_huge::handle_cast): Likewise.

2024-01-12  Ilya Leoshkevich  <iii@linux.ibm.com>

	PR sanitizer/113284
	* config/rs6000/rs6000.cc (rs6000_elf_declare_function_name):
	Use assemble_function_label_final () for Power ELF V1 ABI.
	* output.h (assemble_function_label_final): New function.
	* varasm.cc (assemble_function_label_raw): Use
	assemble_function_label_final ().
	(assemble_function_label_final): New function.

2024-01-12  Richard Biener  <rguenther@suse.de>

	PR middle-end/113344
	* match.pd ((double)float CMP (double)float -> float CMP float):
	Perform result type check only for vectors.
	* fold-const.cc (fold_binary_loc): Likewise.

2024-01-12  Haochen Jiang  <haochen.jiang@intel.com>

	* config/i386/sse.md (sdot_prod<mode>): Remove redundant SET.
	(usdot_prod<mode>): Ditto.
	(sdot_prod<mode>): Ditto.
	(udot_prod<mode>): Ditto.

2024-01-12  Haochen Jiang  <haochen.jiang@intel.com>

	PR target/113288
	* config/i386/i386-c.cc (ix86_target_macros_internal):
	Add __AVX10_1__, __AVX10_1_256__ and __AVX10_1_512__.

2024-01-12  Richard Biener  <rguenther@suse.de>

	PR target/112280
	* config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
	Do not generate code when d.testing_p.

2024-01-12  liuhongt  <hongtao.liu@intel.com>

	PR target/113039
	* doc/invoke.texi (fcf-protection=): Update documents.

2024-01-12  Pan Li  <pan2.li@intel.com>

	* config/riscv/riscv.cc (riscv_v_ext_mode_p): Update the
	comments of predicate func riscv_v_ext_mode_p.

2024-01-12  Feng Wang  <wangfeng@eswincomputing.com>

	* config/riscv/riscv-vector-builtins.def (vfloat16m8_t):
			Modify ABI-name length of vfloat16m8_t

2024-01-12  Li Wei  <liwei@loongson.cn>

	* config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
	Adjust.

2024-01-12  Li Wei  <liwei@loongson.cn>

	* config/loongarch/loongarch.md (add<mode>3): Removed.
	(*addsi3): New.
	(addsi3): Ditto.
	(adddi3): Ditto.
	(*addsi3_extended): Removed.
	(addsi3_extended): New.

2024-01-11  Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/thead.md: Add limits for splits.

2024-01-11  Andrew Pinski  <quic_apinski@quicinc.com>

	PR middle-end/113322
	* expr.cc (do_store_flag): Don't try single bit tests with
	comparison on vector types.

2024-01-11  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/113301
	* match.pd (`1/x`): Delay signed case until late.

2024-01-11  Georg-Johann Lay  <avr@gjlay.de>

	* doc/invoke.texi (AVR Options): Move -mrmw, -mn-flash, -mshort-calls
	and -msp8 to...
	(AVR Internal Options): ...this new @subsubsection.

2024-01-11  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/112918
	* lra-constraints.cc (SMALL_REGISTER_CLASS_P): Move before in_class_p.
	(in_class_p): Restrict condition for narrowing class in case of
	allow_all_reload_class_changes_p.
	(process_alt_operands): Try to match operand without and with
	narrowing reg class.  Discourage narrowing the class.  Finish insn
	matching only if there is no class narrowing.
	(curr_insn_transform): Pass true to in_class_p for reg operand win.

2024-01-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/112505
	* tree-vect-loop.cc (vectorizable_induction): Reject
	bit-precision induction.

2024-01-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113126
	* match.pd ((double)float CMP (double)float -> float CMP float):
	Make sure the boolean type is the same.
	* fold-const.cc (fold_binary_loc): Likewise.

2024-01-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/112636
	* tree-ssa-loop-ch.cc (ch_base::copy_headers): Call
	estimate_numbers_of_iterations before querying
	get_max_loop_iterations_int.
	(pass_ch::execute): Initialize SCEV and loops appropriately.

2024-01-11  Georg-Johann Lay  <avr@gjlay.de>

	* config/avr/avr-devices.cc (avr_texinfo): Adjust documentation for
	Reduced Tiny.
	* config/avr/gen-avr-mmcu-texi.cc (main): Add @anchor for each core.
	* doc/extend.texi (AVR Variable Attributes): Improve documentation
	of io, io_low and address attributes.
	* doc/invoke.texi (AVR Options): Add some anchors for external refs.
	* doc/avr-mmcu.texi: Rebuild.

2024-01-11  Yang Yujie  <yangyujie@loongson.cn>

	PR target/113233
	* config/loongarch/genopts/loongarch.opt.in: Mark options with
	the "Save" property.
	* config/loongarch/loongarch.opt: Same.
	* config/loongarch/loongarch-opts.cc: Refresh -mcmodel= state
	according to la_target.
	* config/loongarch/loongarch.cc: Implement TARGET_OPTION_{SAVE,
	RESTORE} for the la_target structure; Rename option conditions
	to have the same "la_" prefix.
	* config/loongarch/loongarch.h: Same.

2024-01-11  Pan Li  <pan2.li@intel.com>

	* loop-unroll.cc (insert_var_expansion_initialization): Leverage
	MODE_HAS_SIGNED_ZEROS for expansion variable initialization.

2024-01-11  Alex Coplan  <alex.coplan@arm.com>

	PR target/113077
	* config/aarch64/aarch64-ldp-fusion.cc (filter_notes): Add
	fr_expr param to extract REG_FRAME_RELATED_EXPR notes.
	(combine_reg_notes): Handle REG_FRAME_RELATED_EXPR notes, and
	synthesize these if needed.  Update caller ...
	(ldp_bb_info::fuse_pair): ... here.
	(ldp_bb_info::try_fuse_pair): Punt if either insn has writeback
	and either insn is frame-related.
	(find_trailing_add): Punt on frame-related insns.
	* config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
	REG_FRAME_RELATED_EXPR instead of REG_CFA_OFFSET.

2024-01-11  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips.cc (mips_start_function_definition):
	Add ATTRIBUTE_UNUSED.

2024-01-11  Richard Biener  <rguenther@suse.de>

	PR middle-end/112740
	* expr.cc (store_constructor): Check the integer vector
	mask has a single bit per element before using sign-extension
	to expand an uniform vector.

2024-01-11  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vector-costs.cc (costs::better_main_loop_than_p): VLA
	preempt VLS on unknown NITERS loop.

2024-01-11  Haochen Jiang  <haochen.jiang@intel.com>

	* doc/invoke.texi: Add -mevex512.

2024-01-11  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/loongarch.md (one_cmpl<mode>2): Replace GPR with X.
	(*nor<mode>3): Likewise.
	(nor<mode>3): Likewise.
	(*negsi2_extended): New template.
	(*<optab>si3_internal): Likewise.
	(*one_cmplsi2_internal): Likewise.
	(*norsi3_internal): Likewise.
	(*<optab>nsi_internal): Likewise.
	(bytepick_w_<bytepick_imm>_extend): Modify this template according to the
	modified bit operation to make the optimization work.

2024-01-11  liuhongt  <hongtao.liu@intel.com>

	PR target/104401
	* match.pd (VEC_COND_EXPR: A < B ? A : B -> MIN_EXPR): New patten match.

2024-01-10  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv.cc (get_common_costs): Switch RVV cost model.
	(get_vector_costs): Ditto.
	(riscv_builtin_vectorization_cost): Ditto.

2024-01-10  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vector-costs.cc (costs::better_main_loop_than_p): Minior tweak.

2024-01-10  Antoni Boucher  <bouanto@zoho.com>

	PR jit/111396
	* ipa-fnsummary.cc (ipa_fnsummary_cc_finalize): Call
	ipa_free_size_summary.
	* ipa-icf.cc (ipa_icf_cc_finalize): New function.
	* ipa-profile.cc (ipa_profile_cc_finalize): New function.
	* ipa-prop.cc (ipa_prop_cc_finalize): New function.
	* ipa-prop.h (ipa_prop_cc_finalize): New function.
	* ipa-sra.cc (ipa_sra_cc_finalize): New function.
	* ipa-utils.h (ipa_profile_cc_finalize, ipa_icf_cc_finalize,
	ipa_sra_cc_finalize): New functions.
	* toplev.cc (toplev::finalize): Call ipa_icf_cc_finalize,
	ipa_prop_cc_finalize, ipa_profile_cc_finalize and
	ipa_sra_cc_finalize
	Include ipa-utils.h.

2024-01-10  Jin Ma  <jinma@linux.alibaba.com>

	* config/riscv/riscv-protos.h (th_int_get_mask): New prototype.
	(th_int_get_save_adjustment): Likewise.
	(th_int_adjust_cfi_prologue): Likewise.
	* config/riscv/riscv.cc (BITSET_P): Moved away from here.
	(TH_INT_INTERRUPT): New macro.
	(riscv_expand_prologue): Add the processing of XTheadInt.
	(riscv_expand_epilogue): Likewise.
	* config/riscv/riscv.h (BITSET_P): Moved to here.
	* config/riscv/riscv.md: New unspec.
	* config/riscv/thead.cc (th_int_get_mask): New function.
	(th_int_get_save_adjustment): Likewise.
	(th_int_adjust_cfi_prologue): Likewise.
	* config/riscv/thead.md (th_int_push): New pattern.
	(th_int_pop): new pattern.

2024-01-10  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/112468
	* doc/sourcebuild.texi: Document ifn_copysign.
	* match.pd: Only apply transformation if target supports the IFN.

2024-01-10  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/112581
	* gimple-if-to-switch.cc (pass_if_to_switch::execute): Call
	mark_ssa_maybe_undefs.
	* tree-ssa-reassoc.cc (can_reassociate_op_p): Uninitialized
	variables can not be reassociated.
	(init_range_entry): Check for uninitialized variables too.
	(init_reassoc): Call mark_ssa_maybe_undefs.

2024-01-10  Maciej W. Rozycki  <macro@embecosm.com>

	* config/riscv/riscv.cc (riscv_noce_conversion_profitable_p):
	Also handle sign extension.

2024-01-10  Alex Coplan  <alex.coplan@arm.com>

	* config/aarch64/aarch64.opt (-mearly-ldp-fusion): Set default
	to 0.
	(-mlate-ldp-fusion): Likewise.

2024-01-10  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113287
	* tree-vect-stmts.cc (vectorizable_early_exit): Check the flags on edge
	instead of using BRANCH_EDGE to determine true edge.

2024-01-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113078
	* tree-vect-loop.cc (check_reduction_path): Canonicalize
	.COND_SUB to .COND_ADD.

2024-01-10  David Malcolm  <dmalcolm@redhat.com>

	* gcc-urlifier.cc (gcc_urlifier::get_url_suffix_for_option):
	Handle prefix mappings before calling find_opt.
	(selftest::gcc_urlifier_cc_tests): Add example of urlifying a
	"-fno-"-prefixed command-line option.
	* opts-common.cc (get_option_prefix_remapping): New.
	* opts.h (get_option_prefix_remapping): New decl.

2024-01-10  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic.cc (diagnostic_context::report_diagnostic): Pass
	m_urlifier to pp_output_formatted_text.
	* pretty-print.cc: Add #define of INCLUDE_VECTOR.
	(obstack_append_string): New overload, taking a length.
	(urlify_quoted_string): Pass in an obstack ptr, rather than using
	that of the pp's buffer.  Generalize to handle trailing text in
	the buffer beyond the run of quoted text.
	(class quoting_info): New.
	(on_begin_quote): New.
	(on_end_quote): New.
	(pp_format): Refactor phase 1 and phase 2 quoting support, moving
	it to calls to on_begin_quote and on_end_quote.
	(struct auto_obstack): New.
	(quoting_info::handle_phase_3): New.
	(pp_output_formatted_text): Add urlifier param.  Use it if there
	is deferred urlification.  Delete m_quotes.
	(selftest::pp_printf_with_urlifier): Pass urlifier to
	pp_output_formatted_text.
	(selftest::test_urlification): Update results for the existing
	case of quoted text stradding chunks; add more such test cases.
	* pretty-print.h (class quoting_info): New forward decl.
	(chunk_info::m_quotes): New field.
	(pp_output_formatted_text): Add optional urlifier param.

2024-01-10  David Malcolm  <dmalcolm@redhat.com>

	* pretty-print.cc (selftest::test_pp_format): Add selftest
	coverage for numbered args.

2024-01-10  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113144
	PR tree-optimization/113145
	* tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
	Update all BB that the original exits dominated.

2024-01-10  Eric Botcazou  <ebotcazou@adacore.com>

	* dwarf2out.cc (modified_type_die): Extend the support of reverse
	storage order to enumeration types if -gstrict-dwarf is not passed.
	(gen_enumeration_type_die): Add REVERSE parameter and generate the
	DIE immediately after the existing one if it is true.
	(gen_tagged_type_die): Add REVERSE parameter and pass it in the
	call to gen_enumeration_type_die.
	(gen_type_die_with_usage): Add REVERSE parameter and pass it in the
	first recursive call as well as the call to gen_tagged_type_die.
	(gen_type_die): Add REVERSE parameter and pass it in the call to
	gen_type_die_with_usage.

2024-01-10  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113120
	* tree-sra.cc (analyze_access_subtree): For BITINT_TYPE
	with root->size TYPE_PRECISION don't build anything new.
	Otherwise, if root->type is a BITINT_TYPE, use build_bitint_type
	rather than build_nonstandard_integer_type.

2024-01-10  Hongyu Wang  <hongyu.wang@intel.com>

	* config/i386/i386.opt: Adjust document.
	* doc/invoke.texi: Add description for
	-mapx-inline-asm-use-gpr32.

2024-01-10  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor): Remove.
	(avg<v_double_trunc>3_floor): New pattern.
	(<u>avg<v_double_trunc>3_ceil): Remove.
	(avg<v_double_trunc>3_ceil): New pattern.
	(uavg<mode>3_floor): Ditto.
	(uavg<mode>3_ceil): Ditto.
	* config/riscv/riscv-protos.h (enum insn_flags): Add for average addition.
	(enum insn_type): Ditto.
	* config/riscv/riscv-v.cc: Ditto.
	* config/riscv/vector-iterators.md (ashiftrt): Remove.
	(ASHIFTRT): Ditto.
	* config/riscv/vector.md: Add VLS modes.

2024-01-10  Kewen Lin  <linkw@linux.ibm.com>

	PR target/111480
	* config/rs6000/vsx.md (VCZLSBB): New int iterator.
	(vczlsbb_char): New int attribute.
	(vclzlsbb_<mode>, vctzlsbb_<mode>): Merge to ...
	(vc<vczlsbb_char>zlsbb_<mode>): ... this.
	(*vctzlsbb_zext_<mode>): Rename to ...
	(*vc<vczlsbb_char>zlsbb_zext_<mode>): ... this, and extend it to
	cover vclzlsbb.

2024-01-10  Kewen Lin  <linkw@linux.ibm.com>

	PR target/112606
	* config/rs6000/rs6000.md (copysign<mode>3 IEEE128): Change predicate
	of the last argument from altivec_register_operand to any_operand.  If
	operands[2] is CONST_DOUBLE, emit abs or neg abs depending on its sign
	otherwise if it doesn't satisfy altivec_register_operand, force it to
	REG using copy_to_mode_reg.

2024-01-10  Kewen Lin  <linkw@linux.ibm.com>

	PR middle-end/113100
	* builtins.cc (expand_builtin_stack_address): Guard stack point
	adjustment with SPARC_STACK_BOUNDARY_HACK.

2024-01-10  Yang Yujie  <yangyujie@loongson.cn>

	* config/loongarch/genopts/loongarch-strings: Remove explicit-reloc
	argument string definitions.
	* config/loongarch/loongarch-str.h: Same.
	* config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]explicit-relocs
	as aliases to -mexplicit-relocs={always,none}
	* config/loongarch/loongarch.opt: Regenerate.
	* config/loongarch/loongarch.cc: Same.

2024-01-10  Yang Yujie  <yangyujie@loongson.cn>

	* config/loongarch/loongarch-def.h: Define constants with
	enums instead of Macros.

2024-01-10  Yang Yujie  <yangyujie@loongson.cn>

	* config/loongarch/genopts/loongarch-strings: Rename.
	* config/loongarch/genopts/loongarch.opt.in: Same.
	* config/loongarch/loongarch-cpu.cc: Same.
	* config/loongarch/loongarch-def.cc: Same.
	* config/loongarch/loongarch-def.h: Same.
	* config/loongarch/loongarch-opts.cc: Same.
	* config/loongarch/loongarch-opts.h: Same.
	* config/loongarch/loongarch-str.h: Same.
	* config/loongarch/loongarch.opt: Same.

2024-01-10  Yang Yujie  <yangyujie@loongson.cn>

	* config/loongarch/genopts/genstr.sh: Prepend the isa_evolution
	variable with the common la_ prefix.
	* config/loongarch/genopts/loongarch.opt.in: Mark ISA evolution
	flags as saved using TargetVariable.
	* config/loongarch/loongarch.opt: Same.
	* config/loongarch/loongarch-def.h: Define evolution_set to
	mark changes to the -march default.
	* config/loongarch/loongarch-driver.cc: Same.
	* config/loongarch/loongarch-opts.cc: Same.
	* config/loongarch/loongarch-opts.h: Define and use ISA evolution
	conditions around the la_target structure.
	* config/loongarch/loongarch.cc: Same.
	* config/loongarch/loongarch.md: Same.
	* config/loongarch/loongarch-builtins.cc: Same.
	* config/loongarch/loongarch-c.cc: Same.
	* config/loongarch/lasx.md: Same.
	* config/loongarch/lsx.md: Same.
	* config/loongarch/sync.md: Same.

2024-01-09  Jeff Law  <jlaw@ventanamicro.com>

	* config/epiphany/constraints.md (Car): Allow -1024..1023, no more,
	no less.

2024-01-09  Richard Sandiford  <richard.sandiford@arm.com>

	* config/mn10300/mn10300.md (subdi3_degenerate): Add isa attribute.

2024-01-09  Tamar Christina  <tamar.christina@arm.com>

	* tree-vect-loop.cc (vectorizable_live_operation_1): Drop unused
	restart_loop.
	(vectorizable_live_operation): Likewise.

2024-01-09  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/113199
	* tree-vect-loop.cc (vectorizable_live_operation_1): Use
	BIT_FIELD_REF.

2024-01-09  Jakub Jelinek  <jakub@redhat.com>

	PR target/113270
	* config.gcc (aarch64*-*-*): Add aarch64-builtins.h to target_gtfiles.
	* config/aarch64/aarch64-builtins.cc (aarch64_simd_types): Add extern
	GTY(()) declaration before the definition, drop GTY(()) drom the
	definition.

2024-01-09  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113026
	* tree-vect-loop-manip.cc (vect_do_peeling): Remove
	redundant and wrong niter bound setting.  Move niter
	bound adjustment down.

2024-01-09  Tamar Christina  <tamar.christina@arm.com>

	PR middle-end/113163
	* tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
	Reject non-linear inductions that aren't supported.

2024-01-09  Roger Sayle  <roger@nextmovesoftware.com>

	* config/arc/arc.cc (arc_shift_alg): New enumerated type for
	left shift implementation strategies.
	(arc_shift_info): Type for each entry of the shift strategy table.
	(arc_shift_context_idx): Return a integer value for each code
	generation context, used as an index
	(arc_ashl_alg): Table indexed by context and shifted bit count.
	(arc_split_ashl): Use the arc_ashl_alg table to select SImode
	left shift implementation.
	(arc_rtx_costs) <case ASHIFT>: Use the arc_ashl_alg table to
	provide accurate costs, when optimizing for speed or size.

2024-01-09  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vector-costs.cc (loop_invariant_op_p): Fix loop invariant check.

2024-01-09  Julian Brown  <julian@codesourcery.com>

	* gimplify.cc (gimplify_expr): Ensure OMP_ARRAY_SECTION has been
	processed out before gimplification.
	* tree-pretty-print.cc (dump_generic_node): Support OMP_ARRAY_SECTION.
	* tree.def (OMP_ARRAY_SECTION): New tree code.

2024-01-09  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113210
	* tree-vect-loop.cc (vect_get_loop_niters): If non-INTEGER_CST
	value in *number_of_iterationsm1 PLUS_EXPR 1 is folded into
	INTEGER_CST, recompute *number_of_iterationsm1 as the INTEGER_CST
	minus 1.

2024-01-09  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/113140
	* reorg.cc (fill_slots_from_thread): If we are to branch after the
	last instruction of the function, create an end label.

2024-01-09  Roger Sayle  <roger@nextmovesoftware.com>
	    Hongtao Liu  <hongtao.liu@intel.com>

	PR target/112992
	* config/i386/i386-expand.cc
	(ix86_convert_const_wide_int_to_broadcast): Allow call to
	ix86_expand_vector_init_duplicate to fail, and return NULL_RTX.
	(ix86_broadcast_from_constant): Revert recent change; Return a
	suitable MEMREF independently of mode/target combinations.
	(ix86_expand_vector_move): Allow ix86_expand_vector_init_duplicate
	to decide whether expansion is possible/preferrable.  Only try
	forcing DImode constants to memory (and trying again) if calling
	ix86_expand_vector_init_duplicate fails with an DImode immediate
	constant.
	(ix86_expand_vector_init_duplicate) <case E_V2DImode>: Try using
	V4SImode for suitable immediate constants.
	<case E_V4DImode>: Try using V8SImode for suitable constants.
	<case E_V4HImode>: Fail for CONST_INT_P, i.e. use constant pool.
	<case E_V2HImode>: Likewise.
	<case E_V8HImode>: For CONST_INT_P try using V4SImode via widen.
	<case E_V16QImode>: For CONT_INT_P try using V8HImode via widen.
	<label widen>: Handle CONT_INTs via simplify_binary_operation.
	Allow recursive calls to ix86_expand_vector_init_duplicate to fail.
	<case E_V16HImode>: For CONST_INT_P try V8SImode via widen.
	<case E_V32QImode>: For CONST_INT_P try V16HImode via widen.
	(ix86_expand_vector_init): Move try using a broadcast for all_same
	with ix86_expand_vector_init_duplicate before using constant pool.

2024-01-09  Chung-Ju Wu  <jasonwucj@gmail.com>

	* doc/invoke.texi (Arm Options): Document Cortex-M52 options.

2024-01-09  Chung-Ju Wu  <jasonwucj@gmail.com>

	* config/arm/arm-cpus.in (cortex-m52): New cpu.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/arm-tune.md: Regenerate.

2024-01-09  Jiahao Xu  <xujiahao@loongson.cn>

	* config/loongarch/lasx.md (vec_initv32qiv16qi): Rename to ..
	(vec_init<mode><lasxhalf>): .. this, and extend to mode.
	(@vec_concatz<mode>): New insn pattern.
	* config/loongarch/loongarch.cc (loongarch_expand_vector_group_init):
	Handle VALS containing two vectors.

2024-01-09  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vector-builtins-functions.def (vleff): Move comments.
	(vundefined): Ditto.

2024-01-09  Feng Wang  <wangfeng@eswincomputing.com>

	* config/riscv/riscv-vector-builtins-bases.cc (class vandn):
				Add new function_base for crypto vector.
	(class bitmanip): Ditto.
	(class b_reverse):Ditto.
	(class vwsll):   Ditto.
	(class clmul):   Ditto.
	(class vg_nhab):  Ditto.
	(class crypto_vv):Ditto.
	(class crypto_vi):Ditto.
	(class vaeskf2_vsm3c):Ditto.
	(class vsm3me): Ditto.
	(BASE): Add BASE declaration for crypto vector.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
				Add crypto vector intrinsic definition.
	(vbrev): Ditto.
	(vclz): Ditto.
	(vctz): Ditto.
	(vwsll): Ditto.
	(vandn): Ditto.
	(vbrev8): Ditto.
	(vrev8): Ditto.
	(vrol): Ditto.
	(vror): Ditto.
	(vclmul): Ditto.
	(vclmulh): Ditto.
	(vghsh): Ditto.
	(vgmul): Ditto.
	(vaesef): Ditto.
	(vaesem): Ditto.
	(vaesdf): Ditto.
	(vaesdm): Ditto.
	(vaesz): Ditto.
	(vaeskf1): Ditto.
	(vaeskf2): Ditto.
	(vsha2ms): Ditto.
	(vsha2ch): Ditto.
	(vsha2cl): Ditto.
	(vsm4k): Ditto.
	(vsm4r): Ditto.
	(vsm3me): Ditto.
	(vsm3c): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.cc (struct crypto_vv_def):
				Add new function_shape for crypto vector.
	(struct crypto_vi_def): Ditto.
	(struct crypto_vv_no_op_type_def): Ditto.
	(SHAPE): Add SHAPE declaration of crypto vector.
	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
	* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_CRYPTO_SEW32_OPS):
				Add new data type for crypto vector.
	(DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
	(vuint32mf2_t): Ditto.
	(vuint32m1_t): Ditto.
	(vuint32m2_t): Ditto.
	(vuint32m4_t): Ditto.
	(vuint32m8_t): Ditto.
	(vuint64m1_t): Ditto.
	(vuint64m2_t): Ditto.
	(vuint64m4_t): Ditto.
	(vuint64m8_t): Ditto.
	* config/riscv/riscv-vector-builtins.cc (DEF_RVV_CRYPTO_SEW32_OPS):
				Add new data struct for crypto vector.
	(DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
	(registered_function::overloaded_hash): Processing size_t uimm for C overloaded func.
	* config/riscv/riscv-vector-builtins.def (vi): Add vi OP_TYPE.

2024-01-08  Ilya Leoshkevich  <iii@linux.ibm.com>

	PR sanitizer/113251
	* varasm.cc (assemble_function_label_raw): Do not call
	asan_function_start () without the current function.

2024-01-08  Cupertino Miranda  <cupertino.miranda@oracle.com>

	PR target/113225
	* btfout.cc (btf_collect_datasec): Skip creating BTF info for
	extern and kernel_helper attributed function decls.

2024-01-08  Cupertino Miranda  <cupertino.miranda@oracle.com>

	* btfout.cc (output_btf_strs): Changed.

2024-01-08  Tobias Burnus  <tobias@codesourcery.com>

	* config/gcn/mkoffload.cc (main): Handle gfx1100
	when setting the default XNACK.

2024-01-08  Tobias Burnus  <tobias@codesourcery.com>

	* config.gcc (amdgcn-*-amdhsa): Accept --with-arch=gfx1100.
	* config/gcn/gcn-hsa.h (NO_XNACK): Add gfx1100:
	(ASM_SPEC): Handle gfx1100.
	* config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1100.
	(enum gcn_isa): Add ISA_RDNA3.
	(TARGET_GFX1100, TARGET_RDNA2_PLUS, TARGET_RDNA3): Define.
	* config/gcn/gcn-valu.md: Change TARGET_RDNA2 to TARGET_RDNA2_PLUS.
	* config/gcn/gcn.cc (gcn_option_override,
	gcn_omp_device_kind_arch_isa, output_file_start): Handle gfx1100.
	(gcn_global_address_p, gcn_addr_space_legitimate_address_p): Change
	TARGET_RDNA2 to TARGET_RDNA2_PLUS.
	(gcn_hsa_declare_function_name): Don't use '.amdhsa_reserve_flat_scratch'
	with gfx1100.
	* config/gcn/gcn.h (ASSEMBLER_DIALECT): Likewise.
	(TARGET_CPU_CPP_BUILTINS): Define __RDNA3__, __gfx1030__ and
	__gfx1100__.
	* config/gcn/gcn.md: Change TARGET_RDNA2 to TARGET_RDNA2_PLUS.
	* config/gcn/gcn.opt (Enum gpu_type): Add gfx1100.
	* config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1100): Define.
	(isa_has_combined_avgprs, main): Handle gfx1100.
	* config/gcn/t-omp-device (isa): Add gfx1100.

2024-01-08  Richard Biener  <rguenther@suse.de>

	* doc/invoke.texi (-mmovbe): Clarify.

2024-01-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/113026
	* tree-vect-loop.cc (vect_need_peeling_or_partial_vectors_p):
	Avoid an epilog in more cases.
	* tree-vect-loop-manip.cc (vect_do_peeling): Adjust the
	epilogues niter upper bounds and estimates.

2024-01-08  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113228
	* gimplify.cc (recalculate_side_effects): Do nothing for SSA_NAMEs.

2024-01-08  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113120
	* gimple-lower-bitint.cc (gimple_lower_bitint): Fix handling of very
	large _BitInt zero INTEGER_CST PHI argument.

2024-01-08  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113119
	* gimple-lower-bitint.cc (optimizable_arith_overflow): Punt if
	both REALPART_EXPR and cast from IMAGPART_EXPR appear, but cast
	is before REALPART_EXPR.

2024-01-08  Georg-Johann Lay  <avr@gjlay.de>

	PR target/112952
	* config/avr/avr.cc (avr_handle_addr_attribute): Also print valid
	range when diagnosing attribute "io" and "io_low" are out of range.
	(avr_eval_addr_attrib): Don't ICE on empty address at that place.
	(avr_insert_attributes): Reject if attribute "address", "io" or "io_low"
	in contexts other than static storage.
	(avr_asm_output_aligned_decl_common): Move output of decls with
	attribute "address", "io", and "io_low" to...
	(avr_output_addr_attrib): ...this new function.
	(avr_asm_asm_output_aligned_bss): Remove output for decls with
	attribute "address", "io", and "io_low".
	(avr_encode_section_info): Rectify handling of decls with attribute
	"address", "io", and "io_low".

2024-01-08  Andrew Stubbs  <ams@codesourcery.com>

	* config/gcn/mkoffload.cc (TEST_XNACK_UNSET): New.
	(elf_flags): Remove XNACK from the default value.
	(main): Set a default XNACK according to the arch.

2024-01-08  Andrew Stubbs  <ams@codesourcery.com>

	* config/gcn/mkoffload.cc (isa_has_combined_avgprs): Delete.
	(process_asm): Don't count avgprs.

2024-01-08  Hongyu Wang  <hongyu.wang@intel.com>

	* config/i386/i386.opt: Add supported sub-features.
	* doc/extend.texi: Add description for target attribute.

2024-01-08  Feng Wang  <wangfeng@eswincomputing.com>

	* config/riscv/vector.md: Modify avl_type operand index of zvbc ins.

2024-01-07  Roger Sayle  <roger@nextmovesoftware.com>
	    Uros Bizjak  <ubizjak@gmail.com>

	PR target/113231
	* config/i386/i386-features.cc (compute_convert_gain): Include
	the overhead of explicit load and store (movd) instructions when
	converting non-store scalar operations with memory destinations.
	Various indentation whitespace fixes.

2024-01-07  Tamar Christina  <tamar.christina@arm.com>

	* config/arm/neon.md (cbranch<mode>4): New.

2024-01-07  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vsetvl.cc: replace std::max by MAX.

2024-01-06  Jiahao Xu  <xujiahao@loongson.cn>

	* config/loongarch/lasx.md: Set the unused bits in operand[3] to 0.

2024-01-06  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113248
	* config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info):
	Update the MAX_SEW.

2024-01-06  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vector-costs.cc (loop_invariant_op_p): New function.
	(variable_vectorized_p): Teach loop invariant.
	(has_unexpected_spills_p): Ditto.

2024-01-06  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-protos.h (whole_reg_to_reg_move_p): New function.
	* config/riscv/riscv-v.cc (whole_reg_to_reg_move_p): Ditto.
	* config/riscv/vector.md: Allow non-vlmax with len = NUNITS simplification.

2024-01-05  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/113104
	* doc/invoke.texi (aarch64-sve-compare-costs): Replace with...
	(aarch64-vect-compare-costs): ...this.
	* config/aarch64/aarch64.opt (-param=aarch64-sve-compare-costs=):
	Replace with...
	(-param=aarch64-vect-compare-costs=): ...this new param.
	* config/aarch64/aarch64.cc (aarch64_override_options_internal):
	Don't disable it when vectorizing for Advanced SIMD only.
	(aarch64_autovectorize_vector_modes): Apply VECT_COMPARE_COSTS
	whenever aarch64_vect_compare_costs is true.

2024-01-05  Lulu Cheng  <chenglulu@loongson.cn>

	* config/loongarch/lasx.md (lasx_mxld_<lasxfmt_f>):
	Modify the method of determining the memory offset of [x]vld/[x]vst.
	(lasx_mxst_<lasxfmt_f>): Likewise.
	* config/loongarch/loongarch.cc (loongarch_valid_offset_p): Delete.
	(loongarch_address_insns): Likewise.
	* config/loongarch/lsx.md (lsx_ld_<lsxfmt_f>): Likewise.
	(lsx_st_<lsxfmt_f>): Likewise.
	* config/loongarch/predicates.md (aq10b_operand): Likewise.
	(aq10h_operand): Likewise.
	(aq10w_operand): Likewise.
	(aq10d_operand): Likewise.

2024-01-05  Alex Coplan  <alex.coplan@arm.com>

	PR target/113217
	* config/aarch64/aarch64-ldp-fusion.cc
	(ldp_bb_info::try_fuse_pair): If the second access can throw,
	narrow the move range to exactly that insn.

2024-01-05  Ilya Leoshkevich  <iii@linux.ibm.com>

	* asan.cc (asan_function_start): Drop switch_to_section ().
	(asan_emit_stack_protection): Set .LASANPC alignment.
	* config/i386/i386.cc: Use assemble_function_label_raw ()
	instead of ASM_OUTPUT_LABEL ().
	* config/s390/s390.cc (s390_asm_output_function_label):
	Likewise.
	* defaults.h (ASM_OUTPUT_FUNCTION_LABEL): Likewise.
	* final.cc (final_start_function_1): Drop
	asan_function_start ().
	* output.h (assemble_function_label_raw): New function.
	* varasm.cc (assemble_function_label_raw): Likewise.

2024-01-05  Ilya Leoshkevich  <iii@linux.ibm.com>

	* config/aarch64/aarch64.cc (aarch64_declare_function_name):
	Use ASM_OUTPUT_FUNCTION_LABEL ().
	* config/alpha/alpha.cc (alpha_start_function): Likewise.
	* config/arm/aout.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
	* config/arm/arm.cc (arm_asm_declare_function_name): Likewise.
	* config/bfin/bfin.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
	* config/c6x/c6x.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
	* config/gcn/gcn.cc (gcn_hsa_declare_function_name): Likewise.
	* config/h8300/h8300.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
	* config/ia64/ia64.cc (ia64_start_function): Likewise.
	* config/mcore/mcore-elf.h (ASM_DECLARE_FUNCTION_NAME):
	Likewise.
	* config/microblaze/microblaze.cc (microblaze_function_prologue):
	Likewise.
	* config/mips/mips.cc (mips_start_unique_function): Return the
	tree.
	(mips_start_function_definition): Use
	ASM_OUTPUT_FUNCTION_LABEL ().
	(mips_finish_stub): Pass the tree to
	mips_start_function_definition ().
	(mips16_build_function_stub): Likewise.
	(mips16_build_call_stub): Likewise.
	(mips_output_function_prologue): Likewise.
	* config/pa/pa.cc (pa_output_function_label): Use
	ASM_OUTPUT_FUNCTION_LABEL ().
	* config/riscv/riscv.cc (riscv_declare_function_name): Likewise.
	* config/rs6000/rs6000.cc (rs6000_elf_declare_function_name):
	Likewise.
	(rs6000_xcoff_declare_function_name): Likewise.

2024-01-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/113201
	* tree-scalar-evolution.cc (final_value_replacement_loop): Don't call
	replace_uses_by on SSA_NAME_OCCURS_IN_ABNORMAL_PHI rslt.

2024-01-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/90693
	* tree-ssa-math-opts.cc (match_single_bit_test): If
	tree_expr_nonzero_p (arg), remember it in the second argument to
	IFN_POPCOUNT or lower it as arg & (arg - 1) == 0 rather than
	arg ^ (arg - 1) > arg - 1.
	* internal-fn.cc (expand_POPCOUNT): If second argument to
	IFN_POPCOUNT suggests arg is non-zero, try to expand it as
	arg & (arg - 1) == 0 rather than arg ^ (arg - 1) > arg - 1.

2024-01-05  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv-v.cc (expand_load_store):
	Remove `value`.
	(expand_cond_len_op): Ditto.
	(expand_gather_scatter): Ditto.
	(expand_lanes_load_store): Ditto.
	(expand_fold_extract_last): Ditto.

2024-01-05  Pan Li  <pan2.li@intel.com>

	Revert:
	2024-01-05  Feng Wang  <wangfeng@eswincomputing.com>

	* config/riscv/riscv-vector-builtins-bases.cc (class vandn):
				Add new function_base for crypto vector.
	(class bitmanip): Ditto.
	(class b_reverse):Ditto.
	(class vwsll):   Ditto.
	(class clmul):   Ditto.
	(class vg_nhab):  Ditto.
	(class crypto_vv):Ditto.
	(class crypto_vi):Ditto.
	(class vaeskf2_vsm3c):Ditto.
	(class vsm3me): Ditto.
	(BASE): Add BASE declaration for crypto vector.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
				Add crypto vector intrinsic definition.
	(vbrev): Ditto.
	(vclz): Ditto.
	(vctz): Ditto.
	(vwsll): Ditto.
	(vandn): Ditto.
	(vbrev8): Ditto.
	(vrev8): Ditto.
	(vrol): Ditto.
	(vror): Ditto.
	(vclmul): Ditto.
	(vclmulh): Ditto.
	(vghsh): Ditto.
	(vgmul): Ditto.
	(vaesef): Ditto.
	(vaesem): Ditto.
	(vaesdf): Ditto.
	(vaesdm): Ditto.
	(vaesz): Ditto.
	(vaeskf1): Ditto.
	(vaeskf2): Ditto.
	(vsha2ms): Ditto.
	(vsha2ch): Ditto.
	(vsha2cl): Ditto.
	(vsm4k): Ditto.
	(vsm4r): Ditto.
	(vsm3me): Ditto.
	(vsm3c): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.cc (struct crypto_vv_def):
				Add new function_shape for crypto vector.
	(struct crypto_vi_def): Ditto.
	(struct crypto_vv_no_op_type_def): Ditto.
	(SHAPE): Add SHAPE declaration of crypto vector.
	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
	* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_CRYPTO_SEW32_OPS):
				Add new data type for crypto vector.
	(DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
	(vuint32mf2_t): Ditto.
	(vuint32m1_t): Ditto.
	(vuint32m2_t): Ditto.
	(vuint32m4_t): Ditto.
	(vuint32m8_t): Ditto.
	(vuint64m1_t): Ditto.
	(vuint64m2_t): Ditto.
	(vuint64m4_t): Ditto.
	(vuint64m8_t): Ditto.
	* config/riscv/riscv-vector-builtins.cc (DEF_RVV_CRYPTO_SEW32_OPS):
				Add new data struct for crypto vector.
	(DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
	(registered_function::overloaded_hash): Processing size_t uimm for C overloaded func.
	* config/riscv/riscv-vector-builtins.def (vi): Add vi OP_TYPE.

2024-01-05  Feng Wang  <wangfeng@eswincomputing.com>

	* config/riscv/riscv-vector-builtins-bases.cc (class vandn):
				Add new function_base for crypto vector.
	(class bitmanip): Ditto.
	(class b_reverse):Ditto.
	(class vwsll):   Ditto.
	(class clmul):   Ditto.
	(class vg_nhab):  Ditto.
	(class crypto_vv):Ditto.
	(class crypto_vi):Ditto.
	(class vaeskf2_vsm3c):Ditto.
	(class vsm3me): Ditto.
	(BASE): Add BASE declaration for crypto vector.
	* config/riscv/riscv-vector-builtins-bases.h: Ditto.
	* config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
				Add crypto vector intrinsic definition.
	(vbrev): Ditto.
	(vclz): Ditto.
	(vctz): Ditto.
	(vwsll): Ditto.
	(vandn): Ditto.
	(vbrev8): Ditto.
	(vrev8): Ditto.
	(vrol): Ditto.
	(vror): Ditto.
	(vclmul): Ditto.
	(vclmulh): Ditto.
	(vghsh): Ditto.
	(vgmul): Ditto.
	(vaesef): Ditto.
	(vaesem): Ditto.
	(vaesdf): Ditto.
	(vaesdm): Ditto.
	(vaesz): Ditto.
	(vaeskf1): Ditto.
	(vaeskf2): Ditto.
	(vsha2ms): Ditto.
	(vsha2ch): Ditto.
	(vsha2cl): Ditto.
	(vsm4k): Ditto.
	(vsm4r): Ditto.
	(vsm3me): Ditto.
	(vsm3c): Ditto.
	* config/riscv/riscv-vector-builtins-shapes.cc (struct crypto_vv_def):
				Add new function_shape for crypto vector.
	(struct crypto_vi_def): Ditto.
	(struct crypto_vv_no_op_type_def): Ditto.
	(SHAPE): Add SHAPE declaration of crypto vector.
	* config/riscv/riscv-vector-builtins-shapes.h: Ditto.
	* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_CRYPTO_SEW32_OPS):
				Add new data type for crypto vector.
	(DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
	(vuint32mf2_t): Ditto.
	(vuint32m1_t): Ditto.
	(vuint32m2_t): Ditto.
	(vuint32m4_t): Ditto.
	(vuint32m8_t): Ditto.
	(vuint64m1_t): Ditto.
	(vuint64m2_t): Ditto.
	(vuint64m4_t): Ditto.
	(vuint64m8_t): Ditto.
	* config/riscv/riscv-vector-builtins.cc (DEF_RVV_CRYPTO_SEW32_OPS):
				Add new data struct for crypto vector.
	(DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
	(registered_function::overloaded_hash): Processing size_t uimm for C overloaded func.
	* config/riscv/riscv-vector-builtins.def (vi): Add vi OP_TYPE.

2024-01-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.

2024-01-04  Andrew Pinski  <quic_apinski@quicinc.com>

	PR tree-optimization/113186
	* gimple-match-head.cc (gimple_bitwise_inverted_equal_p):
	Match `^` with the `==` for 1bit integral types.
	* match.pd (maybe_cmp): Allow for bit_xor for 1bit
	integral types.

2024-01-04  David Malcolm  <dmalcolm@redhat.com>

	* toplev.cc (general_init): Pass lang_mask to urlifier.

2024-01-04  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic.h (diagnostic_make_option_url_cb): Add lang_mask
	param.
	(diagnostic_context::make_option_url): Update for lang_mask param.
	* gcc-urlifier.cc: Include "opts.h" and "options.h".
	(gcc_urlifier::gcc_urlifier): Add lang_mask param.
	(gcc_urlifier::m_lang_mask): New field.
	(doc_urls): Make static.
	(gcc_urlifier::get_url_for_quoted_text): Use label_text.
	(gcc_urlifier::get_url_suffix_for_quoted_text): Use label_text.
	Look for an option by name before trying a binary search in
	doc_urls.
	(gcc_urlifier::get_url_suffix_for_quoted_text): Use label_text.
	(gcc_urlifier::get_url_suffix_for_option): New.
	(make_gcc_urlifier): Add lang_mask param.
	(selftest::gcc_urlifier_cc_tests): Update for above changes.
	Verify that a URL is found for "-fpack-struct".
	* gcc-urlifier.def: Drop options "--version" and "-fpack-struct".
	* gcc-urlifier.h (make_gcc_urlifier): Add lang_mask param.
	* gcc.cc (driver::global_initializations): Pass 0 for lang_mask
	to make_gcc_urlifier.
	* opts-diagnostic.h (get_option_url): Add lang_mask param.
	* opts.cc (get_option_html_page): Remove special-casing for
	analyzer and LTO.
	(get_option_url_suffix): New.
	(get_option_url): Reimplement.
	(selftest::test_get_option_html_page): Rename to...
	(selftest::test_get_option_url_suffix): ...this and update for
	above changes.
	(selftest::opts_cc_tests): Update for renaming.
	* opts.h: Include "rich-location.h".
	(get_option_url_suffix): New decl.

2024-01-04  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (ALL_OPT_URL_FILES): New.
	(GCC_OBJS): Add options-urls.o.
	(OBJS): Likewise.
	(OBJS-libcommon): Likewise.
	(s-options): Depend on $(ALL_OPT_URL_FILES), and add this to
	inputs to opt-gather.awk.
	(options-urls.cc): New Makefile target.
	* opt-functions.awk (url_suffix): New function.
	(lang_url_suffix): New function.
	* options-urls-cc-gen.awk: New file.
	* opts.h (get_opt_url_suffix): New decl.

2024-01-04  David Malcolm  <dmalcolm@redhat.com>

	* params.opt.urls: New file, autogenerated by
	regenerate-opt-urls.py.

2024-01-04  David Malcolm  <dmalcolm@redhat.com>

	* common.opt.urls: New file, autogenerated by
	regenerate-opt-urls.py.
	* config/aarch64/aarch64.opt.urls: Likewise.
	* config/alpha/alpha.opt.urls: Likewise.
	* config/alpha/elf.opt.urls: Likewise.
	* config/arc/arc-tables.opt.urls: Likewise.
	* config/arc/arc.opt.urls: Likewise.
	* config/arm/arm-tables.opt.urls: Likewise.
	* config/arm/arm.opt.urls: Likewise.
	* config/arm/vxworks.opt.urls: Likewise.
	* config/avr/avr.opt.urls: Likewise.
	* config/bpf/bpf.opt.urls: Likewise.
	* config/c6x/c6x-tables.opt.urls: Likewise.
	* config/c6x/c6x.opt.urls: Likewise.
	* config/cris/cris.opt.urls: Likewise.
	* config/cris/elf.opt.urls: Likewise.
	* config/csky/csky.opt.urls: Likewise.
	* config/csky/csky_tables.opt.urls: Likewise.
	* config/darwin.opt.urls: Likewise.
	* config/dragonfly.opt.urls: Likewise.
	* config/epiphany/epiphany.opt.urls: Likewise.
	* config/fr30/fr30.opt.urls: Likewise.
	* config/freebsd.opt.urls: Likewise.
	* config/frv/frv.opt.urls: Likewise.
	* config/ft32/ft32.opt.urls: Likewise.
	* config/fused-madd.opt.urls: Likewise.
	* config/g.opt.urls: Likewise.
	* config/gcn/gcn.opt.urls: Likewise.
	* config/gnu-user.opt.urls: Likewise.
	* config/h8300/h8300.opt.urls: Likewise.
	* config/hpux11.opt.urls: Likewise.
	* config/i386/cygming.opt.urls: Likewise.
	* config/i386/cygwin.opt.urls: Likewise.
	* config/i386/djgpp.opt.urls: Likewise.
	* config/i386/i386.opt.urls: Likewise.
	* config/i386/mingw-w64.opt.urls: Likewise.
	* config/i386/mingw.opt.urls: Likewise.
	* config/i386/nto.opt.urls: Likewise.
	* config/ia64/ia64.opt.urls: Likewise.
	* config/ia64/ilp32.opt.urls: Likewise.
	* config/ia64/vms.opt.urls: Likewise.
	* config/iq2000/iq2000.opt.urls: Likewise.
	* config/linux-android.opt.urls: Likewise.
	* config/linux.opt.urls: Likewise.
	* config/lm32/lm32.opt.urls: Likewise.
	* config/loongarch/loongarch.opt.urls: Likewise.
	* config/lynx.opt.urls: Likewise.
	* config/m32c/m32c.opt.urls: Likewise.
	* config/m32r/m32r.opt.urls: Likewise.
	* config/m68k/ieee.opt.urls: Likewise.
	* config/m68k/m68k-tables.opt.urls: Likewise.
	* config/m68k/m68k.opt.urls: Likewise.
	* config/m68k/uclinux.opt.urls: Likewise.
	* config/mcore/mcore.opt.urls: Likewise.
	* config/microblaze/microblaze.opt.urls: Likewise.
	* config/mips/mips-tables.opt.urls: Likewise.
	* config/mips/mips.opt.urls: Likewise.
	* config/mips/sde.opt.urls: Likewise.
	* config/mmix/mmix.opt.urls: Likewise.
	* config/mn10300/mn10300.opt.urls: Likewise.
	* config/moxie/moxie.opt.urls: Likewise.
	* config/msp430/msp430.opt.urls: Likewise.
	* config/nds32/nds32-elf.opt.urls: Likewise.
	* config/nds32/nds32-linux.opt.urls: Likewise.
	* config/nds32/nds32.opt.urls: Likewise.
	* config/netbsd-elf.opt.urls: Likewise.
	* config/netbsd.opt.urls: Likewise.
	* config/nios2/elf.opt.urls: Likewise.
	* config/nios2/nios2.opt.urls: Likewise.
	* config/nvptx/nvptx-gen.opt.urls: Likewise.
	* config/nvptx/nvptx.opt.urls: Likewise.
	* config/openbsd.opt.urls: Likewise.
	* config/or1k/elf.opt.urls: Likewise.
	* config/or1k/or1k.opt.urls: Likewise.
	* config/pa/pa-hpux.opt.urls: Likewise.
	* config/pa/pa-hpux1010.opt.urls: Likewise.
	* config/pa/pa-hpux1111.opt.urls: Likewise.
	* config/pa/pa-hpux1131.opt.urls: Likewise.
	* config/pa/pa.opt.urls: Likewise.
	* config/pa/pa64-hpux.opt.urls: Likewise.
	* config/pdp11/pdp11.opt.urls: Likewise.
	* config/pru/pru.opt.urls: Likewise.
	* config/riscv/riscv.opt.urls: Likewise.
	* config/rl78/rl78.opt.urls: Likewise.
	* config/rpath.opt.urls: Likewise.
	* config/rs6000/476.opt.urls: Likewise.
	* config/rs6000/aix64.opt.urls: Likewise.
	* config/rs6000/darwin.opt.urls: Likewise.
	* config/rs6000/linux64.opt.urls: Likewise.
	* config/rs6000/rs6000-tables.opt.urls: Likewise.
	* config/rs6000/rs6000.opt.urls: Likewise.
	* config/rs6000/sysv4.opt.urls: Likewise.
	* config/rtems.opt.urls: Likewise.
	* config/rx/elf.opt.urls: Likewise.
	* config/rx/rx.opt.urls: Likewise.
	* config/s390/s390.opt.urls: Likewise.
	* config/s390/tpf.opt.urls: Likewise.
	* config/sh/sh.opt.urls: Likewise.
	* config/sh/superh.opt.urls: Likewise.
	* config/sol2.opt.urls: Likewise.
	* config/sparc/long-double-switch.opt.urls: Likewise.
	* config/sparc/sparc.opt.urls: Likewise.
	* config/stormy16/stormy16.opt.urls: Likewise.
	* config/v850/v850.opt.urls: Likewise.
	* config/vax/elf.opt.urls: Likewise.
	* config/vax/vax.opt.urls: Likewise.
	* config/visium/visium.opt.urls: Likewise.
	* config/vms/vms.opt.urls: Likewise.
	* config/vxworks-smp.opt.urls: Likewise.
	* config/vxworks.opt.urls: Likewise.
	* config/xtensa/elf.opt.urls: Likewise.
	* config/xtensa/uclinux.opt.urls: Likewise.
	* config/xtensa/xtensa.opt.urls: Likewise.
	* config/bfin/bfin.opt.urls: New file.

2024-01-04  David Malcolm  <dmalcolm@redhat.com>

	* Makefile.in (OPT_URLS_HTML_DEPS): New.
	(regenerate-opt-urls): New target.
	(regenerate-opt-urls-unit-test): New target.
	* doc/options.texi (Option properties): Add UrlSuffix and
	description of regenerate-opt-urls.py.  Add LangUrlSuffix_*.
	* doc/sourcebuild.texi (Anatomy of a Language Front End): Add
	reference to regenerate-opt-urls.py's PER_LANGUAGE_OPTION_INDEXES
	and Makefile.in's OPT_URLS_HTML_DEPS.
	(Anatomy of a Target Back End): Add
	reference to regenerate-opt-urls.py's TARGET_SPECIFIC_PAGES.
	* regenerate-opt-urls.py: New file.

2024-01-04  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-format-sarif.cc
	(sarif_builder::make_logical_location_object): Convert to...
	(make_sarif_logical_location_object): ...this.
	(sarif_builder::set_any_logical_locs_arr): Update for above
	change.
	(sarif_builder::make_thread_flow_location_object): Call
	maybe_add_sarif_properties on each diagnostic_event.
	* diagnostic-format-sarif.h (class logical_location): New forward
	decl.
	(make_sarif_logical_location_object): New decl.
	* diagnostic-path.h (class sarif_object): New forward decl.
	(diagnostic_event::maybe_add_sarif_properties): New vfunc.

2024-01-04  Kuan-Lin Chen  <rufus@andestech.com>
	    Patrick Lin  <patrick@andestech.com>
	    Rufus Chen  <rufus@andestech.com>
	    Monk Chiang  <monk.chiang@sifive.com>

	* config/riscv/riscv.cc (riscv_legitimize_move): Expand movfh
	with Nan-boxing value.
	* config/riscv/riscv.md (*movhf_softfloat_unspec): New pattern.

2024-01-04  Roger Sayle  <roger@nextmovesoftware.com>
	    Jeff Law  <jlaw@ventanamicro.com>

	PR rtl-optimization/104914
	* expr.cc (expand_assignment): When target is SUBREG_PROMOTED_VAR_P
	a sign or zero extension is only required if the modified field
	overlaps the SUBREG's most significant bit.  On MODE_REP_EXTENDED
	targets, don't refer to the temporarily incorrectly extended value
	using a SUBREG, but instead generate an explicit TRUNCATE rtx.

2024-01-04  Pan Li  <pan2.li@intel.com>

	Revert:
	2024-01-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.

2024-01-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.

2024-01-04  Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv.cc (riscv_for_each_saved_reg): Adjust the
	offset of fcsr.

2024-01-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vector-costs.cc (variable_vectorized_p): New function.
	(compute_nregs_for_mode): Refine LMUL.
	(max_number_of_live_regs): Ditto.
	(compute_estimated_lmul): Ditto.
	(has_unexpected_spills_p): Ditto.

2024-01-04  Li Wei  <liwei@loongson.cn>

	* config/loongarch/loongarch.cc (loongarch_is_odd_extraction):
	Remove useless forward declaration.
	(loongarch_is_even_extraction): Remove useless forward declaration.
	(loongarch_try_expand_lsx_vshuf_const): Removed.
	(loongarch_expand_vec_perm_const_1): Merged.
	(loongarch_is_double_duplicate): Removed.
	(loongarch_is_center_extraction): Ditto.
	(loongarch_is_reversing_permutation): Ditto.
	(loongarch_is_di_misalign_extract): Ditto.
	(loongarch_is_si_misalign_extract): Ditto.
	(loongarch_is_lasx_lowpart_extract): Ditto.
	(loongarch_is_op_reverse_perm): Ditto.
	(loongarch_is_single_op_perm): Ditto.
	(loongarch_is_divisible_perm): Ditto.
	(loongarch_is_triple_stride_extract): Ditto.
	(loongarch_expand_vec_perm_const_2): Merged.
	(loongarch_expand_vec_perm_const): New.
	(loongarch_vectorize_vec_perm_const): Adjust.

2024-01-04  Sandra Loosemore  <sandra@codesourcery.com>

	* omp-general.cc: Fix comment typos and misplaced/confusing
	comments.  Delete redundant include of omp-general.h.

2024-01-04  YunQiang Su  <syq@gcc.gnu.org>

	PR rtl-optimization/104914
	* config/mips/mips.md (insqisi_extended): New patterns.
	(inshisi_extended): Ditto.

2024-01-04  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips.cc (mips_insn_cost): New function.

2024-01-04  YunQiang Su  <syq@gcc.gnu.org>

	* config/mips/mips.md (perf_ratio): New attribute.

2024-01-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113206
	PR target/113209
	* config/riscv/riscv-vsetvl.cc (invalid_opt_bb_p): New function.
	(pre_vsetvl::compute_lcm_local_properties): Disable earliest fusion on
	blocks belong to infinite loop.
	(pre_vsetvl::emit_vsetvl): Remove fake edges.
	* config/riscv/t-riscv: Add a new include file.

2024-01-04  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/vector.md: Fix indent.

2024-01-03  Kwok Cheung Yeung  <kcy@codesourcery.com>

	* tree-core.h (enum omp_clause_code): Move OMP_CLAUSE_INDIRECT to before
	OMP_CLAUSE__SIMDUID_.
	* tree.cc (omp_clause_num_ops): Update position of entry for
	OMP_CLAUSE_INDIRECT to correspond with omp_clause_code.
	(omp_clause_code_name): Likewise.

2024-01-03  Kwok Cheung Yeung  <kcy@codesourcery.com>

	* config/nvptx/nvptx.cc (nvptx_record_offload_symbol): Restucture
	printing of FUNC_MAP/IND_FUNC_MAP labels.

2024-01-03  Jakub Jelinek  <jakub@redhat.com>

	* gcc.cc (process_command): Update copyright notice dates.
	* gcov-dump.cc (print_version): Ditto.
	* gcov.cc (print_version): Ditto.
	* gcov-tool.cc (print_version): Ditto.
	* gengtype.cc (create_file): Ditto.
	* doc/cpp.texi: Bump @copying's copyright year.
	* doc/cppinternals.texi: Ditto.
	* doc/gcc.texi: Ditto.
	* doc/gccint.texi: Ditto.
	* doc/gcov.texi: Ditto.
	* doc/install.texi: Ditto.
	* doc/invoke.texi: Ditto.

2024-01-03  Xi Ruoyao  <xry111@xry111.site>

	* config/loongarch/simd.md (fmax<mode>3): New define_insn.
	(fmin<mode>3): Likewise.
	(reduc_fmax_scal_<mode>3): New define_expand.
	(reduc_fmin_scal_<mode>3): Likewise.

2024-01-03  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113112
	* config/riscv/riscv-vector-costs.cc (compute_nregs_for_mode): Add rgroup info.
	(max_number_of_live_regs): Ditto.
	(has_unexpected_spills_p): Ditto.

2024-01-02  Jun Sha (Joshua)  <cooper.joshua@linux.alibaba.com>
	    Jin Ma  <jinma@linux.alibaba.com>
	    Xianmiao Qu  <cooper.qu@linux.alibaba.com>
	    Christoph Müllner  <christoph.muellner@vrull.eu>

	* config/riscv/vector.md:
	Use vector_length_operand for vsetvl patterns.

2024-01-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-v.cc (is_vlmax_len_p): Remove satisfies_constraint_K.
	(expand_cond_len_op): Add simplification of dummy len and dummy mask.

2024-01-02  Di Zhao  <dizhao@os.amperecomputing.com>

	* config/aarch64/aarch64-tuning-flags.def
	(AARCH64_EXTRA_TUNING_OPTION): New tuning option
	AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA.
	* config/aarch64/aarch64.cc
	(aarch64_override_options_internal): Set
	param_fully_pipelined_fma according to tuning option.
	* config/aarch64/tuning_models/ampere1.h: Add
	AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA to tune_flags.
	* config/aarch64/tuning_models/ampere1a.h: Likewise.
	* config/aarch64/tuning_models/ampere1b.h: Likewise.

2024-01-02  Feng Wang  <wangfeng@eswincomputing.com>

	* config/riscv/vector-crypto.md: Modify copyright year.

2024-01-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	* config/riscv/riscv-vector-costs.cc: Move STMT_VINFO_TYPE (...) to local.

2024-01-02  Lulu Cheng  <chenglulu@loongson.cn>

	* config.in: Regenerate.
	* config/loongarch/loongarch-opts.h (HAVE_AS_TLS_LE_RELAXATION): Define.
	* config/loongarch/loongarch.cc (loongarch_legitimize_tls_address):
	Added TLS Le Relax support.
	(loongarch_print_operand_reloc): Add the output string of TLS Le Relax.
	* config/loongarch/loongarch.md (@add_tls_le_relax<mode>): New template.
	* configure: Regenerate.
	* configure.ac: Check if binutils supports TLS le relax.

2024-01-02  Feng Wang  <wangfeng@eswincomputing.com>

	* config/riscv/iterators.md: Add rotate insn name.
	* config/riscv/riscv.md: Add new insns name for crypto vector.
	* config/riscv/vector-iterators.md: Add new iterators for crypto vector.
	* config/riscv/vector.md: Add the corresponding attr for crypto vector.
	* config/riscv/vector-crypto.md: New file.The machine descriptions for crypto vector.

2024-01-02  Juzhe-Zhong  <juzhe.zhong@rivai.ai>

	PR target/113112
	* config/riscv/riscv-vector-costs.cc (compute_nregs_for_mode): Fix
	pointer type liveness count.

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