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* configure.ac: Add Visium support.
* configure: Regenerate.
libgcc/
* config.host: Add Visium support.
* config/visium: New directory.
gcc/
* config.gcc: Add Visium support.
* configure.ac: Likewise.
* configure: Regenerate.
* doc/extend.texi (interrupt attribute): Add Visium.
* doc/invoke.texi: Document Visium options.
* doc/install.texi: Document Visium target.
* doc/md.texi: Document Visium constraints.
* common/config/visium: New directory.
* config/visium: Likewise.
gcc/testsuite/
* lib/target-supports.exp (check_profiling_available): Return 0 for
Visium.
(check_effective_target_tls_runtime): Likewise.
(check_effective_target_logical_op_short_circuit): Return 1 for Visium.
* gcc.dg/20020312-2.c: Adjust for Visium.
* gcc.dg/tls/thr-cse-1.c: Likewise
* gcc.dg/tree-ssa/20040204-1.c: Likewise
* gcc.dg/tree-ssa/loop-1.c: Likewise.
* gcc.dg/weak/typeof-2.c: Likewise.
From-SVN: r219219
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From-SVN: r219188
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gcc/
* config.gcc: Add mipsisa64r6 and mipsisa32r6 cpu support.
* config/mips/constraints.md (ZD): Add r6 restrictions.
* config/mips/gnu-user.h (DRIVER_SELF_SPECS): Add MIPS_ISA_LEVEL_SPEC.
* config/mips/loongson.md
(<u>div<mode>3, <u>mod<mode>3): Move to mips.md.
* config/mips/mips-cpus.def (mips32r6, mips64r6): Define.
* config/mips/mips-modes.def (CCF): New mode.
* config/mips/mips-protos.h
(mips_9bit_offset_address_p): New prototype.
* config/mips/mips-tables.opt: Regenerate.
* config/mips/mips.c (MIPS_JR): Use JALR $, <reg> for R6.
(mips_rtx_cost_data): Add pseudo-processors W32 and W64.
(mips_9bit_offset_address_p): New function.
(mips_rtx_costs): Account for R6 multiply and FMA instructions.
(mips_emit_compare): Implement R6 FPU comparisons.
(mips_expand_conditional_move): Implement R6 selects.
(mips_expand_conditional_trap): Account for removed trap immediate.
(mips_expand_block_move): Disable inline move when LWL/LWR are removed.
(mips_print_float_branch_condition): Update for R6 FPU branches.
(mips_print_operand): Handle CCF mode compares.
(mips_interrupt_extra_call_saved_reg_p): Do not attempt to callee-save
MD_REGS for R6.
(mips_hard_regno_mode_ok_p): Support CCF mode.
(mips_mode_ok_for_mov_fmt_p): Likewise.
(mips_secondary_reload_class): CCFmode can be loaded directly.
(mips_set_fast_mult_zero_zero_p): Account for R6 multiply instructions.
(mips_option_override): Ensure R6 is used with fp64. Set default
mips_nan modes. Check for mips_nan support. Prevent DSP with R6.
(mips_conditional_register_usage): Disable MD_REGS for R6. Disable
FPSW for R6.
(mips_mulsidi3_gen_fn): Support R6 multiply instructions.
* config/mips/mips.h (ISA_MIPS32R6, ISA_MIPS64R6): Define.
(TARGET_CPU_CPP_BUILTINS): Rework for mips32/mips64.
(ISA_HAS_JR): New macro.
(ISA_HAS_HILO): New macro.
(ISA_HAS_R6MUL): Likewise.
(ISA_HAS_R6DMUL): Likewise.
(ISA_HAS_R6DIV): Likewise.
(ISA_HAS_R6DDIV): Likewise.
(ISA_HAS_CCF): Likewise.
(ISA_HAS_SEL): Likewise.
(ISA_HAS_COND_TRAPI): Likewise.
(ISA_HAS_FP_MADDF_MSUBF): Likewise.
(ISA_HAS_LWL_LWR): Likewise.
(ISA_HAS_IEEE_754_LEGACY): Likewise.
(ISA_HAS_IEEE_754_2008): Likewise.
(ISA_HAS_PREFETCH_9BIT): Likewise.
(MIPSR6_9BIT_OFFSET_P): New macro.
(BASE_DRIVER_SELF_SPECS): Use MIPS_ISA_DRIVER_SELF_SPECS.
(DRIVER_SELF_SPECS): Use MIPS_ISA_LEVEL_SPEC.
(MULTILIB_ISA_DEFAULT): Handle mips32r6 and mips64r6.
(MIPS_ISA_LEVEL_SPEC): Likewise.
(MIPS_ISA_SYNCI_SPEC): Likewise.
(ISA_HAS_64BIT_REGS): Likewise.
(ISA_HAS_BRANCHLIKELY): Likewise.
(ISA_HAS_MUL3): Likewise.
(ISA_HAS_DMULT): Likewise.
(ISA_HAS_DDIV): Likewise.
(ISA_HAS_DIV): Likewise.
(ISA_HAS_MULT): Likewise.
(ISA_HAS_FP_CONDMOVE): Likewise.
(ISA_HAS_8CC): Likewise.
(ISA_HAS_FP4): Likewise.
(ISA_HAS_PAIRED_SINGLE): Likewise.
(ISA_HAS_MADD_MSUB): Likewise.
(ISA_HAS_FP_RECIP_RSQRT): Likewise.
* config/mips/mips.md (processor): Add w32 and w64.
(FPCC): New mode iterator.
(reg): Add CCF mode.
(fpcmp): New mode attribute.
(fcond): Add ordered, ltgt and ne codes.
(fcond): Update code attribute.
(sel): New code attribute.
(selinv): Likewise.
(ctrap<mode>4): Update condition.
(*conditional_trap_reg<mode>): New define_insn.
(*conditional_trap<mode>): Update condition.
(mul<mode>3): Expand R6 multiply instructions.
(<su>mulsi3_highpart): Likewise.
(<su>muldi3_highpart): Likewise.
(mul<mode>3_mul3_loongson): Rename...
(mul<mode>3_mul3_hilo): To this. Add R6 mul instruction.
(<u>mulsidi3_32bit_r6): New expander.
(<u>mulsidi3_32bit): Restrict to pre-r6 multiplies.
(<u>mulsidi3_32bit_r4000): Likewise.
(<u>mulsidi3_64bit): Likewise.
(<su>mulsi3_highpart_internal): Likewise.
(mulsidi3_64bit_r6dmul): New instruction.
(<su>mulsi3_highpart_r6): Likewise.
(<su>muldi3_highpart_r6): Likewise.
(fma<mode>4): Likewise.
(movccf): Likewise.
(*sel<code><GPR:mode>_using_<GPR2:mode>): Likewise.
(*sel<mode>): Likewise.
(<u>div<mode>3): Moved from loongson.md. Add R6 instructions.
(<u>mod<mode>3): Likewise.
(extvmisalign<mode>): Require ISA_HAS_LWL_LWR.
(extzvmisalign<mode>): Likewise.
(insvmisalign<mode>): Likewise.
(mips_cache): Account for R6 displacement field sizes.
(*branch_fp): Rename...
(*branch_fp_<mode>): To this. Add CCFmode support.
(*branch_fp_inverted): Rename...
(*branch_fp_inverted_<mode>): To this. Add CCFmode support.
(s<code>_<mode>): Rename...
(s<code>_<SCALARF:mode>_using_<FPCC:mode>): To this. Add FCCmode
condition support.
(s<code>_<mode> swapped): Rename...
(s<code>_<SCALARF:mode>_using_<FPCC:mode> swapped): To this. Add
CCFmode condition support.
(mov<mode>cc GPR): Expand R6 selects.
(mov<mode>cc FPR): Expand R6 selects.
(*tls_get_tp_<mode>_split): Do not .set push for >= mips32r2.
* config/mips/netbsd.h (TARGET_CPU_CPP_BUILTINS): Update similarly to
mips.h.
(ASM_SPEC): Add mips32r6, mips64r6.
* config/mips/t-isa3264 (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): Update
for mips32r6/mips64r6.
* doc/invoke.texi: Document -mips32r6,-mips64r6.
* doc/md.texi: Update comment for ZD constraint.
libgcc/
* config.host: Support mipsisa32r6 and mipsisa64r6.
* config/mips/mips16.S: Do not build for R6.
gcc/testsuite/
* gcc.dg/torture/mips-hilo-2.c: Unconditionally pass for R6 onwards.
* gcc.dg/torture/pr19683-1.c: Likewise.
* gcc.target/mips/branch-cost-2.c: Require MOVN.
* gcc.target/mips/movcc-1.c: Likewise.
* gcc.target/mips/movcc-2.c: Likewise.
* gcc.target/mips/movcc-3.c: Likewise.
* gcc.target/mips/call-saved-4.c: Require LDC.
* gcc.target/mips/dmult-1.c: Require R5 or earlier.
* gcc.target/mips/fpcmp-1.c: Likewise.
* gcc.target/mips/fpcmp-2.c: Likewise.
* gcc.target/mips/neg-abs-2.c: Likewise.
* gcc.target/mips/timode-1.c: Likewise.
* gcc.target/mips/unaligned-1.c: Likewise.
* gcc.target/mips/madd-3.c: Require MADD.
* gcc.target/mips/madd-9.c: Likewise.
* gcc.target/mips/maddu-3.c: Likewise.
* gcc.target/mips/msub-3.c: Likewise.
* gcc.target/mips/msubu-3.c: Likewise.
* gcc.target/mips/mult-1.c: Require INS and not DMUL.
* gcc.target/mips/mips-ps-type-2.c: Require MADD.PS.
* gcc.target/mips/mips.exp (mips_option_groups): Add ins, dmul, ldc,
movn, madd, maddps.
(mips-dg-options): INS available from R2. LDC available from MIPS II,
DMUL is present in octeon. Describe all features removed from R6.
Co-Authored-By: Steve Ellcey <sellcey@imgtec.com>
From-SVN: r218973
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libgcc/
* config/sh/crt.h: New.
* config/sh/crti.S: Use GLOBAL macro from crt.h for _init and _fini
symbols.
* config/sh/crt1.S: Likewise.
From-SVN: r218807
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array bounds [-Warray-bounds])
PR libgcc/63832
* crtstuff.c (__do_global_dtors_aux) [HIDDEN_DTOR_LIST_END]: Use
func_ptr *dtor_list temporary variable to avoid "array subscript
is above array bounds" warnings.
From-SVN: r218759
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From-SVN: r218608
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From-SVN: r218542
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From-SVN: r218541
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2014-12-09 Michael Haubenwallner <michael.haubenwallner@ssi-schaefer.com>
(libgcc_s) Optional filename-based shared library versioning on AIX.
* gcc/doc/install.texi: Describe --with-aix-soname option.
* Makefile.in (with_aix_soname): Define.
* config/rs6000/t-slibgcc-aix: Act upon --with-aix-soname option.
* configure.ac: Accept --with-aix-soname=aix|svr4|both option.
* configure: Recreate.
From-SVN: r218539
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2014-12-05 Olivier Hainque <hainque@adacore.com>
gcc/
* defaults.h: (DWARF_REG_TO_UNWIND_COLUMN): Define default.
* dwarf2cfi.c (init_one_dwarf_reg_size): Honor
DWARF_REG_TO_UNWIND_COLUMN.
libgcc/
* unwind-dw2.c (DWARF_REG_TO_UNWIND_COLUMN): Remove default def,
now provided by defaults.h.
From-SVN: r218429
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defined.
libgcc/
* config/sh/lib1funcs.S: Check value of __SHMEDIA__ instead of checking
whether it's defined.
From-SVN: r218190
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gcc/
* config/i386/cpuid.h (bit_MPX, bit_BNDREGS, bit_BNDCSR):
Define.
* config/i386/i386.c (get_builtin_code_for_version): Add avx512f.
(fold_builtin_cpu): Ditto.
* doc/extend.texi: Documment it.
gcc/testsuite/
* g++.dg/ext/mv2.C: Add test for target ("avx512f").
* gcc.target/i386/builtin_target.c: Ditto.
libgcc/
* config/i386/cpuinfo.c (processor_features): Add FEATURE_AVX512F.
* config/i386/cpuinfo.c (get_available_features): Detect it.
From-SVN: r218125
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L_arm_muldivsf3 and L_arm_muldivdf3.
2014-11-27 Tony Wang <tony.wang@arm.com>
libgcc/
* config/arm/lib1funcs.S (FUNC_START): Add conditional section
redefine for macro L_arm_muldivsf3 and L_arm_muldivdf3.
(SYM_END, ARM_SYM_START): Add macros used to expose function Symbols.
From-SVN: r218124
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libgcc/
* crtstuff.c (__do_glbal_ctors_1): Add missing semicolon.
From-SVN: r218055
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* config/pa/linux-atomic.c (ABORT_INSTRUCTION): Use __builtin_trap()
instead.
From-SVN: r218033
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* config/pa/linux-atomic.c (__kernel_cmpxchg2): New.
(FETCH_AND_OP_2): New. Use for subword and double word operations.
(OP_AND_FETCH_2): Likewise.
(COMPARE_AND_SWAP_2): Likewise.
(SYNC_LOCK_TEST_AND_SET_2): Likewise.
(SYNC_LOCK_RELEASE_2): Likewise.
(SUBWORD_SYNC_OP): Remove.
(SUBWORD_VAL_CAS): Likewise.
(SUBWORD_BOOL_CAS): Likewise.
(FETCH_AND_OP_WORD): Update.
Consistently use signed types.
Co-Authored-By: John David Anglin <danglin@gcc.gnu.org>
From-SVN: r217956
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* configure: Regenerate.
* configure.ac (--enable-as-accelerator-for)
(--enable-offload-targets): New configure options.
gcc/
* Makefile.in (real_target_noncanonical, accel_dir_suffix)
(enable_as_accelerator): New variables substituted by configure.
(libsubdir, libexecsubdir, unlibsubdir): Tweak for the possibility of
being configured as an offload compiler.
(DRIVER_DEFINES): Pass new defines DEFAULT_REAL_TARGET_MACHINE and
ACCEL_DIR_SUFFIX.
(install-cpp, install-common, install_driver, install-gcc-ar): Do not
install for the offload compiler.
* config.in: Regenerate.
* configure: Regenerate.
* configure.ac (real_target_noncanonical, accel_dir_suffix)
(enable_as_accelerator): Compute new variables.
(ACCEL_COMPILER): Define if the compiler is built as the accel compiler.
(OFFLOAD_TARGETS): List of target names suitable for offloading.
(ENABLE_OFFLOADING): Define if list of offload targets is not empty.
gcc/cp/
* Make-lang.in (c++.install-common): Do not install for the offload
compiler.
gcc/doc/
* install.texi (Options specification): Document
--enable-as-accelerator-for and --enable-offload-targets.
gcc/fortran/
* Make-lang.in (fortran.install-common): Do not install for the offload
compiler.
libgcc/
* Makefile.in (crtoffloadbegin$(objext)): New rule.
(crtoffloadend$(objext)): Likewise.
* configure: Regenerate.
* configure.ac (accel_dir_suffix): Compute new variable.
(extra_parts): Add crtoffloadbegin.o and crtoffloadend.o
if enable_offload_targets is not empty.
* offloadstuff.c: New file.
libgomp/
* config.h.in: Regenerate.
* configure: Regenerate.
* configure.ac: Check for libdl, required for plugin support.
(PLUGIN_SUPPORT): Define if plugins are supported.
(enable_offload_targets): Support Intel MIC targets.
(OFFLOAD_TARGETS): List of target names suitable for offloading.
lto-plugin/
* Makefile.am (libexecsubdir): Tweak for the possibility of being
configured for offload compiler.
(accel_dir_suffix, real_target_noncanonical): New variables substituted
by configure.
* Makefile.in: Regenerate.
* configure: Regenerate.
* configure.ac (accel_dir_suffix, real_target_noncanonical): Compute new
variables.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Thomas Schwinge <thomas@codesourcery.com>
From-SVN: r217485
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* config/rl78/divmodhi.S: Add support for the G10 architecture.
Use START_FUNC and END_FUNC macros to enable linker garbage
collection.
* config/rl78/divmodqi.S: Likewise.
* config/rl78/divmodsi.S: Likewise.
* config/rl78/mulsi3.S: Likewise.
* config/rl78/lib2div.c: Remove G10 functions.
* config/rl78/lib2muls.c: Likewise.
* config/rl78/t-rl8 (HOST_LIBGCC2_CFLAGS): Define.
* config/rl78/vregs.h (START_FUNC): New macro.
(END_FUNC): New macro.
From-SVN: r217463
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2014-11-12 Matthew Fortune <matthew.fortune@imgtec.com>
gcc/
* common/config/mips/mips-common.c (mips_handle_option): Ensure
that -mfp32, -mfp64 disable -mfpxx and -mfpxx disables -mfp64.
* config.gcc (--with-fp-32): New option.
(--with-odd-spreg-32): Likewise.
* config.in (HAVE_AS_DOT_MODULE): New config define.
* config/mips/mips-protos.h
(mips_secondary_memory_needed): New prototype.
(mips_hard_regno_caller_save_mode): Likewise.
* config/mips/mips.c (mips_get_reg_raw_mode): New static prototype.
(mips_get_arg_info): Assert that V2SFmode is only handled specially
with TARGET_PAIRED_SINGLE_FLOAT.
(mips_return_mode_in_fpr_p): Likewise.
(mips16_call_stub_mode_suffix): Likewise.
(mips_get_reg_raw_mode): New static function.
(mips_return_fpr_pair): O32 return values span two registers.
(mips16_build_call_stub): Likewise.
(mips_function_value_regno_p): Support both FP return registers.
(mips_output_64bit_xfer): Use mthc1 whenever TARGET_HAS_MXHC1. Add
specific cases for TARGET_FPXX to move via memory.
(mips_dwarf_register_span): For TARGET_FPXX pretend that modes larger
than UNITS_PER_FPREG 'span' one register.
(mips_dwarf_frame_reg_mode): New static function.
(mips_file_start): Switch to using .module instead of .gnu_attribute.
No longer support FP ABI 4 (-mips32r2 -mfp64), replace with FP ABI 6.
Add FP ABI 5 (-mfpxx) and FP ABI 7 (-mfp64 -mno-odd-spreg).
(mips_save_reg, mips_restore_reg): Always represent DFmode frame
slots with two CFI directives even for O32 FP64.
(mips_for_each_saved_gpr_and_fpr): Account for fixed_regs when
saving/restoring callee-saved registers.
(mips_hard_regno_mode_ok_p): Implement O32 FP64A extension.
(mips_secondary_memory_needed): New function.
(mips_option_override): ABI check for TARGET_FLOATXX. Disable
odd-numbered single-precision registers when using TARGET_FLOATXX.
Implement -modd-spreg and defaults.
(mips_conditional_register_usage): Redefine O32 FP64 to match O32 FP32
callee-saved behaviour.
(mips_hard_regno_caller_save_mode): Implement.
(TARGET_GET_RAW_RESULT_MODE): Define target hook.
(TARGET_GET_RAW_ARG_MODE): Define target hook.
(TARGET_DWARF_FRAME_REG_MODE): Define target hook.
* config/mips/mips.h (TARGET_FLOAT32): New macro.
(TARGET_O32_FP64A_ABI): Likewise.
(TARGET_CPU_CPP_BUILTINS): TARGET_FPXX is __mips_fpr==0. Add
_MIPS_SPFPSET builtin define.
(MIPS_FPXX_OPTION_SPEC): New macro.
(OPTION_DEFAULT_SPECS): Pass through --with-fp-32=* to -mfp and
--with-odd-spreg-32=* to -m[no-]odd-spreg.
(ISA_HAS_ODD_SPREG): New macro.
(ISA_HAS_MXHC1): True for anything other than -mfp32.
(ASM_SPEC): Pass through mfpxx, mfp64, -mno-odd-spreg and -modd-spreg.
(MIN_FPRS_PER_FMT): Redefine in terms of TARGET_ODD_SPREG.
(HARD_REGNO_CALLER_SAVE_MODE): Define. Implement O32 FPXX extension
(HARD_REGNO_CALL_PART_CLOBBERED): Likewise.
(SECONDARY_MEMORY_NEEDED): Likewise.
(FUNCTION_ARG_REGNO_P): Update for O32 FPXX and FP64 extensions.
* config/mips/mips.md (define_attr enabled): Implement O32 FPXX and
FP64A ABI extensions.
(move_doubleword_fpr<mode>): Use ISA_HAS_MXHC1 instead of
TARGET_FLOAT64.
* config/mips/mips.opt (mfpxx): New target option.
(modd-spreg): Likewise.
* config/mips/mti-elf.h (DRIVER_SELF_SPECS): Infer FP ABI from arch.
* config/mips/mti-linux.h (DRIVER_SELF_SPECS): Likewise and remove
fp64 sysroot.
* config/mips/t-mti-elf: Remove fp64 multilib.
* config/mips/t-mti-linux: Likewise.
* configure.ac: Detect .module support.
* configure: Regenerate.
* doc/invoke.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg option.
* doc/install.texi (--with-fp-32, --with-odd-spreg-32): Document new
options.
gcc/testsuite/
* gcc.target/mips/args-1.c: Handle __mips_fpr == 0.
* gcc.target/mips/call-clobbered-1.c: New.
* gcc.target/mips/call-clobbered-2.c: New.
* gcc.target/mips/call-clobbered-3.c: New.
* gcc.target/mips/call-clobbered-4.c: New.
* gcc.target/mips/call-clobbered-5.c: New.
* gcc.target/mips/call-saved-4.c: New.
* gcc.target/mips/call-saved-5.c: New.
* gcc.target/mips/call-saved-6.c: New.
* gcc.target/mips/mips.exp: Support -mfpxx, -ffixed-f*,
and -m[no-]odd-spreg. Use _MIPS_SPFPSET to determine default
odd-spreg option. Account for -modd-spreg in minimum arch code.
* gcc.target/mips/movdf-1.c: New.
* gcc.target/mips/movdf-2.c: New.
* gcc.target/mips/movdf-3.c: New.
* gcc.target/mips/oddspreg-1.c: New.
* gcc.target/mips/oddspreg-2.c: New.
* gcc.target/mips/oddspreg-3.c: New.
* gcc.target/mips/oddspreg-4.c: New.
* gcc.target/mips/oddspreg-5.c: New.
* gcc.target/mips/oddspreg-6.c: New.
libgcc/
* config/mips/mips16.S: Set .module when supported. Update O32
FP64 calling convention and use for FPXX when possible. Add FPXX
calling convention fallback case.
From-SVN: r217446
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* configure.ac: Handle nvptx-*-*.
* configure: Regenerate.
gcc/
* config/nvptx/nvptx.c: New file.
* config/nvptx/nvptx.h: New file.
* config/nvptx/nvptx-protos.h: New file.
* config/nvptx/nvptx.md: New file.
* config/nvptx/t-nvptx: New file.
* config/nvptx/nvptx.opt: New file.
* common/config/nvptx/nvptx-common.c: New file.
* config.gcc: Handle nvptx-*-*.
libgcc/
* config.host: Handle nvptx-*-*.
* shared-object.mk (as-flags-$o): Define.
($(base)$(objext), $(base)_s$(objext)): Use it instead of
-xassembler-with-cpp.
* static-object.mk: Identical changes.
* config/nvptx/t-nvptx: New file.
* config/nvptx/crt0.s: New file.
* config/nvptx/free.asm: New file.
* config/nvptx/malloc.asm: New file.
* config/nvptx/realloc.c: New file.
From-SVN: r217295
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Continuing preparations for implementing
TARGET_ATOMIC_ASSIGN_EXPAND_FENV for powerpc*-*-linux* soft-float and
e500, this patch makes soft-fp symbols used for those targets into
compat symbols when building with glibc >= 2.19, so that they are only
in shared libgcc for existing binaries requiring them, not in static
libgcc and not available for new links using shared libgcc. Instead,
new links will get the symbols from libc, which has exported all of
them since 2.19. (Actually all the symbols were exported from glibc
since 2.4, but some of them were exported by glibc as compat symbols
only - because of a confusion between deliberately present soft-fp
symbols and old accidental reexports of libgcc functions from glibc
2.0 - until 2.19.)
This allows user floating-point arithmetic to interoperate properly
with the state handled by <fenv.h> functions, whether software state
(for soft-float; TLS variables that don't form a public part of
glibc's ABI, so can only be accessed directly by functions within
glibc) or hardware state (for e500 - the copies of the soft-fp
functions in glibc being built to interoperate with the hardware state
whereas those in libgcc aren't). Previously only glibc's own
functions, and those operations done in hardware on e500, properly
worked with that state, not direct floating-point arithmetic
operations that were implemented in software.
The intended next step is the actual TARGET_ATOMIC_ASSIGN_EXPAND_FENV
implementation.
The test of glibc >= 2.19 uses the same --with-glibc-version configure
option as in the gcc/ directory (but differently implemented; in gcc/
the fallback is to examine headers to find the version, while in
libgcc/ we can use compile for the target and so use AC_COMPUTE_INT).
The TARGET_ATOMIC_ASSIGN_EXPAND_FENV implementation will also only do
anything for glibc >= 2.19, as it will depend on generating calls to
functions __atomic_feholdexcept __atomic_feclearexcept
__atomic_feupdateenv that were added in 2.19 for that purpose (even
for e500, inline code is not readily possible because of the need to
make prctl syscalls from the implementation of these functions).
In order to make symbols compat symbols, the soft-fp files need
wrapping with generated wrappers including asm .symver directives,
which need to name the symbol version in question. This is extracted
by an awk script from an intermediate stage of generating the .map
file for linking libgcc (that .map itself depends on the objects that
go into the library, so can't be used for this purpose as that would
mean a circular dependency); the extraction is not fully general
regarding the features available in .map generation, but suffices for
the present purpose.
It would make sense for hardfp.c symbols to be compat symbols as well
(in the cases where hardfp.c gets used, the functions in question
should not be used for new links), but this isn't required for the
present purpose, which is only concerned with ensuring that where
functions that should be affected by rounding modes or exceptions get
used, those functions are actually affected by those rounding modes or
exceptions.
Tested with no regressions with cross to powerpc-linux-gnu
(soft-float); c11-atomic-exec-5.c moves from UNSUPPORTED to FAIL, as
expected, now that floating-point arithmetic in user programs uses the
same state as <fenv.h> functions, so the fenv_exceptions test passes,
but TARGET_ATOMIC_ASSIGN_EXPAND_FENV isn't yet implemented. (For
e500, c11-atomic-exec-5.c was already FAILing, as enough operations
worked with the hardware state for the fenv_exceptions effective
target test to pass.) Also verified that the exported symbols and
versions are unchanged, with the expected symbols becoming compat
symbols at the same versions, and that with --with-glibc-version=2.18
the symbols remain normal rather than compat symbols.
* Makefile.in (libgcc.map.in): New target.
(libgcc.map): Use libgcc.map.in.
* config/t-softfp (softfp_compat): New variable to be set by
users.
[$(softfp_compat) = y] (softfp_map_dep, softfp_set_symver): New
variables.
[$(softfp_compat) = y] (softfp_file_list): Use files in the build
directory.
[$(softfp_compat) = y] ($(softfp_file_list)): Generate wrappers
that use compat symbols and disable all code unless [SHARED].
* config/t-softfp-compat: New file.
* find-symver.awk: New file.
* configure.ac (--with-glibc-version): New configure option.
(ppc_fp_compat): New variable set for powerpc*-*-linux*.
* configure: Regenerate.
* config.host (powerpc*-*-linux*): Use ${ppc_fp_compat} for
soft-float and e500.
From-SVN: r216942
|
|
Continuing the cleanups of libgcc soft-fp configuration for
powerpc*-*-linux* in preparation for implementing
TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float and e500, this patch
optimizes the choice of which functions to build for the e500 cases.
For e500v2, use of hardfp is generally right, except that calls to
__unordsf2 and __unorddf2 are actually generated by GCC from
__builtin_isunordered and so they need to be implemented with soft-fp
to avoid recursively calling themselves. For e500v1, hardfp is right
for SFmode (except for __unordsf2) but soft-fp for DFmode (and when
using soft-fp, as usual it's best for the conversions between DFmode
and integers all to come directly from soft-fp rather than some coming
from libgcc2.c). Thus, new variables hardfp_exclusions and
softfp_extras are added that configurations using t-hardfp and
t-softfp can use to achieve the desired effect of selectively mixing
the two sources of functions.
Tested with no regressions for crosses to powerpc-linux-gnuspe (both
e500v1 and e500v2); also checked that the same set of symbols and
versions is exported from shared libgcc before and after the patch.
* config/t-hardfp (hardfp_exclusions): Document new variable for
user to define.
(hardfp_func_list): Exclude functions from $(hardfp_exclusions).
* config/t-softfp (softfp_extras): Document new variable for user
to define.
(softfp_func_list): Add functions from $(softfp_extras).
* config/rs6000/t-e500v1-fp, config/rs6000/t-e500v2-fp: New files.
* config.host (powerpc*-*-linux*): For e500v1, use
rs6000/t-e500v1-fp and t-hardfp; do not use t-softfp-sfdf and
t-softfp-excl. For e500v2, use t-hardfp-sfdf, rs6000/t-e500v2-fp
and t-hardfp; do not use t-softfp-sfdf and t-softfp-excl.
From-SVN: r216835
|
|
* config/pa/linux-unwind.h (pa32_read_access_ok): New function.
(pa32_fallback_frame_state): Use pa32_read_access_ok to check if
memory read accesses are ok.
From-SVN: r216716
|
|
Continuing the cleanups of libgcc soft-fp configuration for
powerpc*-*-linux* in preparation for implementing
TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float and e500, this patch
optimizes the choice of which functions to build for the 32-bit
classic hard-float and soft-float cases. (e500 will be dealt with in
a separate patch which will need to add new features to t-hardfp and
t-softfp; this patch keeps the status quo for e500.)
For hard-float, while the functions in question are part of the libgcc
ABI there is no need for them to contain software floating point code:
no newly built code should use them, and if anything does use them
it's most efficient (space and speed) for them to pass straight
through to floating-point hardware instructions; this case is made to
use t-hardfp to achieve that. For soft-float, direct use of soft-fp
functions for operations involving DImode or unsigned integers is more
efficient than using the libgcc2.c versions of those operations to
convert to operations on other types (which then end up calling
soft-fp functions for those other types, possibly more than once);
this case is thus stopped from using t-softfp-excl. (A future patch
will stop the e500 cases from using t-softfp-excl as well.)
Tested with no regressions for crosses to powerpc-linux-gnu (soft
float and classic hard float); also checked that the same set of
symbols and versions is exported from shared libgcc before and after
the patch.
* configure.ac (ppc_fp_type): Set variable on powerpc*-*-linux*.
* configure: Regenerate.
* config.host (powerpc*-*-linux*): Use $ppc_fp_type to determine
additions to tmake_file. Use t-hardfp-sfdf and t-hardfp instead
of soft-fp for 32-bit classic hard float. Do not use
t-softfp-excl for soft float.
From-SVN: r216687
|
|
When I added support for using soft-fp in libgcc
<https://gcc.gnu.org/ml/gcc-patches/2006-03/msg00689.html>, libgcc
configuration was still done in the gcc/ directory, meaning that the
variables set in makefile fragments could not depend on the multilib
being built. Thus, building the soft-fp code for powerpc64-linux-gnu
was disabled in the same way as had been done with fp-bit: the code
was built, but with #ifndef __powerpc64__ wrappers around it so that
the resulting objects were empty.
Now that libgcc configuration is done in the toplevel libgcc
directory, such uses of softfp_wrap_start / softfp_wrap_end are better
replaced by configure-time conditionals that determine whether to use
soft-fp for a given multilib. This patch does so for
powerpc*-*-linux*. The same would appear to apply to
powerpc*-*-freebsd* (using rs6000/t-freebsd64), but I have not made
any changes there. t-ppc64-fp is also used by AIX targets, but they
don't use soft-fp anyway so the changes are of no consequence to them.
The same principle of replacing softfp_wrap_start / softfp_wrap_end
with configure-time conditionals also applies to
softfp_exclude_libgcc2, which was intended for cases where soft-fp is
being used on hard-float multilibs and so it is desirable on those
multilibs for a few functions to come from libgcc2.c rather than
soft-fp (but the soft-fp versions would be more efficient on
soft-float multilibs). Now we have hardfp.c and t-hardfp, those are
better to use in that case, to minimize the size of the bulk of the
functions that are only present for ABI compatibility and should never
be called by newly compiled code.
I intend followup patches to switch 32-bit hard-float multilibs to use
t-hardfp as far as possible (for all non-libgcc2.c operations for
classic hard float; for all except __unord* for e500v2; for all SFmode
operations except __unordsf2 for e500v1). After that will come making
the soft-fp operations, in the remaining cases for which they are
built because they are actually needed for code compiled by current
GCC, into compat symbols when building for glibc 2.19 or later, so
that the glibc versions (with exception and rounding mode support) get
used instead (2.19 or later is needed for all the functions to be
exported from glibc as non-compat symbols). In turn, that is required
before implementing TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float
and e500, as that can only be properly effective when GCC-compiled
code is actually interoperating correctly with the exception and
rounding mode state used by <fenv.h> functions.
Tested with no regressions with cross to powerpc64-linux-gnu (in
addition, verified that stripped libgcc_s.so.1 is identical before and
after the patch).
* config.host (powerpc*-*-linux*): Only use soft-fp for 32-bit
configurations.
* config/rs6000/t-ppc64-fp (softfp_wrap_start, softfp_wrap_end):
Remove variables.
From-SVN: r216564
|
|
trunk r216525.
* config/avr/lib1funcs.S (__do_global_dtors): Fix wrong code
introduced with 2014-10-21 trunk r216525.
From-SVN: r216550
|
|
gcc:
2014-10-21 Joern Rennecke <joern.rennecke@embecosm.com>
Vidya Praveen <vidya.praveen@atmel.com>
Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
Pitchumani Sivanupandi <Pitchumani.S@atmel.com>
* config/avr/avr-c.c (avr_cpu_cpp_builtins): Don't define
__MEMX for avrtiny.
* config/avr/avr.c (avr_insert_attributes): Reject __memx for avrtiny.
(avr_nonconst_pointer_addrspace): Likewise.
* config/avr/avr.h (AVR_HAVE_LPM): Define.
Added AVRTINY architecture to avr target.
* config/avr/avr-arch.h (avr_arch): Added AVRTINY architecture.
(base_arch_s): member added for AVRTINY architecture.
* config/avr/avr.c: Added TINY_ADIW, TINY_SBIW macros as AVRTINY
alternate for adiw/sbiw instructions. Added AVR_TMP_REGNO and
AVR_ZERO_REGNO macros for tmp and zero registers. Replaced TMP_REGNO
and ZERO_REGNO occurrences by AVR_TMP_REGNO and AVR_ZERO_REGNO
respectively. LAST_CALLEE_SAVED_REG macro added for the last register
in callee saved register list.
(avr_option_override): CCP address updated for AVRTINY.
(avr_init_expanders): tmp and zero rtx initialized as per arch.
Reset avr_have_dimode if AVRTINY.
(sequent_regs_live): Use LAST_CALLEE_SAVED_REG instead magic number.
(emit_push_sfr): Use AVR_TMP_REGNO for tmp register number.
(avr_prologue_setup_frame): Don't minimize prologue if AVRTINY.
Use LAST_CALLEE_SAVED_REG to refer last callee saved register.
(expand_epilogue): Likewise.
(avr_print_operand): Print CCP address in case of AVRTINY also.
<TBD>bad address
(function_arg_regno_p): Check different register list for arguments
if AVRTINY.
(init_cumulative_args): Check for AVRTINY to update number of argument
registers.
(tiny_valid_direct_memory_access_range): New function. Return false if
direct memory access range is not in accepted range for AVRTINY.
(avr_out_movqi_r_mr_reg_disp_tiny): New function to handle register
indirect load (with displacement) for AVRTINY.
(out_movqi_r_mr): Updated instruction length for AVRTINY. Call
avr_out_movqi_r_mr_reg_disp_tiny for load from reg+displacement.
(avr_out_movhi_r_mr_reg_no_disp_tiny): New function to handle register
indirect load (no displacement) for AVRTINY.
(avr_out_movhi_r_mr_reg_disp_tiny): New function to handle register
indirect load (with displacement) for AVRTINY.
(avr_out_movhi_r_mr_pre_dec_tiny): New function to handle register
indirect load for pre-decrement address.
(out_movhi_r_mr): In case of AVRTINY, call tiny register indirect load
functions. Update instruction length for AVRTINY.
(avr_out_movsi_r_mr_reg_no_disp_tiny): New function. Likewise, for
SImode.
(avr_out_movsi_r_mr_reg_disp_tiny): New function. Likewise, for SImode.
(out_movsi_r_mr): Likewise, for SImode.
(avr_out_movsi_mr_r_reg_no_disp_tiny): New function to handle register
indirect store (no displacement) for AVRTINY.
(avr_out_movsi_mr_r_reg_disp_tiny): New function to handle register
indirect store (with displacement) for AVRTINY.
(out_movsi_mr_r): Emit out insn for IO address store. Update store
instruction's size for AVRTINY. For AVRTINY, call tiny SImode indirect
store functions.
(avr_out_load_psi_reg_no_disp_tiny): New function to handle register
indirect load (no displacement) for PSImode in AVRTINY.
(avr_out_load_psi_reg_disp_tiny): New function to handle register
indirect load (with displacement) for PSImode in AVRTINY.
(avr_out_load_psi): Call PSImode register indirect load functions for
AVRTINY. Update instruction length for AVRTINY.
(avr_out_store_psi_reg_no_disp_tiny): New function to handle register
indirect store (no displacement) for PSImode in AVRTINY.
(avr_out_store_psi_reg_disp_tiny): New function to handle register
indirect store (with displacement) for PSImode in AVRTINY.
(avr_out_store_psi): Update instruction length for AVRTINY. Call tiny
register indirect store functions for AVRTINY.
(avr_out_movqi_mr_r_reg_disp_tiny): New function to handle QImode
register indirect store (with displacement) for AVRTINY.
(out_movqi_mr_r): Update instruction length for AVRTINY. Call tiny
register indirect store function for QImode in AVRTINY.
(avr_out_movhi_mr_r_xmega): Update instruction length for AVRTINY.
(avr_out_movhi_mr_r_reg_no_disp_tiny): New function to handle register
indirect store (no displacement) for HImode in AVRTINY.
(avr_out_movhi_mr_r_reg_disp_tiny): New function to handle register
indirect store (with displacement) for HImode in AVRTINY.
(avr_out_movhi_mr_r_post_inc_tiny): New function to handle register
indirect store for post-increment address in HImode.
(out_movhi_mr_r): Update instruction length for AVRTINY. Call tiny
register indirect store function for HImode in AVRTINY.
(avr_out_compare): Use TINY_SBIW/ TINY_ADIW in place of sbiw/adiw
in case of AVRTINY.
(order_regs_for_local_alloc): Updated register allocation order for
AVRTINY.
(avr_conditional_register_usage): New function. It is a target hook
(TARGET_CONDITIONAL_REGISTER_USAGE) function which updates fixed, call
used registers list and register allocation order for AVRTINY.
(avr_return_in_memory): Update return value size for AVRTINY.
* config/avr/avr-c.c (avr_cpu_cpp_builtins): Added builtin macros
for AVRTINY arch and tiny program memory base address.
* config/avr/avr-devices.c (avr_arch_types): Added AVRTINY arch.
(avr_texinfo): Added description for AVRTINY arch.
* config/avr/avr.h: Added macro to identify AVRTINY arch. Updated
STATIC_CHAIN_REGNUM for AVRTINY.
* config/avr/avr-mcus.def: Added AVRTINY arch devices.
* config/avr/avr.md: Added constants for tmp/ zero registers in
AVRTINY. Attributes for AVRTINY added.
(mov<mode>): Move src/ dest address to register if it is not in AVRTINY
memory access range.
(mov<mode>_insn): Avoid QImode direct load for AVRTINY if address not
in AVRTINY memory access range.
(*mov<mode>): Likewise for HImode and SImode.
(*movsf): Likewise for SFmode.
(delay_cycles_2): Updated instructions to be emitted as AVRTINY does
not have sbiw.
* config/avr/avr-protos.h: Added function prototype for
tiny_valid_direct_memory_access_range.
* config/avr/avr-tables.opt: Regenerate.
* gcc/config/avr/t-multilib: Regenerate.
* doc/avr-mmcu.texi: Regenerate.
gcc/testsuite:
2014-10-21 Joern Rennecke <joern.rennecke@embecosm.com>
* gcc.target/avr/tiny-memx.c: New test.
* gcc.target/avr/tiny-caller-save.c: New test.
libgcc:
2014-10-21 Joern Rennecke <joern.rennecke@embecosm.com>
Vidya Praveen <vidya.praveen@atmel.com>
Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
Pitchumani Sivanupandi <Pitchumani.S@atmel.com>
* config/avr/lib1funcs.S (__do_global_dtors): Go back to descending
order.
Updated library functions for AVRTINY arch.
* config/avr/lib1funcs.S: Updated zero/tmp regs for AVRTINY.
Replaced occurrences of r0/r1 with tmp/zero reg macros.
Added wsubi/ wadi macros that expands conditionally as sbiw/ adiw
or AVRTINY equivalent. Replaced occurrences of sbiw/adiw with
wsubi/wadi macors.
(__mulsi3_helper): Update stack, preserve callee saved regs and
argument from stack. Restore callee save registers.
(__mulpsi3): Likewise.
(__muldi3, __udivmodsi4, __divmodsi4, __negsi2, __umoddi3, __udivmod64,
__moddi3, __adddi3, __adddi3_s8, __subdi3, __cmpdi2, __cmpdi2_s8,
__negdi2, __prologue_saves__, __epilogue_restores__): Excluded for
AVRTINY.
(__tablejump2__): Added lpm equivalent instructions for AVRTINY.
(__do_copy_data): Added new definition for AVRTINY.
(__do_clear_bss): Replace r17 by r18 to preserve zero reg for AVRTINY.
(__load_3, __load_4, __xload_1, __xload_2, __xload_3,
__xload_4, __movmemx_qi, __movmemx_hi): Excluded for AVRTINY.
* config/avr/lib1funcs-fixed.S: Replaced occurrences of r0/r1 with
tmp/zero reg macros. Replaced occurrences of sbiw/adiw with wsubi/wadi
macors.
* config/avr/t-avr (LIB1ASMFUNCS): Remove unsupported functions for
AVRTINY.
Fix broken long multiplication on tiny arch.
Co-Authored-By: Pitchumani Sivanupandi <pitchumani.s@atmel.com>
Co-Authored-By: Praveen Kumar Kaushik <Praveen_Kumar.Kaushik@atmel.com>
Co-Authored-By: Senthil Kumar Selvaraj <Senthil_Kumar.Selvaraj@atmel.com>
Co-Authored-By: Vidya Praveen <vidya.praveen@atmel.com>
From-SVN: r216525
|
|
This patch updates libgcc's copy of soft-fp from glibc, adding a
testcase for a bug fix this brings in.
Bootstrapped with no regressions on x86_64-unknown-linux-gnu.
libgcc:
* soft-fp/double.h: Update from glibc.
* soft-fp/eqdf2.c: Likewise.
* soft-fp/eqsf2.c: Likewise.
* soft-fp/eqtf2.c: Likewise.
* soft-fp/extenddftf2.c: Likewise.
* soft-fp/extended.h: Likewise.
* soft-fp/extendsfdf2.c: Likewise.
* soft-fp/extendsftf2.c: Likewise.
* soft-fp/extendxftf2.c: Likewise.
* soft-fp/gedf2.c: Likewise.
* soft-fp/gesf2.c: Likewise.
* soft-fp/getf2.c: Likewise.
* soft-fp/ledf2.c: Likewise.
* soft-fp/lesf2.c: Likewise.
* soft-fp/letf2.c: Likewise.
* soft-fp/op-1.h: Likewise.
* soft-fp/op-2.h: Likewise.
* soft-fp/op-4.h: Likewise.
* soft-fp/op-8.h: Likewise.
* soft-fp/op-common.h: Likewise.
* soft-fp/quad.h: Likewise.
* soft-fp/single.h: Likewise.
* soft-fp/soft-fp.h: Likewise.
* soft-fp/unorddf2.c: Likewise.
* soft-fp/unordsf2.c: Likewise.
* soft-fp/unordtf2.c: Likewise.
* config/c6x/eqd.c (__c6xabi_eqd): Update call to FP_CMP_EQ_D.
* config/c6x/eqf.c (__c6xabi_eqf): Update call to FP_CMP_EQ_S.
* config/c6x/ged.c (__c6xabi_ged): Update call to FP_CMP_D.
* config/c6x/gef.c (__c6xabi_gef): Update call to FP_CMP_S.
* config/c6x/gtd.c (__c6xabi_gtd): Update call to FP_CMP_D.
* config/c6x/gtf.c (__c6xabi_gtf): Update call to FP_CMP_S.
* config/c6x/led.c (__c6xabi_led): Update call to FP_CMP_D.
* config/c6x/lef.c (__c6xabi_lef): Update call to FP_CMP_S.
* config/c6x/ltd.c (__c6xabi_ltd): Update call to FP_CMP_D.
* config/c6x/ltf.c (__c6xabi_ltf): Update call to FP_CMP_S.
gcc/testsuite:
* gcc.dg/torture/float128-extendxf-underflow.c: New test.
From-SVN: r216048
|
|
2014-10-08 Rong Xu <xur@google.com>
* gcc/gcov-tool.c (profile_overlap): New driver function
to compute profile overlap.
(print_overlap_usage_message): New.
(overlap_usage): New.
(do_overlap): New.
(print_usage): Add calls to overlap function.
(main): Ditto.
* libgcc/libgcov-util.c (read_gcda_file): Fix format.
(find_match_gcov_info): Ditto.
(calculate_2_entries): New.
(compute_one_gcov): Ditto.
(gcov_info_count_all_cold): Ditto.
(gcov_info_count_all_zero): Ditto.
(extract_file_basename): Ditto.
(get_file_basename): Ditto.
(set_flag): Ditto.
(matched_gcov_info): Ditto.
(calculate_overlap): Ditto.
(gcov_profile_overlap): Ditto.
* libgcc/libgcov-driver.c (compute_summary): Make
it avavilable for external calls.
* gcc/doc/gcov-tool.texi: Add documentation.
From-SVN: r216015
|
|
From-SVN: r215976
|
|
2014-10-06 Rong Xu <xur@google.com>
* gcc/Makefile.in: Fix dependence.
* gcc/gcov-counter.def (GCOV_COUNTER_ICALL_TOPNV): Add
indirect call topn profiler.
* gcc/gcov-io.h: Ditto.
* libgcc/Makefile.in: Ditto.
* libgcc/libgcov-driver.c (gcov_sort_n_vals): New utility function.
(gcov_sort_icall_topn_counter): Ditto.
(gcov_sort_topn_counter_arrays): Ditto.
(dump_one_gcov): Sort indirect_call topn counters.
* libgcc/libgcov-merge.c (__gcov_merge_icall_topn): New merge
function.
* libgcc/libgcov-profiler.c (__gcov_topn_value_profiler_body): New
utility function.
(__gcov_indirect_call_topn_profiler): New profiler function.
* libgcc/libgcov-util.c (__gcov_icall_topn_counter_op): New.
* libgcc/libgcov.h: New decls.
From-SVN: r215962
|
|
libgcc/ChangeLog:
2014-10-04 Trevor Saunders <tsaunders@mozilla.com>
* config.host: Remove support for score-*.
contrib/ChangeLog:
2014-10-04 Trevor Saunders <tsaunders@mozilla.com>
* compare-all-tests: Don't test score-*.
* config-list.mk: Likewise.
gcc/ChangeLog:
2014-10-04 Trevor Saunders <tsaunders@mozilla.com>
* common/config/score/score-common.c: Remove.
* config.gcc: Remove support for score-*.
* config/score/constraints.md: Remove.
* config/score/elf.h: Remove.
* config/score/predicates.md: Remove.
* config/score/score-conv.h: Remove.
* config/score/score-generic.md: Remove.
* config/score/score-modes.def: Remove.
* config/score/score-protos.h: Remove.
* config/score/score.c: Remove.
* config/score/score.h: Remove.
* config/score/score.md: Remove.
* config/score/score.opt: Remove.
* doc/md.texi: Don't document score-*.
From-SVN: r215889
|
|
This patch removes the target macro LIBGCC2_LONG_DOUBLE_TYPE_SIZE.
After recent changes, this macro was used in two ways in libgcc: to
determine the mode of long double in dfp-bit.h, and to determine
whether a particular mode has excess precision for use in complex
multiplication.
The former is concerned specifically with long double: it relates to
use of strtold for converting between decimal and binary floating
point. This is replaced by comparing __LDBL_MANT_DIG__ with the
appropriate __LIBGCC_*_MANT_DIG__ macro. The latter is replaced
__LIBGCC_*_EXCESS_PRECISION__ predefined macros.
Remarks:
* Comparing (__LDBL_MANT_DIG__ == __LIBGCC_XF_MANT_DIG__) is more
fragile than it looks; it's possible for XFmode to have 53-bit
mantissa (TARGET_96_ROUND_53_LONG_DOUBLE, on FreeBSD and
DragonFlyBSD 32-bit), in which case such a comparison would not
distinguish XFmode and DFmode as possible modes for long double.
Fortunately, no target supporting that form of XFmode also supports
long double = double (but if some target did, we'd need e.g. an
additional macro giving the exponent range of each mode).
Furthermore, this code doesn't actually get used for x86 (or any
other target with XFmode support), because x86 uses BID not DPD and
BID has its own conversion code (which handles conversions for both
XFmode and TFmode without needing to go via strtold). And FreeBSD
and DragonFlyBSD aren't among the targets with DFP support. So
while in principle this code is fragile and it's a deficiency that
it can't support both XFmode and TFmode at once (something that
can't be solved with the string conversion approach without libc
having TS 18661 functions such as strtof128), all these issues
should not be a problem in practice.
* If other cases of excess precision are supported in future, the code
for defining __LIBGCC_*_EXCESS_PRECISION__ may need updating.
Although the most likely such cases might not actually involve
excess precision for any mode used in libgcc - FLT_EVAL_METHOD being
32 to do _Float16 arithmetic on _Float32 should have the effect of
_Complex _Float16 arithmetic using __mulsc3 and __divsc3, rather
than currently nonexistent __mulhc3 and __divhc3 as in bug 63250 for
ARM.
* As has been noted in the context of simultaneous support for
__float128 and __ibm128 on Power, the semantics of macros such as
LONG_DOUBLE_TYPE_SIZE are problematic because they rely on a
poorly-defined precision value for floating-point modes (which seems
to be intended as the number of significant bits in the
representation, e.g. 80 for XFmode which may be either 12 or 16
bytes) uniquely identifying a mode (although defining an arbitrarily
different value for one of the modes you wish to distinguish may
work as a hack). It would be cleaner to have a target hook that
gives a machine mode directly for float, double and long double,
rather than going via these precision values. By eliminating all
use of these macros (FLOAT_TYPE_SIZE, DOUBLE_TYPE_SIZE,
LONG_DOUBLE_TYPE_SIZE) from code built for the target, this patch
facilitates such a conversion to a hook (which I suppose would take
some suitable enum as an argument to identify which of the three
types to return a mode for).
(The issue of multiple type support for DFP conversions would apply
in that Power case.
<https://gcc.gnu.org/ml/gcc-patches/2014-07/msg01084.html> doesn't
seem to touch on it, but it would seem reasonable to punt on it
initially as hard to fix. There would also be the issue of getting
functions such as __powikf2, __mulkc3, __divkc3 defined, but that's
rather easier to address.)
Bootstrapped with no regressions on x86_64-unknown-linux-gnu.
gcc:
* doc/tm.texi.in (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* doc/tm.texi: Regenerate.
* system.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Poison.
* config/alpha/alpha.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/i386/i386-interix.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE):
Remove.
* config/i386/i386.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/i386/rtemself.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/ia64/ia64.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/m68k/m68k.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/m68k/netbsd-elf.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE):
Remove.
* config/mips/mips.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/mips/n32-elf.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/msp430/msp430.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/rl78/rl78.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/rs6000/rs6000.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/rx/rx.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/s390/s390.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/sparc/freebsd.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/sparc/linux.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/sparc/linux64.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
* config/sparc/netbsd-elf.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE):
Remove.
gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Define
__LIBGCC_*_EXCESS_PRECISION__ macros for supported floating-point
modes.
libgcc:
* dfp-bit.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
(__LIBGCC_XF_MANT_DIG__): Define if not already defined.
(LONG_DOUBLE_HAS_XF_MODE): Define in terms of
__LIBGCC_XF_MANT_DIG__.
(__LIBGCC_TF_MANT_DIG__): Define if not already defined.
(LONG_DOUBLE_HAS_TF_MODE): Define in terms of
__LIBGCC_TF_MANT_DIG__.
* libgcc2.c (NOTRUNC): Define in terms of
__LIBGCC_*_EXCESS_PRECISION__, not LIBGCC2_LONG_DOUBLE_TYPE_SIZE.
* libgcc2.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Remove.
From-SVN: r215491
|
|
execution test)
PR target/63312
* config/ia64/sfp-machine.h (FE_EX_ALL, FP_TRAPPING_EXCEPTIONS):
New macros.
From-SVN: r215458
|
|
override USE_PT_GNU_EH_FRAME.
* crtstuff.c (USE_EH_FRAME_REGISTRY): Let USE_EH_FRAME_REGISTRY_ALWAYS
override USE_PT_GNU_EH_FRAME.
[__LIBGCC_EH_FRAME_SECTION_NAME__ && !USE_PT_GNU_EH_FRAME]: Sanity-
check USE_EH_FRAME_REGISTRY_ALWAYS against
__LIBGCC_EH_FRAME_SECTION_NAME__, emit error if unsane.
* Makefile.in (FORCE_EXPLICIT_EH_REGISTRY): New
variable for substituted force_explicit_eh_registry.
(CRTSTUFF_CFLAGS): Add FORCE_EXPLICIT_EH_REGISTRY.
* configure.ac (explicit-exception-frame-registration):
New AC_ARG_ENABLE.
* configure: Regenerate.
From-SVN: r215443
|
|
2014-09-18 Olivier Hainque <hainque@adacore.com>
gcc/
* config.gcc (powerpc-wrs-vxworksmils): New configuration.
* config/rs6000/t-vxworksmils: New file.
* config/rs6000/vxworksmils.h: New file.
libgcc/
* config.host (powerpc-wrs-vxworksmils): New configuration,
same as vxworksae.
contrib/
* config-list.mk (LIST): Add powerpc-wrs-vxworksmils.
From-SVN: r215377
|
|
This patch removes the (undocumented) LIBGCC2_TF_CEXT target macro,
replacing it by -fbuilding-libgcc predefines (and thereby gets rid of
another LIBGCC2_LONG_DOUBLE_TYPE_SIZE conditional, though some more
patches are needed before that target macro can be eliminated). This
macro indicated the suffix used on __builtin_huge_val,
__builtin_copysign, __builtin_fabs built-in function names to produce
the names for a given floating-point mode.
Predefines are added for all floating-point modes supported for
libgcc, not just TFmode. These are fully accurate for modes
corresponding to float, double and long double. For other modes, the
suffix for *constants* is determined by the targetm.c.mode_for_suffix
hook (the limit to two possible suffixes 'w' and 'q' being hardcoded
in various places). This is in fact the suffix for built-in functions
as well where such functions exist.
* For i386, the *q functions always exist (whether or not TFmode is
used for long double). The *w functions never exist (but this
doesn't matter for libgcc, since no i386 configuration treats XFmode
as a supported scalar mode if long double is TFmode; if __float80
were to be supported for 64-bit Android, properly such functions
ought to be added).
* For ia64, the *q functions exist for non-HP-UX (under HP-UX, long
double is TFmode, so they aren't needed). The *w functions never
exist. This is an issue for this libgcc code for the XFmode complex
functions in libgcc on HP-UX; as I understand it, right now those
will accidentally be using TFmode versions of those three functions,
so involving unnecessary conversions, while the sanity check on CEXT
accidentally passes because all it tests is the sizes of the types.
Because of the lack of 'w' functions, the patch uses 'l' when the
constant suffix is 'w', matching what the existing libgcc code would
do for IA64 HP-UX in that case.
Ideally there would be generic code to create such built-in functions
for all supported floating-point types. That may be something to
consider if support for TS 18661-3 (standard bindings for IEEE
754-2008, defining names such as _Float128, and function names such as
copysignf128) is added in future.
Bootstrapped with no regressions on x86_64-unknown-linux-gnu.
gcc:
* system.h (LIBGCC2_TF_CEXT): Poison.
* config/i386/cygming.h (LIBGCC2_TF_CEXT): Remove.
* config/i386/darwin.h (LIBGCC2_TF_CEXT): Likewise.
* config/i386/dragonfly.h (LIBGCC2_TF_CEXT): Likewise.
* config/i386/freebsd.h (LIBGCC2_TF_CEXT): Likewise.
* config/i386/gnu-user-common.h (LIBGCC2_TF_CEXT): Likewise.
* config/i386/openbsdelf.h (LIBGCC2_TF_CEXT): Likewise.
* config/i386/sol2.h (LIBGCC2_TF_CEXT): Likewise.
* config/ia64/ia64.h (LIBGCC2_TF_CEXT): Likewise.
* config/ia64/linux.h (LIBGCC2_TF_CEXT): Likewise.
gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Define __LIBGCC_*_FUNC_EXT__
for supported floating-point modes.
libgcc:
* libgcc2.c (CEXT): Define using __LIBGCC_*_FUNC_EXT__.
From-SVN: r215368
|
|
The i386 sfp-machine.h defines FP_TRAPPING_EXCEPTIONS in a way that is
always wrong: it treats a set bit as indicating the exception is
trapping, when actually a set bit (both for 387 and SSE floating
point) indicates it is masked, and a clear bit indicates it is
trapping. This patch fixes this bug.
Bootstrapped with no regressions on x86_64-unknown-linux-gnu.
libgcc:
* config/i386/sfp-machine.h (FP_TRAPPING_EXCEPTIONS): Treat clear
bits not set bits as indicating trapping exceptions.
gcc/testsuite:
* gcc.dg/torture/float128-exact-underflow.c: New test.
From-SVN: r215347
|
|
* Makefile.in (LIBGCOV_INTERFACE): Add _gcov_dump from ...
(LIBGCOV_DRIVER): ... here.
* libgcov-driver.c (gcov_master): New.
(gcov_exit): Remove from master chain.
(__gcov_init): Add to master chain if version compatible. Don't
clear the version.
* libgcov_interface (__gcov_flust): Call gcov_dump_int.
(gcov_reset_int): Clear master chain, if compatible.
(gcov_dump_int): New internal interface. Dump master chain, if
compatible.
(gcov_dump): Alias for gcov_dump_int.
* libgcov.h (struct gcov_root): Add next and prev fields.
(struct gcov_master): New struct.
(__gcov_master): New.
(gcov_dump_int): Declare.
From-SVN: r215337
|
|
crtbegin.o + crtend.o to extra_parts.
2014-09-17 Olivier Hainque <hainque@adacore.com>
* config.host (x86_64-*-mingw*): Add i386/t-cygming to tmake_file
and crtbegin.o + crtend.o to extra_parts.
From-SVN: r215323
|
|
This patch removes the LIBGCC2_HAS_{SF,DF,XF,TF}_MODE target macros,
replacing them by predefines with -fbuilding-libgcc, together with a
target hook that can influence those predefines when needed.
The new default is that a floating-point mode is supported in libgcc
if (a) it passes the scalar_mode_supported_p hook (otherwise it's not
plausible for it to be supported in libgcc) and (b) it's one of those
four modes (since those are the modes for which libgcc hardcodes the
possibility of support). The target hook can override the default
choice (in either direction) for modes that pass
scalar_mode_supported_p (although overriding in the direction of
returning true when the default would return false only makes sense if
all relevant functions are specially defined in libgcc for that
particular target).
The previous default settings depended on various settings such as
LIBGCC2_LONG_DOUBLE_TYPE_SIZE, as well as targets defining the above
target macros if the default wasn't correct.
The default scalar_mode_supported_p only declares a floating-point
mode to be supported if it matches one of float / double / long
double. This means that in most cases where a mode is only supported
conditionally in libgcc (TFmode only supported if it's the mode of
long double, most commonly), the default gets things right. Overrides
were needed in the following cases:
* SFmode would always have been supported in libgcc (the condition was
BITS_PER_UNIT == 8, true for all current targets), but pdp11
defaults to 64-bit float, and in that case SFmode would fail
scalar_mode_supported_p. I don't know if libgcc actually built for
pdp11 (and the port may well no longer be being used), but this
patch adds a scalar_mode_supported_p hook to it to ensure SFmode is
treated as supported.
* Certain i386 and ia64 targets need the new hook to match the
existing cases for when XFmode or TFmode support is present in
libgcc. For i386, the hook can always declare XFmode to be
supported - the cases where it's not are the cases where long double
is TFmode, in which case XFmode fails scalar_mode_supported_p[*] -
but TFmode support needs to be conditional. (And of the targets not
defining LIBGCC2_HAS_TF_MODE before this patch, some defined
LONG_DOUBLE_TYPE_SIZE to 64, so ensuring LIBGCC2_HAS_TF_MODE would
always be false, while others did not define it, so allowing it to
be true in the -mlong-double-128 case. This patch matches that
logic, although I suspect all the latter targets would have been
broken if you tried to enable -mlong-double-128 by default, for lack
of the soft-fp TFmode support in libgcc, which is separately
configured.)
[*] I don't know if it's deliberate not to support __float80 at all
with -mlong-double-128.
In order to implement the default version of the new hook,
insn-modes.h was made to contain macros such as HAVE_TFmode for each
machine mode, so the default hook can contain conditionals on whether
XFmode and TFmode exist (to match the hardcoding of a list of modes in
libgcc). This is also used in fortran/trans-types.c; previously it
had a conditional on defined(LIBGCC2_HAS_TF_MODE) (a bit dubious,
since it ignored the value of the macro), which is replaced by testing
defined(HAVE_TFmode), in conjunction with requiring
targetm.libgcc_floating_mode_supported_p.
(Fortran is testing something stronger than that hook: not only is
libgcc support required, but also libm or equivalent. Thus, it has a
test for ENABLE_LIBQUADMATH_SUPPORT in the case that the mode is
TFmode and that's not the same as any of the three standard types.
The old and new tests are intended to accept exactly the same set of
modes for all targets.)
Apart from the four target macros eliminated by this patch, it gets us
closer to eliminating LIBGCC2_LONG_DOUBLE_TYPE_SIZE as well, though a
few more places using that macro need changing first.
Bootstrapped with no regressions on x86_64-unknown-linux-gnu; also
built cc1 for crosses to ia64-elf and pdp11-none as a minimal test of
changes for those targets.
gcc:
* target.def (libgcc_floating_mode_supported_p): New hook.
* targhooks.c (default_libgcc_floating_mode_supported_p): New
function.
* targhooks.h (default_libgcc_floating_mode_supported_p): Declare.
* doc/tm.texi.in (LIBGCC2_HAS_DF_MODE, LIBGCC2_HAS_XF_MODE)
(LIBGCC2_HAS_TF_MODE): Remove.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): New @hook.
* doc/tm.texi: Regenerate.
* genmodes.c (emit_insn_modes_h): Define HAVE_%smode for each
machine mode.
* system.h (LIBGCC2_HAS_SF_MODE, LIBGCC2_HAS_DF_MODE)
(LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE): Poison.
* config/i386/cygming.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/darwin.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/djgpp.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/dragonfly.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/freebsd.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/gnu-user-common.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/i386-interix.h (IX86_NO_LIBGCC_TFMODE): Define.
* config/i386/i386.c (ix86_libgcc_floating_mode_supported_p): New
function.
(TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Define.
* config/i386/i386elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/lynx.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/netbsd-elf.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/netbsd64.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/nto.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/openbsd.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/i386/openbsdelf.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/rtemself.h (IX86_NO_LIBGCC_TFMODE): Define.
* config/i386/sol2.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/i386/vx-common.h (IX86_MAYBE_NO_LIBGCC_TFMODE): Define.
* config/ia64/elf.h (IA64_NO_LIBGCC_TFMODE): Define.
* config/ia64/freebsd.h (IA64_NO_LIBGCC_TFMODE): Define.
* config/ia64/hpux.h (LIBGCC2_HAS_XF_MODE, LIBGCC2_HAS_TF_MODE):
Remove.
* config/ia64/ia64.c (TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P):
New macro.
(ia64_libgcc_floating_mode_supported_p): New function.
* config/ia64/linux.h (LIBGCC2_HAS_TF_MODE): Remove.
* config/ia64/vms.h (IA64_NO_LIBGCC_XFMODE)
(IA64_NO_LIBGCC_TFMODE): Define.
* config/msp430/msp430.h (LIBGCC2_HAS_DF_MODE): Remove.
* config/pdp11/pdp11.c (TARGET_SCALAR_MODE_SUPPORTED_P): New
macro.
(pdp11_scalar_mode_supported_p): New function.
* config/rl78/rl78.h (LIBGCC2_HAS_DF_MODE): Remove.
* config/rx/rx.h (LIBGCC2_HAS_DF_MODE): Remove.
gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Define __LIBGCC_HAS_%s_MODE__
macros for floating-point modes.
gcc/fortran:
* trans-types.c (gfc_init_kinds): Check
targetm.libgcc_floating_mode_supported_p for floating-point
modes. Check HAVE_TFmode instead of LIBGCC2_HAS_TF_MODE.
libgcc:
* libgcc2.h (LIBGCC2_HAS_SF_MODE): Define using
__LIBGCC_HAS_SF_MODE__.
(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.
(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
* config/libbid/bid_gcc_intrinsics.h
(LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
(LIBGCC2_HAS_XF_MODE): Define using __LIBGCC_HAS_XF_MODE__.
(LIBGCC2_HAS_TF_MODE): Define using __LIBGCC_HAS_TF_MODE__.
* fixed-bit.h (LIBGCC2_LONG_DOUBLE_TYPE_SIZE): Do not define.
(LIBGCC2_HAS_SF_MODE): Define using __LIBGCC_HAS_SF_MODE__.
(LIBGCC2_HAS_DF_MODE): Define using __LIBGCC_HAS_DF_MODE__.
From-SVN: r215215
|
|
gcc/
PR target/63223
* config/avr/avr.md (*tablejump.3byte-pc): New insn.
(*tablejump): Restrict to !AVR_HAVE_EIJMP_EICALL. Add void clobber.
(casesi): Expand to *tablejump.3byte-pc if AVR_HAVE_EIJMP_EICALL.
libgcc/
PR target/63223
* config/avr/libgcc.S (__tablejump2__): Rewrite to use RAMPZ, ELPM
and R24 as needed. Make work for all devices and .text locations.
(__do_global_ctors, __do_global_dtors): Use word addresses.
(__tablejump__, __tablejump_elpm__): Remove functions.
* t-avr (LIB1ASMFUNCS): Remove _tablejump, _tablejump_elpm.
Add _tablejump2.
(XICALL, XIJMP): New macros.
From-SVN: r215152
|
|
gcc/Changelog
2014-09-09 Marcus Shawcroft <marcus.shawcroft@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Add crtfastmath.o.
* config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATH_ENDFILE_SPEC): Define.
(ENDFILE_SPEC): Define and use GNU_USER_TARGET_MATH_ENDFILE_SPEC.
libgcc/Changelog
2014-09-09 Marcus Shawcroft <marcus.shawcroft@arm.com>
Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config.host (aarch64*): Include crtfastmath and t-crtfm.
* config/aarch64/crtfastmath.c: New file.
Co-Authored-By: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
From-SVN: r215086
|
|
contrib/ChangeLog:
2014-09-08 Trevor Saunders <tsaunders@mozilla.com>
* compare-all-tests: Don't test picochip.
* config-list.mk: Likewise.
gcc/ChangeLog:
2014-09-08 Trevor Saunders <tsaunders@mozilla.com>
* common/config/picochip/picochip-common.c: Remove.
* config.gcc: Remove support for picochip.
* config/picochip/constraints.md: Remove.
* config/picochip/dfa_space.md: Remove.
* config/picochip/dfa_speed.md: Remove.
* config/picochip/picochip-protos.h: Remove.
* config/picochip/picochip.c: Remove.
* config/picochip/picochip.h: Remove.
* config/picochip/picochip.md: Remove.
* config/picochip/picochip.opt: Remove.
* config/picochip/predicates.md: Remove.
* config/picochip/t-picochip: Remove.
* doc/md.texi: Don't document picochi.
libgcc/ChangeLog:
2014-09-08 Trevor Saunders <tsaunders@mozilla.com>
* config.host: Remove picochip support.
* config/picochip/adddi3.S: Remove.
* config/picochip/ashlsi3.S: Remove.
* config/picochip/ashlsi3.c: Remove.
* config/picochip/ashrsi3.S: Remove.
* config/picochip/ashrsi3.c: Remove.
* config/picochip/clzsi2.S: Remove.
* config/picochip/cmpsi2.S: Remove.
* config/picochip/divmod15.S: Remove.
* config/picochip/divmodhi4.S: Remove.
* config/picochip/divmodsi4.S: Remove.
* config/picochip/lib1funcs.S: Remove.
* config/picochip/longjmp.S: Remove.
* config/picochip/lshrsi3.S: Remove.
* config/picochip/lshrsi3.c: Remove.
* config/picochip/parityhi2.S: Remove.
* config/picochip/popcounthi2.S: Remove.
* config/picochip/setjmp.S: Remove.
* config/picochip/subdi3.S: Remove.
* config/picochip/t-picochip: Remove.
* config/picochip/ucmpsi2.S: Remove.
* config/picochip/udivmodhi4.S: Remove.
* config/picochip/udivmodsi4.S: Remove.
From-SVN: r215039
|
|
gcc:
* config/i386/cygming.h (TF_SIZE): Remove.
* config/i386/darwin.h (TF_SIZE): Remove.
* config/i386/dragonfly.h (TF_SIZE): Remove.
* config/i386/freebsd.h (TF_SIZE): Remove.
* config/i386/gnu-user-common.h (TF_SIZE): Remove.
* config/i386/openbsdelf.h (TF_SIZE): Remove.
* config/i386/sol2.h (TF_SIZE): Remove.
* config/ia64/hpux.h (XF_SIZE, TF_SIZE): Remove.
* config/ia64/linux.h (TF_SIZE): Remove.
* doc/tm.texi.in (SF_SIZE, DF_SIZE, XF_SIZE, TF_SIZE): Remove.
* doc/tm.texi: Regenerate.
* system.h (SF_SIZE, DF_SIZE, XF_SIZE, TF_SIZE): Poison.
gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Define macros for mantissa
digits of floating-point modes if -fbuilding-libgcc.
libgcc:
* libgcc2.c (SF_SIZE): Change all uses to __LIBGCC_SF_MANT_DIG__.
(DF_SIZE): Change all uses to __LIBGCC_DF_MANT_DIG__.
(XF_SIZE): Change all uses to __LIBGCC_XF_MANT_DIG__.
(TF_SIZE): Change all uses to __LIBGCC_TF_MANT_DIG__.
* libgcc2.h (SF_SIZE): Change to __LIBGCC_SF_MANT_DIG__. Give
error if not defined and LIBGCC2_HAS_SF_MODE is defined.
(DF_SIZE): Change to __LIBGCC_DF_MANT_DIG__. Give error if not
defined and LIBGCC2_HAS_DF_MODE is defined.
(XF_SIZE): Change to __LIBGCC_XF_MANT_DIG__. Give error if not
defined and LIBGCC2_HAS_XF_MODE is defined.
(TF_SIZE): Change to __LIBGCC_TF_MANT_DIG__. Give error if not
defined and LIBGCC2_HAS_TF_MODE is defined.
From-SVN: r215014
|
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gcc:
* defaults.h (LARGEST_EXPONENT_IS_NORMAL, ROUND_TOWARDS_ZERO):
Remove.
* doc/tm.texi.in (ROUND_TOWARDS_ZERO, LARGEST_EXPONENT_IS_NORMAL):
Remove.
* doc/tm.texi: Regenerate.
* system.h (LARGEST_EXPONENT_IS_NORMAL, ROUND_TOWARDS_ZERO):
Poison.
* config/arm/arm.h (LARGEST_EXPONENT_IS_NORMAL): Remove.
* config/cris/cris.h (__make_dp): Remove.
libgcc:
* fp-bit.c (pack_d, unpack_d): Remove LARGEST_EXPONENT_IS_NORMAL
and ROUND_TOWARDS_ZERO conditionals.
From-SVN: r215013
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* libgcov-interface.c (STRONG_ALIAS): Rename to ...
(ALIAS_weak): ... here. Use forwarding function. Adjust uses.
From-SVN: r215005
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gcc/c-family:
* c-cppbuiltin.c (c_cpp_builtins): Also define
__LIBGCC_EH_TABLES_CAN_BE_READ_ONLY__,
__LIBGCC_EH_FRAME_SECTION_NAME__, __LIBGCC_JCR_SECTION_NAME__,
__LIBGCC_CTORS_SECTION_ASM_OP__, __LIBGCC_DTORS_SECTION_ASM_OP__,
__LIBGCC_TEXT_SECTION_ASM_OP__, __LIBGCC_INIT_SECTION_ASM_OP__,
__LIBGCC_INIT_ARRAY_SECTION_ASM_OP__,
__LIBGCC_STACK_GROWS_DOWNWARD__,
__LIBGCC_DONT_USE_BUILTIN_SETJMP__,
__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__,
__LIBGCC_DWARF_FRAME_REGISTERS__,
__LIBGCC_EH_RETURN_STACKADJ_RTX__, __LIBGCC_JMP_BUF_SIZE__,
__LIBGCC_STACK_POINTER_REGNUM__ and
__LIBGCC_VTABLE_USES_DESCRIPTORS__ for -fbuilding-libgcc.
(builtin_define_with_value): Handle backslash-escaping in string
macro values.
libgcc:
* Makefile.in (CRTSTUFF_CFLAGS): Add -fbuilding-libgcc.
* config/aarch64/linux-unwind.h (STACK_POINTER_REGNUM): Change all
uses to __LIBGCC_STACK_POINTER_REGNUM__.
(DWARF_ALT_FRAME_RETURN_COLUMN): Change all uses to
__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__.
* config/alpha/vms-unwind.h (DWARF_ALT_FRAME_RETURN_COLUMN):
Change use to __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__.
* config/cr16/unwind-cr16.c (STACK_GROWS_DOWNWARD): Change all
uses to __LIBGCC_STACK_GROWS_DOWNWARD__.
(DWARF_FRAME_REGISTERS): Change all uses to
__LIBGCC_DWARF_FRAME_REGISTERS__.
(EH_RETURN_STACKADJ_RTX): Change all uses to
__LIBGCC_EH_RETURN_STACKADJ_RTX__.
* config/cr16/unwind-dw2.h (DWARF_FRAME_REGISTERS): Change use to
__LIBGCC_DWARF_FRAME_REGISTERS__. Remove conditional definition.
* config/i386/cygming-crtbegin.c (EH_FRAME_SECTION_NAME): Change
use to __LIBGCC_EH_FRAME_SECTION_NAME__.
(JCR_SECTION_NAME): Change use to __LIBGCC_JCR_SECTION_NAME__.
* config/i386/cygming-crtend.c (EH_FRAME_SECTION_NAME): Change use
to __LIBGCC_EH_FRAME_SECTION_NAME__.
(JCR_SECTION_NAME): Change use to __LIBGCC_JCR_SECTION_NAME__
* config/mips/linux-unwind.h (STACK_POINTER_REGNUM): Change use to
__LIBGCC_STACK_POINTER_REGNUM__.
(DWARF_ALT_FRAME_RETURN_COLUMN): Change all uses to
__LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__.
* config/nios2/linux-unwind.h (STACK_POINTER_REGNUM): Change use
to __LIBGCC_STACK_POINTER_REGNUM__.
* config/pa/hpux-unwind.h (DWARF_ALT_FRAME_RETURN_COLUMN): Change
all uses to __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__.
* config/pa/linux-unwind.h (DWARF_ALT_FRAME_RETURN_COLUMN): Change
all uses to __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__.
* config/rs6000/aix-unwind.h (DWARF_ALT_FRAME_RETURN_COLUMN):
Change all uses to __LIBGCC_DWARF_ALT_FRAME_RETURN_COLUMN__.
(STACK_POINTER_REGNUM): Change all uses to
__LIBGCC_STACK_POINTER_REGNUM__.
* config/rs6000/darwin-fallback.c (STACK_POINTER_REGNUM): Change
use to __LIBGCC_STACK_POINTER_REGNUM__.
* config/rs6000/linux-unwind.h (STACK_POINTER_REGNUM): Change all
uses to __LIBGCC_STACK_POINTER_REGNUM__.
* config/sparc/linux-unwind.h (DWARF_FRAME_REGISTERS): Change use
to __LIBGCC_DWARF_FRAME_REGISTERS__.
* config/sparc/sol2-unwind.h (DWARF_FRAME_REGISTERS): Change use
to __LIBGCC_DWARF_FRAME_REGISTERS__.
* config/tilepro/linux-unwind.h (STACK_POINTER_REGNUM): Change use
to __LIBGCC_STACK_POINTER_REGNUM__.
* config/xtensa/unwind-dw2-xtensa.h (DWARF_FRAME_REGISTERS):
Remove conditional definition.
* crtstuff.c (TEXT_SECTION_ASM_OP): Change all uses to
__LIBGCC_TEXT_SECTION_ASM_OP__.
(EH_FRAME_SECTION_NAME): Change all uses to
__LIBGCC_EH_FRAME_SECTION_NAME__.
(EH_TABLES_CAN_BE_READ_ONLY): Change all uses to
__LIBGCC_EH_TABLES_CAN_BE_READ_ONLY__.
(CTORS_SECTION_ASM_OP): Change all uses to
__LIBGCC_CTORS_SECTION_ASM_OP__.
(DTORS_SECTION_ASM_OP): Change all uses to
__LIBGCC_DTORS_SECTION_ASM_OP__.
(JCR_SECTION_NAME): Change all uses to
__LIBGCC_JCR_SECTION_NAME__.
(INIT_SECTION_ASM_OP): Change all uses to
__LIBGCC_INIT_SECTION_ASM_OP__.
(INIT_ARRAY_SECTION_ASM_OP): Change all uses to
__LIBGCC_INIT_ARRAY_SECTION_ASM_OP__.
* generic-morestack.c (STACK_GROWS_DOWNWARD): Change all uses to
__LIBGCC_STACK_GROWS_DOWNWARD__.
* libgcc2.c (INIT_SECTION_ASM_OP): Change all uses to
__LIBGCC_INIT_SECTION_ASM_OP__.
(INIT_ARRAY_SECTION_ASM_OP): Change all uses to
__LIBGCC_INIT_ARRAY_SECTION_ASM_OP__.
(EH_FRAME_SECTION_NAME): Change all uses to
__LIBGCC_EH_FRAME_SECTION_NAME__.
* libgcov-profiler.c (VTABLE_USES_DESCRIPTORS): Remove conditional
definitions. Change all uses to
__LIBGCC_VTABLE_USES_DESCRIPTORS__.
* unwind-dw2.c (STACK_GROWS_DOWNWARD): Change all uses to
__LIBGCC_STACK_GROWS_DOWNWARD__.
(DWARF_FRAME_REGISTERS): Change all uses to
__LIBGCC_DWARF_FRAME_REGISTERS__.
(EH_RETURN_STACKADJ_RTX): Change all uses to
__LIBGCC_EH_RETURN_STACKADJ_RTX__.
* unwind-dw2.h (DWARF_FRAME_REGISTERS): Remove conditional
definition. Change use to __LIBGCC_DWARF_FRAME_REGISTERS__.
* unwind-sjlj.c (DONT_USE_BUILTIN_SETJMP): Change all uses to
__LIBGCC_DONT_USE_BUILTIN_SETJMP__.
(JMP_BUF_SIZE): Change use to __LIBGCC_JMP_BUF_SIZE__.
From-SVN: r214954
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* libgcov-interface.c (STRONG_ALIAS): New.
(__gcov_flush): Call __gcov_reset_int.
(__gcov_reset): Strong alias for ...
(__gcov_reset_ing): ... this renamed hidden version.
* libgcov.h (__gcov_reset_int): New declaration.
From-SVN: r214840
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2014-08-19 Yaakov Selkowitz <yselkowi@redhat.com>
* config/i386/cygming-crtend.c (register_frame_ctor): Move atexit
call from here...
* config/i386/cygming-crtbegin.c (__gcc_register_frame): to here.
(__dso_handle): Define on Cygwin.
* config/i386/t-cygming (crtbeginS.o): New rule.
* config.host (*-*-cygwin*): Add crtbeginS.o to extra_parts.
From-SVN: r214162
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