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2015-07-22linux-atomic.c (<asm/unistd.h>): Remove #include.Chung-Lin Tang1-5/+0
2015-07-22 Chung-Lin Tang <cltang@codesourcery.com> libgcc/ * config/nios2/linux-atomic.c (<asm/unistd.h>): Remove #include. (EFAULT,EBUSY,ENOSYS): Delete unused #defines. From-SVN: r226063
2015-07-17libgcc: fix build with older makeJan Beulich1-1/+3
Make up to 3.80 (documented as minimal permitted version) doesn't support "else if...". 2015-07-17 Jan Beulich <jbeulich@suse.com> * config/t-softfp: Split up "else ifneq". From-SVN: r225920
2015-07-14tramp.c (MOVHI, ORI, JMP): Conditionalize for __nios2_arch__ level.Sandra Loosemore1-3/+17
2015-07-14 Sandra Loosemore <sandra@codesourcery.com> Cesar Philippidis <cesar@codesourcery.com> Chung-Lin Tang <cltang@codesourcery.com> libgcc/ * config/nios2/tramp.c (MOVHI, ORI, JMP): Conditionalize for __nios2_arch__ level. Co-Authored-By: Cesar Philippidis <cesar@codesourcery.com> Co-Authored-By: Chung-Lin Tang <cltang@codesourcery.com> From-SVN: r225794
2015-07-13t-dragonfly: New.John Marino1-0/+2
2015-07-13 John Marino <gnugcc@marino.st> * config/i386/t-dragonfly: New. From-SVN: r225738
2015-07-01linux-atomic.c (__kernel_cmpxchg): Reorder arguments to better match ↵John David Anglin1-26/+26
light-weight syscall argument order. * config/pa/linux-atomic.c (__kernel_cmpxchg): Reorder arguments to better match light-weight syscall argument order. (__kernel_cmpxchg2): Likewise. Adjust callers. From-SVN: r225267
2015-06-30IA MCU psABI support: changes to librariesH.J. Lu2-0/+6
Patch in the bottom adds support of IA MCU psABI to libgcc (enables soft-fp) and libdecnumber (enables it for IA MCU). config/ * dfp.m4 (enable_decimal_float): Also set to yes for i?86*-*-elfiamcu target. gcc/ * configure: Regenerated. libdecnumber/ * configure: Regenerated. libgcc/ * config.host: Support i[34567]86-*-elfiamcu target. * config/t-softfp-sfdftf: New file. * config/i386/32/t-iamcu: Likewise. * configure: Regenerated. From-SVN: r225198
2015-06-23lib1funcs.S (aeabi_idiv0, [...]): Add CFI entries.James Lemke1-2/+9
2015-06-23 James Lemke <jwlemke@codesourcery.com> libgcc/config/arm/ * lib1funcs.S (aeabi_idiv0, aeabi_ldiv0): Add CFI entries. From-SVN: r224854
2015-05-27config.host (i[34567]86-*-freebsd*, [...]): Set md_unwind_headerJohn Marino1-0/+173
* config.host (i[34567]86-*-freebsd*, x86_64-*-freebsd*): Set md_unwind_header * config/i386/freebsd-unwind.h: New. From-SVN: r223765
2015-05-22config.host (i[34567]-*-*, x86_64-*-*): Add t-crtfm instead of i386/t-crtfm ↵Uros Bizjak2-47/+46
to tmake_file. * config.host (i[34567]-*-*, x86_64-*-*): Add t-crtfm instead of i386/t-crtfm to tmake_file. * config/i386/crtfastmath.c (set_fast_math_sse): New function. (set_fast_math): Use set_fast_math_sse for SSE targets. * config/i386/t-crtfm: Remove. From-SVN: r223578
2015-05-21re PR libgcc/66225 (libgcc/config/rs6000/morecore.S will not build on ↵Alan Modra1-1/+0
systems with an older assembler) PR libgcc/66225 * config/rs6000/morestack.S: Remove ".abiversion 1". From-SVN: r223464
2015-05-20rs6000-common.c (TARGET_SUPPORTS_SPLIT_STACK): Define.Alan Modra2-0/+353
gcc/ * common/config/rs6000/rs6000-common.c (TARGET_SUPPORTS_SPLIT_STACK): Define. (rs6000_supports_split_stack): New function. * gcc/config/rs6000/rs6000.c (machine_function): Add split_stack_arg_pointer. (TARGET_EXTRA_LIVE_ON_ENTRY, TARGET_INTERNAL_ARG_POINTER): Define. (setup_incoming_varargs): Use crtl->args.internal_arg_pointer rather than virtual_incoming_args_rtx. (rs6000_va_start): Likewise. (split_stack_arg_pointer_used_p): New function. (rs6000_emit_prologue): Set up arg pointer for -fsplit-stack. (morestack_ref): New var. (gen_add3_const, rs6000_expand_split_stack_prologue, rs6000_internal_arg_pointer, rs6000_live_on_entry, rs6000_split_stack_space_check): New functions. (rs6000_elf_file_end): Call file_end_indicate_split_stack. * gcc/config/rs6000/rs6000.md (UNSPEC_STACK_CHECK): Define. (UNSPECV_SPLIT_STACK_RETURN): Define. (split_stack_prologue, load_split_stack_limit, load_split_stack_limit_di, load_split_stack_limit_si, split_stack_return, split_stack_space_check): New expands and insns. * gcc/config/rs6000/rs6000-protos.h (rs6000_expand_split_stack_prologue): Declare. (rs6000_split_stack_space_check): Declare. libgcc/ * config/rs6000/morestack.S: New. * config/rs6000/t-stack-rs6000: New. * config.host (powerpc*-*-linux*): Add t-stack and t-stack-rs6000 to tmake_file. * generic-morestack.c: Don't build for powerpc 32-bit. From-SVN: r223426
2015-05-16FT32 target added. Approved by Jeff Law [law@redhat.com]James Bowman8-0/+1502
From-SVN: r223261
2015-05-15Add support for CFI directives in fp emulation routines for ARM.Martin Galvan3-30/+264
2015-05-15 Martin Galvan <martin.galvan@tallertechnologies.com> * config/arm/lib1funcs.S (CFI_START_FUNCTION, CFI_END_FUNCTION): New macros. * config/arm/ieee754-df.S: Add CFI directives. * config/arm/ieee754-sf.S: Add CFI directives. From-SVN: r223220
2015-05-06unknown-elf.h (STARTFILE_SPEC): Add conditional linking of crtfastmath.o.Sandra Loosemore1-0/+40
2015-05-06 Sandra Loosemore <sandra@codesourcery.com> Chris Jones <chrisj@nvidia.com> Joshua Conner <jconner@nvidia.com> gcc/ * config/arm/unknown-elf.h (STARTFILE_SPEC): Add conditional linking of crtfastmath.o. * config/arm/linux-eabi.h (STARTFILE_SPEC): Likewise. libgcc/ * config.host (arm*-*-linux*): Add support for crtfastmath.o. (arm*-*-uclinux*): Likewise. (arm*-*-eabi* | arm*-*-rtems*): Likewise. * config/arm/crtfastmath.c: New file. Co-Authored-By: Chris Jones <chrisj@nvidia.com> Co-Authored-By: Joshua Conner <jconner@nvidia.com> From-SVN: r222857
2015-04-28elf-lib.h: New file.Uros Bizjak3-2/+26
libgcc/ChangeLog: * config/frv/elf-lib.h: New file. (CRT_GET_RFIB_DATA): Move definition from gcc/config/frv/frv.h. * libgcc/config.host (frv-*elf, frv-*-*linux*): Add frv/elf-lib.h to tm_file. * config/frv/frvbengin.c: Do not include defaults.h * config/frv/frvend.c: Ditto. gcc/ChangeLog: * config/frv/frv.h (CRT_GET_RFIB_DATA): Move definition to libgcc/config/frv/elf-lib.h. From-SVN: r222519
2015-04-27config.gcc: Add h8300-*-linux.Yoshinori Sato3-37/+129
gcc/ * config.gcc: Add h8300-*-linux. * config/h8300/linux.h: New. * config/h8300/t-linux: New. * config/h8300/h8300.c (h8300_option_override): Normal mode is not supported for h8300-*-linux. (h8300_file_start): Target priority change. (get_shift_alg): Likewise. (h8300_shift_need_scratch_p): Likewise. * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise. * config/h8300/h8300.md (define_peephole2): Remove duplicate condition. libgcc/ * config.host: Add h8300-*-linux * config/h8300/t-linux: New file. * config/h8300/lib1funs.s: Change symbol prefix. * config/h8300/sfp-machine.h: 64bit double support. From-SVN: r222479
2015-04-17Hide __cpu_indicator_init/__cpu_model from linkerH.J. Lu2-2/+7
We shouldn't call external function, __cpu_indicator_init, while an object is being relocated since its .got.plt section hasn't been updated. It works for non-PIE since no update on .got.plt section is required. This patch creates libgcc.so as a linker script, hides __cpu_indicator_init and __cpu_model in libgcc.so.1 from linker, forces linker to resolve __cpu_indicator_init and __cpu_model to their hidden definitions in libgcc.a while providing backward binary compatibility. gcc/testsuite/ PR target/65612 * g++.dg/ext/mv18.C: New test. * g++.dg/ext/mv19.C: Likewise. * g++.dg/ext/mv20.C: Likewise. * g++.dg/ext/mv21.C: Likewise. * g++.dg/ext/mv22.C: Likewise. * g++.dg/ext/mv23.C: Likewise. libgcc/ PR target/65612 * config.host (tmake_file): Add t-slibgcc-libgcc for Linux/x86. * config/i386/cpuinfo.c (__cpu_model): Initialize. (__cpu_indicator_init@GCC_4.8.0): New. (__cpu_model@GCC_4.8.0): Likewise. * config/i386/t-linux (HOST_LIBGCC2_CFLAGS): Add -DUSE_ELF_SYMVER. From-SVN: r222178
2015-04-16rl78-opts.h (enum rl78_mul_types): Add MUL_G14 and MUL_UNINIT.Nick Clifton2-0/+903
* config/rl78/rl78-opts.h (enum rl78_mul_types): Add MUL_G14 and MUL_UNINIT. (enum rl78_cpu_type): New. * config/rl78/rl78-virt.md (attr valloc): Add divhi and divsi. (umulhi3_shift_virt): Remove m constraint from operand 1. (umulqihi3_virt): Likewise. * config/rl78/rl78.c (rl78_option_override): Add code to process -mcpu and -mmul options. (rl78_alloc_physical_registers): Add code to handle divhi and divsi valloc attributes. (set_origin): Likewise. * config/rl78/rl78.h (RL78_MUL_G14): Define. (TARGET_G10, TARGET_G13, TARGET_G14): Define. (TARGET_CPU_CPP_BUILTINS): Define __RL78_MUL_xxx__ and __RL78_Gxx__. (ASM_SPEC): Pass -mcpu on to assembler. * config/rl78/rl78.md (mulqi3): Add a clobber of AX. (mulqi3_rl78): Likewise. (mulhi3_g13): Likewise. (mulhi3): Generate the G13 or G14 versions of the insn directly. (mulsi3): Likewise. (mulhi3_g14): Add clobbers of AX and BC. (mulsi3_g14): Likewise. (mulsi3_g13): Likewise. (udivmodhi4, udivmodhi4_g14, udivmodsi4): New patterns. (udivmodsi4_g14, udivmodsi4_g13): New patterns. * config/rl78/rl78.opt (mmul): Initialise value to RL78_MUL_UNINIT. (mcpu): New option. (m13, m14, mrl78): New option aliases. * config/rl78/t-rl78 (MULTILIB_OPTIONS): Add mg13 and mg14. (MULTILIB_DIRNAMES): Add g13 and g14. * doc/invoke.texi: Document -mcpu and -mmul options. * config/rl78/divmodhi.S: Add G14 and G13 versions of the __divhi3 and __modhi3 functions. * config/rl78/divmodso.S: Add G14 and G13 versions of the __divsi3, __udivsi3, __modsi3 and __umodsi3 functions. From-SVN: r222142
2015-03-03Implement call0 ABI for xtensaMax Filippov4-3/+15
call0 is an ABI that doesn't use register windows. 2015-03-03 Max Filippov <jcmvbkbc@gmail.com> gcc/ * config/xtensa/constraints.md ("a" constraint): Include stack pointer in case of call0 ABI. ("q" constraint): Make empty in case of call0 ABI. ("D" constraint): Include stack pointer in case of call0 ABI. * config/xtensa/xtensa-protos.h (xtensa_set_return_address, xtensa_expand_epilogue, xtensa_regno_to_class): Add new function prototypes. * config/xtensa/xtensa.c (xtensa_callee_save_size): New variable. (xtensa_regno_to_class): Make it a local variable in the function xtensa_regno_to_class. (xtensa_function_epilogue, TARGET_ASM_FUNCTION_EPILOGUE): Remove macro, function prototype and implementation. (reg_nonleaf_alloc_order): Make it a local variable in the function order_regs_for_local_alloc. (xtensa_conditional_register_usage): New function. (TARGET_CONDITIONAL_REGISTER_USAGE): Define macro. (xtensa_valid_move): Allow direct moves to stack pointer register in call0 ABI. (xtensa_setup_frame_addresses): Only spill register windows in windowed ABI. (xtensa_emit_call): Emit call(x)8 or call(x)0 in windowed and call0 ABI respectively. (xtensa_function_arg_1): Only mark a7 register for copying in windowed ABI. (xtensa_call_save_reg): New function. (compute_frame_size): Add space for callee saved register storage to the frame size in call0 ABI. (xtensa_expand_prologue): Generate code to set up stack frame and save callee-saved registers in call0 ABI. (xtensa_expand_epilogue): New function. (xtensa_set_return_address): New function. (xtensa_return_addr): Calculate return address in call0 ABI. (xtensa_builtin_saveregs): Only mark a7 register for copying and emit copying code in windowed ABI. (order_regs_for_local_alloc): Add preferred register allocation order for non-leaf function in call0 ABI. (xtensa_static_chain): Add atatic chain passing for call0 ABI. (xtensa_asm_trampoline_template): Add trampoline generation for call0 ABI. (xtensa_trampoline_init): Add trampoline initialization for call0 ABI. (xtensa_conditional_register_usage, xtensa_regno_to_class): New functions. * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI): New macro. (TARGET_CPU_CPP_BUILTINS): Add built-in define for call0 ABI. (CALL_USED_REGISTERS): Modify to encode both windowed and call0 ABI call-used registers. (HARD_FRAME_POINTER_REGNUM): Add frame pointer for call0 ABI. (INCOMING_REGNO, OUTGOING_REGNO): Use argument unchanged in call0 ABI. (REG_CLASS_CONTENTS): Include all registers into the preferred reload registers set, adjust the set in the xtensa_conditional_register_usage. (xtensa_regno_to_class): Drop variable declaration. (REGNO_REG_CLASS): Redefine to use xtensa_regno_to_class function. (WINDOW_SIZE): Define as 8 or 0 for windowed and call0 ABI respectively. (FUNCTION_PROFILER): Add _mcount call for call0 ABI. (TRAMPOLINE_SIZE): Define trampoline size for call0 ABI. (RETURN_ADDR_IN_PREVIOUS_FRAME): Define to 0 in call0 ABI. (ASM_OUTPUT_POOL_PROLOGUE): Always generate literal pool location in call0 ABI. (EH_RETURN_STACKADJ_RTX): New definition, use a10 for passing stack adjustment size when handling exception. (CRT_CALL_STATIC_FUNCTION): Add definition for call0 ABI. * config/xtensa/xtensa.md (A9_REG, UNSPECV_BLOCKAGE): New definitions. ("return" pattern): Generate ret.n/ret in call0 ABI. ("epilogue" pattern): Expand epilogue. ("nonlocal_goto" pattern): Use default in call0 ABI. ("eh_return" pattern): Move implementation to eh_set_a0_windowed, emit eh_set_a0_* depending on ABI. ("eh_set_a0_windowed" pattern): Former eh_return pattern. ("eh_set_a0_call0", "blockage"): New patterns. libgcc/ * config/xtensa/lib2funcs.S (__xtensa_libgcc_window_spill, __xtensa_nonlocal_goto): Don't compile for call0 ABI. (__xtensa_sync_caches): Only use entry and retw in windowed ABI, use ret in call0 ABI. * config/xtensa/t-windowed: New file. * libgcc/config/xtensa/t-xtensa (LIB2ADDEH): Move to t-windowed. * libgcc/configure: Regenerated. * libgcc/configure.ac: Check if xtensa target is configured for windowed ABI and thus needs to use custom unwind code. From-SVN: r221158
2015-03-02re PR libgcc/64885 (libstdc++ all_attributes failure)Jonathan Wakely2-2/+2
PR libgcc/64885 * gthr-single.h: Use __unused__ attribute instead of unused. * config/gthr-vxworks.h: Likewise. * config/i386/gthr-win32.h: Likewise. From-SVN: r221120
2015-02-23[PR target/65181] nvptx libgcc: Prevent building "advanced" stuff (for ↵Thomas Schwinge1-0/+5
example, gcov support) When building GCC against a proper newlib sysroot, the libgcc build will include more than what's built in the -Dinhibit_libc configuration used when building newlib as part of the GCC build process. See the inhibit_libc logic in gcc/configure.ac. To avoid... ptxas _gcov_indirect_call_topn_profiler.o, line 101; error : Type or alignment of argument does not match formal parameter 'ptr' ptxas _gcov_indirect_call_topn_profiler.o, line 101; error : Call has wrong number of parameters ptxas _gcov_indirect_call_topn_profiler.o, line 101; error : Type or alignment of argument does not match formal parameter 'size' ptxas fatal : Ptx assembly aborted due to errors nvptx-as: ptxas returned 255 exit status make[2]: *** [_gcov_indirect_call_topn_profiler.o] Error 1 ..., "dumb down" the libgcc build: libgcc/ PR target/65181 * config/nvptx/t-nvptx (INHIBIT_LIBC_CFLAGS): Define to -Dinhibit_libc. From-SVN: r220915
2015-02-17bpabi.S (test_div_by_zero): Make label names consistent between thumb2 and ↵Sandra Loosemore2-18/+26
arm mode cases. 2015-02-17 Sandra Loosemore <sandra@codesourcery.com> libgcc/ * config/arm/bpabi.S (test_div_by_zero): Make label names consistent between thumb2 and arm mode cases. Separate the signed comparison on the high word of the numerator from the unsigned comparison on the low word. * config/arm/bpabi-v6m.S (test_div_by_zero): Similarly separate signed comparison. gcc/testsuite/ * gcc.target/arm/divzero.c: New test case. From-SVN: r220765
2015-02-17Avoid dependence on libc headers in nvptx realloc.Joseph Myers1-3/+2
* config/nvptx/realloc.c: Include <stddef.h> instead of <stdlib.h> and <string.h>. (__nvptx_realloc): Call __builtin_memcpy instead of memcpy. From-SVN: r220764
2015-02-04fpmath-sf.S (__rl78_int_pack_a_r8): Fix edge case rounding up the fraction.Nick Clifton1-4/+10
* config/rl78/fpmath-sf.S (__rl78_int_pack_a_r8): Fix edge case rounding up the fraction. * config/rl78/rl78.c (rl78_note_reg_set): Note the use of REGs inside a MEM. From-SVN: r220410
2015-01-31linux-atomic.c (__kernel_cmpxchg2): Change declaration of oldval and newval ↵John David Anglin1-29/+13
to const void *. * config/pa/linux-atomic.c (__kernel_cmpxchg2): Change declaration of oldval and newval to const void *. Fix typo. (FETCH_AND_OP_2): Use __atomic_load_n to load value. (FETCH_AND_OP_WORD): Likewise. (OP_AND_FETCH_WORD): Likewise. (COMPARE_AND_SWAP_2): Likewise. (__sync_val_compare_and_swap_4): Likewise. (__sync_lock_test_and_set_4): Likewise. (SYNC_LOCK_RELEASE_2): Likewise. Remove support for long long atomic operations. From-SVN: r220307
2015-01-27cmpsi2.S: Use function start and end macros.Nick Clifton10-53/+2017
* config/rl78/cmpsi2.S: Use function start and end macros. (__gcc_bcmp): New function. * config/rl78/lshrsi3.S: Use function start and end macros. * config/rl78/mulsi3.S: Add support for G10. (__mulqi3): New function for G10. * config/rl78/signbit.S: Use function start and end macros. * config/rl78/t-rl78 (LIB2ADD): Add bit-count.S, fpbit-sf.S and fpmath-sf.S. (LIB2FUNCS_EXCLUDE): Define. (LIB2FUNCS_ST): Define. * config/rl78/trampoline.S: Use function start and end macros. * config/rl78/vregs.h (START_FUNC): New macro. (START_ANOTHER_FUNC): New macro. (END_FUNC): New macro. (END_ANOTHER_FUNC): New macro. * config/rl78/bit-count.S: New file. Contains assembler implementations of the bit counting functions: ___clzhi2, __clzsi2, ctzhi2, ctzsi2, ffshi2, ffssi2, __partityhi2, __paritysi2, __popcounthi2 and __popcountsi2. * config/rl78/fpbit-sf.S: New file. Contains assembler implementationas of the math functions: __negsf2, __cmpsf2, __eqsf2, __nesf2, __lesf2, __ltsf2, __gesf2, gtsf2, __unordsf2, __fixsfsi, __fixunssfsi, __floatsisf and __floatunssisf. * config/rl78/fpmath-sf.S: New file. Contains assembler implementations of the math functions: __subsf3, __addsf3, __mulsf3 and __divsf3 From-SVN: r220162
2015-01-27Move Solaris/x86 CRT_GET_RFIB_DATA definition to libgccRainer Orth1-1/+1
gcc: * config/i386/sysv4.h (CRT_GET_RFIB_DATA): Remove. libgcc: * config.host (i[34567]86-*-solaris2*, x86_64-*-solaris2.1[0-9]*): Add i386/elf-lib.h to tm_file. * config/i386/elf-lib.h: Fix comment. * unwind-dw2-fde-dip.c (_Unwind_IteratePhdrCallback) [__x86_64__ && __sun__ && __svr4__]: Remove workaround. From-SVN: r220160
2015-01-25i386.c (get_builtin_code_for_version): Add support for BMI and BMI2 ↵Allan Sandfeld Jensen1-1/+7
multiversion functions. gcc/ChangeLog: * config/i386/i386.c (get_builtin_code_for_version): Add support for BMI and BMI2 multiversion functions. (fold_builtin_cpu): Add F_BMI and F_BMI2. libgcc/ChangeLog: * config/i386/cpuinfo.c (enum processor_features): Add FEATURE_BMI and FEATURE_BMI2. (get_available_features): Detect FEATURE_BMI and FEATURE_BMI2. testsuite/ChangeLog: * gcc.target/i386/funcspec-5.c: Test new multiversion targets. * g++.dg/ext/mv17.C: Test BMI/BMI2 multiversion dispatcher. Co-Authored-By: Uros Bizjak <ubizjak@gmail.com> From-SVN: r220095
2015-01-24Support new Intel processor model numbersH.J. Lu1-0/+12
gcc/ * config/i386/driver-i386.c (host_detect_local_cpu): Check new Silvermont, Haswell, Broadwell and Knights Landing model numbers. * config/i386/i386.c (processor_model): Add M_INTEL_COREI7_BROADWELL. (arch_names_table): Add "broadwell". gcc/testsuite/ * gcc.target/i386/builtin_target.c (check_intel_cpu_model): Add Silvermont, Ivy Bridge, Haswell and Broadwell tests. Update Sandy Bridge test. 2015-01-24 H.J. Lu <hongjiu.lu@intel.com> * config/i386/cpuinfo.c (processor_subtypes): Add INTEL_COREI7_BROADWELL. (get_intel_cpu): Support new Silvermont, Haswell and Broadwell model numbers. From-SVN: r220090
2015-01-23elf-lib.h: New file.Uros Bizjak1-0/+36
libgcc/ChangeLog: * config/i386/elf-lib.h: New file. (CRT_GET_RFIB_DATA): Move definition from gcc/config/i386/gnu-user.h. Wrap definition in #ifdef __i386__. * libgcc/config.host (i[34567]86-*-linux*, i[34567]86-*-kfreebsd*-gnu) (i[34567]86-*-knetbsd*-gnu, i[34567]86-*-gnu*) (i[34567]86-*-kopensolaris*-gnu, x86_64-*-linux*) (x86_64-*-kfreebsd*-gnu, x86_64-*-knetbsd*-gnu): Add i386/elf-lib.h to tm_file. gcc/ChangeLog: * config/i386/gnu-user.h (CRT_GET_RFIB_DATA): Move definition to libgcc/config/i386/elf-lib.h. From-SVN: r220056
2015-01-20nios2.c (nios2_asm_file_end): Implement TARGET_ASM_FILE_END hook for adding ↵Chung-Lin Tang1-2/+1
.note.GNU-stack section when needed. 2015-01-20 Chung-Lin Tang <cltang@codesourcery.com> gcc/ * config/nios2/nios2.c (nios2_asm_file_end): Implement TARGET_ASM_FILE_END hook for adding .note.GNU-stack section when needed. (TARGET_ASM_FILE_END): Define. libgcc/ * config/nios2/linux-unwind.h (nios2_fallback_frame_state): Update rt_sigframe format and address for current Nios II Linux conventions. From-SVN: r219898
2015-01-09configure.ac: Don't add ${libgcj} for arm*-*-freebsd*.Andreas Tobler3-1/+235
toplevel: * configure.ac: Don't add ${libgcj} for arm*-*-freebsd*. * configure: Regenerate. gcc: * config.gcc (arm*-*-freebsd*): New configuration. * config/arm/freebsd.h: New file. * config.host: Add extra components for arm*-*-freebsd*. * config/arm/arm.h: Introduce MAX_SYNC_LIBFUNC_SIZE. * config/arm/arm.c (arm_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE. libgcc: * config.host (arm*-*-freebsd*): Add new configuration for arm*-*-freebsd*. * config/arm/freebsd-atomic.c: New file. * config/arm/t-freebsd: Likewise. * config/arm/unwind-arm.h: Add __FreeBSD__ to the list of 'PC-relative indirect' OS's. libatomic: * configure.tgt: Exclude arm*-*-freebsd* from try_ifunc. libstdc++-v3: * configure.host: Add arm*-*-freebsd* port_specific_symbol_files. From-SVN: r219388
2015-01-06configure.ac: Add Visium support.Eric Botcazou14-0/+2180
* configure.ac: Add Visium support. * configure: Regenerate. libgcc/ * config.host: Add Visium support. * config/visium: New directory. gcc/ * config.gcc: Add Visium support. * configure.ac: Likewise. * configure: Regenerate. * doc/extend.texi (interrupt attribute): Add Visium. * doc/invoke.texi: Document Visium options. * doc/install.texi: Document Visium target. * doc/md.texi: Document Visium constraints. * common/config/visium: New directory. * config/visium: Likewise. gcc/testsuite/ * lib/target-supports.exp (check_profiling_available): Return 0 for Visium. (check_effective_target_tls_runtime): Likewise. (check_effective_target_logical_op_short_circuit): Return 1 for Visium. * gcc.dg/20020312-2.c: Adjust for Visium. * gcc.dg/tls/thr-cse-1.c: Likewise * gcc.dg/tree-ssa/20040204-1.c: Likewise * gcc.dg/tree-ssa/loop-1.c: Likewise. * gcc.dg/weak/typeof-2.c: Likewise. From-SVN: r219219
2015-01-05Update copyright years.Jakub Jelinek890-890/+890
From-SVN: r219188
2014-12-19MIPS32R6 and MIPS64R6 supportMatthew Fortune1-4/+5
gcc/ * config.gcc: Add mipsisa64r6 and mipsisa32r6 cpu support. * config/mips/constraints.md (ZD): Add r6 restrictions. * config/mips/gnu-user.h (DRIVER_SELF_SPECS): Add MIPS_ISA_LEVEL_SPEC. * config/mips/loongson.md (<u>div<mode>3, <u>mod<mode>3): Move to mips.md. * config/mips/mips-cpus.def (mips32r6, mips64r6): Define. * config/mips/mips-modes.def (CCF): New mode. * config/mips/mips-protos.h (mips_9bit_offset_address_p): New prototype. * config/mips/mips-tables.opt: Regenerate. * config/mips/mips.c (MIPS_JR): Use JALR $, <reg> for R6. (mips_rtx_cost_data): Add pseudo-processors W32 and W64. (mips_9bit_offset_address_p): New function. (mips_rtx_costs): Account for R6 multiply and FMA instructions. (mips_emit_compare): Implement R6 FPU comparisons. (mips_expand_conditional_move): Implement R6 selects. (mips_expand_conditional_trap): Account for removed trap immediate. (mips_expand_block_move): Disable inline move when LWL/LWR are removed. (mips_print_float_branch_condition): Update for R6 FPU branches. (mips_print_operand): Handle CCF mode compares. (mips_interrupt_extra_call_saved_reg_p): Do not attempt to callee-save MD_REGS for R6. (mips_hard_regno_mode_ok_p): Support CCF mode. (mips_mode_ok_for_mov_fmt_p): Likewise. (mips_secondary_reload_class): CCFmode can be loaded directly. (mips_set_fast_mult_zero_zero_p): Account for R6 multiply instructions. (mips_option_override): Ensure R6 is used with fp64. Set default mips_nan modes. Check for mips_nan support. Prevent DSP with R6. (mips_conditional_register_usage): Disable MD_REGS for R6. Disable FPSW for R6. (mips_mulsidi3_gen_fn): Support R6 multiply instructions. * config/mips/mips.h (ISA_MIPS32R6, ISA_MIPS64R6): Define. (TARGET_CPU_CPP_BUILTINS): Rework for mips32/mips64. (ISA_HAS_JR): New macro. (ISA_HAS_HILO): New macro. (ISA_HAS_R6MUL): Likewise. (ISA_HAS_R6DMUL): Likewise. (ISA_HAS_R6DIV): Likewise. (ISA_HAS_R6DDIV): Likewise. (ISA_HAS_CCF): Likewise. (ISA_HAS_SEL): Likewise. (ISA_HAS_COND_TRAPI): Likewise. (ISA_HAS_FP_MADDF_MSUBF): Likewise. (ISA_HAS_LWL_LWR): Likewise. (ISA_HAS_IEEE_754_LEGACY): Likewise. (ISA_HAS_IEEE_754_2008): Likewise. (ISA_HAS_PREFETCH_9BIT): Likewise. (MIPSR6_9BIT_OFFSET_P): New macro. (BASE_DRIVER_SELF_SPECS): Use MIPS_ISA_DRIVER_SELF_SPECS. (DRIVER_SELF_SPECS): Use MIPS_ISA_LEVEL_SPEC. (MULTILIB_ISA_DEFAULT): Handle mips32r6 and mips64r6. (MIPS_ISA_LEVEL_SPEC): Likewise. (MIPS_ISA_SYNCI_SPEC): Likewise. (ISA_HAS_64BIT_REGS): Likewise. (ISA_HAS_BRANCHLIKELY): Likewise. (ISA_HAS_MUL3): Likewise. (ISA_HAS_DMULT): Likewise. (ISA_HAS_DDIV): Likewise. (ISA_HAS_DIV): Likewise. (ISA_HAS_MULT): Likewise. (ISA_HAS_FP_CONDMOVE): Likewise. (ISA_HAS_8CC): Likewise. (ISA_HAS_FP4): Likewise. (ISA_HAS_PAIRED_SINGLE): Likewise. (ISA_HAS_MADD_MSUB): Likewise. (ISA_HAS_FP_RECIP_RSQRT): Likewise. * config/mips/mips.md (processor): Add w32 and w64. (FPCC): New mode iterator. (reg): Add CCF mode. (fpcmp): New mode attribute. (fcond): Add ordered, ltgt and ne codes. (fcond): Update code attribute. (sel): New code attribute. (selinv): Likewise. (ctrap<mode>4): Update condition. (*conditional_trap_reg<mode>): New define_insn. (*conditional_trap<mode>): Update condition. (mul<mode>3): Expand R6 multiply instructions. (<su>mulsi3_highpart): Likewise. (<su>muldi3_highpart): Likewise. (mul<mode>3_mul3_loongson): Rename... (mul<mode>3_mul3_hilo): To this. Add R6 mul instruction. (<u>mulsidi3_32bit_r6): New expander. (<u>mulsidi3_32bit): Restrict to pre-r6 multiplies. (<u>mulsidi3_32bit_r4000): Likewise. (<u>mulsidi3_64bit): Likewise. (<su>mulsi3_highpart_internal): Likewise. (mulsidi3_64bit_r6dmul): New instruction. (<su>mulsi3_highpart_r6): Likewise. (<su>muldi3_highpart_r6): Likewise. (fma<mode>4): Likewise. (movccf): Likewise. (*sel<code><GPR:mode>_using_<GPR2:mode>): Likewise. (*sel<mode>): Likewise. (<u>div<mode>3): Moved from loongson.md. Add R6 instructions. (<u>mod<mode>3): Likewise. (extvmisalign<mode>): Require ISA_HAS_LWL_LWR. (extzvmisalign<mode>): Likewise. (insvmisalign<mode>): Likewise. (mips_cache): Account for R6 displacement field sizes. (*branch_fp): Rename... (*branch_fp_<mode>): To this. Add CCFmode support. (*branch_fp_inverted): Rename... (*branch_fp_inverted_<mode>): To this. Add CCFmode support. (s<code>_<mode>): Rename... (s<code>_<SCALARF:mode>_using_<FPCC:mode>): To this. Add FCCmode condition support. (s<code>_<mode> swapped): Rename... (s<code>_<SCALARF:mode>_using_<FPCC:mode> swapped): To this. Add CCFmode condition support. (mov<mode>cc GPR): Expand R6 selects. (mov<mode>cc FPR): Expand R6 selects. (*tls_get_tp_<mode>_split): Do not .set push for >= mips32r2. * config/mips/netbsd.h (TARGET_CPU_CPP_BUILTINS): Update similarly to mips.h. (ASM_SPEC): Add mips32r6, mips64r6. * config/mips/t-isa3264 (MULTILIB_OPTIONS, MULTILIB_DIRNAMES): Update for mips32r6/mips64r6. * doc/invoke.texi: Document -mips32r6,-mips64r6. * doc/md.texi: Update comment for ZD constraint. libgcc/ * config.host: Support mipsisa32r6 and mipsisa64r6. * config/mips/mips16.S: Do not build for R6. gcc/testsuite/ * gcc.dg/torture/mips-hilo-2.c: Unconditionally pass for R6 onwards. * gcc.dg/torture/pr19683-1.c: Likewise. * gcc.target/mips/branch-cost-2.c: Require MOVN. * gcc.target/mips/movcc-1.c: Likewise. * gcc.target/mips/movcc-2.c: Likewise. * gcc.target/mips/movcc-3.c: Likewise. * gcc.target/mips/call-saved-4.c: Require LDC. * gcc.target/mips/dmult-1.c: Require R5 or earlier. * gcc.target/mips/fpcmp-1.c: Likewise. * gcc.target/mips/fpcmp-2.c: Likewise. * gcc.target/mips/neg-abs-2.c: Likewise. * gcc.target/mips/timode-1.c: Likewise. * gcc.target/mips/unaligned-1.c: Likewise. * gcc.target/mips/madd-3.c: Require MADD. * gcc.target/mips/madd-9.c: Likewise. * gcc.target/mips/maddu-3.c: Likewise. * gcc.target/mips/msub-3.c: Likewise. * gcc.target/mips/msubu-3.c: Likewise. * gcc.target/mips/mult-1.c: Require INS and not DMUL. * gcc.target/mips/mips-ps-type-2.c: Require MADD.PS. * gcc.target/mips/mips.exp (mips_option_groups): Add ins, dmul, ldc, movn, madd, maddps. (mips-dg-options): INS available from R2. LDC available from MIPS II, DMUL is present in octeon. Describe all features removed from R6. Co-Authored-By: Steve Ellcey <sellcey@imgtec.com> From-SVN: r218973
2014-12-17crt.h: New.Oleg Endo3-11/+40
libgcc/ * config/sh/crt.h: New. * config/sh/crti.S: Use GLOBAL macro from crt.h for _init and _fini symbols. * config/sh/crt1.S: Likewise. From-SVN: r218807
2014-12-09(libgcc_s) Optional filename-based shared library versioning on AIX.Michael Haubenwallner1-16/+66
2014-12-09 Michael Haubenwallner <michael.haubenwallner@ssi-schaefer.com> (libgcc_s) Optional filename-based shared library versioning on AIX. * gcc/doc/install.texi: Describe --with-aix-soname option. * Makefile.in (with_aix_soname): Define. * config/rs6000/t-slibgcc-aix: Act upon --with-aix-soname option. * configure.ac: Accept --with-aix-soname=aix|svr4|both option. * configure: Recreate. From-SVN: r218539
2014-11-30lib1funcs.S: Check value of __SHMEDIA__ instead of checking whether it's ↵Oleg Endo1-9/+9
defined. libgcc/ * config/sh/lib1funcs.S: Check value of __SHMEDIA__ instead of checking whether it's defined. From-SVN: r218190
2014-11-27Support avx512f in __builtin_cpu_supports.Ilya Tocar1-1/+4
gcc/ * config/i386/cpuid.h (bit_MPX, bit_BNDREGS, bit_BNDCSR): Define. * config/i386/i386.c (get_builtin_code_for_version): Add avx512f. (fold_builtin_cpu): Ditto. * doc/extend.texi: Documment it. gcc/testsuite/ * g++.dg/ext/mv2.C: Add test for target ("avx512f"). * gcc.target/i386/builtin_target.c: Ditto. libgcc/ * config/i386/cpuinfo.c (processor_features): Add FEATURE_AVX512F. * config/i386/cpuinfo.c (get_available_features): Detect it. From-SVN: r218125
2014-11-27lib1funcs.S (FUNC_START): Add conditional section redefine for macro ↵Tony Wang1-4/+22
L_arm_muldivsf3 and L_arm_muldivdf3. 2014-11-27 Tony Wang <tony.wang@arm.com> libgcc/ * config/arm/lib1funcs.S (FUNC_START): Add conditional section redefine for macro L_arm_muldivsf3 and L_arm_muldivdf3. (SYM_END, ARM_SYM_START): Add macros used to expose function Symbols. From-SVN: r218124
2014-11-24linux-atomic.c (ABORT_INSTRUCTION): Use __builtin_trap() instead.John David Anglin1-5/+2
* config/pa/linux-atomic.c (ABORT_INSTRUCTION): Use __builtin_trap() instead. From-SVN: r218033
2014-11-22linux-atomic.c (__kernel_cmpxchg2): New.Guy Martin1-141/+161
* config/pa/linux-atomic.c (__kernel_cmpxchg2): New. (FETCH_AND_OP_2): New. Use for subword and double word operations. (OP_AND_FETCH_2): Likewise. (COMPARE_AND_SWAP_2): Likewise. (SYNC_LOCK_TEST_AND_SET_2): Likewise. (SYNC_LOCK_RELEASE_2): Likewise. (SUBWORD_SYNC_OP): Remove. (SUBWORD_VAL_CAS): Likewise. (SUBWORD_BOOL_CAS): Likewise. (FETCH_AND_OP_WORD): Update. Consistently use signed types. Co-Authored-By: John David Anglin <danglin@gcc.gnu.org> From-SVN: r217956
2014-11-13divmodhi.S: Add support for the G10 architecture.Nick Clifton8-212/+243
* config/rl78/divmodhi.S: Add support for the G10 architecture. Use START_FUNC and END_FUNC macros to enable linker garbage collection. * config/rl78/divmodqi.S: Likewise. * config/rl78/divmodsi.S: Likewise. * config/rl78/mulsi3.S: Likewise. * config/rl78/lib2div.c: Remove G10 functions. * config/rl78/lib2muls.c: Likewise. * config/rl78/t-rl8 (HOST_LIBGCC2_CFLAGS): Define. * config/rl78/vregs.h (START_FUNC): New macro. (END_FUNC): New macro. From-SVN: r217463
2014-11-12Implement MIPS o32 FPXX, FP64, FP64A ABI extensions.Matthew Fortune1-6/+29
2014-11-12 Matthew Fortune <matthew.fortune@imgtec.com> gcc/ * common/config/mips/mips-common.c (mips_handle_option): Ensure that -mfp32, -mfp64 disable -mfpxx and -mfpxx disables -mfp64. * config.gcc (--with-fp-32): New option. (--with-odd-spreg-32): Likewise. * config.in (HAVE_AS_DOT_MODULE): New config define. * config/mips/mips-protos.h (mips_secondary_memory_needed): New prototype. (mips_hard_regno_caller_save_mode): Likewise. * config/mips/mips.c (mips_get_reg_raw_mode): New static prototype. (mips_get_arg_info): Assert that V2SFmode is only handled specially with TARGET_PAIRED_SINGLE_FLOAT. (mips_return_mode_in_fpr_p): Likewise. (mips16_call_stub_mode_suffix): Likewise. (mips_get_reg_raw_mode): New static function. (mips_return_fpr_pair): O32 return values span two registers. (mips16_build_call_stub): Likewise. (mips_function_value_regno_p): Support both FP return registers. (mips_output_64bit_xfer): Use mthc1 whenever TARGET_HAS_MXHC1. Add specific cases for TARGET_FPXX to move via memory. (mips_dwarf_register_span): For TARGET_FPXX pretend that modes larger than UNITS_PER_FPREG 'span' one register. (mips_dwarf_frame_reg_mode): New static function. (mips_file_start): Switch to using .module instead of .gnu_attribute. No longer support FP ABI 4 (-mips32r2 -mfp64), replace with FP ABI 6. Add FP ABI 5 (-mfpxx) and FP ABI 7 (-mfp64 -mno-odd-spreg). (mips_save_reg, mips_restore_reg): Always represent DFmode frame slots with two CFI directives even for O32 FP64. (mips_for_each_saved_gpr_and_fpr): Account for fixed_regs when saving/restoring callee-saved registers. (mips_hard_regno_mode_ok_p): Implement O32 FP64A extension. (mips_secondary_memory_needed): New function. (mips_option_override): ABI check for TARGET_FLOATXX. Disable odd-numbered single-precision registers when using TARGET_FLOATXX. Implement -modd-spreg and defaults. (mips_conditional_register_usage): Redefine O32 FP64 to match O32 FP32 callee-saved behaviour. (mips_hard_regno_caller_save_mode): Implement. (TARGET_GET_RAW_RESULT_MODE): Define target hook. (TARGET_GET_RAW_ARG_MODE): Define target hook. (TARGET_DWARF_FRAME_REG_MODE): Define target hook. * config/mips/mips.h (TARGET_FLOAT32): New macro. (TARGET_O32_FP64A_ABI): Likewise. (TARGET_CPU_CPP_BUILTINS): TARGET_FPXX is __mips_fpr==0. Add _MIPS_SPFPSET builtin define. (MIPS_FPXX_OPTION_SPEC): New macro. (OPTION_DEFAULT_SPECS): Pass through --with-fp-32=* to -mfp and --with-odd-spreg-32=* to -m[no-]odd-spreg. (ISA_HAS_ODD_SPREG): New macro. (ISA_HAS_MXHC1): True for anything other than -mfp32. (ASM_SPEC): Pass through mfpxx, mfp64, -mno-odd-spreg and -modd-spreg. (MIN_FPRS_PER_FMT): Redefine in terms of TARGET_ODD_SPREG. (HARD_REGNO_CALLER_SAVE_MODE): Define. Implement O32 FPXX extension (HARD_REGNO_CALL_PART_CLOBBERED): Likewise. (SECONDARY_MEMORY_NEEDED): Likewise. (FUNCTION_ARG_REGNO_P): Update for O32 FPXX and FP64 extensions. * config/mips/mips.md (define_attr enabled): Implement O32 FPXX and FP64A ABI extensions. (move_doubleword_fpr<mode>): Use ISA_HAS_MXHC1 instead of TARGET_FLOAT64. * config/mips/mips.opt (mfpxx): New target option. (modd-spreg): Likewise. * config/mips/mti-elf.h (DRIVER_SELF_SPECS): Infer FP ABI from arch. * config/mips/mti-linux.h (DRIVER_SELF_SPECS): Likewise and remove fp64 sysroot. * config/mips/t-mti-elf: Remove fp64 multilib. * config/mips/t-mti-linux: Likewise. * configure.ac: Detect .module support. * configure: Regenerate. * doc/invoke.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg option. * doc/install.texi (--with-fp-32, --with-odd-spreg-32): Document new options. gcc/testsuite/ * gcc.target/mips/args-1.c: Handle __mips_fpr == 0. * gcc.target/mips/call-clobbered-1.c: New. * gcc.target/mips/call-clobbered-2.c: New. * gcc.target/mips/call-clobbered-3.c: New. * gcc.target/mips/call-clobbered-4.c: New. * gcc.target/mips/call-clobbered-5.c: New. * gcc.target/mips/call-saved-4.c: New. * gcc.target/mips/call-saved-5.c: New. * gcc.target/mips/call-saved-6.c: New. * gcc.target/mips/mips.exp: Support -mfpxx, -ffixed-f*, and -m[no-]odd-spreg. Use _MIPS_SPFPSET to determine default odd-spreg option. Account for -modd-spreg in minimum arch code. * gcc.target/mips/movdf-1.c: New. * gcc.target/mips/movdf-2.c: New. * gcc.target/mips/movdf-3.c: New. * gcc.target/mips/oddspreg-1.c: New. * gcc.target/mips/oddspreg-2.c: New. * gcc.target/mips/oddspreg-3.c: New. * gcc.target/mips/oddspreg-4.c: New. * gcc.target/mips/oddspreg-5.c: New. * gcc.target/mips/oddspreg-6.c: New. libgcc/ * config/mips/mips16.S: Set .module when supported. Update O32 FP64 calling convention and use for FPXX when possible. Add FPXX calling convention fallback case. From-SVN: r217446
2014-11-10Add the nvptx port.Bernd Schmidt6-0/+236
* configure.ac: Handle nvptx-*-*. * configure: Regenerate. gcc/ * config/nvptx/nvptx.c: New file. * config/nvptx/nvptx.h: New file. * config/nvptx/nvptx-protos.h: New file. * config/nvptx/nvptx.md: New file. * config/nvptx/t-nvptx: New file. * config/nvptx/nvptx.opt: New file. * common/config/nvptx/nvptx-common.c: New file. * config.gcc: Handle nvptx-*-*. libgcc/ * config.host: Handle nvptx-*-*. * shared-object.mk (as-flags-$o): Define. ($(base)$(objext), $(base)_s$(objext)): Use it instead of -xassembler-with-cpp. * static-object.mk: Identical changes. * config/nvptx/t-nvptx: New file. * config/nvptx/crt0.s: New file. * config/nvptx/free.asm: New file. * config/nvptx/malloc.asm: New file. * config/nvptx/realloc.c: New file. From-SVN: r217295
2014-10-30Make soft-fp symbols into compat symbols for powerpc*-*-linux*.Joseph Myers2-4/+31
Continuing preparations for implementing TARGET_ATOMIC_ASSIGN_EXPAND_FENV for powerpc*-*-linux* soft-float and e500, this patch makes soft-fp symbols used for those targets into compat symbols when building with glibc >= 2.19, so that they are only in shared libgcc for existing binaries requiring them, not in static libgcc and not available for new links using shared libgcc. Instead, new links will get the symbols from libc, which has exported all of them since 2.19. (Actually all the symbols were exported from glibc since 2.4, but some of them were exported by glibc as compat symbols only - because of a confusion between deliberately present soft-fp symbols and old accidental reexports of libgcc functions from glibc 2.0 - until 2.19.) This allows user floating-point arithmetic to interoperate properly with the state handled by <fenv.h> functions, whether software state (for soft-float; TLS variables that don't form a public part of glibc's ABI, so can only be accessed directly by functions within glibc) or hardware state (for e500 - the copies of the soft-fp functions in glibc being built to interoperate with the hardware state whereas those in libgcc aren't). Previously only glibc's own functions, and those operations done in hardware on e500, properly worked with that state, not direct floating-point arithmetic operations that were implemented in software. The intended next step is the actual TARGET_ATOMIC_ASSIGN_EXPAND_FENV implementation. The test of glibc >= 2.19 uses the same --with-glibc-version configure option as in the gcc/ directory (but differently implemented; in gcc/ the fallback is to examine headers to find the version, while in libgcc/ we can use compile for the target and so use AC_COMPUTE_INT). The TARGET_ATOMIC_ASSIGN_EXPAND_FENV implementation will also only do anything for glibc >= 2.19, as it will depend on generating calls to functions __atomic_feholdexcept __atomic_feclearexcept __atomic_feupdateenv that were added in 2.19 for that purpose (even for e500, inline code is not readily possible because of the need to make prctl syscalls from the implementation of these functions). In order to make symbols compat symbols, the soft-fp files need wrapping with generated wrappers including asm .symver directives, which need to name the symbol version in question. This is extracted by an awk script from an intermediate stage of generating the .map file for linking libgcc (that .map itself depends on the objects that go into the library, so can't be used for this purpose as that would mean a circular dependency); the extraction is not fully general regarding the features available in .map generation, but suffices for the present purpose. It would make sense for hardfp.c symbols to be compat symbols as well (in the cases where hardfp.c gets used, the functions in question should not be used for new links), but this isn't required for the present purpose, which is only concerned with ensuring that where functions that should be affected by rounding modes or exceptions get used, those functions are actually affected by those rounding modes or exceptions. Tested with no regressions with cross to powerpc-linux-gnu (soft-float); c11-atomic-exec-5.c moves from UNSUPPORTED to FAIL, as expected, now that floating-point arithmetic in user programs uses the same state as <fenv.h> functions, so the fenv_exceptions test passes, but TARGET_ATOMIC_ASSIGN_EXPAND_FENV isn't yet implemented. (For e500, c11-atomic-exec-5.c was already FAILing, as enough operations worked with the hardware state for the fenv_exceptions effective target test to pass.) Also verified that the exported symbols and versions are unchanged, with the expected symbols becoming compat symbols at the same versions, and that with --with-glibc-version=2.18 the symbols remain normal rather than compat symbols. * Makefile.in (libgcc.map.in): New target. (libgcc.map): Use libgcc.map.in. * config/t-softfp (softfp_compat): New variable to be set by users. [$(softfp_compat) = y] (softfp_map_dep, softfp_set_symver): New variables. [$(softfp_compat) = y] (softfp_file_list): Use files in the build directory. [$(softfp_compat) = y] ($(softfp_file_list)): Generate wrappers that use compat symbols and disable all code unless [SHARED]. * config/t-softfp-compat: New file. * find-symver.awk: New file. * configure.ac (--with-glibc-version): New configure option. (ppc_fp_compat): New variable set for powerpc*-*-linux*. * configure: Regenerate. * config.host (powerpc*-*-linux*): Use ${ppc_fp_compat} for soft-float and e500. From-SVN: r216942
2014-10-29Optimize powerpc*-*-linux* e500 hardfp/soft-fp use.Joseph Myers4-1/+73
Continuing the cleanups of libgcc soft-fp configuration for powerpc*-*-linux* in preparation for implementing TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float and e500, this patch optimizes the choice of which functions to build for the e500 cases. For e500v2, use of hardfp is generally right, except that calls to __unordsf2 and __unorddf2 are actually generated by GCC from __builtin_isunordered and so they need to be implemented with soft-fp to avoid recursively calling themselves. For e500v1, hardfp is right for SFmode (except for __unordsf2) but soft-fp for DFmode (and when using soft-fp, as usual it's best for the conversions between DFmode and integers all to come directly from soft-fp rather than some coming from libgcc2.c). Thus, new variables hardfp_exclusions and softfp_extras are added that configurations using t-hardfp and t-softfp can use to achieve the desired effect of selectively mixing the two sources of functions. Tested with no regressions for crosses to powerpc-linux-gnuspe (both e500v1 and e500v2); also checked that the same set of symbols and versions is exported from shared libgcc before and after the patch. * config/t-hardfp (hardfp_exclusions): Document new variable for user to define. (hardfp_func_list): Exclude functions from $(hardfp_exclusions). * config/t-softfp (softfp_extras): Document new variable for user to define. (softfp_func_list): Add functions from $(softfp_extras). * config/rs6000/t-e500v1-fp, config/rs6000/t-e500v2-fp: New files. * config.host (powerpc*-*-linux*): For e500v1, use rs6000/t-e500v1-fp and t-hardfp; do not use t-softfp-sfdf and t-softfp-excl. For e500v2, use t-hardfp-sfdf, rs6000/t-e500v2-fp and t-hardfp; do not use t-softfp-sfdf and t-softfp-excl. From-SVN: r216835
2014-10-26linux-unwind.h (pa32_read_access_ok): New function.John David Anglin1-6/+28
* config/pa/linux-unwind.h (pa32_read_access_ok): New function. (pa32_fallback_frame_state): Use pa32_read_access_ok to check if memory read accesses are ok. From-SVN: r216716
2014-10-22Do not build soft-fp code at all for powerpc64-linux-gnu.Joseph Myers1-3/+0
When I added support for using soft-fp in libgcc <https://gcc.gnu.org/ml/gcc-patches/2006-03/msg00689.html>, libgcc configuration was still done in the gcc/ directory, meaning that the variables set in makefile fragments could not depend on the multilib being built. Thus, building the soft-fp code for powerpc64-linux-gnu was disabled in the same way as had been done with fp-bit: the code was built, but with #ifndef __powerpc64__ wrappers around it so that the resulting objects were empty. Now that libgcc configuration is done in the toplevel libgcc directory, such uses of softfp_wrap_start / softfp_wrap_end are better replaced by configure-time conditionals that determine whether to use soft-fp for a given multilib. This patch does so for powerpc*-*-linux*. The same would appear to apply to powerpc*-*-freebsd* (using rs6000/t-freebsd64), but I have not made any changes there. t-ppc64-fp is also used by AIX targets, but they don't use soft-fp anyway so the changes are of no consequence to them. The same principle of replacing softfp_wrap_start / softfp_wrap_end with configure-time conditionals also applies to softfp_exclude_libgcc2, which was intended for cases where soft-fp is being used on hard-float multilibs and so it is desirable on those multilibs for a few functions to come from libgcc2.c rather than soft-fp (but the soft-fp versions would be more efficient on soft-float multilibs). Now we have hardfp.c and t-hardfp, those are better to use in that case, to minimize the size of the bulk of the functions that are only present for ABI compatibility and should never be called by newly compiled code. I intend followup patches to switch 32-bit hard-float multilibs to use t-hardfp as far as possible (for all non-libgcc2.c operations for classic hard float; for all except __unord* for e500v2; for all SFmode operations except __unordsf2 for e500v1). After that will come making the soft-fp operations, in the remaining cases for which they are built because they are actually needed for code compiled by current GCC, into compat symbols when building for glibc 2.19 or later, so that the glibc versions (with exception and rounding mode support) get used instead (2.19 or later is needed for all the functions to be exported from glibc as non-compat symbols). In turn, that is required before implementing TARGET_ATOMIC_ASSIGN_EXPAND_FENV for soft-float and e500, as that can only be properly effective when GCC-compiled code is actually interoperating correctly with the exception and rounding mode state used by <fenv.h> functions. Tested with no regressions with cross to powerpc64-linux-gnu (in addition, verified that stripped libgcc_s.so.1 is identical before and after the patch). * config.host (powerpc*-*-linux*): Only use soft-fp for 32-bit configurations. * config/rs6000/t-ppc64-fp (softfp_wrap_start, softfp_wrap_end): Remove variables. From-SVN: r216564
2014-10-22lib1funcs.S (__do_global_dtors): Fix wrong code introduced with 2014-10-21 ↵Georg-Johann Lay1-2/+6
trunk r216525. * config/avr/lib1funcs.S (__do_global_dtors): Fix wrong code introduced with 2014-10-21 trunk r216525. From-SVN: r216550
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