aboutsummaryrefslogtreecommitdiff
path: root/libgcc/config
AgeCommit message (Collapse)AuthorFilesLines
2025-01-06or1k: add .note.GNU-stack section on linuxStafford Horne1-0/+5
In the OpenRISC build we get the following warning: ld: warning: __modsi3_s.o: missing .note.GNU-stack section implies executable stack ld: NOTE: This behaviour is deprecated and will be removed in a future version of the linker Fix this by adding a .note.GNU-stack to indicate the stack does not need to be executable for the lib1funcs. Note, this is also needed for the upcoming glibc 2.41. libgcc/ * config/or1k/lib1funcs.S: Add .note.GNU-stack section on linux.
2025-01-02Update copyright years.Jakub Jelinek1000-1000/+1000
2025-01-02Update Copyright year in ChangeLog filesJakub Jelinek1-1/+1
2024 -> 2025
2024-12-12AVR: target/118001 - Add __flashx as 24-bit named address space.Georg-Johann Lay2-87/+162
This patch adds __flashx as a new named address space that allocates objects in .progmemx.data. The handling is mostly the same or similar to that of 24-bit space __memx, except that the asm routines are simpler and more efficient. Loads are emit inline when ELPMX or LPMX is available. The address space uses a 24-bit addresses even on devices with a program memory size of 64 KiB or less. PR target/118001 gcc/ * doc/extend.texi (AVR Named Address Spaces): Document __flashx. * config/avr/avr.h (ADDR_SPACE_FLASHX): New enum value. * config/avr/avr-protos.h (avr_out_fload, avr_mem_flashx_p) (avr_fload_libgcc_p, avr_load_libgcc_mem_p) (avr_load_libgcc_insn_p): New. * config/avr/avr.cc (avr_addrspace): Add ADDR_SPACE_FLASHX. (avr_decl_flashx_p, avr_mem_flashx_p, avr_fload_libgcc_p) (avr_load_libgcc_mem_p, avr_load_libgcc_insn_p, avr_out_fload): New functions. (avr_adjust_insn_length) [ADJUST_LEN_FLOAD]: Handle case. (avr_progmem_p) [avr_decl_flashx_p]: return 2. (avr_addr_space_legitimate_address_p) [ADDR_SPACE_FLASHX]: Has same behavior like ADDR_SPACE_MEMX. (avr_addr_space_convert): Use pointer sizes rather then ASes. (avr_addr_space_contains): New function. (avr_convert_to_type): Use it. (avr_emit_cpymemhi): Handle ADDR_SPACE_FLASHX. * config/avr/avr.md (adjust_len) <fload>: New attr value. (gen_load<mode>_libgcc): Renamed from load<mode>_libgcc. (xload8<mode>_A): Iterate over MOVMODE rather than over ALL1. (fxmov<mode>_A): New from xloadv<mode>_A. (xmov<mode>_8): New from xload<mode>_A. (fmov<mode>): New insns. (fxload<mode>_A): New from xload<mode>_A. (fxload_<mode>_libgcc): New from xload_<mode>_libgcc. (*fxload_<mode>_libgcc): New from *xload_<mode>_libgcc. (mov<mode>) [avr_mem_flashx_p]: Hande ADDR_SPACE_FLASHX. (cpymemx_<mode>): Make sure the address space is not lost when splitting. (*cpymemx_<mode>) [ADDR_SPACE_FLASHX]: Use __movmemf_<mode> for asm. (*ashlqi.1.zextpsi_split): New combine pattern. * config/avr/predicates.md (nox_general_operand): Don't match when avr_mem_flashx_p is true. * config/avr/avr-passes.cc (AVR_LdSt_Props): ADDR_SPACE_FLASHX has no post_inc. gcc/testsuite/ * gcc.target/avr/torture/addr-space-1.h [AVR_HAVE_ELPM]: Use a function to bump .progmemx.data to a high address. * gcc.target/avr/torture/addr-space-2.h: Same. * gcc.target/avr/torture/addr-space-1-fx.c: New test. * gcc.target/avr/torture/addr-space-2-fx.c: New test. libgcc/ * config/avr/t-avr (LIB1ASMFUNCS): Add _fload_1, _fload_2, _fload_3, _fload_4, _movmemf. * config/avr/lib1funcs.S (.branch_plus): New .macro. (__xload_1, __xload_2, __xload_3, __xload_4): When the address is located in flash, then forward to... (__fload_1, __fload_2, __fload_3, __fload_4): ...these new functions, respectively. (__movmemx_hi): When the address is located in flash, forward to... (__movmemf_hi): ...this new function.
2024-11-29aarch64: Fix build failure due to missing headerYury Khrustalev1-2/+1
Including the "arm_acle.h" header in aarch64-unwind.h requires stdint.h to be present and it may not be available during the first stage of cross-compilation of GCC. When cross-building GCC for the aarch64-none-linux-gnu target (on any supporting host) using the 3-stage bootstrap build process when we build native compiler from source, libgcc fails to compile due to missing header that has not been installed yet. This could be worked around but it's better to fix the issue. libgcc/ChangeLog: * config/aarch64/aarch64-unwind.h (_CHKFEAT_GCS): Add.
2024-11-29aarch64: add ACLE macro _CHKFEAT_GCSYury Khrustalev1-3/+3
gcc/ChangeLog: * config/aarch64/arm_acle.h (_CHKFEAT_GCS): New. libgcc/ChangeLog: * config/aarch64/aarch64-unwind.h (_Unwind_Frames_Extra): Update. (_Unwind_Frames_Increment): Update Reviewed-by: Richard Sandiford <richard.sandiford@arm.com>
2024-11-25nios2: Remove all support for Nios II target.Sandra Loosemore14-1105/+0
nios2 target support in GCC was deprecated in GCC 14 as the architecture has been EOL'ed by the vendor. This patch removes the entire port for GCC 15 There are still references to "nios2" in libffi and libgo. Since those libraries are imported into the gcc sources from master copies maintained by other projects, those will need to be addressed elsewhere. ChangeLog: * MAINTAINERS: Remove references to nios2. * configure.ac: Likewise. * configure: Regenerated. config/ChangeLog: * mt-nios2-elf: Deleted. contrib/ChangeLog: * config-list.mk: Remove references to Nios II. gcc/ChangeLog: * common/config/nios2/*: Delete entire directory. * config/nios2/*: Delete entire directory. * config.gcc: Remove references to nios2. * configure.ac: Likewise. * doc/extend.texi: Likewise. * doc/install.texi: Likewise. * doc/invoke.texi: Likewise. * doc/md.texi: Likewise. * regenerate-opt-urls.py: Likewise. * config.in: Regenerated. * configure: Regenerated. gcc/testsuite/ChangeLog: * g++.target/nios2/*: Delete entire directory. * gcc.target/nios2/*: Delete entire directory. * g++.dg/cpp0x/constexpr-rom.C: Remove refences to nios2. * g++.old-deja/g++.jason/thunk3.C: Likewise. * gcc.c-torture/execute/20101011-1.c: Likewise. * gcc.c-torture/execute/pr47237.c: Likewise. * gcc.dg/20020312-2.c: Likewise. * gcc.dg/20021029-1.c: Likewise. * gcc.dg/debug/btf/btf-datasec-1.c: Likewise. * gcc.dg/ifcvt-4.c: Likewise. * gcc.dg/stack-usage-1.c: Likewise. * gcc.dg/struct-by-value-1.c: Likewise. * gcc.dg/tree-ssa/reassoc-33.c: Likewise. * gcc.dg/tree-ssa/reassoc-34.c: Likewise. * gcc.dg/tree-ssa/reassoc-35.c: Likewise. * gcc.dg/tree-ssa/reassoc-36.c: Likewise. * lib/target-supports.exp: Likewise. libgcc/ChangeLog: * config/nios2/*: Delete entire directory. * config.host: Remove refences to nios2. * unwind-dw2-fde-dip.c: Likewise.
2024-11-19aarch64: Bypass hidden attribute warnings in MinGWEvgeny Karpov1-0/+2
The patch bypasses hidden attribute warnings in MinGW until it is implemented. libgcc/ChangeLog: * config.host: Update. * config/aarch64/t-mingw: New.
2024-11-18Fix more c23 bool falloutJeff Law5-10/+0
While these haven't shown up in my tester (not configs I test) and I think we're likely going to be deprecating the nds32 target. we might as well go ahead and fix them. I'm going to include this under the pr117628 umbrella. PR target/117628 libgcc/ * config/arm/freebsd-atomic.c (bool): Remove unnecessary typedef. * config/arm/linux-atomic-64bit.c: Likewise. * config/arm/linux-atomic.c: Likewise. * config/nds32/linux-atomic.c: Likewise. * config/nios2/linux-atomic.c: Likewise.
2024-11-18[RFA] Fix csky and c6x build failuresJeff Law1-2/+0
csky fails to build libgcc after the c23 changes because it has a typedef for bool. AFAICT it's internal to the file, so removing the typedef isn't an ABI change. Similiarly for c6x which includes unwind-arm-common.inc. I suspect most, if not all of the arm-v7 and older targets are failing to build right now. I've built and regression tested both csky-linux-gnu and c6x-elf with this change. OK for the trunk? PR target/117628 libgcc/ * config/csky/linux-atomic.c (bool): Remove unnecessary typedef. * unwind-arm-common.inc (bool): Similarly.
2024-11-17hppa: Remove typedef for bool typeJohn David Anglin1-2/+0
In C23, bool is now a keyword. So, doing a typedef for it is invalid. 2024-11-17 John David Anglin <danglin@gcc.gnu.org> libgcc/ChangeLog: PR target/117627 * config/pa/linux-atomic.c: Remove typedef for bool type.
2024-11-17Daily bump.GCC Administrator1-0/+4
2024-11-16AVR: Fix building LibF7 after switching to C23.Georg-Johann Lay1-3/+7
Since r15-5327, GNU-C23 is being used as C language default. libf7.h doesn't assume headers like stdbool.h are present and defines bool, true and false on its own. libgcc/config/avr/libf7/ * libf7.h (bool, true, false): Don't define in C23 or higher.
2024-11-14Daily bump.GCC Administrator1-0/+6
2024-11-14aarch64: libgcc: add GCS marking to asmSzabolcs Nagy1-2/+14
libgcc/ChangeLog: * config/aarch64/aarch64-asm.h (FEATURE_1_GCS): Define. (GCS_FLAG): Define if GCS is enabled. (GNU_PROPERTY): Add GCS_FLAG.
2024-11-14aarch64: Add GCS support to the unwinderSzabolcs Nagy1-1/+58
Follows the current linux ABI that uses single signal entry token and shared shadow stack between thread and alt stack. Could be behind __ARM_FEATURE_GCS_DEFAULT ifdef (only do anything special with gcs compat codegen) but there is a runtime check anyway. Change affected tests to be compatible with -mbranch-protection=standard libgcc/ChangeLog: * config/aarch64/aarch64-unwind.h (_Unwind_Frames_Extra): Update. (_Unwind_Frames_Increment): Define.
2024-11-14libgcc: Fix COPY_ARG_VAL initializer (PR 117537)Christophe Lyon1-2/+2
We recently forced -Werror when building libgcc for aarch64, to make sure we'd catch and fix the kind of problem described in the PR. In this case, when building for aarch64_be (so, big endian), gcc emits this warning/error: libgcc/config/libbid/bid_conf.h:847:25: error: missing braces around initializer [-Werror=missing-braces] 847 | UINT128 arg_name={ bid_##arg_name.w[1], bid_##arg_name.w[0]}; libgcc/config/libbid/bid_conf.h:871:8: note: in expansion of macro 'COPY_ARG_VAL' 871 | COPY_ARG_VAL(arg_name) This patch fixes the problem by adding curly braces around the initializer for COPY_ARG_VAL in the big endian case. It seems that COPY_ARG_REF (just above COPY_ARG_VAL) has a similar issue, but DECIMAL_CALL_BY_REFERENCE seems always defined to 0, so COPY_ARG_REF is never used. The patch fixes it too, though. libgcc/config/libbid/ChangeLog: PR libgcc/117537 * bid_conf.h (COPY_ARG_REF): Fix initializer. (COPY_ARG_VAL): Likewise.
2024-10-26Daily bump.GCC Administrator2-0/+85
2024-10-25non-gcc: Remove trailing whitespaceJakub Jelinek150-1675/+1675
I've tried to build stage3 with -Wleading-whitespace=blanks -Wtrailing-whitespace=blank -Wno-error=leading-whitespace=blanks -Wno-error=trailing-whitespace=blank added to STRICT_WARN and that expectably resulted in about 2744 unique trailing whitespace warnings and 124837 leading whitespace warnings when excluding *.md files (which obviously is in big part a generator issue). Others from that are generator related, I think those need to be solved later. The following patch just fixes up the easy case (trailing whitespace), which could be easily automated: for i in `find . -name \*.h -o -name \*.cc -o -name \*.c | xargs grep -l '[ ]$' | grep -v testsuite/`; do sed -i -e 's/[ ]*$//' $i; done I've excluded files which I knew are obviously generated or go FE. Is there anything else we'd want to avoid the changes? Due to patch size, I've split it between gcc/ part and rest (include/, libiberty/, libgcc/, libcpp/, libstdc++-v3/; this part). 2024-10-24 Jakub Jelinek <jakub@redhat.com> include/ * dyn-string.h: Remove trailing whitespace. * libiberty.h: Likewise. * xregex.h: Likewise. * splay-tree.h: Likewise. * partition.h: Likewise. * plugin-api.h: Likewise. * demangle.h: Likewise. * vtv-change-permission.h: Likewise. * fibheap.h: Likewise. * hsa_ext_image.h: Likewise. * hashtab.h: Likewise. * libcollector.h: Likewise. * sort.h: Likewise. * symcat.h: Likewise. * hsa_ext_amd.h: Likewise. libcpp/ * directives.cc: Remove trailing whitespace. * mkdeps.cc: Likewise. * line-map.cc: Likewise. * internal.h: Likewise. * files.cc: Likewise. * init.cc: Likewise. * makeucnid.cc: Likewise. * system.h: Likewise. * include/line-map.h: Likewise. * include/symtab.h: Likewise. * include/cpplib.h: Likewise. * expr.cc: Likewise. * charset.cc: Likewise. * macro.cc: Likewise. * errors.cc: Likewise. * lex.cc: Likewise. * traditional.cc: Likewise. libgcc/ * crtstuff.c: Remove trailing whitespace. * libgcov.h: Likewise. * config/alpha/crtfastmath.c: Likewise. * config/alpha/vms-gcc_shell_handler.c: Likewise. * config/alpha/vms-unwind.h: Likewise. * config/pa/linux-atomic.c: Likewise. * config/pa/linux-unwind.h: Likewise. * config/pa/quadlib.c: Likewise. * config/pa/fptr.c: Likewise. * config/s390/32/_fixsfdi.c: Likewise. * config/s390/32/_fixunssfdi.c: Likewise. * config/s390/32/_fixunsdfdi.c: Likewise. * config/c6x/pr-support.c: Likewise. * config/lm32/_udivsi3.c: Likewise. * config/lm32/libgcc_lm32.h: Likewise. * config/lm32/_udivmodsi4.c: Likewise. * config/lm32/_mulsi3.c: Likewise. * config/lm32/_modsi3.c: Likewise. * config/lm32/_umodsi3.c: Likewise. * config/lm32/_divsi3.c: Likewise. * config/darwin-crt3.c: Likewise. * config/msp430/mpy.c: Likewise. * config/ia64/tf-signs.c: Likewise. * config/ia64/fde-vms.c: Likewise. * config/ia64/unwind-ia64.c: Likewise. * config/ia64/vms-unwind.h: Likewise. * config/ia64/sfp-exceptions.c: Likewise. * config/ia64/quadlib.c: Likewise. * config/ia64/unwind-ia64.h: Likewise. * config/rl78/vregs.h: Likewise. * config/arm/bpabi.c: Likewise. * config/arm/unwind-arm.c: Likewise. * config/arm/pr-support.c: Likewise. * config/arm/linux-atomic.c: Likewise. * config/arm/bpabi-lib.h: Likewise. * config/frv/frvend.c: Likewise. * config/frv/cmovw.c: Likewise. * config/frv/frvbegin.c: Likewise. * config/frv/cmovd.c: Likewise. * config/frv/cmovh.c: Likewise. * config/aarch64/cpuinfo.c: Likewise. * config/i386/crtfastmath.c: Likewise. * config/i386/cygming-crtend.c: Likewise. * config/i386/32/tf-signs.c: Likewise. * config/i386/crtprec.c: Likewise. * config/i386/sfp-exceptions.c: Likewise. * config/i386/w32-unwind.h: Likewise. * config/m32r/initfini.c: Likewise. * config/sparc/crtfastmath.c: Likewise. * config/gcn/amdgcn_veclib.h: Likewise. * config/nios2/linux-atomic.c: Likewise. * config/nios2/linux-unwind.h: Likewise. * config/nios2/lib2-mul.c: Likewise. * config/nios2/lib2-nios2.h: Likewise. * config/xtensa/unwind-dw2-xtensa.c: Likewise. * config/rs6000/darwin-fallback.c: Likewise. * config/rs6000/ibm-ldouble.c: Likewise. * config/rs6000/sfp-machine.h: Likewise. * config/rs6000/darwin-asm.h: Likewise. * config/rs6000/darwin-crt2.c: Likewise. * config/rs6000/aix-unwind.h: Likewise. * config/rs6000/sfp-exceptions.c: Likewise. * config/gthr-vxworks.c: Likewise. * config/riscv/atomic.c: Likewise. * config/visium/memcpy.c: Likewise. * config/darwin-crt-tm.c: Likewise. * config/stormy16/lib2funcs.c: Likewise. * config/arc/ieee-754/divtab-arc-sf.c: Likewise. * config/arc/ieee-754/divtab-arc-df.c: Likewise. * config/arc/initfini.c: Likewise. * config/sol2/gmon.c: Likewise. * config/microblaze/divsi3_table.c: Likewise. * config/m68k/fpgnulib.c: Likewise. * libgcov-driver.c: Likewise. * unwind-dw2.c: Likewise. * fp-bit.c: Likewise. * dfp-bit.h: Likewise. * dfp-bit.c: Likewise. * libgcov-driver-system.c: Likewise. libgcc/config/libbid/ * _le_td.c: Remove trailing whitespace. * bid128_compare.c: Likewise. * bid_div_macros.h: Likewise. * bid64_to_bid128.c: Likewise. * bid64_to_uint32.c: Likewise. * bid128_to_uint64.c: Likewise. * bid64_div.c: Likewise. * bid128_round_integral.c: Likewise. * bid_binarydecimal.c: Likewise. * bid128_string.c: Likewise. * bid_flag_operations.c: Likewise. * bid128_to_int64.c: Likewise. * _mul_sd.c: Likewise. * bid64_mul.c: Likewise. * bid128_noncomp.c: Likewise. * _gt_dd.c: Likewise. * bid64_add.c: Likewise. * bid64_string.c: Likewise. * bid_from_int.c: Likewise. * bid128.c: Likewise. * _ge_dd.c: Likewise. * _ne_sd.c: Likewise. * _dd_to_td.c: Likewise. * _unord_sd.c: Likewise. * bid64_to_uint64.c: Likewise. * _gt_sd.c: Likewise. * _sd_to_td.c: Likewise. * _addsub_td.c: Likewise. * _ne_td.c: Likewise. * bid_dpd.c: Likewise. * bid128_add.c: Likewise. * bid128_next.c: Likewise. * _lt_sd.c: Likewise. * bid64_next.c: Likewise. * bid128_mul.c: Likewise. * _lt_dd.c: Likewise. * _ge_td.c: Likewise. * _unord_dd.c: Likewise. * bid64_sqrt.c: Likewise. * bid_sqrt_macros.h: Likewise. * bid64_fma.c: Likewise. * _sd_to_dd.c: Likewise. * bid_conf.h: Likewise. * bid64_noncomp.c: Likewise. * bid_gcc_intrinsics.h: Likewise. * _gt_td.c: Likewise. * _ge_sd.c: Likewise. * bid128_minmax.c: Likewise. * bid128_quantize.c: Likewise. * bid32_to_bid64.c: Likewise. * bid_round.c: Likewise. * _td_to_sd.c: Likewise. * bid_inline_add.h: Likewise. * bid128_fma.c: Likewise. * _eq_td.c: Likewise. * bid32_to_bid128.c: Likewise. * bid64_rem.c: Likewise. * bid128_2_str_tables.c: Likewise. * _mul_dd.c: Likewise. * _dd_to_sd.c: Likewise. * bid128_div.c: Likewise. * _lt_td.c: Likewise. * bid64_compare.c: Likewise. * bid64_to_int32.c: Likewise. * _unord_td.c: Likewise. * bid128_rem.c: Likewise. * bid_internal.h: Likewise. * bid64_to_int64.c: Likewise. * _eq_dd.c: Likewise. * _td_to_dd.c: Likewise. * bid128_to_int32.c: Likewise. * bid128_to_uint32.c: Likewise. * _ne_dd.c: Likewise. * bid64_quantize.c: Likewise. * _le_dd.c: Likewise. * bid64_round_integral.c: Likewise. * _le_sd.c: Likewise. * bid64_minmax.c: Likewise. libgcc/config/avr/libf7/ * f7-renames.h: Remove trailing whitespace. libstdc++-v3/ * include/debug/debug.h: Remove trailing whitespace. * include/parallel/base.h: Likewise. * include/parallel/types.h: Likewise. * include/parallel/settings.h: Likewise. * include/parallel/multiseq_selection.h: Likewise. * include/parallel/partition.h: Likewise. * include/parallel/random_number.h: Likewise. * include/parallel/find_selectors.h: Likewise. * include/parallel/partial_sum.h: Likewise. * include/parallel/list_partition.h: Likewise. * include/parallel/search.h: Likewise. * include/parallel/algorithmfwd.h: Likewise. * include/parallel/random_shuffle.h: Likewise. * include/parallel/multiway_mergesort.h: Likewise. * include/parallel/sort.h: Likewise. * include/parallel/algobase.h: Likewise. * include/parallel/numericfwd.h: Likewise. * include/parallel/multiway_merge.h: Likewise. * include/parallel/losertree.h: Likewise. * include/bits/basic_ios.h: Likewise. * include/bits/stringfwd.h: Likewise. * include/bits/ostream_insert.h: Likewise. * include/bits/stl_heap.h: Likewise. * include/bits/unordered_map.h: Likewise. * include/bits/hashtable_policy.h: Likewise. * include/bits/stl_iterator_base_funcs.h: Likewise. * include/bits/valarray_before.h: Likewise. * include/bits/regex.h: Likewise. * include/bits/postypes.h: Likewise. * include/bits/stl_iterator.h: Likewise. * include/bits/localefwd.h: Likewise. * include/bits/stl_algo.h: Likewise. * include/bits/ios_base.h: Likewise. * include/bits/stl_function.h: Likewise. * include/bits/basic_string.h: Likewise. * include/bits/hashtable.h: Likewise. * include/bits/valarray_after.h: Likewise. * include/bits/char_traits.h: Likewise. * include/bits/gslice.h: Likewise. * include/bits/locale_facets_nonio.h: Likewise. * include/bits/mask_array.h: Likewise. * include/bits/specfun.h: Likewise. * include/bits/random.h: Likewise. * include/bits/slice_array.h: Likewise. * include/bits/valarray_array.h: Likewise. * include/tr1/float.h: Likewise. * include/tr1/functional_hash.h: Likewise. * include/tr1/math.h: Likewise. * include/tr1/hashtable_policy.h: Likewise. * include/tr1/stdio.h: Likewise. * include/tr1/complex.h: Likewise. * include/tr1/stdbool.h: Likewise. * include/tr1/stdarg.h: Likewise. * include/tr1/inttypes.h: Likewise. * include/tr1/fenv.h: Likewise. * include/tr1/stdlib.h: Likewise. * include/tr1/wchar.h: Likewise. * include/tr1/tgmath.h: Likewise. * include/tr1/limits.h: Likewise. * include/tr1/wctype.h: Likewise. * include/tr1/stdint.h: Likewise. * include/tr1/ctype.h: Likewise. * include/tr1/random.h: Likewise. * include/tr1/shared_ptr.h: Likewise. * include/ext/mt_allocator.h: Likewise. * include/ext/sso_string_base.h: Likewise. * include/ext/debug_allocator.h: Likewise. * include/ext/vstring_fwd.h: Likewise. * include/ext/pointer.h: Likewise. * include/ext/pod_char_traits.h: Likewise. * include/ext/malloc_allocator.h: Likewise. * include/ext/vstring.h: Likewise. * include/ext/bitmap_allocator.h: Likewise. * include/ext/pool_allocator.h: Likewise. * include/ext/type_traits.h: Likewise. * include/ext/ropeimpl.h: Likewise. * include/ext/codecvt_specializations.h: Likewise. * include/ext/throw_allocator.h: Likewise. * include/ext/extptr_allocator.h: Likewise. * include/ext/atomicity.h: Likewise. * include/ext/concurrence.h: Likewise. * include/c_compatibility/wchar.h: Likewise. * include/c_compatibility/stdint.h: Likewise. * include/backward/hash_fun.h: Likewise. * include/backward/binders.h: Likewise. * include/backward/hashtable.h: Likewise. * include/backward/auto_ptr.h: Likewise. * libsupc++/eh_arm.cc: Likewise. * libsupc++/unwind-cxx.h: Likewise. * libsupc++/si_class_type_info.cc: Likewise. * libsupc++/vec.cc: Likewise. * libsupc++/class_type_info.cc: Likewise. * libsupc++/vmi_class_type_info.cc: Likewise. * libsupc++/guard_error.cc: Likewise. * libsupc++/bad_typeid.cc: Likewise. * libsupc++/eh_personality.cc: Likewise. * libsupc++/atexit_arm.cc: Likewise. * libsupc++/pmem_type_info.cc: Likewise. * libsupc++/vterminate.cc: Likewise. * libsupc++/eh_terminate.cc: Likewise. * libsupc++/bad_cast.cc: Likewise. * libsupc++/exception_ptr.h: Likewise. * libsupc++/eh_throw.cc: Likewise. * libsupc++/bad_alloc.cc: Likewise. * libsupc++/nested_exception.cc: Likewise. * libsupc++/pointer_type_info.cc: Likewise. * libsupc++/pbase_type_info.cc: Likewise. * libsupc++/bad_array_new.cc: Likewise. * libsupc++/pure.cc: Likewise. * libsupc++/eh_exception.cc: Likewise. * libsupc++/bad_array_length.cc: Likewise. * libsupc++/cxxabi.h: Likewise. * libsupc++/guard.cc: Likewise. * libsupc++/eh_catch.cc: Likewise. * libsupc++/cxxabi_forced.h: Likewise. * libsupc++/tinfo.h: Likewise.
2024-10-17aarch64: libgcc: Use -WerrorChristophe Lyon1-0/+1
This patch adds -Werror to LIBGCC2_CFLAGS so that aarch64 can catch warnings during bootstrap, while not impacting other targets. The patch also adds -Wno-prio-ctor-dtor to avoid a warning when compiling lse_init.c libgcc/ * config/aarch64/t-aarch64: Always use -Werror -Wno-prio-ctor-dtor.
2024-10-17aarch64: libgcc: add prototypes in cpuinfoChristophe Lyon1-0/+2
Add prototypes for __init_cpu_features_resolver and __init_cpu_features to avoid warnings due to -Wmissing-prototypes. libgcc/ * config/aarch64/cpuinfo.c (__init_cpu_features_resolver): Add prototype. (__init_cpu_features): Likewise.
2024-10-17aarch64: libgcc: Cleanup warnings in lse.SChristophe Lyon1-0/+4
Since Commit c608ada288ced0268bbbbc1fd4136f56c34b24d4 Author: Zac Walker <zacwalker@microsoft.com> CommitDate: 2024-01-23 15:32:30 +0000 Ifdef `.hidden`, `.type`, and `.size` pseudo-ops for `aarch64-w64-mingw32` target lse.S includes aarch64-asm.h, leading to a conflicting definition of macro 'L': - in lse.S it expands to either '' or 'L' - in aarch64-asm.h it is used to generate .L ## label lse.S does not use the second, so this patch just undefines L after the inclusion of aarch64-asm.h. libgcc/ * config/aarch64/lse.S: Undefine L() macro.
2024-10-14RISC-V: Add detailed comments on processing implied extensions. [NFC]Yangyu Chen1-3/+6
In some cases, we don't need to handle implied extensions. Add detailed comments to help developers understand what implied ISAs should be considered. libgcc/ChangeLog: * config/riscv/feature_bits.c (__init_riscv_features_bits_linux): Add detailed comments on processing implied extensions. Signed-off-by: Yangyu Chen <chenyangyu@isrc.iscas.ac.cn>
2024-10-14RISC-V: Implement __init_riscv_feature_bits, __riscv_feature_bits, and ↵Kito Cheng2-0/+410
__riscv_vendor_feature_bits This provides a common abstraction layer to probe the available extensions at run-time. These functions can be used to implement function multi-versioning or to detect available extensions. The advantages of providing this abstraction layer are: - Easy to port to other new platforms. - Easier to maintain in GCC for function multi-versioning. - For example, maintaining platform-dependent code in C code/libgcc is much easier than maintaining it in GCC by creating GIMPLEs... This API is intended to provide the capability to query minimal common available extensions on the system. The API is defined in the riscv-c-api-doc: https://github.com/riscv-non-isa/riscv-c-api-doc/blob/main/src/c-api.adoc Proposal to use unsigned long long for marchid and mimpid: https://github.com/riscv-non-isa/riscv-c-api-doc/pull/91 Full function multi-versioning implementation will come later. We are posting this first because we intend to backport it to the GCC 14 branch to unblock LLVM 19 to use this with GCC 14.2, rather than waiting for GCC 15. Changes since v7: - Remove vendorID field in __riscv_vendor_feature_bits. - Fix C implies Zcf only for RV32. - Add more comments to kernel versions. Changes since v6: - Implement __riscv_cpu_model. - Set new sub extension bits which implied from previous extensions. Changes since v5: - Minor fixes on indentation. Changes since v4: - Bump to newest riscv-c-api-doc with some new extensions like Zve*, Zc* Zimop, Zcmop, Zawrs. - Rename the return variable name of hwprobe syscall. - Minor fixes on indentation. Changes since v3: - Fix non-linux build. - Let __init_riscv_feature_bits become constructor Changes since v2: - Prevent it initialize more than once. Changes since v1: - Fix the format. - Prevented race conditions by introducing a local variable to avoid load/store operations during the computation of the feature bit. Co-Developed-by: Yangyu Chen <chenyangyu@isrc.iscas.ac.cn> Signed-off-by: Yangyu Chen <chenyangyu@isrc.iscas.ac.cn> libgcc/ChangeLog: * config/riscv/feature_bits.c: New. * config/riscv/t-elf (LIB2ADD): Add feature_bits.c.
2024-10-10SH: Use softfp for sh-elfSébastien Michelland1-0/+83
libgcc/ChangeLog: PR target/29845 * config.host (sh-*-elf*): Replace fdpbit with softfp. * config/sh/sfp-machine.h: New file. Signed-off-by: Sébastien Michelland <sebastien.michelland@lcis.grenoble-inp.fr>
2024-10-04[PATCH] RISC-V/libgcc: Fix incorrect .cfi_offset for saving ra in ↵Tsung Chun Lin1-1/+1
__riscv_save_[0-3] on ilp32e. From 8b3c5ebe8aacbcc4ddf1be8dea9a555e7e1bcc39 Mon Sep 17 00:00:00 2001 From: Jim Lin <jim@andestech.com> Date: Fri, 4 Oct 2024 14:48:12 +0800 Subject: [PATCH] RISC-V/libgcc: Fix incorrect .cfi_offset for saving ra in __riscv_save_[0-3] on ilp32e. libgcc/ChangeLog: * config/riscv/save-restore.S: Fix .cfi_offset for saving ra in __riscv_save_[0-3] on ilp32e.
2024-10-01[PATCH] RISC-V/libgcc: Fix incorrect and missing .cfi_offset for ↵Tsung Chun Lin1-1/+2
__riscv_save_[0-3] on RV32. 0001-RISC-V-libgcc-Fix-incorrect-and-missing-.cfi_offset-.patch From 06a370a0a2329dd4da0ffcab7c35ea7df2353baf Mon Sep 17 00:00:00 2001 From: Jim Lin <jim@andestech.com> Date: Tue, 1 Oct 2024 14:42:56 +0800 Subject: [PATCH] RISC-V/libgcc: Fix incorrect and missing .cfi_offset for __riscv_save_[0-3] on RV32. libgcc/ChangeLog: * config/riscv/save-restore.S: Fix .cfi_offset for __riscv_save_[0-3] on RV32.
2024-09-27aarch64: fix build failure on aarch64-none-elfMatthieu Longo1-1/+1
A previous patch ([1]) introduced a build regression on aarch64-none-elf target. The changes were primarilly tested on aarch64-unknown-linux-gnu, so the issue was missed during development. The includes are slighly different between the two targets, and due to some include rules ([2]), "aarch64-unwind-def.h" was not found. [1]: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=bdf41d627c13bc5f0dc676991f4513daa9d9ae36 [2]: https://gcc.gnu.org/onlinedocs/cpp/Include-Syntax.html > include "file" > ... It searches for a file named file first in the directory > containing the current file, ... libgcc/ChangeLog: * config/aarch64/aarch64-unwind.h: Fix header path.
2024-09-27RISC-V/libgcc: Save/Restore routines for E goes with ABI.Jim Lin1-2/+2
That Save/Restore routines for E can be used for RVI with ILP32E ABI. libgcc/ChangeLog: * config/riscv/save-restore.S: Check with __riscv_abi_rve rather than __riscv_32e.
2024-09-24libgcc, Darwin: Drop the legacy library build for macOS >= 15 [PR116809].Iain Sandoe3-6/+3
We have been building a legacy libgcc_s.1 DSO to support code that was built with older compilers. From macOS 15, the unwinder no longer exports some of the symbols used in that library which (a) cuases bootstrap fail and (b) means that the legacy library is no longer useful. No open branch of GCC emits references to this library - and any already -built code that depends on the symbols would need rework anyway. PR target/116809 libgcc/ChangeLog: * config.host: Build legacy libgcc_s.1 on hosts before macOS 15. * config/i386/t-darwin: Remove reference to legacy libgcc_s.1 * config/rs6000/t-darwin: Likewise. * config/t-darwin-libgccs1: New file. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-09-23dwarf2: add hooks for architecture-specific CFIsMatthieu Longo1-2/+2
Architecture-specific CFI directives are currently declared an processed among others architecture-independent CFI directives in gcc/dwarf2* files. This approach creates confusion, specifically in the case of DWARF instructions in the vendor space and using the same instruction code. Such a clash currently happen between DW_CFA_GNU_window_save (used on SPARC) and DW_CFA_AARCH64_negate_ra_state (used on AArch64), and both having the same instruction code 0x2d. Then AArch64 compilers generates a SPARC CFI directive (.cfi_window_save) instead of .cfi_negate_ra_state, contrarilly to what is expected in [DWARF for the Arm 64-bit Architecture (AArch64)](https://github.com/ ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst). This refactoring does not solve completely the problem, but improve the situation by moving some of the processing of those directives (more specifically their output in the assembly) to the backend via 2 target hooks: - DW_CFI_OPRND1_DESC: parse the first operand of the directive (if any). - OUTPUT_CFI_DIRECTIVE: output the CFI directive as a string. Additionally, this patch also contains a renaming of an enum used for return address mangling on AArch64. gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_output_cfi_directive): New hook for CFI directives. (aarch64_dw_cfi_oprnd1_desc): Same. (TARGET_OUTPUT_CFI_DIRECTIVE): Hook for output_cfi_directive. (TARGET_DW_CFI_OPRND1_DESC): Hook for dw_cfi_oprnd1_desc. * config/sparc/sparc.cc (sparc_output_cfi_directive): New hook for CFI directives. (sparc_dw_cfi_oprnd1_desc): Same. (TARGET_OUTPUT_CFI_DIRECTIVE): Hook for output_cfi_directive. (TARGET_DW_CFI_OPRND1_DESC): Hook for dw_cfi_oprnd1_desc. * coretypes.h (struct dw_cfi_node): Forward declaration of CFI type from gcc/dwarf2out.h. (enum dw_cfi_oprnd_type): Same. (enum dwarf_call_frame_info): Same. * doc/tm.texi: Regenerated from doc/tm.texi.in. * doc/tm.texi.in: Add doc for new target hooks. type of enum to allow forward declaration. * dwarf2cfi.cc (struct dw_cfi_row): Update the description for window_save and ra_mangled. (dwarf2out_frame_debug_cfa_negate_ra_state): Use AArch64 CFI directive instead of the SPARC one. (change_cfi_row): Use the right CFI directive's name for RA mangling. (output_cfi): Remove explicit architecture-specific CFI directive DW_CFA_GNU_window_save that falls into default case. (output_cfi_directive): Use target hook as default. * dwarf2out.cc (dw_cfi_oprnd1_desc): Use target hook as default. * dwarf2out.h (enum dw_cfi_oprnd_type): specify underlying type of enum to allow forward declaration. (dw_cfi_oprnd1_desc): Call target hook. (output_cfi_directive): Use dw_cfi_ref instead of struct dw_cfi_node *. * hooks.cc (hook_bool_dwcfi_dwcfioprndtyperef_false): New. (hook_bool_FILEptr_dwcfiptr_false): New. * hooks.h (hook_bool_dwcfi_dwcfioprndtyperef_false): New. (hook_bool_FILEptr_dwcfiptr_false): New. * target.def: Documentation for new hooks. include/ChangeLog: * dwarf2.h (enum dwarf_call_frame_info): specify underlying libffi/ChangeLog: * include/ffi_cfi.h (cfi_negate_ra_state): Declare AArch64 cfi directive. libgcc/ChangeLog: * config/aarch64/aarch64-asm.h (PACIASP): Replace SPARC CFI directive by AArch64 one. (AUTIASP): Same. libitm/ChangeLog: * config/aarch64/sjlj.S: Replace SPARC CFI directive by AArch64 one. gcc/testsuite/ChangeLog: * g++.target/aarch64/pr94515-1.C: Replace SPARC CFI directive by AArch64 one. * g++.target/aarch64/pr94515-2.C: Same.
2024-09-23libgcc: hide CIE and FDE data for DWARF architecture extensions behind a ↵Matthieu Longo3-10/+48
handler. This patch provides a new handler MD_ARCH_FRAME_STATE_T to hide an architecture-specific structure containing CIE and FDE data related to DWARF architecture extensions. Hiding the architecture-specific attributes behind a handler has the following benefits: 1. isolating those data from the generic ones in _Unwind_FrameState 2. avoiding casts to custom types. 3. preserving typing information when debugging with GDB, and so facilitating their printing. This approach required to add a new header md-unwind-def.h included at the top of libgcc/unwind-dw2.h, and redirecting to the corresponding architecture header via a symbolic link. An obvious drawback is the increase in complexity with macros, and headers. It also caused a split of architecture definitions between md-unwind-def.h (types definitions used in unwind-dw2.h) and md-unwind.h (local types definitions and handlers implementations). The naming of md-unwind.h with .h extension is a bit misleading as the file is only included in the middle of unwind-dw2.c. Changing this naming would require modification of others backends, which I prefered to abstain from. Overall the benefits are worth the added complexity from my perspective. libgcc/ChangeLog: * Makefile.in: New target for symbolic link to md-unwind-def.h * config.host: New parameter md_unwind_def_header. Set it to aarch64/aarch64-unwind-def.h for AArch64 targets, or no-unwind.h by default. * config/aarch64/aarch64-unwind.h (aarch64_pointer_auth_key): Move to aarch64-unwind-def.h (aarch64_cie_aug_handler): Update. (aarch64_arch_extension_frame_init): Update. (aarch64_demangle_return_addr): Update. * configure.ac: New substitute variable md_unwind_def_header. * unwind-dw2.h (defined): MD_ARCH_FRAME_STATE_T. * config/aarch64/aarch64-unwind-def.h: New file. * configure: Regenerate. * config/no-unwind.h: Updated comment
2024-09-23aarch64: skip copy of RA state register into target contextMatthieu Longo1-0/+11
The RA state register is local to a frame, so it should not be copied to the target frame during the context installation. This patch adds a new backend handler that check whether a register needs to be skipped or not before its installation. libgcc/ChangeLog: * config/aarch64/aarch64-unwind.h (MD_FRAME_LOCAL_REGISTER_P): new handler checking whether a register from the current context needs to be skipped before installation into the target context. (aarch64_frame_local_register): Likewise. * unwind-dw2.c (uw_install_context_1): use MD_FRAME_LOCAL_REGISTER_P.
2024-09-23aarch64: store signing key and signing method in DWARF _Unwind_FrameStateMatthieu Longo1-26/+119
This patch is only a refactoring of the existing implementation of PAuth and returned-address signing. The existing behavior is preserved. _Unwind_FrameState already contains several CIE and FDE information (see the attributes below the comment "The information we care about from the CIE/FDE" in libgcc/unwind-dw2.h). The patch aims at moving the information from DWARF CIE (signing key stored in the augmentation string) and FDE (the used signing method) into _Unwind_FrameState along the already-stored CIE and FDE information. Note: those information have to be saved in frame_state_reg_info instead of _Unwind_FrameState as they need to be savable by DW_CFA_remember_state and restorable by DW_CFA_restore_state, that both rely on the attribute "prev". Those new information in _Unwind_FrameState simplifies the look-up of the signing key when the return address is demangled. It also allows future signing methods to be easily added. _Unwind_FrameState is not a part of the public API of libunwind, so the change is backward compatible. A new architecture-specific handler MD_ARCH_EXTENSION_FRAME_INIT allows to reset values (if needed) in the frame state and unwind context before changing the frame state to the caller context. A new architecture-specific handler MD_ARCH_EXTENSION_CIE_AUG_HANDLER isolates the architecture-specific augmentation strings in AArch64 backend, and allows others architectures to reuse augmentation strings that would have clashed with AArch64 DWARF extensions. aarch64_demangle_return_addr, DW_CFA_AARCH64_negate_ra_state and DW_CFA_val_expression cases in libgcc/unwind-dw2-execute_cfa.h were documented to clarify where the value of the RA state register is stored (FS and CONTEXT respectively). libgcc/ChangeLog: * config/aarch64/aarch64-unwind.h (AARCH64_DWARF_RA_STATE_MASK): The mask for RA state register. (aarch64_ra_signing_method_t): The diversifiers used to sign a function's return address. (aarch64_pointer_auth_key): The key used to sign a function's return address. (aarch64_cie_signed_with_b_key): Deleted as the signing key is available now in _Unwind_FrameState. (MD_ARCH_EXTENSION_CIE_AUG_HANDLER): New CIE augmentation string handler for architecture extensions. (MD_ARCH_EXTENSION_FRAME_INIT): New architecture-extension initialization routine for DWARF frame state and context before execution of DWARF instructions. (aarch64_context_ra_state_get): Read RA state register from CONTEXT. (aarch64_ra_state_get): Read RA state register from FS. (aarch64_ra_state_set): Write RA state register into FS. (aarch64_ra_state_toggle): Toggle RA state register in FS. (aarch64_cie_aug_handler): Handler AArch64 augmentation strings. (aarch64_arch_extension_frame_init): Initialize defaults for the signing key (PAUTH_KEY_A), and RA state register (RA_no_signing). (aarch64_demangle_return_addr): Rely on the frame registers and the signing_key attribute in _Unwind_FrameState. * unwind-dw2-execute_cfa.h: Use the right alias DW_CFA_AARCH64_negate_ra_state for __aarch64__ instead of DW_CFA_GNU_window_save. (DW_CFA_AARCH64_negate_ra_state): Save the signing method in RA state register. Toggle RA state register without resetting 'how' to REG_UNSAVED. * unwind-dw2.c: (extract_cie_info): Save the signing key in the current _Unwind_FrameState while parsing the augmentation data. (uw_frame_state_for): Reset some attributes related to architecture extensions in _Unwind_FrameState. (uw_update_context): Move authentication code to AArch64 unwinding. * unwind-dw2.h (enum register_rule): Give a name to the existing enum for the register rules, and replace 'unsigned char' by 'enum register_rule' to facilitate debugging in GDB. (_Unwind_FrameState): Add a new architecture-extension attribute to store the signing key.
2024-09-22libgcc, Darwin: From macOS 11, make that the earliest supported.Iain Sandoe1-0/+3
For libgcc, we have (so far) supported building a DSO that supports earlier versions of the OS than the target. From macOS 11, there are APIs that do not exist on earlier OS versions, so limit the libgcc range to macOS11..current. libgcc/ChangeLog: * config.host: From macOS 11, limit earliest macOS support to macOS 11. * config/t-darwin-min-11: New file. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-08-27MIPS: Include missing mips16.S in libgcc/lib1funcs.SYunQiang Su1-1/+1
mips16.S was missing since commit 29b74545531f6afbee9fc38c267524326dbfbedf Date: Thu Jun 1 10:14:24 2023 +0800 MIPS: Add speculation_barrier support Without mips16.S included, some symbols will miss for mips16, and so some software will fail to build. libgcc/ChangeLog: * config/mips/lib1funcs.S: Includes mips16.S.
2024-06-15Daily bump.GCC Administrator1-0/+5
2024-06-14AVR: target/115419 - Tie breaks are rounded-to-even.Georg-Johann Lay1-5/+15
libgcc/config/avr/libf7/ PR target/115419 * libf7.c (f7_get_double): Round tie breaks to even LSB.
2024-06-10libgcc/aarch64: also provide AT_HWCAP2 fallbackJan Beulich1-0/+3
Much like AT_HWCAP is already provided in case the platform headers don't have the value (yet). libgcc/ * config/aarch64/cpuinfo.c: Provide AT_HWCAP2.
2024-06-06arm: Add .type and .size to __gnu_cmse_nonsecure_call [PR115360]Andre Vieira1-0/+2
This patch adds missing assembly directives to the CMSE library wrapper to call functions with attribute cmse_nonsecure_call. Without the .type directive the linker will fail to produce the correct veneer if a call to this wrapper function is to far from the wrapper itself. The .size was added for completeness, though we don't necessarily have a usecase for it. libgcc/ChangeLog: PR target/115360 * config/arm/cmse_nonsecure_call.S: Add .type and .size directives.
2024-06-06nvptx, libgcc: Stub unwinding implementationThomas Schwinge2-1/+39
Adding stub '_Unwind_Backtrace', '_Unwind_GetIPInfo' functions is necessary for linking libbacktrace, as a normal (non-'LIBGFOR_MINIMAL') configuration of libgfortran wants to do, for example. The file 'libgcc/config/nvptx/unwind-nvptx.c' is copied from 'libgcc/config/gcn/unwind-gcn.c'. libgcc/ChangeLog: * config/nvptx/t-nvptx: Add unwind-nvptx.c. * config/nvptx/unwind-nvptx.c: New file. Co-authored-by: Andrew Stubbs <ams@gcc.gnu.org>
2024-06-06nvptx offloading: Global constructor, destructor support, via nvptx-tools 'ld'Thomas Schwinge1-0/+55
This extends commit d9c90c82d900fdae95df4499bf5f0a4ecb903b53 "nvptx target: Global constructor, destructor support, via nvptx-tools 'ld'" for offloading. libgcc/ * config/nvptx/gbl-ctors.c ["mgomp"] (__do_global_ctors__entry__mgomp) (__do_global_dtors__entry__mgomp): New. [!"mgomp"] (__do_global_ctors__entry, __do_global_dtors__entry): New. libgomp/ * plugin/plugin-nvptx.c (nvptx_do_global_cdtors): New. (nvptx_close_device, GOMP_OFFLOAD_load_image) (GOMP_OFFLOAD_unload_image): Call it.
2024-06-05AArch64: Fix cpu features initialization [PR115342]Wilco Dijkstra1-106/+75
The CPU features initialization code uses CPUID registers (rather than HWCAP). The equality comparisons it uses are incorrect: for example FEAT_SVE is not set if SVE2 is available. Using HWCAPs for these is both simpler and correct. The initialization must also be done atomically to avoid multiple threads causing corruption due to non-atomic RMW accesses to the global. libgcc: PR target/115342 * config/aarch64/cpuinfo.c (__init_cpu_features_constructor): Use HWCAP where possible. Use atomic write for initialization. Fix FEAT_PREDRES comparison. (__init_cpu_features_resolver): Use atomic load for correct initialization. (__init_cpu_features): Likewise.
2024-06-02Daily bump.GCC Administrator1-0/+5
2024-06-01AVR: target/115317 - Make isinf(-Inf) return -1.Georg-Johann Lay1-7/+12
PR target/115317 libgcc/config/avr/libf7/ * libf7-asm.sx (__isinf): Map -Inf to -1. gcc/testsuite/ * gcc.target/avr/torture/pr115317-isinf.c: New test.
2024-05-31nvptx target: Global constructor, destructor support, via nvptx-tools 'ld'Thomas Schwinge3-1/+94
The function attributes 'constructor', 'destructor', and 'init_priority' now work, as do the C++ features making use of this. Test cases with effective target 'global_constructor' and 'init_priority' now generally work, and 'check-gcc-c++' test results greatly improve; no more "sorry, unimplemented: global constructors not supported on this target". For proper execution test results, this depends on <https://github.com/SourceryTools/nvptx-tools/commit/96f8fc59a757767b9e98157d95c21e9fef22a93b> "ld: Global constructor/destructor support". gcc/ * config/nvptx/nvptx.h: Configure global constructor, destructor support. gcc/testsuite/ * gcc.dg/no_profile_instrument_function-attr-1.c: GCC/nvptx is 'NO_DOT_IN_LABEL' but not 'NO_DOLLAR_IN_LABEL', so '$' may apper in identifiers. * lib/target-supports.exp (check_effective_target_global_constructor): Enable for nvptx. libgcc/ * config/nvptx/crt0.c (__gbl_ctors): New weak function. (__main): Invoke it. * config/nvptx/gbl-ctors.c: New. * config/nvptx/t-nvptx: Configure global constructor, destructor support.
2024-05-20libgcc, rs6000: Remove powerpcspe related codeKewen Lin15-1032/+1
Since r9-4728 the powerpcspe support had been removed, this follow-up patch is to remove the remaining pieces in libgcc. libgcc/ChangeLog: * config.host: Remove powerpc-*-eabispe* support. * config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Remove __SPE__ code. * config/rs6000/t-savresfgpr (LIB2ADD_ST): Remove e500crtres32gpr.S, e500crtres32gpr.S, e500crtsav64gpr.S, e500crtsav64gprctr.S, e500crtres64gpr.S, e500crtsav32gpr.S, e500crtsavg32gpr.S, e500crtres64gprctr.S, e500crtsavg64gprctr.S, e500crtresx32gpr.S, e500crtrest32gpr.S, e500crtrest64gpr.S and e500crtresx64gpr.S. * config/rs6000/e500crtres32gpr.S: Remove. * config/rs6000/e500crtres64gpr.S: Remove. * config/rs6000/e500crtres64gprctr.S: Remove. * config/rs6000/e500crtrest32gpr.S: Remove. * config/rs6000/e500crtrest64gpr.S: Remove. * config/rs6000/e500crtresx32gpr.S: Remove. * config/rs6000/e500crtresx64gpr.S: Remove. * config/rs6000/e500crtsav32gpr.S: Remove. * config/rs6000/e500crtsav64gpr.S: Remove. * config/rs6000/e500crtsav64gprctr.S: Remove. * config/rs6000/e500crtsavg32gpr.S: Remove. * config/rs6000/e500crtsavg64gpr.S: Remove. * config/rs6000/e500crtsavg64gprctr.S: Remove.
2024-05-18AVR: target/115065 - Tweak __clzhi2.Wolfgang Hospital1-4/+4
The libgcc implementation of __clzhi2 can be tweaked by one cycle in some situations by re-arranging the instructions. It also reduces the WCET by 1 cycle. libgcc/ PR target/115065 * config/avr/lib1funcs.S (__clzhi2): Tweak.
2024-05-10AVR: target/114981 - Tweak __builtin_powif / __powisf2Georg-Johann Lay2-1/+157
Implement __powisf2 in assembly. PR target/114981 libgcc/ * config/avr/t-avr (LIB2FUNCS_EXCLUDE): Add _powisf2. (LIB1ASMFUNCS) [!avrtiny]: Add _powif. * config/avr/lib1funcs.S (mov4): New .macro. (L_powif, __powisf2) [!avrtiny]: New module and function. gcc/testsuite/ * gcc.target/avr/pr114981-powif.c: New test.
2024-05-09Daily bump.GCC Administrator1-0/+8
generated by cgit v1.1 at 2025-09-18 09:45:47 +0000