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GNU Make supports "-include" keyword to prevent warnings and errors due to
inclusion of non-existent files. This patch changes gcc/ and libgcc/ to use
"-include" in place of the historical conditional inclusion and use of
empty.mk work-arounds.
gcc/ChangeLog
2020-06-23 David Edelsohn <dje.gcc@gmail.com>
* Makefile.in (LANG_MAKEFRAGS): Same.
(tmake_file): Use -include.
(xmake_file): Same.
libgcc/ChangeLog
2020-06-23 David Edelsohn <dje.gcc@gmail.com>
* Makefile.in: Remove uses of empty.mk. Use -include.
* config/avr/t-avr: Use -include.
* empty.mk: Delete.
libgcc/config/avr/libf7/ChangeLog
2020-06-23 David Edelsohn <dje.gcc@gmail.com>
* t-libf7: Same.
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This patch adds the ability to configure GCC on AIX to build as a
64 bit application and to build target libraries "FAT" libraries in both
32 bit and 64 bit mode.
The patch adds makefile fragment hooks to target libraries that allows
them to include target-specific rules. The target specific rules for
AIX place both 32 bit and 64 bit objects and shared objects
in archives at the top-level, not multilib subdirectories. The
multilibs are built in subdirectories, but must be combined during the
last parts of the target library build process. Because of the way
that GCC bootstrap works, the libraries must be combined during the
multiple stages of GCC bootstrap, not solely when installed in the
final destination, so the libraries are correct at the end of
each target library build stage, not solely an install recipe.
gcc/ChangeLog
2020-06-21 David Edelsohn <dje.gcc@gmail.com>
* config.gcc: Use t-aix64, biarch64 and default64 for cpu_is_64bit.
* config/rs6000/aix72.h (ASM_SPEC): Remove aix64 option.
(ASM_SPEC32): New.
(ASM_SPEC64): New.
(ASM_CPU_SPEC): Remove vsx and altivec options.
(CPP_SPEC_COMMON): Rename from CPP_SPEC.
(CPP_SPEC32): New.
(CPP_SPEC64): New.
(CPLUSPLUS_CPP_SPEC): Rename to CPLUSPLUS_CPP_SPEC_COMMON..
(TARGET_DEFAULT): Only define if not BIARCH.
(LIB_SPEC_COMMON): Rename from LIB_SPEC.
(LIB_SPEC32): New.
(LIB_SPEC64): New.
(LINK_SPEC_COMMON): Rename from LINK_SPEC.
(LINK_SPEC32): New.
(LINK_SPEC64): New.
(STARTFILE_SPEC): Add 64 bit version of crtcxa and crtdbase.
(ASM_SPEC): Define 32 and 64 bit alternatives using DEFAULT_ARCH64_P.
(CPP_SPEC): Same.
(CPLUSPLUS_CPP_SPEC): Same.
(LIB_SPEC): Same.
(LINK_SPEC): Same.
(SUBTARGET_EXTRA_SPECS): Add new 32/64 specs.
* config/rs6000/defaultaix64.h: New file.
* config/rs6000/t-aix64: New file.
libgcc/ChangeLog
2020-06-21 David Edelsohn <dje.gcc@gmail.com>
* config.host (extra_parts): Add crtcxa_64 and crtdbase_64.
* config/rs6000/t-aix-cxa: Explicitly compile 32 bit with -maix32
and 64 bit with -maix64.
* config/rs6000/t-slibgcc-aix: Remove extra @multilib_dir@ level.
Build and install AIX-style FAT libraries.
libgomp/ChangeLog
2020-06-21 David Edelsohn <dje.gcc@gmail.com>
* Makefile.am (tmake_file): Build and install AIX-style FAT libraries.
* Makefile.in: Regenerate
* configure.ac (tmake_file): Substitute.
* configure: Regenerate.
* configure.tgt (powerpc-ibm-aix*): Define tmake_file.
* config/t-aix: New file.
libstdc++-v3/ChangeLog
2020-06-21 David Edelsohn <dje.gcc@gmail.com>
* Makefile.am (tmake_file): Build and install AIX-style FAT libraries.
* Makefile.in: Regenerate.
* configure.ac (tmake_file): Substitute.
* configure: Regenerate.
* configure.host (aix*): Define tmake_file.
* config/os/aix/t-aix: New file.
libatomic/ChangeLog
2020-06-21 David Edelsohn <dje.gcc@gmail.com>
* Makefile.am (tmake_file): Build and install AIX-style FAT libraries.
* Makefile.in: Regenerate.
* configure.ac (tmake_file): Substitute.
* configure: Regenerate.
* configure.tgt (powerpc-ibm-aix*): Define tmake_file.
* config/t-aix: New file.
libgfortran/ChangeLog
2020-06-21 David Edelsohn <dje.gcc@gmail.com>
* Makefile.am (tmake_file): Build and install AIX-style FAT libraries.
* Makefile.in: Regenerate.
* configure.ac (tmake_file): Substitute.
* configure: Regenerate.
* configure.host: Add system configury stanza. Define tmake_file.
* config/t-aix: New file.
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libgcc/
* config.host (md_unwind_header) <i[34567]86-*-gnu*>: Set to
'i386/gnu-unwind.h'
* config/i386/gnu-unwind.h: New file.
Signed-off-by: Thomas Schwinge <thomas@codesourcery.com>
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Rewrite uw_install_context without function calls to avoid register
spilling in _Unwind_RaiseException during return context installation.
2020-06-08 Max Filippov <jcmvbkbc@gmail.com>
gcc/testsuite/
* g++.target/xtensa/pr95571.C: New test.
* g++.target/xtensa/xtensa.exp: New testsuite.
libgcc/
* config/xtensa/unwind-dw2-xtensa.c (uw_install_context): Merge
with uw_install_context_1.
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gcc/testsuite/
PR libfortran/59227
* gfortran.dg/erf_3.F90: Remove XFAIL on ia64-*-linux*.
libgcc/
PR target/59230
PR libfortran/59227
* config/ia64/t-softfp-compat (softfp_file_list): Filter out
soft-fp/divtf3.c.
(LIB2ADD): Add config/ia64/divtf3.c.
* config/ia64/divtf3.c: New file.
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The ISA manual specifies that divide by zero always returns -1 as the result.
We were failing to do that when the dividend was negative.
Original patch from Virginie Moser.
libgcc/
* config/riscv/div.S (__divdi3): For negative arguments, change bgez
to bgtz.
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Windows ABI (MinGW) is different than Linux ABI when bitfileds are involved.
The following patch adds __attribute__ ((gcc_struct)) to struct fenv in order
to match the layout of x87 state image in memory.
2020-06-01 Uroš Bizjak <ubizjak@gmail.com>
libatomic/ChangeLog:
* config/x86/fenv.c (struct fenv): Add __attribute__ ((gcc_struct)).
libgcc/ChangeLog:
* config/i386/sfp-exceptions.c (struct fenv):
Add __attribute__ ((gcc_struct)).
libgfortran/ChangeLog:
PR libfortran/95418
* config/fpu-387.h (struct fenv): Add __attribute__ ((gcc_struct)).
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Move FEATURE_AVX512VP2INTERSECT after FEATURE_AVX512BF16 to avoid
changing libgcc ABI.
gcc/
PR target/95212
* config/i386/i386-builtins.c (processor_features): Move
F_AVX512VP2INTERSECT after F_AVX512BF16.
(isa_names_table): Likewise.
libgcc/
PR target/95212
* config/i386/cpuinfo.h (processor_features): Move
FEATURE_AVX512VP2INTERSECT after FEATURE_AVX512BF16.
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Update VPCLMULQDQ check to support processors with AVX version of
VPCLMULQDQ.
PR target/91695
* config/i386/cpuinfo.c (get_available_features): Fix VPCLMULQDQ
check.
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Add FEATURE_AVX512VP2INTERSECT to libgcc so that enum processor_features
in libgcc matches enum processor_features in i386-builtins.c. Update
GFNI check to support processors with SSE and AVX versions of GFNI.
PR target/95212
PR target/95220
* config/i386/cpuinfo.c (get_available_features): Fix
FEATURE_GFNI check. Also check FEATURE_AVX512VP2INTERSECT.
* config/i386/cpuinfo.h (processor_features): Add
FEATURE_AVX512VP2INTERSECT.
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Part of the removal of crisv32-* and cris-*-linux* (cris-elf remains).
libgcc:
* config.host: Remove support for crisv32-*-* and cris*-*-linux.
* config/cris/libgcc-glibc.ver, config/cris/t-linux: Remove.
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Introduce math_force_eval_div to use generic division to generate
INEXACT as well as INVALID and DIVZERO exceptions.
libgcc/ChangeLog:
* config/i386/sfp-exceptions.c (__math_force_eval): Remove.
(__math_force_eval_div): New define.
(__sfp_handle_exceptions): Use __math_force_eval_div to use
generic division to generate INVALID, DIVZERO and INEXACT
exceptions.
libatomic/ChangeLog:
* config/x86/fenv.c (__math_force_eval): Remove.
(__math_force_eval_div): New define.
(__atomic_deraiseexcept): Use __math_force_eval_div to use
generic division to generate INVALID, DIVZERO and INEXACT
exceptions.
libgfortran/ChangeLog:
* config/fpu-387.h (__math_force_eval): Remove.
(__math_force_eval_div): New define.
(local_feraiseexcept): Use __math_force_eval_div to use
generic division to generate INVALID, DIVZERO and INEXACT
exceptions.
(struct fenv): Define named struct instead of typedef.
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This version of the fix uses __getauxval instead of getauxval.
The whole thing is guarded simply on __gnu_linux__.
__getauxval was introduced in 2.16 but the aarch64 port was added in 2.17 so in practice I expect all aarch64 glibcs to support __getauxval.
Bootstrapped and tested on aarch64-none-linux-gnu.
Also tested on aarch64-none-elf.
2020-05-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/lse-init.c (init_have_lse_atomics): Use __getauxval
instead of getauxval.
(AT_HWCAP): Define.
(HWCAP_ATOMICS): Define.
Guard detection on __gnu_linux__.
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2020-05-05 Michael Meissner <meissner@linux.ibm.com>
* config/rs6000/rs6000-builtin.def: Delete changes meant for a
private branch.
* config/rs6000/rs6000-c.c: Likewise.
* config/rs6000/rs6000-call.c: Likewise.
* gcc/config/rs6000/rs6000.c: Likewise.
2020-05-05 Michael Meissner <meissner@linux.ibm.com>
* gcc.dg/nextafter-2.c: Delete changes meant for a private branch.
* gcc.target/powerpc/pr70117.c: Likewise.
2020-05-05 Michael Meissner <meissner@linux.ibm.com>
* config.host: Delete changes meant for a private branch.
* config/rs6000/t-float128: Likewise.
* configure.ac: Likewise.
* configure: Likewise.
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libgcc/config/libbid/ChangeLog:
2020-02-04 Martin Liska <mliska@suse.cz>
PR libgcc/92565
* bid_internal.h (handle_UF_128_rem): Remove unused variable.
(handle_UF_128): Likewise.
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Introduce math_force_eval to evaluate generic division to generate
INVALID and DIVZERO exceptions.
libgcc/ChangeLog:
* config/i386/sfp-exceptions.c (__math_force_eval): New define.
(__sfp_handle_exceptions): Use __math_force_eval to evaluete
generic division to generate INVALID and DIVZERO exceptions.
libatomic/ChangeLog:
* config/x86/fenv.c (__math_force_eval): New define.
(__atomic_feraiseexcept): Use __math_force_eval to evaluete
generic division to generate INVALID and DIVZERO exceptions.
libgfortran/ChangeLog:
* config/fpu-387.h (__math_force_eval): New define.
(local_feraiseexcept): Use __math_force_eval to evaluete
generic division to generate INVALID and DIVZERO exceptions.
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Since commit e154242724b084380e3221df7c08fcdbd8460674 the flag -many is
sometimes not passed to the assembler. Use .machine ppc to prevent
errors if these files are assembled for an ISA which does not support
FPRs.
libgcc/
* config/rs6000/crtresfpr.S: Use .machine ppc.
* config/rs6000/crtresxfpr.S: Likewise.
* config/rs6000/crtsavfpr.S: Likewise.
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With -mbranch-protection=pac-ret the debug info toggles the
signedness state of the return address so the unwinder knows when
the return address needs pointer authentication.
The unwind context flags were not updated according to the dwarf
frame info.
This causes unwinding across frames that were built without pac-ret
to incorrectly authenticate the return address wich corrupts the
return address on a system where PAuth is enabled.
Note: This even affects systems where all code use pac-ret because
unwinding across a signal frame the return address is not signed.
gcc/testsuite/ChangeLog:
PR target/94514
* g++.target/aarch64/pr94514.C: New test.
* gcc.target/aarch64/pr94514.c: New test.
libgcc/ChangeLog:
PR target/94514
* config/aarch64/aarch64-unwind.h (aarch64_frob_update_context):
Update context->flags accroding to the frame state.
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According to "Intel 64 and IA32 Arch SDM, Vol. 3:
"Because SIMD floating-point exceptions are precise and occur immediately,
the situation does not arise where an x87 FPU instruction, a WAIT/FWAIT
instruction, or another SSE/SSE2/SSE3 instruction will catch a pending
unmasked SIMD floating-point exception."
Remove unneeded assignments to volatile memory.
libgcc/ChangeLog:
* config/i386/sfp-exceptions.c (__sfp_handle_exceptions) [__SSE_MATH__]:
Remove unneeded assignments to volatile memory.
libatomic/ChangeLog:
* config/x86/fenv.c (__atomic_feraiseexcept) [__SSE_MATH__]:
Remove unneeded assignments to volatile memory.
libgfortran/ChangeLog:
* config/fpu-387.h (local_feraiseexcept) [__SSE_MATH__]:
Remove unneeded assignments to volatile memory.
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As reported in the PR, GCC 10 (and also 9.3.1 but not 9.3.0) fails to build
when using older binutils which lack LSE support, because those instructions
are used in libgcc.
Thanks to Kyrylo's hint, the following patches (hopefully) allow it to build
even with older binutils by using .inst directive if LSE support isn't
available in the assembler.
2020-04-15 Jakub Jelinek <jakub@redhat.com>
PR target/93053
* configure.ac (LIBGCC_CHECK_AS_LSE): Add HAVE_AS_LSE checking.
* config/aarch64/lse.S: Include auto-target.h, if HAVE_AS_LSE
is not defined, use just .arch armv8-a.
(B, M, N, OPN): Define.
(COMMENT): New .macro.
(CAS, CASP, SWP, LDOP): Use .inst directive if HAVE_AS_LSE is not
defined. Otherwise, move the operands right after the glue? and
comment out operands where the macros are used.
* configure: Regenerated.
* config.in: Regenerated.
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Check for and handle new skip trace addresses when unwinding on zTPF.
libgcc/ChangeLog:
2020-04-03 Jim Johnston <jjohnst@us.ibm.com>
* config/s390/tpf-unwind.h (MIN_PATRANGE, MAX_PATRANGE)
(TPFRA_OFFSET): Macros removed.
(CP_CNF, cinfc_fast, CINFC_CMRESET, CINTFC_CMCENBKST)
(CINTFC_CMCENBKED, ICST_CRET, ICST_SRET, LOWCORE_PAGE3_ADDR)
(PG3_SKIPPING_OFFSET): New macros.
(__isPATrange): Use cinfc_fast for the check.
(__isSkipResetAddr): New function.
(s390_fallback_frame_state): Check for skip trace addresses. Use
either ICST_CRET or ICST_SRET to calculate return address
location.
(__tpf_eh_return): Handle skip trace addresses.
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The recent patch to convert all thumb1 code in libgcc to unified syntax
ommitted the conditional code that is used only when building the library
for minimal size. This patch fixes this case.
I've also fixed the COND macro so that a single definition is always used
that is for unified syntax. This eliminates a warning that is now being
seen from the assembler when compiling the ieee fp support code.
PR target/94220
* config/arm/lib1funcs.asm (COND): Use a single definition for
unified syntax.
(aeabi_uidivmod): Unified syntax when optimizing Thumb for size.
(aeabi_idivmod): Likewise.
(divsi3_skip_div0_test): Likewise.
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This patch adds a new multilib for armv8.1-m.main+mve with hard float abi. For
armv8.1-m.main+mve soft and softfp, the v8-M multilibs will be reused.
The following mappings are also updated:
"-mfloat-abi=hard -march=armv8.1-m.main+mve.fp -> armv8-m.main+fp/hard"
"-mfloat-abi=softfp -march=armv8.1-m.main+mve.fp -> armv8-m.main+fp/softfp"
"-mfloat-abi=soft -march=armv8.1-m.main+mve.fp -> armv8-m.main/nofp"
gcc/ChangeLog:
2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
* config/arm/t-rmprofile: create new multilib for
armv8.1-m.main+mve hard float and reuse v8-m.main ones for
v8.1-m.main+mve .
gcc/testsuite/ChangeLog:
2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
* gcc.target/arm/multilib.exp: Add new v8.1-M entry.
libgcc/ChangLog:
2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
* config/arm/t-arm: Do not compile cmse_nonsecure_call.S for v8.1-m.
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libgcc is supposed to be built with the trace skip flags and branch
targets. Add a zTPF header file fragment and add the -mtpf-trace-skip
option.
libgcc/ChangeLog:
2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
* config.host: Include the new makefile fragment.
* config/s390/t-tpf: New file.
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Unified syntax has been the official syntax for thumb1 assembly for
over 10 years now. It's time we made preparations for that becoming
the default in the assembler. But before we can start doing that we
really need to clean up some laggards from the olden days. Libgcc
support for thumb1 is one such example.
This patch converts all of the legacy (disjoint) syntax that I could
find over to unified code. The identification was done by using a
trick version of gas that defaulted to unified mode which then faults
if legacy syntax is encountered. The code produced was then compared
against the old code to check for differences. One such difference
does exist, but that is because in unified syntax 'movs rd, rn' is
encoded as 'lsls rd, rn, #0', rather than 'adds rd, rn, #0'; but that
is a deliberate change that was introduced because the lsls encoding
more closely reflects the behaviour of 'movs' in arm state (where only
some of the condition flags are modified).
* config/arm/bpabi-v6m.S (aeabi_lcmp): Convert thumb1 code to unified
syntax.
(aeabi_ulcmp, aeabi_ldivmod, aeabi_uldivmod): Likewise.
(aeabi_frsub, aeabi_cfcmpeq, aeabi_fcmpeq): Likewise.
(aeabi_fcmp, aeabi_drsub, aeabi_cdrcmple): Likewise.
(aeabi_cdcmpeq, aeabi_dcmpeq, aeabi_dcmp): Likewise.
* config/arm/lib1funcs.S (Lend_fde): Convert thumb1 code to unified
syntax.
(divsi3, modsi3): Likewise.
(clzdi2, ctzsi2): Likewise.
* config/arm/libunwind.S (restore_core_regs): Convert thumb1 code to
unified syntax.
(UNWIND_WRAPPER): Likewise.
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* config/frv/frvbegin.c: Use right flags for .ctors and .dtors
sections.
* config/frv/frvend.c: Similarly.
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Linux CET kernel places a restore token on shadow stack for signal
handler to enhance security. The restore token is 8 byte and aligned
to 8 bytes. It is usually transparent to user programs since kernel
will pop the restore token when signal handler returns. But when an
exception is thrown from a signal handler, now we need to pop the
restore token from shadow stack. For x86-64, we just need to treat
the signal frame as normal frame. For i386, we need to search for
the restore token to check if the original shadow stack is 8 byte
aligned. If the original shadow stack is 8 byte aligned, we just
need to pop 2 slots, one restore token, from shadow stack. Otherwise,
we need to pop 3 slots, one restore token + 4 byte padding, from
shadow stack.
This patch also includes 2 tests, one has a restore token with 4 byte
padding and one without.
Tested on Linux/x86-64 CET machine with and without -m32.
libgcc/
PR libgcc/85334
* config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment):
New.
gcc/testsuite/
PR libgcc/85334
* g++.target/i386/pr85334-1.C: New test.
* g++.target/i386/pr85334-2.C: Likewise.
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As the following testcase shows, unwind.h on ARM can't be (starting with GCC
10) compiled with -std=c* modes, only -std=gnu* modes.
The problem is it uses asm keyword, which isn't a keyword in those modes
(system headers vs. non-system ones don't make a difference here).
glibc and other installed headers use __asm or __asm__ keywords instead that
work fine in both standard and gnu modes.
While there, as it is an installed header, I think it is also wrong to
completely ignore any identifier namespace rules.
The generic unwind.h defines just _Unwind* namespace identifiers plus
_sleb128_t/_uleb128_t (but e.g. unlike libstdc++/glibc headers doesn't
uglify operand names), the ARM unwind.h is much worse here. I've just
changed the gnu_Unwind_Find_got function at least not be in user identifier
namespace, but perhaps it would be good to go further and rename e.g.
or e.g.
typedef _Unwind_Reason_Code (*personality_routine) (_Unwind_State,
_Unwind_Control_Block *, _Unwind_Context *);
in unwind-arm-common.h.
2020-02-07 Jakub Jelinek <jakub@redhat.com>
PR target/93615
* config/arm/unwind-arm.h (gnu_Unwind_Find_got): Rename to ...
(_Unwind_gnu_Find_got): ... this. Use __asm instead of asm. Remove
trailing :s in asm. Formatting fixes.
(_Unwind_decode_typeinfo_ptr): Adjust caller.
* gcc.dg/pr93615.c: New test.
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On nios2-linux-gnu, there has been a long-standing bug in C++ exception
handling that sometimes resulted in link errors like
../nios2-linux-gnu/bin/ld: FDE encoding in /tmp/cccfpQ2l.o(.eh_frame) prevents .eh_frame_hdr table being created
when building some shared libraries or PIE executables. The root of
the problem is that GCC was incorrectly emitting an absolute encoding
in EH tables for PIC. This patch changes it to use either
DW_EH_PE_indirect (for global) or DW_EH_PE_datarel (for local), and
fixes libgcc so it can find the address of the GOT as the base address
for DW_EH_PE_datarel.
Complicating matters somewhat, GAS was missing support for
%gotoff(symbol) relocation syntax. I have just pushed a fix for that,
but I've added a configure check to test for presence of the binutils
support and fall back to the current absolute encoding (which works
most of the time) if it is not available. Once the fix makes it into
an official binutils release it might be appropriate to make this
error out instead.
Since this is a wrong-code bug and affects only nios2 target, I think
this is appropriate for Stage 4. I regression-tested on both
nios2-linux-gnu and nios2-elf, with and without the binutils support
present, before committing this.
2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
gcc/
* configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
* config.in: Regenerated.
* configure: Regenerated.
* config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
(ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
gcc/testsuite/
* g++.target/nios2/hello-pie.C: New.
* g++.target/nios2/nios2.exp: New.
libgcc/
* config.host [nios2-*-linux*] (tmake_file, tm_file): Adjust.
* config/nios2-elf-lib.h: New.
* unwind-dw2-fde-dip.c (_Unwind_IteratePhdrCallback): Use existing
code for finding GOT base for nios2.
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ARC processors can work with a reduced register set (i.e. registers
r4-r9 and r16-r25 are not available). This option can be enabled
passing -mrf16 option to the compiler, or by using -mcpu=em_mini CPU
configuration. Using RF16 config requires all the hand-made assembly
files used in libgcc to have the corresponding RF16 object attribute
set.
This patch qualifies the relevant hand-made assembly files to
RF16 config, and also adds generic c-functions for the one which are
not.
libgcc/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/crti.S: Add RF16 object attribute.
* config/arc/crtn.S: Likewise.
* config/arc/crttls.S: Likewise.
* config/arc/lib1funcs.S: Likewise.
* config/arc/fp-hack.h (ARC_OPTFPE): Define.
* config/arc/lib2funcs.c: New file.
* config/arc/t-arc: Add lib2funcs to LIB2ADD.
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libgcc/ChangeLog:
2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
* config/mips/gnustack.h: Check for TARGET_LIBC_GNUSTACK also.
gcc/ChangeLog:
2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
* config.in: Regenerated.
* config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
for TARGET_LIBC_GNUSTACK.
* configure: Regenerated.
* configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
found to be 2.31 or greater.
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gcc/ChangeLog:
2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
* config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
TARGET_SOFT_FLOAT.
* config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
(mips_asm_file_end): New function. Delegate to
file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
* config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
libgcc/ChangeLog:
2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
* config/mips/gnustack.h: New file.
* config/mips/crti.S: Include gnustack.h.
* config/mips/crtn.S: Likewise.
* config/mips/mips16.S: Likewise.
* config/mips/vr4120-div.S: Likewise.
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* config/cris/arit.c (DS): Apply attribute fallthrough.
Without this, there are, for each compilation of arit.c, 30ish
occurrences of "this statement may fall through
[-Wimplicit-fallthrough=]", for lines that look like
case 32: DS; case 31: DS; case 30: DS; case 29: DS;
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This patch is part of a patch series to add support for Armv8.1-M
Mainline Security Extensions architecture.
Code to detect whether cmse.c can be buit with -mcmse checks the output
of host GCC when invoked with -mcmse. However, an error from the
compiler does not prevent some minimal output so this always holds true.
2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com>
* config/arm/t-arm: Check return value of gcc rather than lack of
output.
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libgcc/
* config/avr/lib1funcs.S (skip): Simplify.
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2020-01-10 Kwok Cheung Yeung <kcy@codesourcery.com>
libgcc/
* config/gcn/atomic.c: Remove include of stdint.h.
(__sync_val_compare_and_swap_##SIZE): Replace uintptr_t with
__UINTPTR_TYPE__.
From-SVN: r280152
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2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
libgcc/
* config/gcn/atomic.c: New.
* config/gcn/t-amdgcn (LIB2ADD): Add atomic.c.
From-SVN: r280055
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gcc/
PR target/92055
* config.gcc (tm_defines) [target=avr]: Support --with-libf7,
--with-double-comparison.
* doc/install.texi: Document them.
* config/avr/avr-c.c (avr_cpu_cpp_builtins)
<WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
<WITH_DOUBLE_COMPARISON>: New built-in defines.
* doc/invoke.texi (AVR Built-in Macros): Document them.
* config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
* config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
* config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
libgcc/
PR target/92055
* config.host (tmake_file) [target=avr]: Add t-libf7,
t-libf7-math, t-libf7-math-symbols as specified by --with-libf7=.
* config/avr/t-avrlibc: Don't copy libgcc.a if there are modules
depending on sizeof (double) or sizeof (long double).
* config/avr/libf7: New folder.
libgcc/config/avr/libf7/
PR target/92055
* t-libf7: New file.
* t-libf7-math: New file.
* t-libf7-math-symbols: New file.
* libf7-common.mk: New file.
* libf7-asm-object.mk: New file.
* libf7-c-object.mk: New file.
* asm-defs.h: New file.
* libf7.h: New file.
* libf7.c: New file.
* libf7-asm.sx: New file.
* libf7-array.def: New file.
* libf7-const.def: New file.
* libf7-constdef.h: New file.
* f7renames.sh: New script.
* f7wraps.sh: New script.
* f7-renames.h: New generated file.
* f7-wraps.h: New generated file.
From-SVN: r279994
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2020-01-05 Olivier Hainque <hainque@adacore.com>
* config/gthr-vxworks.h: Guard #include vxAtomicLib.h
by IN_LIBGCC2.
From-SVN: r279885
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From-SVN: r279813
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This changes introduces an internal API for VxWorks version checks
within runtime files, a prerequisite to a few fixes coming up for libstdc++
builds on more recent versions of the OS.
2019-12-30 Olivier Hainque <hainque@adacore.com>
gcc/
* config/vxworks/_vxworks-versions.h: New file.
* config.gcc (*-*-vxworks*): Add it to extra_headers.
libgcc/
* config/gthr-vxworks.h: Use _vxworks-versions.h.
* config/gthr-vxworks-tls.c: Likewise.
From-SVN: r279783
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2019-12-30 Olivier Hainque <hainque@adacore.com>
* config/gthr-vxworks.h (GTHREAD_ONCE_INIT): Use
standard zero-initializer syntax.
From-SVN: r279776
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