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2019-06-05re PR debug/90733 (ICE in simplify_subreg, at simplify-rtx.c:6440)Jakub Jelinek4-1/+34
PR debug/90733 * var-tracking.c (vt_expand_loc_callback): Don't create raw subregs with VOIDmode inner operands. * gcc.dg/pr90733.c: New test. From-SVN: r271952
2019-06-05re PR middle-end/90726 (exponential behavior on SCEV results everywhere)Richard Biener4-9/+45
2019-06-05 Richard Biener <rguenther@suse.de> PR middle-end/90726 * tree-ssa-loop-niter.c (expand_simple_operations): Do not turn an expression graph into a tree. * gcc.dg/pr90726.c: Enable IVOPTs. From-SVN: r271950
2019-06-05omp-expand.c (struct omp_region): Add has_lastprivate_conditional member.Jakub Jelinek2-6/+26
* omp-expand.c (struct omp_region): Add has_lastprivate_conditional member. (expand_parallel_call): If region->inner->has_lastprivate_conditional, treat it like explicit monotonic schedule modifier. (expand_omp_for): Initialize has_lastprivate_conditional. If fd.lastprivate_conditional != 0, treat it like explicit monotonic schedule modifier. From-SVN: r271949
2019-06-05omp-low.c (lower_rec_input_clauses): For lastprivate conditional references...Jakub Jelinek2-2/+19
* omp-low.c (lower_rec_input_clauses): For lastprivate conditional references, lookup in in hash map MEM_REF operand instead of the MEM_REF itself. (lower_omp_1): When looking for lastprivate conditional assignments, handle MEM_REFs with REFERENCE_TYPE operands. * testsuite/libgomp.c++/lastprivate-conditional-1.C: New test. * testsuite/libgomp.c++/lastprivate-conditional-2.C: New test. From-SVN: r271948
2019-06-05omp-low.c (lower_rec_input_clauses): Force max_vf if is_simd and on ↵Jakub Jelinek4-4/+224
privatization clauses OMP_CLAUSE_DECL is... * omp-low.c (lower_rec_input_clauses): Force max_vf if is_simd and on privatization clauses OMP_CLAUSE_DECL is privatized by reference and references a VLA. Handle references to non-VLAs if is_simd all privatization clauses like reductions. (lower_rec_input_clauses) <case do_private, case do_firstprivate>: If omp_is_reference, use always omp simd arrays and set DECL_VALUE_EXPR in that case, if lower_rec_simd_input_clauses fails, emit reference initialization. * g++.dg/vect/simd-1.cc: New test. From-SVN: r271947
2019-06-05re PR target/89803 (Missing AVX512 intrinsics)Hongtao Liu14-20/+234
gcc/ 2019-06-05 Hongtao Liu <hongtao.liu@intel.com> PR target/89803 * config/i386/avx512dqintrin.h (_mm_mask_fpclass_ss_mask, _mm_mask_fpclass_sd_mask): New intrinsics. (_mm_fpclass_ss_mask, _mm_fpclass_sd_mask): Modified, use new builtins. * config/i386/i386-builtin.def (__builtin_ia32_fpclassss_mask, __builtin_ia32_fpclasssd_mask): New builtins. (__builtin_ia32_fpclassss, __builtin_ia32_fpclasssd): Deleted. * config/i386/i386-builtin-types.def (DEF_FUNCTION_TYPE (QI, V2DF, INT), DEF_FUNCTION_TYPE (QI, V4SF, INT)): Deleted. * config/i386/i386-expand.c (case QI_FTYPE_V4SF_INT, case QI_FTYPE_V2SF_INT): Ditto. * config/i386/sse.md (define_insn "avx512dq_vmfpclass<mode><mask_scalar_merge_name>): Extended to insnstructions with mask operands. gcc/testsuite 2019-06-05 Hongtao Liu <hongtao.liu@intel.com> PR target/89803 * gcc.target/i386/avx-1.c (__builtin_ia32_fpclasssss, __builtin_ia32_fpclasssd): Removed. (__builtin_ia32_fpclassss_mask, __builtin_ia32_fpclasssd_mask): Define. * gcc.target/i386/sse-13.c (__builtin_ia32_fpclasssss, __builtin_ia32_fpclasssd): Removed. (__builtin_ia32_fpclassss_mask, __builtin_ia32_fpclasssd_mask): Define. * gcc.target/i386/sse-23.c (__builtin_ia32_fpclasssss, __builtin_ia32_fpclasssd): Removed. (__builtin_ia32_fpclassss_mask, __builtin_ia32_fpclasssd_mask): Define. * gcc.target/i386/avx512dq-vfpclassss-2.c: New. * gcc.target/i386/avx512dq-vfpclasssd-2.c: New. * gcc.target/i386/avx512dq-vfpclassss-1.c (avx512f_test): Add test for _mm_mask_fpclass_ss_mask. * gcc.target/i386/avx512dq-vfpclasssd-1.c (avx512f_test): Add test for _mm_mask_fpclass_sd_mask. From-SVN: r271946
2019-06-05compiler: statically allocate constant interface dataIan Lance Taylor2-4/+21
When converting a constant to interface, such as interface{}(42) or interface{}("hello"), if the interface escapes, we currently generate a heap allocation to hold the constant value. This CL changes it to generate a static allocation instead, as the gc compiler does. This reduces allocations in such cases. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/180277 From-SVN: r271945
2019-06-05Daily bump.GCC Administrator1-1/+1
From-SVN: r271944
2019-06-05rs6000: Update direct-move* testcasesSegher Boessenkool7-6/+9
This fixes some testcases that the last fifteen or so patches broke. In all these cases we no longer need to set VSX_REG_ATTR: the default value of "wa" is correct. gcc/testsuite/ * gcc.target/powerpc/direct-move-double1.c (VSX_REG_ATTR): Delete. * gcc.target/powerpc/direct-move-double2.c: Ditto. * gcc.target/powerpc/direct-move-float1.c: Ditto. * gcc.target/powerpc/direct-move-float2.c: Ditto. * gcc.target/powerpc/direct-move-vint1.c: Ditto. * gcc.target/powerpc/direct-move-vint2.c: Ditto. From-SVN: r271940
2019-06-05rs6000: Remove wp and wqSegher Boessenkool6-88/+72
wp becomes wa with isa p9tf, and wq is replaced by wa with isa p9kf. To manage to do that, there is the new mode attribute VSisa. * config/rs6000/constraints.md (define_register_constraint "wp"): Delete. (define_register_constraint "wq"): Delete. * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. (rs6000_init_hard_regno_mode_ok): Adjust. * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete RS6000_CONSTRAINT_wp and RS6000_CONSTRAINT_wq. * config/rs6000/vsx.md (define_mode_attr VSr3): Delete. (define_mode_attr VSa): Delete. (define_mode_attr VSisa): New. (rest of file): Adjust. * doc/md.texi (Machine Constraints): Adjust. From-SVN: r271939
2019-06-05rs6000: Add p9kf and p9tf isa valuesSegher Boessenkool2-1/+14
This adds "p9kf" and "p9tf" isa values, to be used for instruction alternatives where KFmode resp. TFmode is used. * config/rs6000/rs6000.md (define_attr "isa"): Add p9kf and p9tf. (define_attr "enabled"): Handle those new isa values. From-SVN: r271938
2019-06-05rs6000: More simplificationSegher Boessenkool2-42/+38
A whole bunch of mode attributes are used only once. Things are easier to read if we just expand those patterns. It's shorter, too. * config/rs6000/vsx.md (define_mode_attr VSr4): Delete. (define_mode_attr VSr5): Delete. (define_mode_attr VStype_sqrt): Delete. (define_mode_iterator VSX_SPDP): Delete. (define_mode_attr VS_spdp_res): Delete. (define_mode_attr VS_spdp_insn): Delete. (define_mode_attr VS_spdp_type): Delete. (*vsx_sqrt<mode>2): Adjust. (vsx_<VS_spdp_insn>): Delete, split to... (vsx_xscvdpsp): ... this. New. And... (vsx_xvcvspdp): ... this. New. And... (vsx_xvcvdpsp): ... this. New. From-SVN: r271937
2019-06-05rs6000: <VSs> -> <sd>pSegher Boessenkool3-60/+54
We don't need the <VSs> mode attribute, if we make <sd> work for V4SF and V2DF just like for SF and DF. * config/rs6000/rs6000.md (define_mode_attr sd): Add values for V4SF and V2DF. * config/rs6000/vsx.md (define_mode_attr VSs): Delete. (rest of file): Adjust. From-SVN: r271936
2019-06-05rs6000: ww->wa in testsuiteSegher Boessenkool2-1/+6
I should have factored this series better. Oh well. Near the end, let's call it loose ends. gcc/testsuite/ * gcc.target/powerpc/direct-move-float1.c: Use "wa" instead of "ww" constraint. From-SVN: r271935
2019-06-05rs6000: VSa->wa for some more casesSegher Boessenkool2-3/+8
* config/rs6000/vsx.md (vsx_<VS_spdp_insn>): Use wa instead of <VSa>. (vsx_extract_<mode>_var): Ditto. From-SVN: r271934
2019-06-05rs6000: Simplify <VSa> for VSX_TISegher Boessenkool2-4/+9
When used in VSX_TI, <VSa> is always just "wa". * config/rs6000/vsx.md: Replace all <VSa> that are used with VSX_TI with just "wa". From-SVN: r271933
2019-06-05rs6000: ww -> waSegher Boessenkool7-33/+30
"ww" can always be "wa". * config/rs6000/constraints.md (define_register_constraint "ww"): Delete. * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. (rs6000_init_hard_regno_mode_ok): Adjust. * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete RS6000_CONSTRAINT_ww. * config/rs6000/rs6000.md: Adjust. * config/rs6000/vsx.md: Adjust. * doc/md.texi (Machine Constraints): Adjust. From-SVN: r271932
2019-06-05rs6000: Remove Ftrad, Fvsx, Fs; add s and sdSegher Boessenkool3-49/+56
This removes the <Ftrad>, <Fvsx>, and <Fs> mode attributes, and creates new <sd> and <s> mode attributes instead. <sd> is either "s" or "d", depending on whether the mode is single-precision or double-precision floating point; and <s> is either "s" or nothing. * config/rs6000/rs6000.md (SFDF, SFDF2): Adjust comments. (define_mode_attr sd): New. (define_mode_attr s): New. (define_mode_attr Ftrad): Delete. (define_mode_attr Fvsx): Delete. (define_mode_attr Fs): Delete. (rest of file): Use the new mode attributes. * config.rs6000/vsx.md: Use the new mode attributes. From-SVN: r271931
2019-06-05rs6000: Simplify <VSa> for VSX_WSegher Boessenkool2-16/+21
When used in VSX_W, <VSa> is always just "wa". * config/rs6000/vsx.md: Replace all <VSa> that are used with VSX_W with just "wa". From-SVN: r271930
2019-06-05rs6000: Simplify VS[ra]* for VSX_[BDF]Segher Boessenkool2-110/+103
When used in VSX_B, VSX_D, or VSX_F, both <VSr> and <VSa> are always just "wa" now. Similarly <VSr2> and <VSr3>. The former of those is always "wa", so we can remove the mode attribute completely. * config/rs6000/vsx.md (define_mode_attr VSr2): Delete. (rest of file): Replace all <VSa>, <VSr>, <VSr2>, and <VSr3> that are used with VSX_B, VSX_D, or VSX_F, with just "wa". From-SVN: r271929
2019-06-04decl.c (grokdeclarator): Use declarator->id_loc in two additional places.Paolo Carlini12-27/+43
/cp 2019-06-04 Paolo Carlini <paolo.carlini@oracle.com> * decl.c (grokdeclarator): Use declarator->id_loc in two additional places. /testsuite 2019-06-04 Paolo Carlini <paolo.carlini@oracle.com> * g++.dg/concepts/pr60573.C: Test locations too. * g++.dg/cpp0x/deleted13.C: Likewise. * g++.dg/parse/error29.C: Likewise. * g++.dg/parse/qualified4.C: Likewise. * g++.dg/template/crash96.C Likewise. * g++.old-deja/g++.brendan/crash22.C Likewise. * g++.old-deja/g++.brendan/crash23.C Likewise. * g++.old-deja/g++.law/visibility10.C Likewise. * g++.old-deja/g++.other/decl5.C: Likewise. From-SVN: r271928
2019-06-04re PR target/78263 (Compile failure with AltiVec library on PPC64le and ↵Bill Schmidt5-3/+75
-std=c++11 flag) [gcc] 2019-06-04 Bill Schmidt <wschmidt@linux.ibm.com> PR target/78263 * config/rs6000/altivec.h: Don't #define vector, pixel, bool for C++ with strict ANSI requirements. [gcc/testsuite] 2019-06-04 Bill Schmidt <wschmidt@linux.ibm.com> PR target/78263 * g++.target/powerpc: New directory. * g++.target/powerpc/powerpc.exp: New test driver. * g++.target/powerpc/undef-bool-3.C: New. From-SVN: r271927
2019-06-04Simplify loop size when step=1Marc Glisse2-2/+14
2019-06-04 Marc Glisse <marc.glisse@inria.fr> * tree-ssa-loop-niter.c (number_of_iterations_ne): Skip computations when step is 1. From-SVN: r271926
2019-06-04rs6000: wf -> waSegher Boessenkool7-55/+50
"wf" is just "wa". * config/rs6000/constraints.md (define_register_constraint "wf"): Delete. * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. (rs6000_init_hard_regno_mode_ok): Adjust. * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete RS6000_CONSTRAINT_wf. * config/rs6000/rs6000.md: Adjust. * config/rs6000/vsx.md: Adjust. * doc/md.texi (Machine Constraints): Adjust. From-SVN: r271921
2019-06-04AARCH64: ILP32: Fix aarch64_asan_shadow_offsetAndrew Pinski2-1/+9
aarch64_asan_shadow_offset is using the wrong offset for ILP32. Change it to be a decent one. ChangeLog: * config/aarch64/aarch64.c (aarch64_asan_shadow_offset): Fix ILP32 value. From-SVN: r271920
2019-06-04rs6000: wd -> waSegher Boessenkool7-50/+47
"wd" is just "wa". * config/rs6000/constraints.md (define_register_constraint "wd"): Delete. * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. (rs6000_init_hard_regno_mode_ok): Adjust. * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete RS6000_CONSTRAINT_wd. * config/rs6000/rs6000.md: Adjust. * config/rs6000/vsx.md: Adjust. * doc/md.texi (Machine Constraints): Adjust. From-SVN: r271919
2019-06-04rs6000: Delete Fv2Segher Boessenkool2-41/+41
<Fv2> always is "wa". * config/rs6000/rs6000.md (define_mode_attr Fv2): Delete. (rest of file): Adjust. From-SVN: r271918
2019-06-04rs6000: Delete VS_64regSegher Boessenkool2-7/+8
<VS_64reg> now always is "wa". Make that simplification. * config/rs6000/vsx.md (define_mode_attr VS_64reg): Delete. (*vsx_extract_<P:mode>_<VSX_D:mode>_load): Adjust. (vsx_splat_<mode>_reg): Adjust. From-SVN: r271917
2019-06-04rs6000: ws -> waSegher Boessenkool7-42/+43
"ws" is just "wa". * config/rs6000/constraints.md (define_register_constraint "ws"): Delete. * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. (rs6000_init_hard_regno_mode_ok): Adjust. * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete RS6000_CONSTRAINT_ws. * config/rs6000/rs6000.md: Adjust. * config/rs6000/vsx.md: Adjust. * doc/md.texi (Machine Constraints): Adjust. From-SVN: r271916
2019-06-04rs6000: wv -> v+p7vSegher Boessenkool7-32/+33
"wv" is "v", but only if VSX is enabled (otherwise it's NO_REGS). So this patch sets "isa" "p7v" to all alternatives that used "wv" before (and that do not already need a later ISA), and changes the constraint. * config/rs6000/constraints.md (define_register_constraint "wv"): Delete. * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. (rs6000_init_hard_regno_mode_ok): Adjust. * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete RS6000_CONSTRAINT_wv. * config/rs6000/rs6000.md: Adjust. * config/rs6000/vsx.md: Adjust. * doc/md.texi (Machine Constraints): Adjust. From-SVN: r271915
2019-06-04rs6000: wi->wa, wt->waSegher Boessenkool7-73/+62
"wi" and "wt" mean just the same as "wa" these days. Change them to the simpler name. * config/rs6000/constraints.md (define_register_constraint "wi"): Delete. (define_register_constraint "wt"): Delete. * config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust. (rs6000_init_hard_regno_mode_ok): Adjust. * config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete RS6000_CONSTRAINT_wi and RS6000_CONSTRAINT_wt. * config/rs6000/rs6000.md: Adjust. * config/rs6000/vsx.md: Adjust. * doc/md.texi (Machine Constraints): Adjust. From-SVN: r271914
2019-06-04aarch64: fix asm visibility for extern symbolsSzabolcs Nagy3-2/+10
Commit r271869 broke visibility declarations in asm for extern symbols, because the new ASM_OUTPUT_EXTERNAL hook failed to call the default hook for elf. gcc/ChangeLog: * config/aarch64/aarch64-protos.h (aarch64_asm_output_external): Remove const. * config/aarch64/aarch64.c (aarch64_asm_output_external): Call default_elf_asm_output_external. From-SVN: r271913
2019-06-04[C++ PATCH] structure tag lookupNathan Sidwell2-70/+60
https://gcc.gnu.org/ml/gcc-patches/2019-06/msg00179.html * name-lookup.c (lookup_type_scope_1): Reimplement, handle local and namespace scopes separately. From-SVN: r271912
2019-06-04PR c++/60531 - Wrong error about unresolved overloaded functionHarald van Dijk3-5/+19
For PR60531, GCC wrongly rejects function templates with explicitly specified template arguments as overloaded. They are resolved by resolve_nondeduced_context, which is normally called by cp_default_conversion through decay_conversion, but the latter have extra effects making them unusable here. Calling the former directly does work. * typeck.c (cp_build_binary_op): See if overload can be resolved. (cp_build_unary_op): Ditto. * g++.dg/template/operator15.C: New test. From-SVN: r271910
2019-06-04Reduce accumulated garbage in constexpr evaluation.Jason Merrill2-0/+33
We want to evaluate the arguments to a call before looking into the cache so that we have constant values, but if we then find the call in the cache we end up with a TREE_LIST that we don't end up using; in highly recursive constexpr evaluation this ends up being a large proportion of the garbage generated. The cxx_eval_increment_expression hunk is less important, but it's an easy tweak; we only use the MODIFY_EXPR to evaluate it, so after that it's garbage. * constexpr.c (cxx_eval_call_expression): ggc_free any bindings we don't save. (cxx_eval_increment_expression): ggc_free the MODIFY_EXPR after evaluating it. From-SVN: r271909
2019-06-04Remove dead code in IPA ICF.Martin Liska3-13/+6
2019-06-04 Martin Liska <mliska@suse.cz> * ipa-icf.c (INCLUDE_LIST): Remove. (sem_item_optimizer::execute): Remove call to init_wpa. * ipa-icf.h (init_wpa): Remove. From-SVN: r271908
2019-06-04gimplify.c (gimplify_scan_omp_clauses): Don't sorry_at on lastprivate ↵Jakub Jelinek8-70/+123
conditional on combined for simd. * gimplify.c (gimplify_scan_omp_clauses): Don't sorry_at on lastprivate conditional on combined for simd. * omp-low.c (struct omp_context): Add combined_into_simd_safelen0 member. (lower_rec_input_clauses): For gimple_omp_for_combined_into_p max_vf 1 constructs, don't remove lastprivate_conditional_map, but instead set ctx->combined_into_simd_safelen0 and adjust hash_map, so that it points to parent construct temporaries. (lower_lastprivate_clauses): Handle ctx->combined_into_simd_safelen0 like !ctx->lastprivate_conditional_map. (lower_omp_1) <case GIMPLE_ASSIGN>: If up->combined_into_simd_safelen0, use up->outer context instead of up. * omp-expand.c (expand_omp_for_generic): Perform cond_var bump even if gimple_omp_for_combined_p. (expand_omp_for_static_nochunk): Likewise. (expand_omp_for_static_chunk): Add forgotten cond_var bump that was probably moved over into expand_omp_for_generic rather than being copied there. gcc/cp/ * cp-tree.h (CP_OMP_CLAUSE_INFO): Allow for any clauses up to _condvar_ instead of only up to linear. gcc/testsuite/ * c-c++-common/gomp/lastprivate-conditional-2.c (foo): Don't expect a sorry_at on any of the clauses. libgomp/ * testsuite/libgomp.c-c++-common/lastprivate-conditional-7.c: New test. * testsuite/libgomp.c-c++-common/lastprivate-conditional-8.c: New test. * testsuite/libgomp.c-c++-common/lastprivate-conditional-9.c: New test. * testsuite/libgomp.c-c++-common/lastprivate-conditional-10.c: New test. From-SVN: r271907
2019-06-04Fix typo in tests.Martin Liska3-2/+7
2019-06-04 Martin Liska <mliska@suse.cz> * value-prof.c (dump_histogram_value): Fix typo. (gimple_mod_subtract_transform): Likewise. From-SVN: r271904
2019-06-04re PR middle-end/90726 (exponential behavior on SCEV results everywhere)Richard Biener6-139/+206
2019-06-04 Richard Biener <rguenther@suse.de> PR middle-end/90726 * tree-chrec.c (chrec_contains_symbols): Add to visited. (tree_contains_chrecs): Likewise. (chrec_contains_symbols_defined_in_loop): Move here and avoid exponential behaivor from ... * tree-scalar-evolution.c (chrec_contains_symbols_defined_in_loop): ... here. (expression_expensive_p): Avoid exponential behavior and compute expanded size, rejecting any expansion. * tree-ssa-loop-ivopts.c (abnormal_ssa_name_p): Remove. (idx_contains_abnormal_ssa_name_p): Likewise. (contains_abnormal_ssa_name_p_1): New helper for walk_tree. (contains_abnormal_ssa_name_p): Simplify and use walk_tree_without_duplicates. * gcc.dg/pr90726.c: New testcase. From-SVN: r271903
2019-06-04re PR fortran/90738 (gfortran.dg/pointer_array_10.f90 etc. FAIL)Richard Biener7-13/+54
2019-06-04 Richard Biener <rguenther@suse.de> PR tree-optimization/90738 Revert 2019-06-03 Richard Biener <rguenther@suse.de> * tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Get original full reference tree and record in ref->ref. (vn_reference_lookup_3): Pass in original ref to ao_ref_init_from_vn_reference. (vn_reference_lookup): Likewise. * tree-ssa-sccvn.h (ao_ref_init_from_vn_reference): Adjust prototype. * tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p): Handle non-decl bases in the original reference. * gcc.dg/tree-ssa/alias-access-path-1.c: Scan fre1. * gcc.dg/torture/pr90738.c: New testcase. From-SVN: r271902
2019-06-04IPA ICF: use fibonacci heap instead of list as a worklist.Martin Liska3-7/+24
2019-06-04 Martin Liska <mliska@suse.cz> * ipa-icf.c (sem_item_optimizer::add_item_to_class): Count number of references. (sem_item_optimizer::do_congruence_step): (sem_item_optimizer::worklist_push): Dump how references a class has. (sem_item_optimizer::worklist_pop): Use heap. (sem_item_optimizer::process_cong_reduction): Likewise. * ipa-icf.h: Use fibonacci_heap insteam of std::list. From-SVN: r271901
2019-06-04IPA ICF: rewrite references into a hash_map.Martin Liska6-77/+117
2019-06-04 Martin Liska <mliska@suse.cz> * ipa-icf.h (struct sem_usage_pair_hash): New. (sem_usage_pair_hash::hash): Likewise. (sem_usage_pair_hash::equal): Likewise. (struct sem_usage_hash): Likewise. * ipa-icf.c (sem_item::sem_item): Initialize referenced_by_count. (sem_item::add_reference): Register a reference in ref_map and not in target->usages. (sem_item::setup): Remove initialization of dead vectors. (sem_item::~sem_item): Remove usage of dead vectors. (sem_item::dump): Remove dump of references. (sem_item_optimizer::sem_item_optimizer): Initialize m_references. (sem_item_optimizer::read_section): Remove useless dump. (sem_item_optimizer::parse_funcs_and_vars): Likewise here. (sem_item_optimizer::build_graph): Pass m_references to ::add_reference. (sem_item_optimizer::verify_classes): Remove usage of dead vectors. (sem_item_optimizer::traverse_congruence_split): Return true when a class is split. (sem_item_optimizer::do_congruence_step_for_index): Use hash_map for look up of (sem_item *, index). That brings significant speed up. (sem_item_optimizer::do_congruence_step): Return true when a split is done. (congruence_class::is_class_used): Use referenced_by_count. 2019-06-04 Martin Liska <mliska@suse.cz> * c-c++-common/goacc/acc-icf.c: Change scanned pattern. * gfortran.dg/goacc/pr78027.f90: Likewise. From-SVN: r271900
2019-06-04Daily bump.GCC Administrator1-1/+1
From-SVN: r271899
2019-06-04PR90689, ICE in extract_insn on ppc64leAlan Modra2-3/+7
PR target/90689 * config/rs6000/rs6000.c (rs6000_call_aix): Correct r271753 merge error. From-SVN: r271895
2019-06-03compiler, runtime, reflect: generate unique type descriptorsIan Lance Taylor6-2/+219
Currently, the compiler already generates common symbols for type descriptors, so the type descriptors are unique. However, when a type is created through reflection, it is not deduplicated with compiler-generated types. As a consequence, we cannot assume type descriptors are unique, and cannot use pointer equality to compare them. Also, when constructing a reflect.Type, it has to go through a canonicalization map, which introduces overhead to reflect.TypeOf, and lock contentions in concurrent programs. In order for the reflect package to deduplicate types with compiler-created types, we register all the compiler-created type descriptors at startup time. The reflect package, when it needs to create a type, looks up the registry of compiler-created types before creates a new one. There is no lock contention since the registry is read-only after initialization. This lets us get rid of the canonicalization map, and also makes it possible to compare type descriptors with pointer equality. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/179598 From-SVN: r271894
2019-06-03parser.c (cp_parser_unqualified_id): Use build_min_nt_loc in five places.Paolo Carlini2-6/+11
2019-06-03 Paolo Carlini <paolo.carlini@oracle.com> * parser.c (cp_parser_unqualified_id): Use build_min_nt_loc in five places. From-SVN: r271893
2019-06-03libgo: delay applying profile stack-frame skip until fixupIan Lance Taylor1-1/+1
When the runtime collects a stack trace to associate it with some profiling event (mem alloc, mutex, etc) there is a skip count passed to runtime.Callers (or equivalent) to skip some known count of frames in order to get to the "interesting" frame corresponding to the profile event. Now that the profiling mechanism uses lazy fixup (when removing compiler artifacts like thunks, morestack calls etc), we also need to move the frame skipping logic after the fixup, so as to insure that the skip count isn't thrown off by these artifacts. Fixes golang/go#32290. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/179740 From-SVN: r271892
2019-06-03compiler: permit inlining references to global variablesIan Lance Taylor9-87/+482
This requires tracking all references to unexported variables, so that we can make them global symbols in the object file, and can export them so that other compilations can see the right definition for their own inline bodies. This introduces a syntax for referencing names defined in other packages: a <pNN> prefix, where NN is the package index. This will need to be added to gccgoimporter, but I didn't do it yet since it isn't yet possible to create an object for which gccgoimporter will see a <pNN> prefix. This increases the number of inlinable functions in the standard library from 181 to 215, adding functions like context.Background. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/177920 From-SVN: r271891
2019-06-03runtime: remove unnecessary functions calling between C and GoIan Lance Taylor1-1/+1
These functions were needed during the transition of the runtime from C to Go, but are no longer necessary. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/179879 From-SVN: r271890
2019-06-04rs6000: Delete -mmfpgprSegher Boessenkool11-79/+48
This patch makes the -mmfpgpr option not do anything except warn that the option is deprecated. * config/rs6000/rs6000.h (MASK_MFPGPR): Delete. * config/rs6000/rs6000.c (direct_move_p): Adjust. (rs6000_secondary_reload_simple_move): Adjust. (rs6000_opt_masks): Neuter the "mfpgpr" option. * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Adjust. * config/rs6000/rs6000-cpus.def (ISA_2_5_MASKS_EMBEDDED): Adjust comment. (power6x): Adjust. * config/rs6000/rs6000.md (floatsi<mode>2_lfiwax): Adjust. (floatunssi<mode>2_lfiwzx): Adjust. (fix_trunc<mode>si2_stfiwx): Adjust. (fixuns_trunc<mode>si2_stfiwx): Adjust. * config/rs6000/rs6000.opt (mno-mfpgpr): New. (mfpgpr): Mark as deprecated. * doc/extend.texi (PowerPC Function Attributes): Delete mfpgpr. (Basic PowerPC Built-in Functions Available on ISA 2.05): Adjust. * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mmfpgpr. gcc/testsuite/ * gcc.target/powerpc/mmfpgpr.c: Delete. From-SVN: r271889
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