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authorAndrew Pinski <apinski@marvell.com>2019-06-04 16:34:31 +0000
committerAndrew Pinski <pinskia@gcc.gnu.org>2019-06-04 09:34:31 -0700
commit10078f3e1d0cbebc5e6f7f4821d3ad41421ef1e0 (patch)
tree702f2f654902565c26bc404d404d1fb9e88fa8ba /gcc
parent85949949f2ffe0ab4f07e3ec859a876183418c28 (diff)
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AARCH64: ILP32: Fix aarch64_asan_shadow_offset
aarch64_asan_shadow_offset is using the wrong offset for ILP32. Change it to be a decent one. ChangeLog: * config/aarch64/aarch64.c (aarch64_asan_shadow_offset): Fix ILP32 value. From-SVN: r271920
Diffstat (limited to 'gcc')
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/aarch64/aarch64.c5
2 files changed, 9 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 61299f2..70d1b7d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2019-06-04 Andrew Pinski <apinski@marvell.com>
+
+ * config/aarch64/aarch64.c (aarch64_asan_shadow_offset):
+ Fix ILP32 value.
+
2019-06-04 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/constraints.md (define_register_constraint "wd"):
diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 7acc322..b3c42e2 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -17574,7 +17574,10 @@ aarch64_expand_subvti (rtx op0, rtx low_dest, rtx low_in1,
static unsigned HOST_WIDE_INT
aarch64_asan_shadow_offset (void)
{
- return (HOST_WIDE_INT_1 << 36);
+ if (TARGET_ILP32)
+ return (HOST_WIDE_INT_1 << 29);
+ else
+ return (HOST_WIDE_INT_1 << 36);
}
static rtx