Age | Commit message (Collapse) | Author | Files | Lines | |
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2020-01-01 | ipa.c (walk_polymorphic_call_targets): Fix updating of overall summary. | Jan Hubicka | 2 | -1/+7 | |
* ipa.c (walk_polymorphic_call_targets): Fix updating of overall summary. From-SVN: r279810 | |||||
2020-01-01 | re PR tree-optimization/93098 (ICE with negative shifter) | Jakub Jelinek | 6 | -56264/+56332 | |
PR tree-optimization/93098 * match.pd (popcount): For shift amounts, use integer_onep or wi::to_widest () == cst instead of tree_to_uhwi () == cst tests. Make sure that precision is power of two larger than or equal to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro instead of ULL suffixed constants. Formatting fixes. * gcc.c-torture/compile/pr93098.c: New test. From-SVN: r279809 | |||||
2020-01-01 | Daily bump. | GCC Administrator | 1 | -1/+1 | |
From-SVN: r279808 | |||||
2019-12-31 | Fix EXTRACT_LAST_REDUCTION segfault | Richard Sandiford | 4 | -3/+25 | |
This code: /* Make sure we don't accidentally use the old condition. */ cond_expr = NULL_TREE; was misplaced, since it triggered even when we needed to force the original unmodified cond_expr into a mask temporary and then invert it. 2019-12-31 Richard Sandiford <richard.sandiford@arm.com> gcc/ * tree-vect-stmts.c (vectorizable_condition): Only nullify cond_expr if we've created a new condition. Don't nullify it if we've decided to keep it and then invert the result. gcc/testsuite/ * gcc.dg/vect/vect-cond-reduc-6.c: New test. From-SVN: r279804 | |||||
2019-12-31 | Fix SSA update when vectorisation adds a vdef to a read-only loop | Richard Sandiford | 4 | -4/+132 | |
This patch fixes an awkward corner case in which: (a) we apply if-conversion to a loop; (b) the original scalar loop doesn't have a vdef, and thus doesn't need a virtual phi; (c) the vectorised main loop does need a vdef and a virtual phi (see below); (d) we also vectorise the epilogue; and (e) the vectorised epilogue still needs a scalar epilogue The specific case in which (c) applies is if a read-only loop is vectorised using IFN_LOAD_LANES, which uses clobber statements to mark the lifetime of the temporary array. The vectoriser relies on the SSA renamer to update virtual operands. All would probably be well if it postponed this update until after it had vectorised both the main loop and the epilogue loop. However, when vectorising the epilogue, vect_do_peeling does: create_lcssa_for_virtual_phi (loop); update_ssa (TODO_update_ssa_only_virtuals); (with "loop" in this case being the to-be-vectorised epilogue loop). So the vectoriser puts the virtual operand into SSA form for the vectorised main loop as a separate step, during the early stages of vectorising the epilogue. I wasn't sure at first why that update_ssa was there. It looked initially like it was related to create_lcssa_for_virtual_phi, which seemed strange when create_lcssa_for_virtual_phi keeps the SSA form up-to-date. But before r241099 it had the following comment, which AFAICT is still the reason: /* We might have a queued need to update virtual SSA form. As we delete the update SSA machinery below after doing a regular incremental SSA update during loop copying make sure we don't lose that fact. ??? Needing to update virtual SSA form by renaming is unfortunate but not all of the vectorizer code inserting new loads / stores properly assigns virtual operands to those statements. */ The patch restores that comment since IMO it's helpful. (a), (d) and (e) mean that we copy the original un-if-converted scalar loop to act as the scalar epilogue. The update_ssa above means that this copying needs to cope with any new virtual SSA names in the main loop. The code to do that (reasonably) assumed that one of two things was true: (1) the scalar loop and the vector loops don't have vdefs, and so no virtual operand update is needed. The definition that applies on entry to the loops is the same in all cases. (2) the scalar loop and the vector loops have virtual phis, and so -- after applying create_lcssa_for_virtual_phi on the to-be-vectorised epilogue loop -- the virtual operand update can be handled in the same way as for normal SSA names. But (b) and (c) together mean that the scalar loop and the still-to-be-vectorised epilogue loop have no virtual phi that (2) can use. We'd therefore keep the original vuses when duplicating, rather than updating them to the definition that applies on exit from the epilogue loop. (Since the epilogue is still unvectorised and has no vdefs, the definition that applies on exit is the same as the one that applies on entry.) This patch therefore adds a third case: the scalar loop and to-be-vectorised epilogue have no virtual defs, but the main loop does. 2019-12-31 Richard Sandiford <richard.sandiford@arm.com> gcc/ * tree-vect-loop-manip.c (create_lcssa_for_virtual_phi): Return the incoming virtual operand definition. (vect_do_peeling): When vectorizing an epilogue loop, handle the case in which the main loop has a virtual phi and the epilogue and scalar loops don't. Restore an earlier comment about the update_ssa call. gcc/testsuite/ * gcc.dg/vect/vect-epilogues-2.c: New test. From-SVN: r279802 | |||||
2019-12-31 | Daily bump. | GCC Administrator | 1 | -1/+1 | |
From-SVN: r279801 | |||||
2019-12-30 | Add ChangeLog entry for rev 279797 | Olivier Hainque | 1 | -0/+4 | |
From-SVN: r279798 | |||||
2019-12-30 | undefine OFFSET in testsuite/gcc.dg/vect/tree-vect.h | Olivier Hainque | 1 | -0/+6 | |
2019-12-20 Olivier Hainque <hainque@adacore.com> * gcc.dg/vect/tree-vect.h: #undef OFFSET. From-SVN: r279797 | |||||
2019-12-30 | Prevent redefinition of WCHAR_MAX from testsuite/gcc.dg/cpp/ucs.c | Olivier Hainque | 2 | -0/+9 | |
gcc/testsuite/gcc.dg/cpp/ucs.c #include <limits.h> and then crafts a definition of WCHAR_MAX depending on __WCHAR_TYPE__. The test fails in VxWorks configurations because WCHAR_MAX is already exposed by the system limits.h. The patch simply guards the tentative definition by a check verifying if the macro is defined already, so we're using the value exposed by limits.h in this case. 2019-12-30 Olivier Hainque <hainque@adacore.com> * testsuite/gcc.dg/cpp/ucs.c: Prevent redefinition of WCHAR_MAX if already exposed by limits.h. From-SVN: r279795 | |||||
2019-12-30 | allow $ in scan-tree-dump expressions matching symbol names | Olivier Hainque | 4 | -6/+14 | |
This change adjusts a few scan-tree-dump expressions to allow '$' as well as '.' when matching symbol names, This improves results on VxWorks targets configured with: #undef NO_DOLLAR_IN_LABEL #define NO_DOT_IN_LABEL 2019-12-20 Olivier Hainque <hainque@adacore.com> Jerome Lambourg <lambourg@adacore.com> * c-c++-common/pr56493.c: Allow '$' in addition to '.' scan-tree-dump expressions matching symbol names. * gcc.dg/tree-ssa/sra-17.c: Likewise. * gcc.dg/tree-ssa/sra-18.c: Likewise. Co-Authored-By: Jerome Lambourg <lambourg@adacore.com> From-SVN: r279794 | |||||
2019-12-30 | Guard aarch64/aapcs64 tests using abitest.S by check_weak_available | Joel Brobecker | 2 | -13/+29 | |
2019-12-16 Joel Brobecker <brobecker@adacore.com> Olivier Hainque <hainque@adacore.com> * gcc.target/aarch64/aapcs64/aapcs64.exp: Guard tests using abitest.S by check_weak_available. Co-Authored-By: Olivier Hainque <hainque@adacore.com> From-SVN: r279793 | |||||
2019-12-30 | Arrange to preinclude yvals.h ahead of stdint on VxWorks 7 | Olivier Hainque | 4 | -3/+60 | |
On Vxworks 7, includers of stdint.h (which we currently "provide") need yvals.h to have been included ahead. Instead of altering the common stdint-gcc.h with unpleasant vxworks specific bits to do that, we arrange to provide stdint-gcc.h on its own along with a stdint.h wrapper which preincludes yvals.h on vx7 then includes stdint-gcc.h. 2019-12-30 Olivier Hainque <hainque@adacore.com> * config/vxworks/stdint.h: New file. Include _yvals.h then stdint-gcc.h. * config/t-vxworks: Arrange to install the stdint.h wrapper. * config.gcc (*-*-vxworks*): Add stdint-gcc.h to $extra_headers so it gets copied. Set use_gcc_stdint to request _not_ crafting stdint.h through the common Makefile rules. From-SVN: r279791 | |||||
2019-12-30 | Add missing file expected with rev 279781 | Olivier Hainque | 1 | -0/+37 | |
* config/vxworks-c.c: New file. From-SVN: r279790 | |||||
2019-12-30 | * fi.po: Update. | Joseph Myers | 2 | -325/+333 | |
From-SVN: r279788 | |||||
2019-12-30 | Add missing files expected with rev 279784 | Olivier Hainque | 6 | -0/+207 | |
* config/vxworks/_yvals.h: New file. * config/vxworks/_yvals-wrapper.h: New file. * config/vxworks/math.h: Use it to wrap the VxWorks math.h header. * config/vxworks/complex.h: Likewise. * config/vxworks/setjmp.h: Likewise. * config/vxworks/inttypes.h: Likewise. From-SVN: r279787 | |||||
2019-12-30 | Add missing file expected with rev 279783 | Olivier Hainque | 1 | -0/+54 | |
* config/vxworks/_vxworks-versions.h: New File. From-SVN: r279786 | |||||
2019-12-30 | Add missing file expected with rev 279781 | Olivier Hainque | 1 | -0/+32 | |
From-SVN: r279785 | |||||
2019-12-30 | Setup system header wrappers for C++ on VxWorks | Olivier Hainque | 2 | -1/+28 | |
Starting from VxWorks 7, the system comes with a Dinkumware environment which requires the inclusion of "yvals.h" before other system headers. We provide wrapped versions of a few headers to accommodate such constraints. 2019-12-30 Jerome Lambourg <lambourg@adaccore.com> Olivier Hainque <hainque@adacore.com> gcc/ * config/vxworks/_yvals.h: New file. * config/vxworks/_yvals-wrapper.h: New file. * gcc/config/vxworks/math.h: Use it to wrap the VxWorks math.h header. * gcc/config/vxworks/complex.h: Likewise. * gcc/config/vxworks/setjmp.h: Likewise. * gcc/config/vxworks/inttypes.h: Likewise. * config.gcc (*-*-vxworks*): Add system header wrappers to extra_headers. (powerpc-*-vxworks*): Reuse the common extra_headers. From-SVN: r279784 | |||||
2019-12-30 | Introduce an internal API for VxWorks version checks | Olivier Hainque | 2 | -0/+12 | |
This changes introduces an internal API for VxWorks version checks within runtime files, a prerequisite to a few fixes coming up for libstdc++ builds on more recent versions of the OS. 2019-12-30 Olivier Hainque <hainque@adacore.com> gcc/ * config/vxworks/_vxworks-versions.h: New file. * config.gcc (*-*-vxworks*): Add it to extra_headers. libgcc/ * config/gthr-vxworks.h: Use _vxworks-versions.h. * config/gthr-vxworks-tls.c: Likewise. From-SVN: r279783 | |||||
2019-12-30 | Simplify the compilation commands for config/vxworks.c | Olivier Hainque | 2 | -3/+8 | |
2019-12-30 Olivier Hainque <hainque@adacore.com> * config/t-vxworks: Rework the vxworks.o compilation rules to use $(COMPILE). From-SVN: r279782 | |||||
2019-12-30 | Setup TARGET_C_PREINCLUDE for VxWorks | Joel Brobecker | 3 | -0/+17 | |
This patch modifies the C & C++ VxWorks compiler to predefine the __STDC_ macros verified by gcc.dg/c99-predef-1.c in the testsuite. 2019-12-13 Joel Brobecker <brobecker@adacore.com> * config.gcc <*-*-vxworks*>: Add vxworks-c.o to c_target_objs and cxx_target_objs. Set target_has_targetcm to "yes". Add vxworks-predef.h to extra_headers. * config/t-vxworks (vxworks-c.o): New target. * config/vxworks-c.c: New file. * config/vxworks/vxworks-predef.h: New file. From-SVN: r279781 | |||||
2019-12-30 | Refine definitions for wchar_t/wint_t on VxWorks | Alexandre Oliva | 2 | -6/+29 | |
This change refines the VxWorks macro definitions configuring wchar_t to accommodate the VxWorks7 environment, where wchar_t is now typically a 32bit type. We also ensure that the definitions for wint_t are always based on those for wchar_t, so the two remain in sync in environments where WCHAR_TYPE is redefined for a specific CPU architecture. 2019-12-30 Alexandre Oliva <oliva@adacore.com> Olivier Hainque <hainque@adacore.com> * config/vx-common.h (WCHAR_TYPE_SIZE): 32 on VxWorks 7. (WCHAR_TYPE): Pick accordingly. (WINT_TYPE_SIZE): Define in terms of WCHAR_TYPE_SIZE. (WINT_TYPE): Define in terms of WCHAR_TYPE. Co-Authored-By: Olivier Hainque <hainque@adacore.com> From-SVN: r279780 | |||||
2019-12-30 | Identify sections in vx-common.h | Olivier Hainque | 2 | -6/+19 | |
2019-12-30 Olivier Hainque <hainque@adacore.com> * config/vx-common.h: Minor reorganization and add sectioning comments. From-SVN: r279779 | |||||
2019-12-30 | Define STARTFILE_PREFIX_SPEC for powerpc VxWorks < 7 | Doug Rupp | 2 | -0/+11 | |
2019-12-30 Doug Rupp <rupp@adacore.com> * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Define. From-SVN: r279778 | |||||
2019-12-30 | Improve recursion protection for VxWorks limits.h | Olivier Hainque | 2 | -3/+41 | |
2019-12-30 Olivier Hainque <hainque@adacore.com> Jerome Lambourg <labourg@adacore.com> * config/t-vxworks: Arrange to alter/restore glimits.h before/after stmp-int-hdrs, so it uses a different macro name to protect itself against recursive inclusions. Co-Authored-By: Jerome Lambourg <lambourg@adacore.com> From-SVN: r279777 | |||||
2019-12-30 | Fix builtin functions needlessly using VIEW_CONVERT_EXPRs on their operands. | Peter Bergner | 6 | -225/+1235 | |
gcc/ PR target/92923 * config/rs6000/rs6000-builtin.def (VAND, VANDC, VNOR, VOR, VXOR): Delete. (EQV_V16QI_UNS, EQV_V8HI_UNS, EQV_V4SI_UNS, EQV_V2DI_UNS, EQV_V1TI_UNS, NAND_V16QI_UNS, NAND_V8HI_UNS, NAND_V4SI_UNS, NAND_V2DI_UNS, NAND_V1TI_UNS, ORC_V16QI_UNS, ORC_V8HI_UNS, ORC_V4SI_UNS, ORC_V2DI_UNS, ORC_V1TI_UNS, VAND_V16QI_UNS, VAND_V16QI, VAND_V8HI_UNS, VAND_V8HI, VAND_V4SI_UNS, VAND_V4SI, VAND_V2DI_UNS, VAND_V2DI, VAND_V4SF, VAND_V2DF, VANDC_V16QI_UNS, VANDC_V16QI, VANDC_V8HI_UNS, VANDC_V8HI, VANDC_V4SI_UNS, VANDC_V4SI, VANDC_V2DI_UNS, VANDC_V2DI, VANDC_V4SF, VANDC_V2DF, VNOR_V16QI_UNS, VNOR_V16QI, VNOR_V8HI_UNS, VNOR_V8HI, VNOR_V4SI_UNS, VNOR_V4SI, VNOR_V2DI_UNS, VNOR_V2DI, VNOR_V4SF, VNOR_V2DF, VOR_V16QI_UNS, VOR_V16QI, VOR_V8HI_UNS, VOR_V8HI, VOR_V4SI_UNS, VOR_V4SI, VOR_V2DI_UNS, VOR_V2DI, VOR_V4SF, VOR_V2DF, VXOR_V16QI_UNS, VXOR_V16QI, VXOR_V8HI_UNS, VXOR_V8HI, VXOR_V4SI_UNS, VXOR_V4SI, VXOR_V2DI_UNS, VXOR_V2DI, VXOR_V4SF, VXOR_V2DF): Add definitions. * config/rs6000/rs6000-call.c (altivec_overloaded_builtins) <ALTIVEC_BUILTIN_VAND, ALTIVEC_BUILTIN_VANDC, ALTIVEC_BUILTIN_VNOR, ALTIVEC_BUILTIN_VOR, ALTIVEC_BUILTIN_VXOR>: Remove. <ALTIVEC_BUILTIN_VAND_V4SF, ALTIVEC_BUILTIN_VAND_V2DF, ALTIVEC_BUILTIN_VAND_V2DI, ALTIVEC_BUILTIN_VAND_V2DI_UNS, ALTIVEC_BUILTIN_VAND_V4SI_UNS, ALTIVEC_BUILTIN_VAND_V4SI, ALTIVEC_BUILTIN_VAND_V8HI_UNS, ALTIVEC_BUILTIN_VAND_V8HI, ALTIVEC_BUILTIN_VAND_V16QI, ALTIVEC_BUILTIN_VAND_V16QI_UNS, ALTIVEC_BUILTIN_VANDC_V4SF, ALTIVEC_BUILTIN_VANDC_V2DF, ALTIVEC_BUILTIN_VANDC_V2DI, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, ALTIVEC_BUILTIN_VANDC_V4SI, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, ALTIVEC_BUILTIN_VANDC_V8HI, ALTIVEC_BUILTIN_VANDC_V16QI, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, ALTIVEC_BUILTIN_VNOR_V4SF, ALTIVEC_BUILTIN_VNOR_V2DF, ALTIVEC_BUILTIN_VNOR_V2DI, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, ALTIVEC_BUILTIN_VNOR_V4SI, ALTIVEC_BUILTIN_VNOR_V4SI_UNS, ALTIVEC_BUILTIN_VNOR_V8HI, ALTIVEC_BUILTIN_VNOR_V8HI_UNS, ALTIVEC_BUILTIN_VNOR_V16QI, ALTIVEC_BUILTIN_VNOR_V16QI_UNS, ALTIVEC_BUILTIN_VOR_V4SF, ALTIVEC_BUILTIN_VOR_V2DF, ALTIVEC_BUILTIN_VOR_V2DI, ALTIVEC_BUILTIN_VOR_V2DI_UNS, ALTIVEC_BUILTIN_VOR_V4SI_UNS, ALTIVEC_BUILTIN_VOR_V4SI, ALTIVEC_BUILTIN_VOR_V8HI_UNS, ALTIVEC_BUILTIN_VOR_V8HI, ALTIVEC_BUILTIN_VOR_V16QI, ALTIVEC_BUILTIN_VOR_V16QI_UNS, ALTIVEC_BUILTIN_VXOR_V4SF, ALTIVEC_BUILTIN_VXOR_V2DF, ALTIVEC_BUILTIN_VXOR_V2DI, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, ALTIVEC_BUILTIN_VXOR_V4SI, ALTIVEC_BUILTIN_VXOR_V8HI, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, ALTIVEC_BUILTIN_VXOR_V16QI, ALTIVEC_BUILTIN_VXOR_V16QI_UNS>: Add definitions. <P8V_BUILTIN_EQV_V16QI, P8V_BUILTIN_EQV_V8HI, P8V_BUILTIN_EQV_V4SI, P8V_BUILTIN_EQV_V2DI, P8V_BUILTIN_NAND_V16QI, P8V_BUILTIN_NAND_V8HI, P8V_BUILTIN_NAND_V4SI, P8V_BUILTIN_NAND_V2DI, P8V_BUILTIN_ORC_V16QI, P8V_BUILTIN_ORC_V8HI, P8V_BUILTIN_ORC_V4SI, P8V_BUILTIN_ORC_V2DI>: Change unsigned usages to use the new *_UNS definition names. (rs6000_gimple_fold_builtin) <ALTIVEC_BUILTIN_VAND_V16QI_UNS, ALTIVEC_BUILTIN_VAND_V16QI, ALTIVEC_BUILTIN_VAND_V8HI_UNS, ALTIVEC_BUILTIN_VAND_V8HI, ALTIVEC_BUILTIN_VAND_V4SI_UNS, ALTIVEC_BUILTIN_VAND_V4SI, ALTIVEC_BUILTIN_VAND_V2DI_UNS, ALTIVEC_BUILTIN_VAND_V2DI, ALTIVEC_BUILTIN_VAND_V4SF, ALTIVEC_BUILTIN_VAND_V2DF, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, ALTIVEC_BUILTIN_VANDC_V16QI, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, ALTIVEC_BUILTIN_VANDC_V8HI, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, ALTIVEC_BUILTIN_VANDC_V4SI, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, ALTIVEC_BUILTIN_VANDC_V2DI, ALTIVEC_BUILTIN_VANDC_V4SF, ALTIVEC_BUILTIN_VANDC_V2DF, P8V_BUILTIN_NAND_V16QI_UNS, P8V_BUILTIN_NAND_V8HI_UNS, P8V_BUILTIN_NAND_V4SI_UNS, P8V_BUILTIN_NAND_V2DI_UNS, P8V_BUILTIN_NAND_V2DI, ALTIVEC_BUILTIN_VOR_V16QI_UNS, ALTIVEC_BUILTIN_VOR_V16QI, ALTIVEC_BUILTIN_VOR_V8HI_UNS, ALTIVEC_BUILTIN_VOR_V8HI, ALTIVEC_BUILTIN_VOR_V4SI_UNS, ALTIVEC_BUILTIN_VOR_V4SI, ALTIVEC_BUILTIN_VOR_V2DI_UNS, ALTIVEC_BUILTIN_VOR_V2DI, ALTIVEC_BUILTIN_VOR_V4SF, ALTIVEC_BUILTIN_VOR_V2DF, P8V_BUILTIN_ORC_V16QI_UNS, P8V_BUILTIN_ORC_V8HI_UNS, P8V_BUILTIN_ORC_V4SI_UNS, P8V_BUILTIN_ORC_V2DI_UNS, P8V_BUILTIN_ORC_V2DI, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, ALTIVEC_BUILTIN_VXOR_V16QI, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, ALTIVEC_BUILTIN_VXOR_V8HI, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, ALTIVEC_BUILTIN_VXOR_V4SI, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, ALTIVEC_BUILTIN_VXOR_V2DI, ALTIVEC_BUILTIN_VXOR_V4SF, ALTIVEC_BUILTIN_VXOR_V2DF, ALTIVEC_BUILTIN_VNOR_V16QI_UNS, ALTIVEC_BUILTIN_VNOR_V16QI, ALTIVEC_BUILTIN_VNOR_V8HI_UNS, ALTIVEC_BUILTIN_VNOR_V8HI, ALTIVEC_BUILTIN_VNOR_V4SI_UNS, ALTIVEC_BUILTIN_VNOR_V4SI, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, ALTIVEC_BUILTIN_VNOR_V2DI, ALTIVEC_BUILTIN_VNOR_V4SF, ALTIVEC_BUILTIN_VNOR_V2DF>: Use new definition names. (builtin_function_type) <ALTIVEC_BUILTIN_VAND_V16QI_UNS, ALTIVEC_BUILTIN_VAND_V8HI_UNS, ALTIVEC_BUILTIN_VAND_V4SI_UNS, ALTIVEC_BUILTIN_VAND_V2DI_UNS, ALTIVEC_BUILTIN_VANDC_V16QI_UNS, ALTIVEC_BUILTIN_VANDC_V8HI_UNS, ALTIVEC_BUILTIN_VANDC_V4SI_UNS, ALTIVEC_BUILTIN_VANDC_V2DI_UNS, ALTIVEC_BUILTIN_VNOR_V16QI_UNS, ALTIVEC_BUILTIN_VNOR_V8HI_UNS, ALTIVEC_BUILTIN_VNOR_V4SI_UNS, ALTIVEC_BUILTIN_VNOR_V2DI_UNS, ALTIVEC_BUILTIN_VOR_V16QI_UNS, ALTIVEC_BUILTIN_VOR_V8HI_UNS, ALTIVEC_BUILTIN_VOR_V4SI_UNS, ALTIVEC_BUILTIN_VOR_V2DI_UNS, ALTIVEC_BUILTIN_VXOR_V16QI_UNS, ALTIVEC_BUILTIN_VXOR_V8HI_UNS, ALTIVEC_BUILTIN_VXOR_V4SI_UNS, ALTIVEC_BUILTIN_VXOR_V2DI_UNS, P8V_BUILTIN_EQV_V16QI_UNS, P8V_BUILTIN_EQV_V8HI_UNS, P8V_BUILTIN_EQV_V4SI_UNS, P8V_BUILTIN_EQV_V2DI_UNS, P8V_BUILTIN_EQV_V1TI_UNS, P8V_BUILTIN_NAND_V16QI_UNS, P8V_BUILTIN_NAND_V8HI_UNS, P8V_BUILTIN_NAND_V4SI_UNS, P8V_BUILTIN_NAND_V2DI_UNS, P8V_BUILTIN_NAND_V1TI_UNS, P8V_BUILTIN_ORC_V16QI_UNS, P8V_BUILTIN_ORC_V8HI_UNS, P8V_BUILTIN_ORC_V4SI_UNS, P8V_BUILTIN_ORC_V2DI_UNS, P8V_BUILTIN_ORC_V1TI_UNS>: Handle unsigned builtins. gcc/testsuite/ PR target/92923 * gcc.target/powerpc/pr92923-1.c: New test. * gcc.target/powerpc/pr92923-2.c: Likewise. From-SVN: r279772 | |||||
2019-12-30 | Remove assert in reshape_init_r. | Marek Polacek | 2 | -1/+4 | |
Asserting !BRACE_ENCLOSED_INITIALIZER_P seems pretty pointless, since that checks for init_list_type_node, and a compound literal won't have that type, nor will we see that type if we just checked that it's something else. * decl.c (reshape_init_r): Remove assert. From-SVN: r279771 | |||||
2019-12-30 | decl2.c (delete_sanity): Add location_t parameter and use it throughout. | Paolo Carlini | 13 | -81/+119 | |
/gcc/cp 2019-12-30 Paolo Carlini <paolo.carlini@oracle.com> * decl2.c (delete_sanity): Add location_t parameter and use it throughout. * init.c (build_vec_delete_1): Likewise. (build_delete): Likewise. (build_vec_delete): Likewise. (perform_target_ctor): Adjust call. (perform_member_init): Likewise. (build_vec_init): Likewise. * decl.c (cxx_maybe_build_cleanup): Likewise. * pt.c (tsubst_copy_and_build): Likewise. * parser.c (cp_parser_delete_expression): Likewise, pass the combined_loc. * cp-tree.h: Update declarations. /libcc1 2019-12-30 Paolo Carlini <paolo.carlini@oracle.com> * libcp1plugin.cc (plugin_build_unary_expr): Update delete_sanity call. /gcc/testsuite 2019-12-30 Paolo Carlini <paolo.carlini@oracle.com> * g++.dg/init/delete1.C: Check locations too. * g++.dg/ipa/pr85607.C: Likewise. * g++.dg/warn/Wdelete-incomplete-1.C: Likewise. * g++.dg/warn/delete-non-virtual-dtor.C: Likewise. * g++.dg/warn/incomplete1.C: Likewise. From-SVN: r279768 | |||||
2019-12-30 | re PR fortran/91651 ([F03] Implement KIND argument for INDEX) | Thomas Koenig | 2 | -1/+6 | |
2019-12-30 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/91651 * gfortran.dg/index_3.f90: Fix PR number. From-SVN: r279766 | |||||
2019-12-30 | re PR fortran/91651 ([F03] Implement KIND argument for INDEX) | Thomas Koenig | 2 | -2/+2 | |
2019-12-30 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/91651 Fix PR numbers in ChangeLog. From-SVN: r279765 | |||||
2019-12-30 | Remove KIND argument from INDEX so it does not mess up scalarization. | Thomas Koenig | 7 | -14/+113 | |
2019-12-30 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/91541 * intrinsic.c (add_sym_4ind): New function. (add_functions): Use it for INDEX. (resolve_intrinsic): Also call f1m for INDEX. * intrinsic.h (gfc_resolve_index_func): Adjust prototype to take a gfc_arglist instead of individual arguments. * iresolve.c (gfc_resolve_index_func): Adjust arguments. Remove KIND argument if present, and make sure this is not done twice. * trans-decl.c: Include "intrinsic.h". (gfc_get_extern_function_decl): Special case for resolving INDEX. 2019-12-30 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/91541 * gfortran.dg/index_3.f90: New test. From-SVN: r279763 | |||||
2019-12-30 | Catch division by zero errors in array sizes. | Thomas Koenig | 6 | -4/+59 | |
2019-12-30 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/92961 * gfortran.h (gfc_seen_div0): Add declaration. * arith.h (gfc_seen_div0): Add definition. (eval_intrinsic): For integer division by zero, set gfc_seen_div0. * decl.c (variable_decl): If resolution resp. simplification fails for array spec and a division of zero error has been seen, return MATCH_ERROR. 2019-12-30 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/92961 * gfortran.dg/arith_divide_2.f90: New test. From-SVN: r279762 | |||||
2019-12-30 | Daily bump. | GCC Administrator | 1 | -1/+1 | |
From-SVN: r279761 | |||||
2019-12-30 | re PR c++/92745 (Initializing array with vec4 results in compile error) | Jakub Jelinek | 2 | -0/+6 | |
PR c++/92745 * g++.dg/cpp0x/initlist118.C: Add -Wno-psabi -w to dg-options. From-SVN: r279758 | |||||
2019-12-29 | PR c++/88337 - Implement P1327R1: Allow dynamic_cast in constexpr. | Marek Polacek | 21 | -1/+886 | |
This patch implements <http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p1327r1.html>. When build_dynamic_cast realizes that a dynamic_cast needs a run-time check, it generates a call to __dynamic_cast -- see dyncast.cc in libsupc++ for its definition. The gist of my approach is to evaluate such a call at compile time. * constexpr.c (cxx_dynamic_cast_fn_p): New function. (extract_obj_from_addr_offset): New function. (get_component_with_type): New function. (cxx_eval_dynamic_cast_fn): New function. (cxx_eval_call_expression): Call cxx_eval_dynamic_cast_fn for a call to __dynamic_cast. (potential_constant_expression_1): Don't give up on cxx_dynamic_cast_fn_p. * rtti.c (build_dynamic_cast_1): When creating a call to __dynamic_cast, use the location of the original expression. * g++.dg/cpp2a/constexpr-dynamic1.C: New test. * g++.dg/cpp2a/constexpr-dynamic10.C: New test. * g++.dg/cpp2a/constexpr-dynamic11.C: New test. * g++.dg/cpp2a/constexpr-dynamic12.C: New test. * g++.dg/cpp2a/constexpr-dynamic13.C: New test. * g++.dg/cpp2a/constexpr-dynamic14.C: New test. * g++.dg/cpp2a/constexpr-dynamic15.C: New test. * g++.dg/cpp2a/constexpr-dynamic16.C: New test. * g++.dg/cpp2a/constexpr-dynamic17.C: New test. * g++.dg/cpp2a/constexpr-dynamic2.C: New test. * g++.dg/cpp2a/constexpr-dynamic3.C: New test. * g++.dg/cpp2a/constexpr-dynamic4.C: New test. * g++.dg/cpp2a/constexpr-dynamic5.C: New test. * g++.dg/cpp2a/constexpr-dynamic6.C: New test. * g++.dg/cpp2a/constexpr-dynamic7.C: New test. * g++.dg/cpp2a/constexpr-dynamic8.C: New test. * g++.dg/cpp2a/constexpr-dynamic9.C: New test. From-SVN: r279755 | |||||
2019-12-29 | re PR target/93078 (Missing fma and round functions auto-vectorization with ↵ | Jakub Jelinek | 8 | -25/+96 | |
x86-64 (sse2)) PR target/93078 * config/i386/i386-builtins.c (ix86_builtin_vectorized_function): Remove CASE_CFN_RINT handling. * config/i386/i386-builtin.def (IX86_BUILTIN_RINTPD, IX86_BUILTIN_RINTPS, IX86_BUILTIN_RINTPD256, IX86_BUILTIN_RINTPS256): Remove. * config/i386/sse.md (nearbyint<mode>2, rint<mode>2): New expanders with VF iterator. * gcc.target/i386/sse4_1-pr93078.c: New test. * gcc.target/i386/avx-pr93078.c: New test. * gcc.target/i386/avx512f-pr93078.c: New test. From-SVN: r279754 | |||||
2019-12-29 | Unshare DR_STEP before gimplifying it | Richard Sandiford | 4 | -2/+19 | |
In this testcase we use an unmasked SVE loop with an Advanced SIMD epilogue (because we don't yet support fully-masked downward loops). The main loop uses a gather load for the strided access while the epilogue loop builds the access from scalars instead. In both cases we gimplify expressions based on the DR_STEP and insert them in the loop preheader. The problem was that the gather load code didn't copy the DR_STEP before gimplifying it, meaning that the epilogue loop tried to reuse a result from the (non-dominating) main loop preheader. It looks at first glance like there could be other instances of this too, but this patch just deals with the gather/scatter case. 2019-12-29 Richard Sandiford <richard.sandiford@arm.com> gcc/ * tree-vect-stmts.c (vect_get_strided_load_store_ops): Copy DR_STEP before gimplifying it. gcc/testsuite/ * gcc.dg/vect/vect-strided-epilogue-1.c: New test. From-SVN: r279753 | |||||
2019-12-29 | Check for a supported comparison when using EXTRACT_LAST_REDUCTION | Richard Sandiford | 4 | -0/+34 | |
The EXTRACT_LAST_REDUCTION handling needs to generate a separate comparison instruction that feeds the vector mask argument of the IFN_EXTRACT_LAST call. We weren't checking whether that comparison was supported, leading to an ICE on the testcase. 2019-12-29 Richard Sandiford <richard.sandiford@arm.com> gcc/ * tree-vect-stmts.c (vectorizable_condition): For extract-last reductions, check that the target supports the required comparison operation. gcc/testsuite/ * gcc.dg/vect/vect-cond-12.c: New test. From-SVN: r279752 | |||||
2019-12-29 | Daily bump. | GCC Administrator | 1 | -1/+1 | |
From-SVN: r279751 | |||||
2019-12-28 | Daily bump. | GCC Administrator | 1 | -1/+1 | |
From-SVN: r279746 | |||||
2019-12-27 | [AArch64] Fix typo in V_INT_CONTAINER | Richard Sandiford | 4 | -1/+22 | |
All VNx2 V_INT_CONTAINER entries should map to VNx2DI. The lower-case version was already correct. 2019-12-27 Richard Sandiford <richard.sandiford@arm.com> gcc/ * config/aarch64/iterators.md (V_INT_CONTAINER): Fix VNx2SF entry. gcc/testsuite/ * gcc.target/aarch64/sve/mixed_size_11.c: New test. From-SVN: r279743 | |||||
2019-12-27 | Add missing target check for fully-masked fold-left reductions | Richard Sandiford | 4 | -0/+35 | |
The fold-left reduction code has a (rarely-used) fallback that handles cases in which the loop is fully-masked and the target has no native support for the reduction. The fallback includea a VEC_COND_EXPR between the reduction vector and a safe value, so we should check whether that VEC_COND_EXPR is supported. 2019-12-27 Richard Sandiford <richard.sandiford@arm.com> gcc/ * tree-vect-loop.c (vectorizable_reduction): Check whether the target supports the required VEC_COND_EXPR operation before allowing the fallback handling of masked fold-left reductions. gcc/testsuite/ * gcc.target/aarch64/sve/mixed_size_10.c: New test. From-SVN: r279742 | |||||
2019-12-27 | Daily bump. | GCC Administrator | 1 | -1/+1 | |
From-SVN: r279739 | |||||
2019-12-26 | re PR c++/92438 (Function declaration parsed incorrectly with `-std=c++1z`) | Jakub Jelinek | 4 | -1/+54 | |
PR c++/92438 * parser.c (cp_parser_constructor_declarator_p): If open paren is followed by RID_ATTRIBUTE, skip over the attribute tokens and try to parse type specifier. * g++.dg/ext/attrib61.C: New test. From-SVN: r279736 | |||||
2019-12-26 | Daily bump. | GCC Administrator | 1 | -1/+1 | |
From-SVN: r279735 | |||||
2019-12-25 | Daily bump. | GCC Administrator | 1 | -1/+1 | |
From-SVN: r279730 | |||||
2019-12-24 | rs6000: re-enable web and rnreg with -funroll-loops | Jiufu Guo | 2 | -4/+16 | |
Previously, limited unrolling was enabled at O2 for powerpc in r278034. At that time, -fweb and -frename-registers were not enabled together with -funroll-loops even for -O3. After that, we notice there are some performance degradations on SPEC2006fp which caused by without web and rnreg. This patch enable -fweb and -frename-registers for -funroll-loops to align original behavior before r278034. gcc/ 2019-12-23 Jiufu Guo <guojiufu@linux.ibm.com> * config/rs6000/rs6000.c (rs6000_option_override_internal): Enable -fweb and -frename-registers with -funroll-loops From-SVN: r279725 | |||||
2019-12-24 | re PR go/93020 (Final patches to build gcc-10 on GNU/Hurd) | Ian Lance Taylor | 1 | -1/+1 | |
PR go/93020 libgo: Hurd portability patches By Svante Signell. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/212409 From-SVN: r279724 | |||||
2019-12-24 | Daily bump. | GCC Administrator | 1 | -1/+1 | |
From-SVN: r279723 | |||||
2019-12-23 | Restrict 'c-c++-common/goacc/mdc-1.c' to LP64, LLP64 | Thomas Schwinge | 2 | -1/+6 | |
The tree dump scanning has certain expectations. gcc/testsuite/ * c-c++-common/goacc/mdc-1.c: Restrict to LP64, LLP64. From-SVN: r279720 |