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AgeCommit message (Expand)AuthorFilesLines
2023-06-24RISC-V: Support RVV floating-point auto-vectorizationJuzhe-Zhong36-20/+1162
2023-06-23text-art: remove explicit #include of C++ standard library headersDavid Malcolm1-0/+1
2023-06-24Daily bump.GCC Administrator1-0/+37
2023-06-23c++: provide #include hint for missing includes [PR110164]David Malcolm1-0/+10
2023-06-23c++: Add support for -std={c,gnu}++2{c,6}Marek Polacek3-2/+33
2023-06-23Fortran: ABI for scalar CHARACTER(LEN=1),VALUE dummy argument [PR110360]Harald Anlauf1-0/+78
2023-06-23Fix power10 fusion bug with prefixed loads, PR target/105325Michael Meissner2-6/+38
2023-06-23testsuite,objective-c++: Fix imported NSObjCRuntime.h.Iain Sandoe1-0/+3
2023-06-23[aarch64/match.pd] Fix ICE observed in PR110280.Prathamesh Kulkarni1-0/+12
2023-06-23Daily bump.GCC Administrator1-0/+76
2023-06-22tree-optimization/110332 - fix ICE with phipropRichard Biener3-0/+39
2023-06-22i386: Convert ptestz of pandn into ptestc.Roger Sayle8-2/+168
2023-06-21analyzer: add text-art visualizations of out-of-bounds accesses [PR106626]David Malcolm25-8/+1048
2023-06-21diagnostics: add support for "text art" diagramsDavid Malcolm7-0/+500
2023-06-21testsuite: move handle-multiline-outputs to before check for blank linesDavid Malcolm6-15/+21
2023-06-22Daily bump.GCC Administrator1-0/+49
2023-06-21Fortran: Fix some bugs in associate [PR87477]Paul Thomas5-3/+163
2023-06-21Fortran: Seg fault passing string to type cptr dummy [PR108961].Paul Thomas1-0/+26
2023-06-21vect: Add testcases for unsigned conversions [PR110018]Uros Bizjak2-10/+104
2023-06-21aarch64: Avoid same input and output Z register for gather loadsKyrylo Tkachov2-0/+128
2023-06-21[i386] Reject too large vectors for partial vector vectorizationRichard Biener2-0/+25
2023-06-21x86: make VPTERNLOG* usable on less than 512-bit operands with just AVX512FJan Beulich1-0/+32
2023-06-21x86: add -mprefer-vector-width=512 to new avx512f-dupv2di.c testcaseJan Beulich1-1/+1
2023-06-21Use intermiediate integer type for float_expr/fix_trunc_expr when direct opta...liuhongt1-0/+94
2023-06-21Daily bump.GCC Administrator1-0/+239
2023-06-20libcpp: Improve location for macro names [PR66290]Lewis Hyatt25-333/+385
2023-06-20aarch64: Fix gcc.target/aarch64/sve/pcs failuresRichard Sandiford67-92/+95
2023-06-20tree-ssa-math-opts: Small uaddc/usubc pattern matching improvement [PR79173]Jakub Jelinek1-0/+33
2023-06-20ipa-sra: Disable candidates with no known callers (PR 110276)Martin Jambor1-0/+15
2023-06-20rs6000: Add builtins for IEEE 128-bit floating point valuesCarl Love3-0/+226
2023-06-20RISC-V: testsuite: Add missing -mabi=lp64d.Robin Dapp9-9/+9
2023-06-20RISC-V: Set the natural size of constant vector mask modes to one RVV data ve...Li Xu1-0/+11
2023-06-20RISC-V: Optimize codegen of VLA SLPJuzhe-Zhong3-0/+92
2023-06-20RISC-V: testsuite: Add -Wno-psabi to vec_set/vec_extract testcases.Robin Dapp10-10/+10
2023-06-20RISC-V: testsuite: Fix vmul test expectation and fix -ffast-math.Robin Dapp5-3/+5
2023-06-20Improve DSE to handle stores before __builtin_unreachable ()Richard Biener2-1/+18
2023-06-20aarch64: Optimise ADDP with same source operandsKyrylo Tkachov1-0/+20
2023-06-20x86: correct and improve "*vec_dupv2di"Jan Beulich1-0/+13
2023-06-20debug/110295 - mixed up early/late debug for member DIEsRichard Biener1-0/+19
2023-06-20RISC-V: Fix fails of testcasesJuzhe-Zhong4-4/+4
2023-06-20RISC-V: Add tuple vector mode psABI checking and simplify codeLehua Ding40-38/+87
2023-06-20Daily bump.GCC Administrator1-0/+310
2023-06-19RISC-V: Save and restore FCSR in interrupt functions to avoid program errors.Jin Ma3-0/+44
2023-06-19optimize std::max earlyJan Hubicka2-2/+16
2023-06-19RISC-V: Bugfix for RVV widenning reduction in ZVE32/64Pan Li8-0/+90
2023-06-19RISC-V: Bugfix for RVV float reduction in ZVE32/64Pan Li4-0/+86
2023-06-19amdgcn: implement vector div and mod libfuncsAndrew Stubbs100-7/+953
2023-06-19Remove -save-temps from tests using -fltoRichard Biener9-9/+9
2023-06-19tree-optimization/110298 - CFG cleanup and stale nb_iterationsRichard Biener1-0/+20
2023-06-19simplify-rtx: Simplify VEC_CONCAT of SUBREG and VEC_CONCAT from same vectorKyrylo Tkachov1-0/+28