aboutsummaryrefslogtreecommitdiff
path: root/gcc/testsuite/gcc.target
AgeCommit message (Expand)AuthorFilesLines
2022-10-06aarch64: Remove redundant zero-extends with LDARKyrylo Tkachov1-0/+27
2022-10-06aarch64: Add test for LDAR generation from __atomic_load_nKyrylo Tkachov1-0/+66
2022-10-06aarch64: fix off-by-one in reading cpuinfoPhilipp Tomsich2-0/+23
2022-10-05RISC-V: Introduce RVV header to enable builtin typesJu-Zhe Zhong11-0/+454
2022-10-05testsuite: 'b' instruction can't do long enough jumpsTorbjörn SVENSSON2-3/+3
2022-10-05RISC-V: remove deprecate pic code model macroVineet Gupta8-24/+0
2022-10-04aarch64: Define __ARM_FEATURE_RCPCRichard Sandiford1-0/+20
2022-10-03[testsuite][arm] Fix cmse-15.c expected outputTorbjörn SVENSSON1-0/+2
2022-10-03arm: Add missing early clobber to MVE vrev64q_m patternsChristophe Lyon1-0/+17
2022-09-30rs6000: Rework ELFv2 support for -fpatchable-function-entry* [PR99888]Kewen Lin6-0/+137
2022-09-30testsuite: [arm] Relax expected register names in MVE testsChristophe Lyon2-58/+58
2022-09-29aarch64: Simplify generation of .arch stringsRichard Sandiford8-8/+8
2022-09-29aarch64: Reorder an entry in aarch64-option-extensions.defRichard Sandiford9-10/+10
2022-09-29aarch64: Fix transitive closure of featuresRichard Sandiford2-3/+49
2022-09-29Check nonlinear iv in vect_can_advance_ivs_p.liuhongt1-0/+4
2022-09-28i386: Mark XMM4-XMM6 as clobbered by encodekey128/encodekey256H.J. Lu2-2/+0
2022-09-29RISC-V: Add ABI-defined RVV types.Ju-Zhe Zhong8-0/+488
2022-09-28arm: Define __ARM_FEATURE_AES and __ARM_FEATURE_SHA2 when march +crypto is se...Andrea Corallo1-0/+8
2022-09-28testsuite: Skip intrinsics test if armTorbjörn SVENSSON6-6/+6
2022-09-26[RFA] Minor improvement to coremark, avoid unconditional jump to returnJeff Law1-0/+41
2022-09-26rs6000: Fix the condition with frame_pointer_needed_indeed [PR96072]Kewen Lin1-0/+14
2022-09-26testsuite: Fix up avx256-unaligned-store-3.c test.Hu, Lin11-1/+1
2022-09-25rs6000: Fix condition of define_expand vec_shr_<mode> [PR100645]Kewen Lin1-0/+13
2022-09-26Support 2-instruction vector shuffle for V4SI/V4SF in ix86_expand_vec_perm_co...liuhongt4-0/+257
2022-09-23testsuite: Skip intrinsics test if armTorbjörn SVENSSON3-3/+3
2022-09-23i386: Optimize code generation of __mm256_zextsi128_si256(__mm_set1_epi8(-1))Hu, Lin18-8/+149
2022-09-22Fix typo in floorv2sf2, should be register_operand for op1, not vector_operand.liuhongt1-0/+24
2022-09-21Don't check can_vec_perm_const_p for nonlinear iv_init when it's constant.liuhongt1-0/+14
2022-09-20replace "the the" typosMartin Liska3-3/+3
2022-09-20Support 64-bit vectorization for single-precision floating rounding operation.liuhongt1-0/+77
2022-09-20middle-end: handle bitop with an invariant induction.[PR105735]konglin12-0/+116
2022-09-20i386: Fixed vec_init_dup_v16bf [PR106887]konglin11-0/+76
2022-09-15rs6000: Using pli(paddi) and rotate to build 64bit constantsJiufu Guo2-0/+36
2022-09-14testsuite/s390: Add -mzarch to ifcvt test cases.Robin Dapp5-10/+11
2022-09-14testsuite/s390: Fix vperm-rev testcases.Robin Dapp2-4/+4
2022-09-14Check another epilog variable peeling case in vectorizable_nonlinear_induction.liuhongt2-0/+34
2022-09-13rs6000: Fix the check of bif argument number [PR104482]Kewen Lin1-0/+16
2022-09-13aarch64: Vector move fixes for +nosimdRichard Sandiford19-0/+566
2022-09-13aarch64: Disassociate ls64 from simdRichard Sandiford1-0/+9
2022-09-10xtensa: constantsynth: Add new 3-insns synthesis patternTakayuki 'January June' Suwa1-0/+11
2022-09-09Handle OPAQUE_TYPE specially in verify_type [PR106833]Kewen Lin1-0/+14
2022-09-07sched1: Fix -fcompare-debug issue in schedule_region [PR105586]Surya Kumari Jangala1-0/+19
2022-09-07aarch64: Fix +nosimd handling of FPR movesRichard Sandiford11-0/+707
2022-09-07aarch64: Prevent FPR register asms for +nofpRichard Sandiford1-0/+19
2022-09-07Extend vectorizer to handle nonlinear induction for neg, mul/lshift/rshift wi...liuhongt6-0/+346
2022-09-06Fix _mm512_cvt_roundps_ph to generate sae instruction.liuhongt1-0/+18
2022-09-05i386: avoid zero extension for crc32qAlexander Monakov1-0/+13
2022-09-05aarch64: Suggest an -mcpu option when user passes CPU name to -marchKyrylo Tkachov1-0/+13
2022-09-05RISC-V: Support Zmmul extensionLiaoShihua2-0/+40
2022-09-05LoongArch: add -mdirect-extern-access optionXi Ruoyao2-0/+12
generated by cgit v1.1 at 2025-01-10 02:38:53 +0000