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AgeCommit message (Expand)AuthorFilesLines
2020-04-08add missing fp16 optionsAlexandre Oliva1-2/+1
2020-04-08x86: Insert ENDBR if function will be called indirectlyH.J. Lu3-0/+60
2020-04-08i386: Don't use AVX512F integral masks for V*TImode [PR94438]Jakub Jelinek2-0/+26
2020-04-08[Arm] Implement CDE predicated intrinsics for MVE registersMatthew Malcomson8-130/+1418
2020-04-08[Arm] Implement CDE intrinsics for MVE registers.Matthew Malcomson5-0/+1509
2020-04-08[Arm] Implement scalar Custom Datapath Extension intrinsicsMatthew Malcomson2-0/+340
2020-04-08arm: CDE intrinsics using FPU/MVE S/D registersDennis Zhang3-0/+277
2020-04-08arm: CLI for Custom Datapath Extension (CDE)Dennis Zhang1-0/+98
2020-04-08update polytypes.c -flax-vector-conversions msgAlexandre Oliva1-1/+1
2020-04-07arm: MVE: Add C++ polymorphism and fix some more issuesAndre Simoes Dias Vieira2-2/+2
2020-04-07arm: MVE: Fix -Wall testismsAndre Simoes Dias Vieira4-21/+24
2020-04-07arm: MVE: Fix vec extracts to memoryAndre Simoes Dias Vieira1-0/+40
2020-04-07arm: MVE Fix immediate constraints on some vector instructionsAndre Simoes Dias Vieira1-0/+62
2020-04-07arm: MVE: Fix constant load patternAndre Simoes Dias Vieira5-47/+19
2020-04-07arm: MVE: Fix polymorphism for scalars and constantsAndre Simoes Dias Vieira8-8/+8
2020-04-07i386: Fix V{64QI,32HI}mode constant permutations [PR94509]Jakub Jelinek2-0/+68
2020-04-07i386: Fix emit_reduc_half on V{64Q,32H}Imode [PR94500]Jakub Jelinek1-0/+28
2020-04-06skip gcc.target/arm/div64-unwinding.c on vxworks_kernel targetsJoel Brobecker1-0/+1
2020-04-05Microblaze: Modified trap instruction There is a bug in trap instruction gene...Nagaraju Mekala1-1/+1
2020-04-03x86: Mark scratch operand in ssse3_pshufbv8qi3 as earlyclobberH.J. Lu2-0/+88
2020-04-03i386: Fix up handling of OPTION_MASK_ISA_MMX builtins [PR94461]Jakub Jelinek1-0/+12
2020-04-03i386: Fix vph{add,subs?}[wd] 256-bit AVX2 RTL patterns [PR94460]Jakub Jelinek1-0/+31
2020-04-03arm: MVE: Fix unintended change to testsAndre Simoes Dias Vieira9-9/+9
2020-04-03AArch64: Fix options canonicalization for assemblerTamar Christina16-0/+176
2020-04-02aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435]Jakub Jelinek1-0/+25
2020-04-02[ARM]: Fix for MVE ACLE intrinsics with writeback (PR94317).Srinath Parvathaneni10-10/+40
2020-03-31vect: ICE: in vectorizable_load, at tree-vect-stmts.c:9173 [PR94398]Felix Yang1-0/+24
2020-03-31[ARM][PATCH]: Add MVE ACLE intrinsics vbicq_n_* polymorphic variant support.Srinath Parvathaneni4-4/+28
2020-03-31[ARM][PATCH]: Add support for MVE ACLE intrinsics polymorphic variants for +m...Srinath Parvathaneni22-22/+22
2020-03-30RS6000 Allow builtin initialization regardless of maskWill Schmidt7-2/+215
2020-03-30Update bswap64-4 test for desired resultsWill Schmidt1-2/+4
2020-03-30i386: Fix up *one_cmplv*2* insn with avx512f [PR94343]Jakub Jelinek2-0/+24
2020-03-30XFAIL pr57193.c test-case.Martin Liska1-1/+2
2020-03-30Fix vextract* masked patterns [PR93069]Jakub Jelinek1-0/+12
2020-03-26Fix UNRESOLVED test-case.Martin Liska1-4/+1
2020-03-26Skip test for non-x86 targets.Martin Liska1-0/+1
2020-03-25i386: Fix ix86_add_reg_usage_to_vzeroupper [PR94308]Jakub Jelinek1-0/+31
2020-03-25Make target_clones resolver fn static if possible.Martin Liska2-2/+16
2020-03-25sccvn: Fix buffer overflow in push_partial_def [PR94300]Jakub Jelinek1-0/+21
2020-03-24[testsuite,arm] use arm_fp_dp_ok effective-targetChristophe Lyon8-16/+16
2020-03-24[testsuite,arm] cmp-2.c: Move double-precision tests to cmp-3.cChristophe Lyon2-3/+50
2020-03-24if-conv: Fix -fcompare-debug bugs in ifcvt_local_dce [PR94283]Jakub Jelinek1-0/+5
2020-03-23[ARM][GCC][14x]: MVE ACLE whole vector left shift with carry intrinsics.Srinath Parvathaneni6-0/+138
2020-03-23[ARM][GCC][13x]: MVE ACLE scalar shift intrinsics.Srinath Parvathaneni16-0/+208
2020-03-23[ARM][GCC][12x]: MVE ACLE intrinsics to set and get vector lane.Srinath Parvathaneni20-0/+370
2020-03-23testsuite, arm: Change tests to assembleAndre Vieira2364-2380/+19
2020-03-20[ARM][GCC][11x]: MVE ACLE vector interleaving store and deinterleaving load i...Srinath Parvathaneni40-0/+920
2020-03-20c-family: Tighten vector handling in type_for_mode [PR94072]Richard Sandiford1-0/+9
2020-03-20[ARM][GCC][10x]: MVE ACLE intrinsics "add with carry across beats" and "beat-...Srinath Parvathaneni16-0/+367
2020-03-20[ARM][GCC][9x]: MVE ACLE predicated intrinsics with (dont-care) variant.Srinath Parvathaneni379-4/+8157
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